llvm/lib/Target/Mips/MipsTargetMachine.h

   1 //===- MipsTargetMachine.h - Define TargetMachine for Mips ------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file declares the Mips specific subclass of TargetMachine.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
  14 #define LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H
  15
  16 #include "MCTargetDesc/MipsABIInfo.h"
  17 #include "MipsSubtarget.h"
  18 #include "llvm/ADT/Optional.h"
  19 #include "llvm/ADT/StringMap.h"
  20 #include "llvm/ADT/StringRef.h"
  21 #include "llvm/Support/CodeGen.h"
  22 #include "llvm/Target/TargetMachine.h"
  23 #include <memory>
  24
  25 namespace llvm {
  26
  27 class MipsTargetMachine : public LLVMTargetMachine {
  28   bool isLittle;
  29   std::unique_ptr<TargetLoweringObjectFile> TLOF;
  30   // Selected ABI
  31   MipsABIInfo ABI;
  32   const MipsSubtarget *Subtarget;
  33   MipsSubtarget DefaultSubtarget;
  34   MipsSubtarget NoMips16Subtarget;
  35   MipsSubtarget Mips16Subtarget;
  36
  37   mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
  38
  39 public:
  40   MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
  41                     StringRef FS, const TargetOptions &Options,
  42                     Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
  43                     CodeGenOpt::Level OL, bool JIT, bool isLittle);
  44   ~MipsTargetMachine() override;
  45
  46   TargetTransformInfo getTargetTransformInfo(const Function &F) override;
  47
  48   const MipsSubtarget *getSubtargetImpl() const {
  49     if (Subtarget)
  50       return Subtarget;
  51     return &DefaultSubtarget;
  52   }
  53
  54   const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
  55
  56   /// Reset the subtarget for the Mips target.
  57   void resetSubtarget(MachineFunction *MF);
  58
  59   // Pass Pipeline Configuration
  60   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
  61
  62   TargetLoweringObjectFile *getObjFileLowering() const override {
  63     return TLOF.get();
  64   }
  65
  66   /// Returns true if a cast between SrcAS and DestAS is a noop.
  67   bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
  68     // Mips doesn't have any special address spaces so we just reserve
  69     // the first 256 for software use (e.g. OpenCL) and treat casts
  70     // between them as noops.
  71     return SrcAS < 256 && DestAS < 256;
  72   }
  73
  74   bool isLittleEndian() const { return isLittle; }
  75   const MipsABIInfo &getABI() const { return ABI; }
  76 };
  77
  78 /// Mips32/64 big endian target machine.
  79 ///
  80 class MipsebTargetMachine : public MipsTargetMachine {
  81   virtual void anchor();
  82
  83 public:
  84   MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
  85                       StringRef FS, const TargetOptions &Options,
  86                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
  87                       CodeGenOpt::Level OL, bool JIT);
  88 };
  89
  90 /// Mips32/64 little endian target machine.
  91 ///
  92 class MipselTargetMachine : public MipsTargetMachine {
  93   virtual void anchor();
  94
  95 public:
  96   MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
  97                       StringRef FS, const TargetOptions &Options,
  98                       Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
  99                       CodeGenOpt::Level OL, bool JIT);
 100 };
 101
 102 } // end namespace llvm
 103
 104 #endif // LLVM_LIB_TARGET_MIPS_MIPSTARGETMACHINE_H