[ORC] Add std::tuple support to SimplePackedSerialization.
[llvm-project.git] / llvm / lib / Target / PowerPC / PPCBranchSelector.cpp
blobfa6713dcca80f89741c3e4dabaa8abb87d3a93c2
1 //===-- PPCBranchSelector.cpp - Emit long conditional branches ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a pass that scans a machine function to determine which
10 // conditional branches need more than 16 bits of displacement to reach their
11 // target basic block. It does this in two passes; a calculation of basic block
12 // positions pass, and a branch pseudo op to machine branch opcode pass. This
13 // pass should be run last, just before the assembly printer.
15 //===----------------------------------------------------------------------===//
17 #include "MCTargetDesc/PPCPredicates.h"
18 #include "PPC.h"
19 #include "PPCInstrBuilder.h"
20 #include "PPCInstrInfo.h"
21 #include "PPCSubtarget.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/Support/MathExtras.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include <algorithm>
29 using namespace llvm;
31 #define DEBUG_TYPE "ppc-branch-select"
33 STATISTIC(NumExpanded, "Number of branches expanded to long format");
34 STATISTIC(NumPrefixed, "Number of prefixed instructions");
35 STATISTIC(NumPrefixedAligned,
36 "Number of prefixed instructions that have been aligned");
38 namespace {
39 struct PPCBSel : public MachineFunctionPass {
40 static char ID;
41 PPCBSel() : MachineFunctionPass(ID) {
42 initializePPCBSelPass(*PassRegistry::getPassRegistry());
45 // The sizes of the basic blocks in the function (the first
46 // element of the pair); the second element of the pair is the amount of the
47 // size that is due to potential padding.
48 std::vector<std::pair<unsigned, unsigned>> BlockSizes;
50 // The first block number which has imprecise instruction address.
51 int FirstImpreciseBlock = -1;
53 unsigned GetAlignmentAdjustment(MachineBasicBlock &MBB, unsigned Offset);
54 unsigned ComputeBlockSizes(MachineFunction &Fn);
55 void modifyAdjustment(MachineFunction &Fn);
56 int computeBranchSize(MachineFunction &Fn,
57 const MachineBasicBlock *Src,
58 const MachineBasicBlock *Dest,
59 unsigned BrOffset);
61 bool runOnMachineFunction(MachineFunction &Fn) override;
63 MachineFunctionProperties getRequiredProperties() const override {
64 return MachineFunctionProperties().set(
65 MachineFunctionProperties::Property::NoVRegs);
68 StringRef getPassName() const override { return "PowerPC Branch Selector"; }
70 char PPCBSel::ID = 0;
73 INITIALIZE_PASS(PPCBSel, "ppc-branch-select", "PowerPC Branch Selector",
74 false, false)
76 /// createPPCBranchSelectionPass - returns an instance of the Branch Selection
77 /// Pass
78 ///
79 FunctionPass *llvm::createPPCBranchSelectionPass() {
80 return new PPCBSel();
83 /// In order to make MBB aligned, we need to add an adjustment value to the
84 /// original Offset.
85 unsigned PPCBSel::GetAlignmentAdjustment(MachineBasicBlock &MBB,
86 unsigned Offset) {
87 const Align Alignment = MBB.getAlignment();
88 if (Alignment == Align(1))
89 return 0;
91 const Align ParentAlign = MBB.getParent()->getAlignment();
93 if (Alignment <= ParentAlign)
94 return offsetToAlignment(Offset, Alignment);
96 // The alignment of this MBB is larger than the function's alignment, so we
97 // can't tell whether or not it will insert nops. Assume that it will.
98 if (FirstImpreciseBlock < 0)
99 FirstImpreciseBlock = MBB.getNumber();
100 return Alignment.value() + offsetToAlignment(Offset, Alignment);
103 /// We need to be careful about the offset of the first block in the function
104 /// because it might not have the function's alignment. This happens because,
105 /// under the ELFv2 ABI, for functions which require a TOC pointer, we add a
106 /// two-instruction sequence to the start of the function.
107 /// Note: This needs to be synchronized with the check in
108 /// PPCLinuxAsmPrinter::EmitFunctionBodyStart.
109 static inline unsigned GetInitialOffset(MachineFunction &Fn) {
110 unsigned InitialOffset = 0;
111 if (Fn.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
112 !Fn.getRegInfo().use_empty(PPC::X2))
113 InitialOffset = 8;
114 return InitialOffset;
117 /// Measure each MBB and compute a size for the entire function.
118 unsigned PPCBSel::ComputeBlockSizes(MachineFunction &Fn) {
119 const PPCInstrInfo *TII =
120 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo());
121 unsigned FuncSize = GetInitialOffset(Fn);
123 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
124 ++MFI) {
125 MachineBasicBlock *MBB = &*MFI;
127 // The end of the previous block may have extra nops if this block has an
128 // alignment requirement.
129 if (MBB->getNumber() > 0) {
130 unsigned AlignExtra = GetAlignmentAdjustment(*MBB, FuncSize);
132 auto &BS = BlockSizes[MBB->getNumber()-1];
133 BS.first += AlignExtra;
134 BS.second = AlignExtra;
136 FuncSize += AlignExtra;
139 unsigned BlockSize = 0;
140 unsigned UnalignedBytesRemaining = 0;
141 for (MachineInstr &MI : *MBB) {
142 unsigned MINumBytes = TII->getInstSizeInBytes(MI);
143 if (MI.isInlineAsm() && (FirstImpreciseBlock < 0))
144 FirstImpreciseBlock = MBB->getNumber();
145 if (TII->isPrefixed(MI.getOpcode())) {
146 NumPrefixed++;
148 // All 8 byte instructions may require alignment. Each 8 byte
149 // instruction may be aligned by another 4 bytes.
150 // This means that an 8 byte instruction may require 12 bytes
151 // (8 for the instruction itself and 4 for the alignment nop).
152 // This will happen if an 8 byte instruction can be aligned to 64 bytes
153 // by only adding a 4 byte nop.
154 // We don't know the alignment at this point in the code so we have to
155 // adopt a more pessimistic approach. If an instruction may need
156 // alignment we assume that it does need alignment and add 4 bytes to
157 // it. As a result we may end up with more long branches than before
158 // but we are in the safe position where if we need a long branch we
159 // have one.
160 // The if statement checks to make sure that two 8 byte instructions
161 // are at least 64 bytes away from each other. It is not possible for
162 // two instructions that both need alignment to be within 64 bytes of
163 // each other.
164 if (!UnalignedBytesRemaining) {
165 BlockSize += 4;
166 UnalignedBytesRemaining = 60;
167 NumPrefixedAligned++;
170 UnalignedBytesRemaining -= std::min(UnalignedBytesRemaining, MINumBytes);
171 BlockSize += MINumBytes;
174 BlockSizes[MBB->getNumber()].first = BlockSize;
175 FuncSize += BlockSize;
178 return FuncSize;
181 /// Modify the basic block align adjustment.
182 void PPCBSel::modifyAdjustment(MachineFunction &Fn) {
183 unsigned Offset = GetInitialOffset(Fn);
184 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
185 ++MFI) {
186 MachineBasicBlock *MBB = &*MFI;
188 if (MBB->getNumber() > 0) {
189 auto &BS = BlockSizes[MBB->getNumber()-1];
190 BS.first -= BS.second;
191 Offset -= BS.second;
193 unsigned AlignExtra = GetAlignmentAdjustment(*MBB, Offset);
195 BS.first += AlignExtra;
196 BS.second = AlignExtra;
198 Offset += AlignExtra;
201 Offset += BlockSizes[MBB->getNumber()].first;
205 /// Determine the offset from the branch in Src block to the Dest block.
206 /// BrOffset is the offset of the branch instruction inside Src block.
207 int PPCBSel::computeBranchSize(MachineFunction &Fn,
208 const MachineBasicBlock *Src,
209 const MachineBasicBlock *Dest,
210 unsigned BrOffset) {
211 int BranchSize;
212 Align MaxAlign = Align(4);
213 bool NeedExtraAdjustment = false;
214 if (Dest->getNumber() <= Src->getNumber()) {
215 // If this is a backwards branch, the delta is the offset from the
216 // start of this block to this branch, plus the sizes of all blocks
217 // from this block to the dest.
218 BranchSize = BrOffset;
219 MaxAlign = std::max(MaxAlign, Src->getAlignment());
221 int DestBlock = Dest->getNumber();
222 BranchSize += BlockSizes[DestBlock].first;
223 for (unsigned i = DestBlock+1, e = Src->getNumber(); i < e; ++i) {
224 BranchSize += BlockSizes[i].first;
225 MaxAlign = std::max(MaxAlign, Fn.getBlockNumbered(i)->getAlignment());
228 NeedExtraAdjustment = (FirstImpreciseBlock >= 0) &&
229 (DestBlock >= FirstImpreciseBlock);
230 } else {
231 // Otherwise, add the size of the blocks between this block and the
232 // dest to the number of bytes left in this block.
233 unsigned StartBlock = Src->getNumber();
234 BranchSize = BlockSizes[StartBlock].first - BrOffset;
236 MaxAlign = std::max(MaxAlign, Dest->getAlignment());
237 for (unsigned i = StartBlock+1, e = Dest->getNumber(); i != e; ++i) {
238 BranchSize += BlockSizes[i].first;
239 MaxAlign = std::max(MaxAlign, Fn.getBlockNumbered(i)->getAlignment());
242 NeedExtraAdjustment = (FirstImpreciseBlock >= 0) &&
243 (Src->getNumber() >= FirstImpreciseBlock);
246 // We tend to over estimate code size due to large alignment and
247 // inline assembly. Usually it causes larger computed branch offset.
248 // But sometimes it may also causes smaller computed branch offset
249 // than actual branch offset. If the offset is close to the limit of
250 // encoding, it may cause problem at run time.
251 // Following is a simplified example.
253 // actual estimated
254 // address address
255 // ...
256 // bne Far 100 10c
257 // .p2align 4
258 // Near: 110 110
259 // ...
260 // Far: 8108 8108
262 // Actual offset: 0x8108 - 0x100 = 0x8008
263 // Computed offset: 0x8108 - 0x10c = 0x7ffc
265 // This example also shows when we can get the largest gap between
266 // estimated offset and actual offset. If there is an aligned block
267 // ABB between branch and target, assume its alignment is <align>
268 // bits. Now consider the accumulated function size FSIZE till the end
269 // of previous block PBB. If the estimated FSIZE is multiple of
270 // 2^<align>, we don't need any padding for the estimated address of
271 // ABB. If actual FSIZE at the end of PBB is 4 bytes more than
272 // multiple of 2^<align>, then we need (2^<align> - 4) bytes of
273 // padding. It also means the actual branch offset is (2^<align> - 4)
274 // larger than computed offset. Other actual FSIZE needs less padding
275 // bytes, so causes smaller gap between actual and computed offset.
277 // On the other hand, if the inline asm or large alignment occurs
278 // between the branch block and destination block, the estimated address
279 // can be <delta> larger than actual address. If padding bytes are
280 // needed for a later aligned block, the actual number of padding bytes
281 // is at most <delta> more than estimated padding bytes. So the actual
282 // aligned block address is less than or equal to the estimated aligned
283 // block address. So the actual branch offset is less than or equal to
284 // computed branch offset.
286 // The computed offset is at most ((1 << alignment) - 4) bytes smaller
287 // than actual offset. So we add this number to the offset for safety.
288 if (NeedExtraAdjustment)
289 BranchSize += MaxAlign.value() - 4;
291 return BranchSize;
294 bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
295 const PPCInstrInfo *TII =
296 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo());
297 // Give the blocks of the function a dense, in-order, numbering.
298 Fn.RenumberBlocks();
299 BlockSizes.resize(Fn.getNumBlockIDs());
300 FirstImpreciseBlock = -1;
302 // Measure each MBB and compute a size for the entire function.
303 unsigned FuncSize = ComputeBlockSizes(Fn);
305 // If the entire function is smaller than the displacement of a branch field,
306 // we know we don't need to shrink any branches in this function. This is a
307 // common case.
308 if (FuncSize < (1 << 15)) {
309 BlockSizes.clear();
310 return false;
313 // For each conditional branch, if the offset to its destination is larger
314 // than the offset field allows, transform it into a long branch sequence
315 // like this:
316 // short branch:
317 // bCC MBB
318 // long branch:
319 // b!CC $PC+8
320 // b MBB
322 bool MadeChange = true;
323 bool EverMadeChange = false;
324 while (MadeChange) {
325 // Iteratively expand branches until we reach a fixed point.
326 MadeChange = false;
328 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
329 ++MFI) {
330 MachineBasicBlock &MBB = *MFI;
331 unsigned MBBStartOffset = 0;
332 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
333 I != E; ++I) {
334 MachineBasicBlock *Dest = nullptr;
335 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm())
336 Dest = I->getOperand(2).getMBB();
337 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) &&
338 !I->getOperand(1).isImm())
339 Dest = I->getOperand(1).getMBB();
340 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ ||
341 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) &&
342 !I->getOperand(0).isImm())
343 Dest = I->getOperand(0).getMBB();
345 if (!Dest) {
346 MBBStartOffset += TII->getInstSizeInBytes(*I);
347 continue;
350 // Determine the offset from the current branch to the destination
351 // block.
352 int BranchSize = computeBranchSize(Fn, &MBB, Dest, MBBStartOffset);
354 // If this branch is in range, ignore it.
355 if (isInt<16>(BranchSize)) {
356 MBBStartOffset += 4;
357 continue;
360 // Otherwise, we have to expand it to a long branch.
361 MachineInstr &OldBranch = *I;
362 DebugLoc dl = OldBranch.getDebugLoc();
364 if (I->getOpcode() == PPC::BCC) {
365 // The BCC operands are:
366 // 0. PPC branch predicate
367 // 1. CR register
368 // 2. Target MBB
369 PPC::Predicate Pred = (PPC::Predicate)I->getOperand(0).getImm();
370 Register CRReg = I->getOperand(1).getReg();
372 // Jump over the uncond branch inst (i.e. $PC+8) on opposite condition.
373 BuildMI(MBB, I, dl, TII->get(PPC::BCC))
374 .addImm(PPC::InvertPredicate(Pred)).addReg(CRReg).addImm(2);
375 } else if (I->getOpcode() == PPC::BC) {
376 Register CRBit = I->getOperand(0).getReg();
377 BuildMI(MBB, I, dl, TII->get(PPC::BCn)).addReg(CRBit).addImm(2);
378 } else if (I->getOpcode() == PPC::BCn) {
379 Register CRBit = I->getOperand(0).getReg();
380 BuildMI(MBB, I, dl, TII->get(PPC::BC)).addReg(CRBit).addImm(2);
381 } else if (I->getOpcode() == PPC::BDNZ) {
382 BuildMI(MBB, I, dl, TII->get(PPC::BDZ)).addImm(2);
383 } else if (I->getOpcode() == PPC::BDNZ8) {
384 BuildMI(MBB, I, dl, TII->get(PPC::BDZ8)).addImm(2);
385 } else if (I->getOpcode() == PPC::BDZ) {
386 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2);
387 } else if (I->getOpcode() == PPC::BDZ8) {
388 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ8)).addImm(2);
389 } else {
390 llvm_unreachable("Unhandled branch type!");
393 // Uncond branch to the real destination.
394 I = BuildMI(MBB, I, dl, TII->get(PPC::B)).addMBB(Dest);
396 // Remove the old branch from the function.
397 OldBranch.eraseFromParent();
399 // Remember that this instruction is 8-bytes, increase the size of the
400 // block by 4, remember to iterate.
401 BlockSizes[MBB.getNumber()].first += 4;
402 MBBStartOffset += 8;
403 ++NumExpanded;
404 MadeChange = true;
408 if (MadeChange) {
409 // If we're going to iterate again, make sure we've updated our
410 // padding-based contributions to the block sizes.
411 modifyAdjustment(Fn);
414 EverMadeChange |= MadeChange;
417 BlockSizes.clear();
418 return EverMadeChange;