[ORC] Add std::tuple support to SimplePackedSerialization.
[llvm-project.git] / llvm / lib / Target / SystemZ / SystemZRegisterInfo.h
blob122504d4b44b327ecf81f215a4ee8f9ea9359868
1 //===-- SystemZRegisterInfo.h - SystemZ register information ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H
10 #define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZREGISTERINFO_H
12 #include "SystemZ.h"
13 #include "llvm/CodeGen/TargetRegisterInfo.h"
15 #define GET_REGINFO_HEADER
16 #include "SystemZGenRegisterInfo.inc"
18 namespace llvm {
20 class LiveIntervals;
22 namespace SystemZ {
23 // Return the subreg to use for referring to the even and odd registers
24 // in a GR128 pair. Is32Bit says whether we want a GR32 or GR64.
25 inline unsigned even128(bool Is32bit) {
26 return Is32bit ? subreg_hl32 : subreg_h64;
28 inline unsigned odd128(bool Is32bit) {
29 return Is32bit ? subreg_l32 : subreg_l64;
32 // Reg should be a 32-bit GPR. Return true if it is a high register rather
33 // than a low register.
34 inline bool isHighReg(unsigned int Reg) {
35 if (SystemZ::GRH32BitRegClass.contains(Reg))
36 return true;
37 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32");
38 return false;
40 } // end namespace SystemZ
42 /// A SystemZ-specific class detailing special use registers
43 /// particular for calling conventions.
44 /// It is abstract, all calling conventions must override and
45 /// define the pure virtual member function defined in this class.
46 class SystemZCallingConventionRegisters {
47 public:
48 /// \returns the register that keeps the
49 /// return function address.
50 virtual int getReturnFunctionAddressRegister() = 0;
52 /// \returns the register that keeps the
53 /// stack pointer address.
54 virtual int getStackPointerRegister() = 0;
56 /// \returns the register that keeps the
57 /// frame pointer address.
58 virtual int getFramePointerRegister() = 0;
60 /// \returns an array of all the callee saved registers.
61 virtual const MCPhysReg *
62 getCalleeSavedRegs(const MachineFunction *MF) const = 0;
64 /// \returns the mask of all the call preserved registers.
65 virtual const uint32_t *getCallPreservedMask(const MachineFunction &MF,
66 CallingConv::ID CC) const = 0;
68 /// Destroys the object. Bogus destructor allowing derived classes
69 /// to override it.
70 virtual ~SystemZCallingConventionRegisters(){};
73 /// XPLINK64 calling convention specific use registers
74 /// Particular to z/OS when in 64 bit mode
75 class SystemZXPLINK64Registers : public SystemZCallingConventionRegisters {
76 public:
77 int getReturnFunctionAddressRegister() override final {
78 return SystemZ::R7D;
81 int getStackPointerRegister() override final { return SystemZ::R4D; };
83 int getFramePointerRegister() override final { return SystemZ::R8D; };
85 const MCPhysReg *
86 getCalleeSavedRegs(const MachineFunction *MF) const override final;
88 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
89 CallingConv::ID CC) const override final;
91 /// Destroys the object. Bogus destructor overriding base class destructor
92 ~SystemZXPLINK64Registers(){};
95 /// ELF calling convention specific use registers
96 /// Particular when on zLinux in 64 bit mode
97 class SystemZELFRegisters : public SystemZCallingConventionRegisters {
98 public:
99 int getReturnFunctionAddressRegister() override final {
100 return SystemZ::R14D;
103 int getStackPointerRegister() override final { return SystemZ::R15D; };
105 int getFramePointerRegister() override final { return SystemZ::R11D; };
107 const MCPhysReg *
108 getCalleeSavedRegs(const MachineFunction *MF) const override final;
110 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
111 CallingConv::ID CC) const override final;
113 /// Destroys the object. Bogus destructor overriding base class destructor
114 ~SystemZELFRegisters(){};
117 struct SystemZRegisterInfo : public SystemZGenRegisterInfo {
118 public:
119 SystemZRegisterInfo(unsigned int RA);
121 /// getPointerRegClass - Return the register class to use to hold pointers.
122 /// This is currently only used by LOAD_STACK_GUARD, which requires a non-%r0
123 /// register, hence ADDR64.
124 const TargetRegisterClass *
125 getPointerRegClass(const MachineFunction &MF,
126 unsigned Kind=0) const override {
127 return &SystemZ::ADDR64BitRegClass;
130 /// getCrossCopyRegClass - Returns a legal register class to copy a register
131 /// in the specified class to or from. Returns NULL if it is possible to copy
132 /// between a two registers of the specified class.
133 const TargetRegisterClass *
134 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
136 bool getRegAllocationHints(Register VirtReg, ArrayRef<MCPhysReg> Order,
137 SmallVectorImpl<MCPhysReg> &Hints,
138 const MachineFunction &MF, const VirtRegMap *VRM,
139 const LiveRegMatrix *Matrix) const override;
141 // Override TargetRegisterInfo.h.
142 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
143 return true;
145 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
146 return true;
148 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
149 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
150 CallingConv::ID CC) const override;
151 BitVector getReservedRegs(const MachineFunction &MF) const override;
152 void eliminateFrameIndex(MachineBasicBlock::iterator MI,
153 int SPAdj, unsigned FIOperandNum,
154 RegScavenger *RS) const override;
156 /// SrcRC and DstRC will be morphed into NewRC if this returns true.
157 bool shouldCoalesce(MachineInstr *MI,
158 const TargetRegisterClass *SrcRC,
159 unsigned SubReg,
160 const TargetRegisterClass *DstRC,
161 unsigned DstSubReg,
162 const TargetRegisterClass *NewRC,
163 LiveIntervals &LIS) const override;
165 Register getFrameRegister(const MachineFunction &MF) const override;
168 } // end namespace llvm
170 #endif