llvm/lib/Target/X86/X86InstrKL.td

   1 //===---------------------------*-tablegen-*-------------------------------===//
   2 //===------------- X86InstrKL.td - KL Instruction Set Extension -----------===//
   3 //
   4 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   5 // See https://llvm.org/LICENSE.txt for license information.
   6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file describes the instructions that make up the Intel key locker
  11 // instruction set.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 //===----------------------------------------------------------------------===//
  16 // Key Locker instructions
  17
  18 let SchedRW = [WriteSystem], Predicates = [HasKL] in {
  19   let Uses = [XMM0, EAX], Defs = [EFLAGS] in {
  20     def LOADIWKEY : I<0xDC, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
  21                       "loadiwkey\t{$src2, $src1|$src1, $src2}",
  22                       [(int_x86_loadiwkey XMM0, VR128:$src1, VR128:$src2, EAX)]>, T8XS,
  23                       NotMemoryFoldable;
  24   }
  25
  26   let Uses = [XMM0], Defs = [XMM0, XMM1, XMM2, XMM4, XMM5, XMM6, EFLAGS] in {
  27     def ENCODEKEY128 : I<0xFA, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
  28                          "encodekey128\t{$src, $dst|$dst, $src}", []>, T8XS,
  29                        NotMemoryFoldable;
  30   }
  31
  32   let Uses = [XMM0, XMM1], Defs = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, EFLAGS] in {
  33     def ENCODEKEY256 : I<0xFB, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src),
  34                          "encodekey256\t{$src, $dst|$dst, $src}", []>, T8XS,
  35                        NotMemoryFoldable;
  36   }
  37
  38   let Constraints = "$src1 = $dst",
  39       Defs = [EFLAGS] in {
  40    def AESENC128KL : I<0xDC, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
  41                        "aesenc128kl\t{$src2, $src1|$src1, $src2}",
  42                        [(set VR128:$dst, EFLAGS,
  43                          (X86aesenc128kl VR128:$src1, addr:$src2))]>, T8XS,
  44                        NotMemoryFoldable;
  45
  46    def AESDEC128KL : I<0xDD, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
  47                        "aesdec128kl\t{$src2, $src1|$src1, $src2}",
  48                        [(set VR128:$dst, EFLAGS,
  49                          (X86aesdec128kl VR128:$src1, addr:$src2))]>, T8XS,
  50                        NotMemoryFoldable;
  51
  52    def AESENC256KL : I<0xDE, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
  53                        "aesenc256kl\t{$src2, $src1|$src1, $src2}",
  54                        [(set VR128:$dst, EFLAGS,
  55                          (X86aesenc256kl VR128:$src1, addr:$src2))]>, T8XS,
  56                        NotMemoryFoldable;
  57
  58    def AESDEC256KL : I<0xDF, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, opaquemem:$src2),
  59                        "aesdec256kl\t{$src2, $src1|$src1, $src2}",
  60                        [(set VR128:$dst, EFLAGS,
  61                          (X86aesdec256kl VR128:$src1, addr:$src2))]>, T8XS,
  62                        NotMemoryFoldable;
  63   }
  64
  65 } // SchedRW, Predicates
  66
  67 let SchedRW = [WriteSystem], Predicates = [HasWIDEKL] in {
  68   let Uses = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
  69       Defs = [EFLAGS, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7],
  70       mayLoad = 1 in {
  71     def AESENCWIDE128KL : I<0xD8, MRM0m, (outs), (ins opaquemem:$src),
  72                             "aesencwide128kl\t$src", []>, T8XS,
  73                             NotMemoryFoldable;
  74     def AESDECWIDE128KL : I<0xD8, MRM1m, (outs), (ins opaquemem:$src),
  75                             "aesdecwide128kl\t$src", []>, T8XS,
  76                             NotMemoryFoldable;
  77     def AESENCWIDE256KL : I<0xD8, MRM2m, (outs), (ins opaquemem:$src),
  78                             "aesencwide256kl\t$src", []>, T8XS,
  79                             NotMemoryFoldable;
  80     def AESDECWIDE256KL : I<0xD8, MRM3m, (outs), (ins opaquemem:$src),
  81                             "aesdecwide256kl\t$src", []>, T8XS,
  82                             NotMemoryFoldable;
  83   }
  84
  85 } // SchedRW, Predicates