llvm/lib/Target/X86/X86TargetTransformInfo.h

   1 //===-- X86TargetTransformInfo.h - X86 specific TTI -------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 /// This file a TargetTransformInfo::Concept conforming object specific to the
  10 /// X86 target machine. It uses the target's detailed information to
  11 /// provide more precise answers to certain TTI queries, while letting the
  12 /// target independent and default TTI implementations handle the rest.
  13 ///
  14 //===----------------------------------------------------------------------===//
  15
  16 #ifndef LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H
  17 #define LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H
  18
  19 #include "X86TargetMachine.h"
  20 #include "llvm/Analysis/TargetTransformInfo.h"
  21 #include "llvm/CodeGen/BasicTTIImpl.h"
  22
  23 namespace llvm {
  24
  25 class InstCombiner;
  26
  27 class X86TTIImpl : public BasicTTIImplBase<X86TTIImpl> {
  28   typedef BasicTTIImplBase<X86TTIImpl> BaseT;
  29   typedef TargetTransformInfo TTI;
  30   friend BaseT;
  31
  32   const X86Subtarget *ST;
  33   const X86TargetLowering *TLI;
  34
  35   const X86Subtarget *getST() const { return ST; }
  36   const X86TargetLowering *getTLI() const { return TLI; }
  37
  38   const FeatureBitset InlineFeatureIgnoreList = {
  39       // This indicates the CPU is 64 bit capable not that we are in 64-bit
  40       // mode.
  41       X86::Feature64Bit,
  42
  43       // These features don't have any intrinsics or ABI effect.
  44       X86::FeatureNOPL,
  45       X86::FeatureCMPXCHG16B,
  46       X86::FeatureLAHFSAHF,
  47
  48       // Some older targets can be setup to fold unaligned loads.
  49       X86::FeatureSSEUnalignedMem,
  50
  51       // Codegen control options.
  52       X86::TuningFast11ByteNOP,
  53       X86::TuningFast15ByteNOP,
  54       X86::TuningFastBEXTR,
  55       X86::TuningFastHorizontalOps,
  56       X86::TuningFastLZCNT,
  57       X86::TuningFastScalarFSQRT,
  58       X86::TuningFastSHLDRotate,
  59       X86::TuningFastScalarShiftMasks,
  60       X86::TuningFastVectorShiftMasks,
  61       X86::TuningFastVariableCrossLaneShuffle,
  62       X86::TuningFastVariablePerLaneShuffle,
  63       X86::TuningFastVectorFSQRT,
  64       X86::TuningLEAForSP,
  65       X86::TuningLEAUsesAG,
  66       X86::TuningLZCNTFalseDeps,
  67       X86::TuningBranchFusion,
  68       X86::TuningMacroFusion,
  69       X86::TuningPadShortFunctions,
  70       X86::TuningPOPCNTFalseDeps,
  71       X86::TuningSlow3OpsLEA,
  72       X86::TuningSlowDivide32,
  73       X86::TuningSlowDivide64,
  74       X86::TuningSlowIncDec,
  75       X86::TuningSlowLEA,
  76       X86::TuningSlowPMADDWD,
  77       X86::TuningSlowPMULLD,
  78       X86::TuningSlowSHLD,
  79       X86::TuningSlowTwoMemOps,
  80       X86::TuningSlowUAMem16,
  81       X86::TuningPreferMaskRegisters,
  82       X86::TuningInsertVZEROUPPER,
  83       X86::TuningUseGLMDivSqrtCosts,
  84
  85       // Perf-tuning flags.
  86       X86::TuningFastGather,
  87       X86::TuningSlowUAMem32,
  88
  89       // Based on whether user set the -mprefer-vector-width command line.
  90       X86::TuningPrefer128Bit,
  91       X86::TuningPrefer256Bit,
  92
  93       // CPU name enums. These just follow CPU string.
  94       X86::ProcIntelAtom,
  95       X86::ProcIntelSLM,
  96   };
  97
  98 public:
  99   explicit X86TTIImpl(const X86TargetMachine *TM, const Function &F)
 100       : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
 101         TLI(ST->getTargetLowering()) {}
 102
 103   /// \name Scalar TTI Implementations
 104   /// @{
 105   TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
 106
 107   /// @}
 108
 109   /// \name Cache TTI Implementation
 110   /// @{
 111   llvm::Optional<unsigned> getCacheSize(
 112     TargetTransformInfo::CacheLevel Level) const override;
 113   llvm::Optional<unsigned> getCacheAssociativity(
 114     TargetTransformInfo::CacheLevel Level) const override;
 115   /// @}
 116
 117   /// \name Vector TTI Implementations
 118   /// @{
 119
 120   unsigned getNumberOfRegisters(unsigned ClassID) const;
 121   TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
 122   unsigned getLoadStoreVecRegBitWidth(unsigned AS) const;
 123   unsigned getMaxInterleaveFactor(unsigned VF);
 124   InstructionCost getArithmeticInstrCost(
 125       unsigned Opcode, Type *Ty,
 126       TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
 127       TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
 128       TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
 129       TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
 130       TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
 131       ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
 132       const Instruction *CxtI = nullptr);
 133   InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp,
 134                                  ArrayRef<int> Mask, int Index,
 135                                  VectorType *SubTp);
 136   InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
 137                                    TTI::CastContextHint CCH,
 138                                    TTI::TargetCostKind CostKind,
 139                                    const Instruction *I = nullptr);
 140   InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
 141                                      CmpInst::Predicate VecPred,
 142                                      TTI::TargetCostKind CostKind,
 143                                      const Instruction *I = nullptr);
 144   InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
 145                                      unsigned Index);
 146   InstructionCost getScalarizationOverhead(VectorType *Ty,
 147                                            const APInt &DemandedElts,
 148                                            bool Insert, bool Extract);
 149   InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src,
 150                                   MaybeAlign Alignment, unsigned AddressSpace,
 151                                   TTI::TargetCostKind CostKind,
 152                                   const Instruction *I = nullptr);
 153   InstructionCost
 154   getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
 155                         unsigned AddressSpace,
 156                         TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency);
 157   InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
 158                                          const Value *Ptr, bool VariableMask,
 159                                          Align Alignment,
 160                                          TTI::TargetCostKind CostKind,
 161                                          const Instruction *I);
 162   InstructionCost getAddressComputationCost(Type *PtrTy, ScalarEvolution *SE,
 163                                             const SCEV *Ptr);
 164
 165   Optional<Instruction *> instCombineIntrinsic(InstCombiner &IC,
 166                                                IntrinsicInst &II) const;
 167   Optional<Value *>
 168   simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II,
 169                                    APInt DemandedMask, KnownBits &Known,
 170                                    bool &KnownBitsComputed) const;
 171   Optional<Value *> simplifyDemandedVectorEltsIntrinsic(
 172       InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
 173       APInt &UndefElts2, APInt &UndefElts3,
 174       std::function<void(Instruction *, unsigned, APInt, APInt &)>
 175           SimplifyAndSetOp) const;
 176
 177   unsigned getAtomicMemIntrinsicMaxElementSize() const;
 178
 179   InstructionCost
 180   getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
 181                                  TTI::TargetCostKind CostKind);
 182   InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
 183                                         TTI::TargetCostKind CostKind);
 184
 185   InstructionCost getArithmeticReductionCost(
 186       unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF,
 187       TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency);
 188
 189   InstructionCost getMinMaxCost(Type *Ty, Type *CondTy, bool IsUnsigned);
 190
 191   InstructionCost getMinMaxReductionCost(VectorType *Ty, VectorType *CondTy,
 192                                          bool IsUnsigned,
 193                                          TTI::TargetCostKind CostKind);
 194
 195   InstructionCost getInterleavedMemoryOpCost(
 196       unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
 197       Align Alignment, unsigned AddressSpace,
 198       TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency,
 199       bool UseMaskForCond = false, bool UseMaskForGaps = false);
 200   InstructionCost getInterleavedMemoryOpCostAVX512(
 201       unsigned Opcode, FixedVectorType *VecTy, unsigned Factor,
 202       ArrayRef<unsigned> Indices, Align Alignment, unsigned AddressSpace,
 203       TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency,
 204       bool UseMaskForCond = false, bool UseMaskForGaps = false);
 205   InstructionCost getInterleavedMemoryOpCostAVX2(
 206       unsigned Opcode, FixedVectorType *VecTy, unsigned Factor,
 207       ArrayRef<unsigned> Indices, Align Alignment, unsigned AddressSpace,
 208       TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency,
 209       bool UseMaskForCond = false, bool UseMaskForGaps = false);
 210
 211   InstructionCost getIntImmCost(int64_t);
 212
 213   InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
 214                                 TTI::TargetCostKind CostKind);
 215
 216   InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,
 217                                  const Instruction *I = nullptr);
 218
 219   InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx,
 220                                     const APInt &Imm, Type *Ty,
 221                                     TTI::TargetCostKind CostKind,
 222                                     Instruction *Inst = nullptr);
 223   InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
 224                                       const APInt &Imm, Type *Ty,
 225                                       TTI::TargetCostKind CostKind);
 226   bool isLSRCostLess(TargetTransformInfo::LSRCost &C1,
 227                      TargetTransformInfo::LSRCost &C2);
 228   bool canMacroFuseCmp();
 229   bool isLegalMaskedLoad(Type *DataType, Align Alignment);
 230   bool isLegalMaskedStore(Type *DataType, Align Alignment);
 231   bool isLegalNTLoad(Type *DataType, Align Alignment);
 232   bool isLegalNTStore(Type *DataType, Align Alignment);
 233   bool isLegalMaskedGather(Type *DataType, Align Alignment);
 234   bool isLegalMaskedScatter(Type *DataType, Align Alignment);
 235   bool isLegalMaskedExpandLoad(Type *DataType);
 236   bool isLegalMaskedCompressStore(Type *DataType);
 237   bool hasDivRemOp(Type *DataType, bool IsSigned);
 238   bool isFCmpOrdCheaperThanFCmpZero(Type *Ty);
 239   bool areInlineCompatible(const Function *Caller,
 240                            const Function *Callee) const;
 241   bool areFunctionArgsABICompatible(const Function *Caller,
 242                                     const Function *Callee,
 243                                     SmallPtrSetImpl<Argument *> &Args) const;
 244   TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
 245                                                     bool IsZeroCmp) const;
 246   bool enableInterleavedAccessVectorization();
 247
 248 private:
 249   InstructionCost getGSScalarCost(unsigned Opcode, Type *DataTy,
 250                                   bool VariableMask, Align Alignment,
 251                                   unsigned AddressSpace);
 252   InstructionCost getGSVectorCost(unsigned Opcode, Type *DataTy,
 253                                   const Value *Ptr, Align Alignment,
 254                                   unsigned AddressSpace);
 255
 256   int getGatherOverhead() const;
 257   int getScatterOverhead() const;
 258
 259   /// @}
 260 };
 261
 262 } // end namespace llvm
 263
 264 #endif