llvm/test/CodeGen/AArch64/GlobalISel/select-fp16-fconstant.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -mtriple=aarch64-unknown-unknown -mattr=+fullfp16 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
   3
   4 ---
   5 name:            positive_zero
   6 legalized:       true
   7 regBankSelected: true
   8 tracksRegLiveness: true
   9 body:             |
  10   bb.0:
  11     ; CHECK-LABEL: name: positive_zero
  12     ; CHECK: [[FMOVH0_:%[0-9]+]]:fpr16 = FMOVH0
  13     ; CHECK: $h0 = COPY [[FMOVH0_]]
  14     ; CHECK: RET_ReallyLR implicit $h0
  15     %0:fpr(s16) = G_FCONSTANT half 0.0
  16     $h0 = COPY %0(s16)
  17     RET_ReallyLR implicit $h0
  18 ...
  19 ---
  20 name:            one
  21 legalized:       true
  22 regBankSelected: true
  23 tracksRegLiveness: true
  24 body:             |
  25   bb.0:
  26     ; CHECK-LABEL: name: one
  27     ; CHECK: [[FMOVHi:%[0-9]+]]:fpr16 = FMOVHi 112
  28     ; CHECK: $h0 = COPY [[FMOVHi]]
  29     ; CHECK: RET_ReallyLR implicit $h0
  30     %0:fpr(s16) = G_FCONSTANT half 1.0
  31     $h0 = COPY %0(s16)
  32     RET_ReallyLR implicit $h0