1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
4 ; ST1B, ST1W, ST1H, ST1D: vector base + immediate offset
5 ; e.g. st1h { z0.s }, p0, [z1.s, #16]
9 define void @sst1b_s_imm_offset(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base) {
10 ; CHECK-LABEL: sst1b_s_imm_offset:
11 ; CHECK: st1b { z0.s }, p0, [z1.s, #16]
13 %data_trunc = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
14 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8> %data_trunc,
15 <vscale x 4 x i1> %pg,
16 <vscale x 4 x i32> %base,
21 define void @sst1b_d_imm_offset(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
22 ; CHECK-LABEL: sst1b_d_imm_offset:
23 ; CHECK: st1b { z0.d }, p0, [z1.d, #16]
25 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
26 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8> %data_trunc,
27 <vscale x 2 x i1> %pg,
28 <vscale x 2 x i64> %base,
34 define void @sst1h_s_imm_offset(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base) {
35 ; CHECK-LABEL: sst1h_s_imm_offset:
36 ; CHECK: st1h { z0.s }, p0, [z1.s, #16]
38 %data_trunc = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
39 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> %data_trunc,
40 <vscale x 4 x i1> %pg,
41 <vscale x 4 x i32> %base,
46 define void @sst1h_d_imm_offset(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
47 ; CHECK-LABEL: sst1h_d_imm_offset:
48 ; CHECK: st1h { z0.d }, p0, [z1.d, #16]
50 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
51 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> %data_trunc,
52 <vscale x 2 x i1> %pg,
53 <vscale x 2 x i64> %base,
59 define void @sst1w_s_imm_offset(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base) {
60 ; CHECK-LABEL: sst1w_s_imm_offset:
61 ; CHECK: st1w { z0.s }, p0, [z1.s, #16]
63 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data,
64 <vscale x 4 x i1> %pg,
65 <vscale x 4 x i32> %base,
70 define void @sst1w_d_imm_offset(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
71 ; CHECK-LABEL: sst1w_d_imm_offset:
72 ; CHECK: st1w { z0.d }, p0, [z1.d, #16]
74 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
75 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> %data_trunc,
76 <vscale x 2 x i1> %pg,
77 <vscale x 2 x i64> %base,
82 define void @sst1w_s_imm_offset_float(<vscale x 4 x float> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base) {
83 ; CHECK-LABEL: sst1w_s_imm_offset_float:
84 ; CHECK: st1w { z0.s }, p0, [z1.s, #16]
86 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x float> %data,
87 <vscale x 4 x i1> %pg,
88 <vscale x 4 x i32> %base,
94 define void @sst1d_d_imm_offset(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
95 ; CHECK-LABEL: sst1d_d_imm_offset:
96 ; CHECK: st1d { z0.d }, p0, [z1.d, #16]
98 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data,
99 <vscale x 2 x i1> %pg,
100 <vscale x 2 x i64> %base,
105 define void @sst1d_d_imm_offset_double(<vscale x 2 x double> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
106 ; CHECK-LABEL: sst1d_d_imm_offset_double:
107 ; CHECK: st1d { z0.d }, p0, [z1.d, #16]
109 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double> %data,
110 <vscale x 2 x i1> %pg,
111 <vscale x 2 x i64> %base,
117 ; ST1B, ST1W, ST1H, ST1D: vector base + out of range immediate offset
118 ; e.g. st1h { z0.s }, p0, [z1.s, #16]
122 define void @sst1b_s_imm_offset_out_of_range(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base) {
123 ; CHECK-LABEL: sst1b_s_imm_offset_out_of_range:
125 ; CHECK-NEXT: st1b { z0.s }, p0, [x8, z1.s, uxtw]
127 %data_trunc = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
128 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8> %data_trunc,
129 <vscale x 4 x i1> %pg,
130 <vscale x 4 x i32> %base,
135 define void @sst1b_d_imm_offset_out_of_range(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
136 ; CHECK-LABEL: sst1b_d_imm_offset_out_of_range:
138 ; CHECK-NEXT: st1b { z0.d }, p0, [x8, z1.d]
140 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
141 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8> %data_trunc,
142 <vscale x 2 x i1> %pg,
143 <vscale x 2 x i64> %base,
149 define void @sst1h_s_imm_offset_out_of_range(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base) {
150 ; CHECK-LABEL: sst1h_s_imm_offset_out_of_range:
152 ; CHECK-NEXT: st1h { z0.s }, p0, [x8, z1.s, uxtw]
154 %data_trunc = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
155 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> %data_trunc,
156 <vscale x 4 x i1> %pg,
157 <vscale x 4 x i32> %base,
162 define void @sst1h_d_imm_offset_out_of_range(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
163 ; CHECK-LABEL: sst1h_d_imm_offset_out_of_range:
165 ; CHECK-NEXT: st1h { z0.d }, p0, [x8, z1.d]
167 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
168 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> %data_trunc,
169 <vscale x 2 x i1> %pg,
170 <vscale x 2 x i64> %base,
176 define void @sst1w_s_imm_offset_out_of_range(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base) {
177 ; CHECK-LABEL: sst1w_s_imm_offset_out_of_range:
178 ; CHECK: mov w8, #125
179 ; CHECK-NEXT: st1w { z0.s }, p0, [x8, z1.s, uxtw]
181 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data,
182 <vscale x 4 x i1> %pg,
183 <vscale x 4 x i32> %base,
188 define void @sst1w_d_imm_offset_out_of_range(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
189 ; CHECK-LABEL: sst1w_d_imm_offset_out_of_range:
190 ; CHECK: mov w8, #125
191 ; CHECK-NEXT: st1w { z0.d }, p0, [x8, z1.d]
193 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
194 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> %data_trunc,
195 <vscale x 2 x i1> %pg,
196 <vscale x 2 x i64> %base,
201 define void @sst1w_s_imm_offset_float_out_of_range(<vscale x 4 x float> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base) {
202 ; CHECK-LABEL: sst1w_s_imm_offset_float_out_of_range:
203 ; CHECK: mov w8, #125
204 ; CHECK-NEXT: st1w { z0.s }, p0, [x8, z1.s, uxtw]
206 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x float> %data,
207 <vscale x 4 x i1> %pg,
208 <vscale x 4 x i32> %base,
214 define void @sst1d_d_imm_offset_out_of_range(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
215 ; CHECK-LABEL: sst1d_d_imm_offset_out_of_range:
216 ; CHECK: mov w8, #249
217 ; CHECK-NEXT: st1d { z0.d }, p0, [x8, z1.d]
219 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data,
220 <vscale x 2 x i1> %pg,
221 <vscale x 2 x i64> %base,
226 define void @sst1d_d_imm_offset_double_out_of_range(<vscale x 2 x double> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base) {
227 ; CHECK-LABEL: sst1d_d_imm_offset_double_out_of_range:
228 ; CHECK: mov w8, #249
229 ; CHECK-NEXT: st1d { z0.d }, p0, [x8, z1.d]
231 call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double> %data,
232 <vscale x 2 x i1> %pg,
233 <vscale x 2 x i64> %base,
239 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8>, <vscale x 4 x i1>, <vscale x 4 x i32>, i64)
240 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
243 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16>, <vscale x 4 x i1>, <vscale x 4 x i32>, i64)
244 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
247 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, <vscale x 4 x i32>, i64)
248 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
250 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x i32>, i64)
253 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
255 declare void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)