1 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s
4 ; STNT1B, STNT1W, STNT1H, STNT1D: vector base + scalar offset
5 ; stnt1b { z0.s }, p0/z, [z0.s, x0]
9 define void @stnt1b_s(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base, i64 %offset) {
10 ; CHECK-LABEL: stnt1b_s:
11 ; CHECK: stnt1b { z0.s }, p0, [z1.s, x0]
13 %data_trunc = trunc <vscale x 4 x i32> %data to <vscale x 4 x i8>
14 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8> %data_trunc,
15 <vscale x 4 x i1> %pg,
16 <vscale x 4 x i32> %base,
21 define void @stnt1b_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base, i64 %offset) {
22 ; CHECK-LABEL: stnt1b_d:
23 ; CHECK: stnt1b { z0.d }, p0, [z1.d, x0]
25 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>
26 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8> %data_trunc,
27 <vscale x 2 x i1> %pg,
28 <vscale x 2 x i64> %base,
34 define void @stnt1h_s(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base, i64 %offset) {
35 ; CHECK-LABEL: stnt1h_s:
36 ; CHECK: stnt1h { z0.s }, p0, [z1.s, x0]
38 %data_trunc = trunc <vscale x 4 x i32> %data to <vscale x 4 x i16>
39 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16> %data_trunc,
40 <vscale x 4 x i1> %pg,
41 <vscale x 4 x i32> %base,
46 define void @stnt1h_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base, i64 %offset) {
47 ; CHECK-LABEL: stnt1h_d:
48 ; CHECK: stnt1h { z0.d }, p0, [z1.d, x0]
50 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>
51 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16> %data_trunc,
52 <vscale x 2 x i1> %pg,
53 <vscale x 2 x i64> %base,
59 define void @stnt1w_s(<vscale x 4 x i32> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base, i64 %offset) {
60 ; CHECK-LABEL: stnt1w_s:
61 ; CHECK: stnt1w { z0.s }, p0, [z1.s, x0]
63 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32> %data,
64 <vscale x 4 x i1> %pg,
65 <vscale x 4 x i32> %base,
70 define void @stnt1w_f32_s(<vscale x 4 x float> %data, <vscale x 4 x i1> %pg, <vscale x 4 x i32> %base, i64 %offset) {
71 ; CHECK-LABEL: stnt1w_f32_s:
72 ; CHECK: stnt1w { z0.s }, p0, [z1.s, x0]
74 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x float> %data,
75 <vscale x 4 x i1> %pg,
76 <vscale x 4 x i32> %base,
81 define void @stnt1w_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base, i64 %offset) {
82 ; CHECK-LABEL: stnt1w_d:
83 ; CHECK: stnt1w { z0.d }, p0, [z1.d, x0]
85 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>
86 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32> %data_trunc,
87 <vscale x 2 x i1> %pg,
88 <vscale x 2 x i64> %base,
94 define void @stnt1d_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base, i64 %offset) {
95 ; CHECK-LABEL: stnt1d_d:
96 ; CHECK: stnt1d { z0.d }, p0, [z1.d, x0]
98 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data,
99 <vscale x 2 x i1> %pg,
100 <vscale x 2 x i64> %base,
105 define void @stnt1d_f64_d(<vscale x 2 x double> %data, <vscale x 2 x i1> %pg, <vscale x 2 x i64> %base, i64 %offset) {
106 ; CHECK-LABEL: stnt1d_f64_d:
107 ; CHECK: stnt1d { z0.d }, p0, [z1.d, x0]
109 call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double> %data,
110 <vscale x 2 x i1> %pg,
111 <vscale x 2 x i64> %base,
117 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64(<vscale x 2 x i8>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
118 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32(<vscale x 4 x i8>, <vscale x 4 x i1>, <vscale x 4 x i32>, i64)
121 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64(<vscale x 2 x i16>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
122 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32(<vscale x 4 x i16>, <vscale x 4 x i1>, <vscale x 4 x i32>, i64)
125 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64(<vscale x 2 x i32>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
126 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, <vscale x 4 x i32>, i64)
128 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x i32>, i64)
131 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
133 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f32.nxv2i64(<vscale x 2 x float>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)
134 declare void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x i64>, i64)