| blob | e1aa9b0097483fecf0aa8fa2cacdff322f1610b9 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s -check-prefix=SI
3 ; RUN: llc < %s -march=amdgcn -mcpu=hawaii -verify-machineinstrs | FileCheck %s -check-prefix=GFX7
4 ; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck %s -check-prefix=GFX10
5 ; RUN: llc < %s -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs | FileCheck %s -check-prefix=GFX1030
7 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s -check-prefix=G_SI
8 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=hawaii -verify-machineinstrs | FileCheck %s -check-prefix=G_GFX7
9 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck %s -check-prefix=G_GFX10
10 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs | FileCheck %s -check-prefix=G_GFX1030
12 declare double @llvm.amdgcn.raw.buffer.atomic.fmin.f64(double, <4 x i32>, i32, i32, i32 immarg)
13 declare double @llvm.amdgcn.raw.buffer.atomic.fmax.f64(double, <4 x i32>, i32, i32, i32 immarg)
15 declare float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float, <4 x i32>, i32, i32, i32 immarg)
16 declare float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float, <4 x i32>, i32, i32, i32 immarg)
18 declare float @llvm.amdgcn.image.atomic.fmin.1d.f32.f32(float, i32, <8 x i32>, i32, i32)
19 declare float @llvm.amdgcn.image.atomic.fmax.1d.f32.f32(float, i32, <8 x i32>, i32, i32)
22 define amdgpu_kernel void @raw_buffer_atomic_min_noret_f32(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
23 ; SI-LABEL: raw_buffer_atomic_min_noret_f32:
24 ; SI: ; %bb.0: ; %main_body
25 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
26 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
27 ; SI-NEXT: s_waitcnt lgkmcnt(0)
28 ; SI-NEXT: v_mov_b32_e32 v0, s0
29 ; SI-NEXT: v_mov_b32_e32 v1, s1
30 ; SI-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 0 offen
31 ; SI-NEXT: s_endpgm
32 ;
33 ; GFX7-LABEL: raw_buffer_atomic_min_noret_f32:
34 ; GFX7: ; %bb.0: ; %main_body
35 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
36 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
37 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
38 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
39 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
40 ; GFX7-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 0 offen
41 ; GFX7-NEXT: s_endpgm
42 ;
43 ; GFX10-LABEL: raw_buffer_atomic_min_noret_f32:
44 ; GFX10: ; %bb.0: ; %main_body
45 ; GFX10-NEXT: s_clause 0x1
46 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
47 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
48 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
49 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
50 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
51 ; GFX10-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 0 offen
52 ; GFX10-NEXT: s_endpgm
53 ;
54 ; GFX1030-LABEL: raw_buffer_atomic_min_noret_f32:
55 ; GFX1030: ; %bb.0: ; %main_body
56 ; GFX1030-NEXT: s_clause 0x1
57 ; GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
58 ; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
59 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
60 ; GFX1030-NEXT: v_mov_b32_e32 v0, s4
61 ; GFX1030-NEXT: v_mov_b32_e32 v1, s5
62 ; GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen
63 ; GFX1030-NEXT: s_endpgm
64 ;
65 ; G_SI-LABEL: raw_buffer_atomic_min_noret_f32:
66 ; G_SI: ; %bb.0: ; %main_body
67 ; G_SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
68 ; G_SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
69 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
70 ; G_SI-NEXT: v_mov_b32_e32 v0, s0
71 ; G_SI-NEXT: v_mov_b32_e32 v1, s1
72 ; G_SI-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 0 offen glc
73 ; G_SI-NEXT: s_endpgm
74 ;
75 ; G_GFX7-LABEL: raw_buffer_atomic_min_noret_f32:
76 ; G_GFX7: ; %bb.0: ; %main_body
77 ; G_GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
78 ; G_GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
79 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
80 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s0
81 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s1
82 ; G_GFX7-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 0 offen glc
83 ; G_GFX7-NEXT: s_endpgm
84 ;
85 ; G_GFX10-LABEL: raw_buffer_atomic_min_noret_f32:
86 ; G_GFX10: ; %bb.0: ; %main_body
87 ; G_GFX10-NEXT: s_clause 0x1
88 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
89 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
90 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
91 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
92 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
93 ; G_GFX10-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 0 offen glc
94 ; G_GFX10-NEXT: s_endpgm
95 ;
96 ; G_GFX1030-LABEL: raw_buffer_atomic_min_noret_f32:
97 ; G_GFX1030: ; %bb.0: ; %main_body
98 ; G_GFX1030-NEXT: s_clause 0x1
99 ; G_GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
100 ; G_GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
101 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
102 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s4
103 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s5
104 ; G_GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
105 ; G_GFX1030-NEXT: s_endpgm
106 main_body:
107 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
108 ret void
109 }
111 define amdgpu_kernel void @raw_buffer_atomic_min_noret_f64(<4 x i32> inreg %rsrc, double %data, i32 %vindex) {
112 ; SI-LABEL: raw_buffer_atomic_min_noret_f64:
113 ; SI: ; %bb.0: ; %main_body
114 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
115 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
116 ; SI-NEXT: s_load_dword s0, s[0:1], 0xf
117 ; SI-NEXT: s_waitcnt lgkmcnt(0)
118 ; SI-NEXT: v_mov_b32_e32 v0, s2
119 ; SI-NEXT: v_mov_b32_e32 v1, s3
120 ; SI-NEXT: v_mov_b32_e32 v2, s0
121 ; SI-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[4:7], 0 offen
122 ; SI-NEXT: s_endpgm
123 ;
124 ; GFX7-LABEL: raw_buffer_atomic_min_noret_f64:
125 ; GFX7: ; %bb.0: ; %main_body
126 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
127 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
128 ; GFX7-NEXT: s_load_dword s0, s[0:1], 0xf
129 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
130 ; GFX7-NEXT: v_mov_b32_e32 v0, s2
131 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
132 ; GFX7-NEXT: v_mov_b32_e32 v2, s0
133 ; GFX7-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[4:7], 0 offen
134 ; GFX7-NEXT: s_endpgm
135 ;
136 ; GFX10-LABEL: raw_buffer_atomic_min_noret_f64:
137 ; GFX10: ; %bb.0: ; %main_body
138 ; GFX10-NEXT: s_clause 0x2
139 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
140 ; GFX10-NEXT: s_load_dword s8, s[0:1], 0x3c
141 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
142 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
143 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
144 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
145 ; GFX10-NEXT: v_mov_b32_e32 v2, s8
146 ; GFX10-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[4:7], 0 offen
147 ; GFX10-NEXT: s_endpgm
148 ;
149 ; GFX1030-LABEL: raw_buffer_atomic_min_noret_f64:
150 ; GFX1030: ; %bb.0: ; %main_body
151 ; GFX1030-NEXT: s_clause 0x2
152 ; GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
153 ; GFX1030-NEXT: s_load_dword s6, s[0:1], 0x3c
154 ; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
155 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
156 ; GFX1030-NEXT: v_mov_b32_e32 v0, s4
157 ; GFX1030-NEXT: v_mov_b32_e32 v1, s5
158 ; GFX1030-NEXT: v_mov_b32_e32 v2, s6
159 ; GFX1030-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen
160 ; GFX1030-NEXT: s_endpgm
161 ;
162 ; G_SI-LABEL: raw_buffer_atomic_min_noret_f64:
163 ; G_SI: ; %bb.0: ; %main_body
164 ; G_SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
165 ; G_SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
166 ; G_SI-NEXT: s_load_dword s0, s[0:1], 0xf
167 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
168 ; G_SI-NEXT: v_mov_b32_e32 v0, s2
169 ; G_SI-NEXT: v_mov_b32_e32 v1, s3
170 ; G_SI-NEXT: v_mov_b32_e32 v2, s0
171 ; G_SI-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[4:7], 0 offen glc
172 ; G_SI-NEXT: s_endpgm
173 ;
174 ; G_GFX7-LABEL: raw_buffer_atomic_min_noret_f64:
175 ; G_GFX7: ; %bb.0: ; %main_body
176 ; G_GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
177 ; G_GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
178 ; G_GFX7-NEXT: s_load_dword s0, s[0:1], 0xf
179 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
180 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s2
181 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s3
182 ; G_GFX7-NEXT: v_mov_b32_e32 v2, s0
183 ; G_GFX7-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[4:7], 0 offen glc
184 ; G_GFX7-NEXT: s_endpgm
185 ;
186 ; G_GFX10-LABEL: raw_buffer_atomic_min_noret_f64:
187 ; G_GFX10: ; %bb.0: ; %main_body
188 ; G_GFX10-NEXT: s_clause 0x2
189 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
190 ; G_GFX10-NEXT: s_load_dword s8, s[0:1], 0x3c
191 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
192 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
193 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
194 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
195 ; G_GFX10-NEXT: v_mov_b32_e32 v2, s8
196 ; G_GFX10-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[4:7], 0 offen glc
197 ; G_GFX10-NEXT: s_endpgm
198 ;
199 ; G_GFX1030-LABEL: raw_buffer_atomic_min_noret_f64:
200 ; G_GFX1030: ; %bb.0: ; %main_body
201 ; G_GFX1030-NEXT: s_clause 0x2
202 ; G_GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
203 ; G_GFX1030-NEXT: s_load_dword s6, s[0:1], 0x3c
204 ; G_GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
205 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
206 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s4
207 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s5
208 ; G_GFX1030-NEXT: v_mov_b32_e32 v2, s6
209 ; G_GFX1030-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
210 ; G_GFX1030-NEXT: s_endpgm
211 main_body:
212 %ret = call double @llvm.amdgcn.raw.buffer.atomic.fmin.f64(double %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
213 ret void
214 }
216 define amdgpu_ps void @raw_buffer_atomic_min_rtn_f32(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
217 ; SI-LABEL: raw_buffer_atomic_min_rtn_f32:
218 ; SI: ; %bb.0: ; %main_body
219 ; SI-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
220 ; SI-NEXT: s_mov_b32 s3, 0xf000
221 ; SI-NEXT: s_mov_b32 s2, -1
222 ; SI-NEXT: s_waitcnt vmcnt(0)
223 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
224 ; SI-NEXT: s_endpgm
225 ;
226 ; GFX7-LABEL: raw_buffer_atomic_min_rtn_f32:
227 ; GFX7: ; %bb.0: ; %main_body
228 ; GFX7-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
229 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
230 ; GFX7-NEXT: s_mov_b32 s2, -1
231 ; GFX7-NEXT: s_waitcnt vmcnt(0)
232 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
233 ; GFX7-NEXT: s_endpgm
234 ;
235 ; GFX10-LABEL: raw_buffer_atomic_min_rtn_f32:
236 ; GFX10: ; %bb.0: ; %main_body
237 ; GFX10-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
238 ; GFX10-NEXT: s_waitcnt vmcnt(0)
239 ; GFX10-NEXT: global_store_dword v[0:1], v0, off
240 ; GFX10-NEXT: s_endpgm
241 ;
242 ; GFX1030-LABEL: raw_buffer_atomic_min_rtn_f32:
243 ; GFX1030: ; %bb.0: ; %main_body
244 ; GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
245 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
246 ; GFX1030-NEXT: global_store_dword v[0:1], v0, off
247 ; GFX1030-NEXT: s_endpgm
248 ;
249 ; G_SI-LABEL: raw_buffer_atomic_min_rtn_f32:
250 ; G_SI: ; %bb.0: ; %main_body
251 ; G_SI-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
252 ; G_SI-NEXT: s_mov_b32 s2, -1
253 ; G_SI-NEXT: s_mov_b32 s3, 0xf000
254 ; G_SI-NEXT: s_waitcnt vmcnt(0)
255 ; G_SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
256 ; G_SI-NEXT: s_endpgm
257 ;
258 ; G_GFX7-LABEL: raw_buffer_atomic_min_rtn_f32:
259 ; G_GFX7: ; %bb.0: ; %main_body
260 ; G_GFX7-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
261 ; G_GFX7-NEXT: s_mov_b32 s2, -1
262 ; G_GFX7-NEXT: s_mov_b32 s3, 0xf000
263 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
264 ; G_GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
265 ; G_GFX7-NEXT: s_endpgm
266 ;
267 ; G_GFX10-LABEL: raw_buffer_atomic_min_rtn_f32:
268 ; G_GFX10: ; %bb.0: ; %main_body
269 ; G_GFX10-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
270 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
271 ; G_GFX10-NEXT: global_store_dword v[0:1], v0, off
272 ; G_GFX10-NEXT: s_endpgm
273 ;
274 ; G_GFX1030-LABEL: raw_buffer_atomic_min_rtn_f32:
275 ; G_GFX1030: ; %bb.0: ; %main_body
276 ; G_GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
277 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
278 ; G_GFX1030-NEXT: global_store_dword v[0:1], v0, off
279 ; G_GFX1030-NEXT: s_endpgm
280 main_body:
281 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
282 store float %ret, float addrspace(1)* undef
283 ret void
284 }
286 define amdgpu_ps void @raw_buffer_atomic_min_rtn_f64(<4 x i32> inreg %rsrc, double %data, i32 %vindex) {
287 ; SI-LABEL: raw_buffer_atomic_min_rtn_f64:
288 ; SI: ; %bb.0: ; %main_body
289 ; SI-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
290 ; SI-NEXT: s_mov_b32 m0, -1
291 ; SI-NEXT: s_waitcnt vmcnt(0)
292 ; SI-NEXT: ds_write_b64 v0, v[0:1]
293 ; SI-NEXT: s_endpgm
294 ;
295 ; GFX7-LABEL: raw_buffer_atomic_min_rtn_f64:
296 ; GFX7: ; %bb.0: ; %main_body
297 ; GFX7-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
298 ; GFX7-NEXT: s_mov_b32 m0, -1
299 ; GFX7-NEXT: s_waitcnt vmcnt(0)
300 ; GFX7-NEXT: ds_write_b64 v0, v[0:1]
301 ; GFX7-NEXT: s_endpgm
302 ;
303 ; GFX10-LABEL: raw_buffer_atomic_min_rtn_f64:
304 ; GFX10: ; %bb.0: ; %main_body
305 ; GFX10-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
306 ; GFX10-NEXT: s_waitcnt vmcnt(0)
307 ; GFX10-NEXT: ds_write_b64 v0, v[0:1]
308 ; GFX10-NEXT: s_endpgm
309 ;
310 ; GFX1030-LABEL: raw_buffer_atomic_min_rtn_f64:
311 ; GFX1030: ; %bb.0: ; %main_body
312 ; GFX1030-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
313 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
314 ; GFX1030-NEXT: ds_write_b64 v0, v[0:1]
315 ; GFX1030-NEXT: s_endpgm
316 ;
317 ; G_SI-LABEL: raw_buffer_atomic_min_rtn_f64:
318 ; G_SI: ; %bb.0: ; %main_body
319 ; G_SI-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
320 ; G_SI-NEXT: s_mov_b32 m0, -1
321 ; G_SI-NEXT: s_waitcnt vmcnt(0)
322 ; G_SI-NEXT: ds_write_b64 v0, v[0:1]
323 ; G_SI-NEXT: s_endpgm
324 ;
325 ; G_GFX7-LABEL: raw_buffer_atomic_min_rtn_f64:
326 ; G_GFX7: ; %bb.0: ; %main_body
327 ; G_GFX7-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
328 ; G_GFX7-NEXT: s_mov_b32 m0, -1
329 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
330 ; G_GFX7-NEXT: ds_write_b64 v0, v[0:1]
331 ; G_GFX7-NEXT: s_endpgm
332 ;
333 ; G_GFX10-LABEL: raw_buffer_atomic_min_rtn_f64:
334 ; G_GFX10: ; %bb.0: ; %main_body
335 ; G_GFX10-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
336 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
337 ; G_GFX10-NEXT: ds_write_b64 v0, v[0:1]
338 ; G_GFX10-NEXT: s_endpgm
339 ;
340 ; G_GFX1030-LABEL: raw_buffer_atomic_min_rtn_f64:
341 ; G_GFX1030: ; %bb.0: ; %main_body
342 ; G_GFX1030-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 0 offen glc
343 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
344 ; G_GFX1030-NEXT: ds_write_b64 v0, v[0:1]
345 ; G_GFX1030-NEXT: s_endpgm
346 main_body:
347 %ret = call double @llvm.amdgcn.raw.buffer.atomic.fmin.f64(double %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
348 store double %ret, double addrspace(3)* undef
349 ret void
350 }
352 define amdgpu_kernel void @raw_buffer_atomic_min_rtn_f32_off4_slc(<4 x i32> inreg %rsrc, float %data, i32 %vindex, float addrspace(3)* %out) {
353 ; SI-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
354 ; SI: ; %bb.0: ; %main_body
355 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
356 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
357 ; SI-NEXT: s_load_dword s0, s[0:1], 0xf
358 ; SI-NEXT: s_mov_b32 m0, -1
359 ; SI-NEXT: s_waitcnt lgkmcnt(0)
360 ; SI-NEXT: v_mov_b32_e32 v0, s2
361 ; SI-NEXT: v_mov_b32_e32 v1, s3
362 ; SI-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
363 ; SI-NEXT: v_mov_b32_e32 v1, s0
364 ; SI-NEXT: s_waitcnt vmcnt(0)
365 ; SI-NEXT: ds_write_b32 v1, v0
366 ; SI-NEXT: s_endpgm
367 ;
368 ; GFX7-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
369 ; GFX7: ; %bb.0: ; %main_body
370 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
371 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
372 ; GFX7-NEXT: s_load_dword s0, s[0:1], 0xf
373 ; GFX7-NEXT: s_mov_b32 m0, -1
374 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
375 ; GFX7-NEXT: v_mov_b32_e32 v0, s2
376 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
377 ; GFX7-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
378 ; GFX7-NEXT: v_mov_b32_e32 v1, s0
379 ; GFX7-NEXT: s_waitcnt vmcnt(0)
380 ; GFX7-NEXT: ds_write_b32 v1, v0
381 ; GFX7-NEXT: s_endpgm
382 ;
383 ; GFX10-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
384 ; GFX10: ; %bb.0: ; %main_body
385 ; GFX10-NEXT: s_clause 0x2
386 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
387 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
388 ; GFX10-NEXT: s_nop 0
389 ; GFX10-NEXT: s_load_dword s0, s[0:1], 0x3c
390 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
391 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
392 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
393 ; GFX10-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
394 ; GFX10-NEXT: v_mov_b32_e32 v1, s0
395 ; GFX10-NEXT: s_waitcnt vmcnt(0)
396 ; GFX10-NEXT: ds_write_b32 v1, v0
397 ; GFX10-NEXT: s_endpgm
398 ;
399 ; GFX1030-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
400 ; GFX1030: ; %bb.0: ; %main_body
401 ; GFX1030-NEXT: s_clause 0x2
402 ; GFX1030-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
403 ; GFX1030-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
404 ; GFX1030-NEXT: s_load_dword s0, s[0:1], 0x3c
405 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
406 ; GFX1030-NEXT: v_mov_b32_e32 v0, s2
407 ; GFX1030-NEXT: v_mov_b32_e32 v1, s3
408 ; GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
409 ; GFX1030-NEXT: v_mov_b32_e32 v1, s0
410 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
411 ; GFX1030-NEXT: ds_write_b32 v1, v0
412 ; GFX1030-NEXT: s_endpgm
413 ;
414 ; G_SI-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
415 ; G_SI: ; %bb.0: ; %main_body
416 ; G_SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
417 ; G_SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
418 ; G_SI-NEXT: s_load_dword s0, s[0:1], 0xf
419 ; G_SI-NEXT: s_mov_b32 m0, -1
420 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
421 ; G_SI-NEXT: v_mov_b32_e32 v0, s2
422 ; G_SI-NEXT: v_mov_b32_e32 v1, s3
423 ; G_SI-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
424 ; G_SI-NEXT: v_mov_b32_e32 v1, s0
425 ; G_SI-NEXT: s_waitcnt vmcnt(0)
426 ; G_SI-NEXT: ds_write_b32 v1, v0
427 ; G_SI-NEXT: s_endpgm
428 ;
429 ; G_GFX7-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
430 ; G_GFX7: ; %bb.0: ; %main_body
431 ; G_GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
432 ; G_GFX7-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0xd
433 ; G_GFX7-NEXT: s_load_dword s2, s[0:1], 0xf
434 ; G_GFX7-NEXT: s_mov_b32 m0, -1
435 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
436 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s12
437 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s13
438 ; G_GFX7-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
439 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s2
440 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
441 ; G_GFX7-NEXT: ds_write_b32 v1, v0
442 ; G_GFX7-NEXT: s_endpgm
443 ;
444 ; G_GFX10-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
445 ; G_GFX10: ; %bb.0: ; %main_body
446 ; G_GFX10-NEXT: s_clause 0x2
447 ; G_GFX10-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0x34
448 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
449 ; G_GFX10-NEXT: s_load_dword s2, s[0:1], 0x3c
450 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
451 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s12
452 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s13
453 ; G_GFX10-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
454 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s2
455 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
456 ; G_GFX10-NEXT: ds_write_b32 v1, v0
457 ; G_GFX10-NEXT: s_endpgm
458 ;
459 ; G_GFX1030-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
460 ; G_GFX1030: ; %bb.0: ; %main_body
461 ; G_GFX1030-NEXT: s_clause 0x2
462 ; G_GFX1030-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0x34
463 ; G_GFX1030-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
464 ; G_GFX1030-NEXT: s_load_dword s2, s[0:1], 0x3c
465 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
466 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s12
467 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s13
468 ; G_GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
469 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s2
470 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
471 ; G_GFX1030-NEXT: ds_write_b32 v1, v0
472 ; G_GFX1030-NEXT: s_endpgm
473 ; GFX1010-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
474 main_body:
475 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 4, i32 2)
476 store float %ret, float addrspace(3)* %out, align 8
477 ret void
478 }
480 define amdgpu_ps void @raw_buffer_atomic_min_rtn_f64_off4_slc(<4 x i32> inreg %rsrc, double %data, i32 %vindex, double addrspace(3)* %out) {
481 ; SI-LABEL: raw_buffer_atomic_min_rtn_f64_off4_slc:
482 ; SI: ; %bb.0: ; %main_body
483 ; SI-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 4 offen glc slc
484 ; SI-NEXT: s_mov_b32 m0, -1
485 ; SI-NEXT: s_waitcnt vmcnt(0)
486 ; SI-NEXT: ds_write_b64 v3, v[0:1]
487 ; SI-NEXT: s_endpgm
488 ;
489 ; GFX7-LABEL: raw_buffer_atomic_min_rtn_f64_off4_slc:
490 ; GFX7: ; %bb.0: ; %main_body
491 ; GFX7-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 4 offen glc slc
492 ; GFX7-NEXT: s_mov_b32 m0, -1
493 ; GFX7-NEXT: s_waitcnt vmcnt(0)
494 ; GFX7-NEXT: ds_write_b64 v3, v[0:1]
495 ; GFX7-NEXT: s_endpgm
496 ;
497 ; GFX10-LABEL: raw_buffer_atomic_min_rtn_f64_off4_slc:
498 ; GFX10: ; %bb.0: ; %main_body
499 ; GFX10-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 4 offen glc slc
500 ; GFX10-NEXT: s_waitcnt vmcnt(0)
501 ; GFX10-NEXT: ds_write_b64 v3, v[0:1]
502 ; GFX10-NEXT: s_endpgm
503 ;
504 ; GFX1030-LABEL: raw_buffer_atomic_min_rtn_f64_off4_slc:
505 ; GFX1030: ; %bb.0: ; %main_body
506 ; GFX1030-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 4 offen glc slc
507 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
508 ; GFX1030-NEXT: ds_write_b64 v3, v[0:1]
509 ; GFX1030-NEXT: s_endpgm
510 ;
511 ; G_SI-LABEL: raw_buffer_atomic_min_rtn_f64_off4_slc:
512 ; G_SI: ; %bb.0: ; %main_body
513 ; G_SI-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 4 offen glc slc
514 ; G_SI-NEXT: s_mov_b32 m0, -1
515 ; G_SI-NEXT: s_waitcnt vmcnt(0)
516 ; G_SI-NEXT: ds_write_b64 v3, v[0:1]
517 ; G_SI-NEXT: s_endpgm
518 ;
519 ; G_GFX7-LABEL: raw_buffer_atomic_min_rtn_f64_off4_slc:
520 ; G_GFX7: ; %bb.0: ; %main_body
521 ; G_GFX7-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 4 offen glc slc
522 ; G_GFX7-NEXT: s_mov_b32 m0, -1
523 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
524 ; G_GFX7-NEXT: ds_write_b64 v3, v[0:1]
525 ; G_GFX7-NEXT: s_endpgm
526 ;
527 ; G_GFX10-LABEL: raw_buffer_atomic_min_rtn_f64_off4_slc:
528 ; G_GFX10: ; %bb.0: ; %main_body
529 ; G_GFX10-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 4 offen glc slc
530 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
531 ; G_GFX10-NEXT: ds_write_b64 v3, v[0:1]
532 ; G_GFX10-NEXT: s_endpgm
533 ;
534 ; G_GFX1030-LABEL: raw_buffer_atomic_min_rtn_f64_off4_slc:
535 ; G_GFX1030: ; %bb.0: ; %main_body
536 ; G_GFX1030-NEXT: buffer_atomic_fmin_x2 v[0:1], v2, s[0:3], 4 offen glc slc
537 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
538 ; G_GFX1030-NEXT: ds_write_b64 v3, v[0:1]
539 ; G_GFX1030-NEXT: s_endpgm
540 main_body:
541 %ret = call double @llvm.amdgcn.raw.buffer.atomic.fmin.f64(double %data, <4 x i32> %rsrc, i32 %vindex, i32 4, i32 2)
542 store double %ret, double addrspace(3)* %out, align 8
543 ret void
544 }
546 define amdgpu_kernel void @raw_buffer_atomic_max_noret_f32(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
547 ; SI-LABEL: raw_buffer_atomic_max_noret_f32:
548 ; SI: ; %bb.0: ; %main_body
549 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
550 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
551 ; SI-NEXT: s_waitcnt lgkmcnt(0)
552 ; SI-NEXT: v_mov_b32_e32 v0, s0
553 ; SI-NEXT: v_mov_b32_e32 v1, s1
554 ; SI-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 0 offen
555 ; SI-NEXT: s_endpgm
556 ;
557 ; GFX7-LABEL: raw_buffer_atomic_max_noret_f32:
558 ; GFX7: ; %bb.0: ; %main_body
559 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
560 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
561 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
562 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
563 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
564 ; GFX7-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 0 offen
565 ; GFX7-NEXT: s_endpgm
566 ;
567 ; GFX10-LABEL: raw_buffer_atomic_max_noret_f32:
568 ; GFX10: ; %bb.0: ; %main_body
569 ; GFX10-NEXT: s_clause 0x1
570 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
571 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
572 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
573 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
574 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
575 ; GFX10-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 0 offen
576 ; GFX10-NEXT: s_endpgm
577 ;
578 ; GFX1030-LABEL: raw_buffer_atomic_max_noret_f32:
579 ; GFX1030: ; %bb.0: ; %main_body
580 ; GFX1030-NEXT: s_clause 0x1
581 ; GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
582 ; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
583 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
584 ; GFX1030-NEXT: v_mov_b32_e32 v0, s4
585 ; GFX1030-NEXT: v_mov_b32_e32 v1, s5
586 ; GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen
587 ; GFX1030-NEXT: s_endpgm
588 ;
589 ; G_SI-LABEL: raw_buffer_atomic_max_noret_f32:
590 ; G_SI: ; %bb.0: ; %main_body
591 ; G_SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
592 ; G_SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
593 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
594 ; G_SI-NEXT: v_mov_b32_e32 v0, s0
595 ; G_SI-NEXT: v_mov_b32_e32 v1, s1
596 ; G_SI-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 0 offen glc
597 ; G_SI-NEXT: s_endpgm
598 ;
599 ; G_GFX7-LABEL: raw_buffer_atomic_max_noret_f32:
600 ; G_GFX7: ; %bb.0: ; %main_body
601 ; G_GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
602 ; G_GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xd
603 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
604 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s0
605 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s1
606 ; G_GFX7-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 0 offen glc
607 ; G_GFX7-NEXT: s_endpgm
608 ;
609 ; G_GFX10-LABEL: raw_buffer_atomic_max_noret_f32:
610 ; G_GFX10: ; %bb.0: ; %main_body
611 ; G_GFX10-NEXT: s_clause 0x1
612 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
613 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
614 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
615 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
616 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
617 ; G_GFX10-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 0 offen glc
618 ; G_GFX10-NEXT: s_endpgm
619 ;
620 ; G_GFX1030-LABEL: raw_buffer_atomic_max_noret_f32:
621 ; G_GFX1030: ; %bb.0: ; %main_body
622 ; G_GFX1030-NEXT: s_clause 0x1
623 ; G_GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
624 ; G_GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
625 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
626 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s4
627 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s5
628 ; G_GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
629 ; G_GFX1030-NEXT: s_endpgm
630 main_body:
631 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
632 ret void
633 }
635 define amdgpu_kernel void @raw_buffer_atomic_max_noret_f64(<4 x i32> inreg %rsrc, double %data, i32 %vindex) {
636 ; SI-LABEL: raw_buffer_atomic_max_noret_f64:
637 ; SI: ; %bb.0: ; %main_body
638 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
639 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
640 ; SI-NEXT: s_load_dword s0, s[0:1], 0xf
641 ; SI-NEXT: s_waitcnt lgkmcnt(0)
642 ; SI-NEXT: v_mov_b32_e32 v0, s2
643 ; SI-NEXT: v_mov_b32_e32 v1, s3
644 ; SI-NEXT: v_mov_b32_e32 v2, s0
645 ; SI-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 0 offen
646 ; SI-NEXT: s_endpgm
647 ;
648 ; GFX7-LABEL: raw_buffer_atomic_max_noret_f64:
649 ; GFX7: ; %bb.0: ; %main_body
650 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
651 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
652 ; GFX7-NEXT: s_load_dword s0, s[0:1], 0xf
653 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
654 ; GFX7-NEXT: v_mov_b32_e32 v0, s2
655 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
656 ; GFX7-NEXT: v_mov_b32_e32 v2, s0
657 ; GFX7-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 0 offen
658 ; GFX7-NEXT: s_endpgm
659 ;
660 ; GFX10-LABEL: raw_buffer_atomic_max_noret_f64:
661 ; GFX10: ; %bb.0: ; %main_body
662 ; GFX10-NEXT: s_clause 0x2
663 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
664 ; GFX10-NEXT: s_load_dword s8, s[0:1], 0x3c
665 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
666 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
667 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
668 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
669 ; GFX10-NEXT: v_mov_b32_e32 v2, s8
670 ; GFX10-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 0 offen
671 ; GFX10-NEXT: s_endpgm
672 ;
673 ; GFX1030-LABEL: raw_buffer_atomic_max_noret_f64:
674 ; GFX1030: ; %bb.0: ; %main_body
675 ; GFX1030-NEXT: s_clause 0x2
676 ; GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
677 ; GFX1030-NEXT: s_load_dword s6, s[0:1], 0x3c
678 ; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
679 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
680 ; GFX1030-NEXT: v_mov_b32_e32 v0, s4
681 ; GFX1030-NEXT: v_mov_b32_e32 v1, s5
682 ; GFX1030-NEXT: v_mov_b32_e32 v2, s6
683 ; GFX1030-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen
684 ; GFX1030-NEXT: s_endpgm
685 ;
686 ; G_SI-LABEL: raw_buffer_atomic_max_noret_f64:
687 ; G_SI: ; %bb.0: ; %main_body
688 ; G_SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
689 ; G_SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
690 ; G_SI-NEXT: s_load_dword s0, s[0:1], 0xf
691 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
692 ; G_SI-NEXT: v_mov_b32_e32 v0, s2
693 ; G_SI-NEXT: v_mov_b32_e32 v1, s3
694 ; G_SI-NEXT: v_mov_b32_e32 v2, s0
695 ; G_SI-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 0 offen glc
696 ; G_SI-NEXT: s_endpgm
697 ;
698 ; G_GFX7-LABEL: raw_buffer_atomic_max_noret_f64:
699 ; G_GFX7: ; %bb.0: ; %main_body
700 ; G_GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
701 ; G_GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
702 ; G_GFX7-NEXT: s_load_dword s0, s[0:1], 0xf
703 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
704 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s2
705 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s3
706 ; G_GFX7-NEXT: v_mov_b32_e32 v2, s0
707 ; G_GFX7-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 0 offen glc
708 ; G_GFX7-NEXT: s_endpgm
709 ;
710 ; G_GFX10-LABEL: raw_buffer_atomic_max_noret_f64:
711 ; G_GFX10: ; %bb.0: ; %main_body
712 ; G_GFX10-NEXT: s_clause 0x2
713 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
714 ; G_GFX10-NEXT: s_load_dword s8, s[0:1], 0x3c
715 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
716 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
717 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
718 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
719 ; G_GFX10-NEXT: v_mov_b32_e32 v2, s8
720 ; G_GFX10-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 0 offen glc
721 ; G_GFX10-NEXT: s_endpgm
722 ;
723 ; G_GFX1030-LABEL: raw_buffer_atomic_max_noret_f64:
724 ; G_GFX1030: ; %bb.0: ; %main_body
725 ; G_GFX1030-NEXT: s_clause 0x2
726 ; G_GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
727 ; G_GFX1030-NEXT: s_load_dword s6, s[0:1], 0x3c
728 ; G_GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
729 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
730 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s4
731 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s5
732 ; G_GFX1030-NEXT: v_mov_b32_e32 v2, s6
733 ; G_GFX1030-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
734 ; G_GFX1030-NEXT: s_endpgm
735 main_body:
736 %ret = call double @llvm.amdgcn.raw.buffer.atomic.fmax.f64(double %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
737 ret void
738 }
740 define amdgpu_ps void @raw_buffer_atomic_max_rtn_f32(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
741 ; SI-LABEL: raw_buffer_atomic_max_rtn_f32:
742 ; SI: ; %bb.0: ; %main_body
743 ; SI-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
744 ; SI-NEXT: s_mov_b32 s3, 0xf000
745 ; SI-NEXT: s_mov_b32 s2, -1
746 ; SI-NEXT: s_waitcnt vmcnt(0)
747 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
748 ; SI-NEXT: s_endpgm
749 ;
750 ; GFX7-LABEL: raw_buffer_atomic_max_rtn_f32:
751 ; GFX7: ; %bb.0: ; %main_body
752 ; GFX7-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
753 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
754 ; GFX7-NEXT: s_mov_b32 s2, -1
755 ; GFX7-NEXT: s_waitcnt vmcnt(0)
756 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
757 ; GFX7-NEXT: s_endpgm
758 ;
759 ; GFX10-LABEL: raw_buffer_atomic_max_rtn_f32:
760 ; GFX10: ; %bb.0: ; %main_body
761 ; GFX10-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
762 ; GFX10-NEXT: s_waitcnt vmcnt(0)
763 ; GFX10-NEXT: global_store_dword v[0:1], v0, off
764 ; GFX10-NEXT: s_endpgm
765 ;
766 ; GFX1030-LABEL: raw_buffer_atomic_max_rtn_f32:
767 ; GFX1030: ; %bb.0: ; %main_body
768 ; GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
769 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
770 ; GFX1030-NEXT: global_store_dword v[0:1], v0, off
771 ; GFX1030-NEXT: s_endpgm
772 ;
773 ; G_SI-LABEL: raw_buffer_atomic_max_rtn_f32:
774 ; G_SI: ; %bb.0: ; %main_body
775 ; G_SI-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
776 ; G_SI-NEXT: s_mov_b32 s2, -1
777 ; G_SI-NEXT: s_mov_b32 s3, 0xf000
778 ; G_SI-NEXT: s_waitcnt vmcnt(0)
779 ; G_SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
780 ; G_SI-NEXT: s_endpgm
781 ;
782 ; G_GFX7-LABEL: raw_buffer_atomic_max_rtn_f32:
783 ; G_GFX7: ; %bb.0: ; %main_body
784 ; G_GFX7-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
785 ; G_GFX7-NEXT: s_mov_b32 s2, -1
786 ; G_GFX7-NEXT: s_mov_b32 s3, 0xf000
787 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
788 ; G_GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
789 ; G_GFX7-NEXT: s_endpgm
790 ;
791 ; G_GFX10-LABEL: raw_buffer_atomic_max_rtn_f32:
792 ; G_GFX10: ; %bb.0: ; %main_body
793 ; G_GFX10-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
794 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
795 ; G_GFX10-NEXT: global_store_dword v[0:1], v0, off
796 ; G_GFX10-NEXT: s_endpgm
797 ;
798 ; G_GFX1030-LABEL: raw_buffer_atomic_max_rtn_f32:
799 ; G_GFX1030: ; %bb.0: ; %main_body
800 ; G_GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
801 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
802 ; G_GFX1030-NEXT: global_store_dword v[0:1], v0, off
803 ; G_GFX1030-NEXT: s_endpgm
804 main_body:
805 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
806 store float %ret, float addrspace(1)* undef
807 ret void
808 }
810 define amdgpu_ps void @raw_buffer_atomic_max_rtn_f64(<4 x i32> inreg %rsrc, double %data, i32 %vindex) {
811 ; SI-LABEL: raw_buffer_atomic_max_rtn_f64:
812 ; SI: ; %bb.0: ; %main_body
813 ; SI-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
814 ; SI-NEXT: s_mov_b32 m0, -1
815 ; SI-NEXT: s_waitcnt vmcnt(0)
816 ; SI-NEXT: ds_write_b64 v0, v[0:1]
817 ; SI-NEXT: s_endpgm
818 ;
819 ; GFX7-LABEL: raw_buffer_atomic_max_rtn_f64:
820 ; GFX7: ; %bb.0: ; %main_body
821 ; GFX7-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
822 ; GFX7-NEXT: s_mov_b32 m0, -1
823 ; GFX7-NEXT: s_waitcnt vmcnt(0)
824 ; GFX7-NEXT: ds_write_b64 v0, v[0:1]
825 ; GFX7-NEXT: s_endpgm
826 ;
827 ; GFX10-LABEL: raw_buffer_atomic_max_rtn_f64:
828 ; GFX10: ; %bb.0: ; %main_body
829 ; GFX10-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
830 ; GFX10-NEXT: s_waitcnt vmcnt(0)
831 ; GFX10-NEXT: ds_write_b64 v0, v[0:1]
832 ; GFX10-NEXT: s_endpgm
833 ;
834 ; GFX1030-LABEL: raw_buffer_atomic_max_rtn_f64:
835 ; GFX1030: ; %bb.0: ; %main_body
836 ; GFX1030-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
837 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
838 ; GFX1030-NEXT: ds_write_b64 v0, v[0:1]
839 ; GFX1030-NEXT: s_endpgm
840 ;
841 ; G_SI-LABEL: raw_buffer_atomic_max_rtn_f64:
842 ; G_SI: ; %bb.0: ; %main_body
843 ; G_SI-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
844 ; G_SI-NEXT: s_mov_b32 m0, -1
845 ; G_SI-NEXT: s_waitcnt vmcnt(0)
846 ; G_SI-NEXT: ds_write_b64 v0, v[0:1]
847 ; G_SI-NEXT: s_endpgm
848 ;
849 ; G_GFX7-LABEL: raw_buffer_atomic_max_rtn_f64:
850 ; G_GFX7: ; %bb.0: ; %main_body
851 ; G_GFX7-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
852 ; G_GFX7-NEXT: s_mov_b32 m0, -1
853 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
854 ; G_GFX7-NEXT: ds_write_b64 v0, v[0:1]
855 ; G_GFX7-NEXT: s_endpgm
856 ;
857 ; G_GFX10-LABEL: raw_buffer_atomic_max_rtn_f64:
858 ; G_GFX10: ; %bb.0: ; %main_body
859 ; G_GFX10-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
860 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
861 ; G_GFX10-NEXT: ds_write_b64 v0, v[0:1]
862 ; G_GFX10-NEXT: s_endpgm
863 ;
864 ; G_GFX1030-LABEL: raw_buffer_atomic_max_rtn_f64:
865 ; G_GFX1030: ; %bb.0: ; %main_body
866 ; G_GFX1030-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 0 offen glc
867 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
868 ; G_GFX1030-NEXT: ds_write_b64 v0, v[0:1]
869 ; G_GFX1030-NEXT: s_endpgm
870 main_body:
871 %ret = call double @llvm.amdgcn.raw.buffer.atomic.fmax.f64(double %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
872 store double %ret, double addrspace(3)* undef
873 ret void
874 }
876 define amdgpu_kernel void @raw_buffer_atomic_max_rtn_f32_off4_slc(<4 x i32> inreg %rsrc, float %data, i32 %vindex, float addrspace(1)* %out) {
877 ; SI-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
878 ; SI: ; %bb.0: ; %main_body
879 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
880 ; SI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0xd
881 ; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xf
882 ; SI-NEXT: s_mov_b32 s3, 0xf000
883 ; SI-NEXT: s_mov_b32 s2, -1
884 ; SI-NEXT: s_waitcnt lgkmcnt(0)
885 ; SI-NEXT: v_mov_b32_e32 v0, s8
886 ; SI-NEXT: v_mov_b32_e32 v1, s9
887 ; SI-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 4 offen glc slc
888 ; SI-NEXT: s_waitcnt vmcnt(0)
889 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
890 ; SI-NEXT: s_endpgm
891 ;
892 ; GFX7-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
893 ; GFX7: ; %bb.0: ; %main_body
894 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
895 ; GFX7-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0xd
896 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xf
897 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
898 ; GFX7-NEXT: s_mov_b32 s2, -1
899 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
900 ; GFX7-NEXT: v_mov_b32_e32 v0, s8
901 ; GFX7-NEXT: v_mov_b32_e32 v1, s9
902 ; GFX7-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 4 offen glc slc
903 ; GFX7-NEXT: s_waitcnt vmcnt(0)
904 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
905 ; GFX7-NEXT: s_endpgm
906 ;
907 ; GFX10-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
908 ; GFX10: ; %bb.0: ; %main_body
909 ; GFX10-NEXT: s_clause 0x2
910 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
911 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
912 ; GFX10-NEXT: s_nop 0
913 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c
914 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
915 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
916 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
917 ; GFX10-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 4 offen glc slc
918 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
919 ; GFX10-NEXT: s_waitcnt vmcnt(0)
920 ; GFX10-NEXT: global_store_dword v1, v0, s[0:1]
921 ; GFX10-NEXT: s_endpgm
922 ;
923 ; GFX1030-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
924 ; GFX1030: ; %bb.0: ; %main_body
925 ; GFX1030-NEXT: s_clause 0x2
926 ; GFX1030-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
927 ; GFX1030-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
928 ; GFX1030-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c
929 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
930 ; GFX1030-NEXT: v_mov_b32_e32 v0, s2
931 ; GFX1030-NEXT: v_mov_b32_e32 v1, s3
932 ; GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 4 offen glc slc
933 ; GFX1030-NEXT: v_mov_b32_e32 v1, 0
934 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
935 ; GFX1030-NEXT: global_store_dword v1, v0, s[0:1]
936 ; GFX1030-NEXT: s_endpgm
937 ;
938 ; G_SI-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
939 ; G_SI: ; %bb.0: ; %main_body
940 ; G_SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
941 ; G_SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
942 ; G_SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xf
943 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
944 ; G_SI-NEXT: v_mov_b32_e32 v0, s2
945 ; G_SI-NEXT: v_mov_b32_e32 v1, s3
946 ; G_SI-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 4 offen glc slc
947 ; G_SI-NEXT: s_mov_b32 s2, -1
948 ; G_SI-NEXT: s_mov_b32 s3, 0xf000
949 ; G_SI-NEXT: s_waitcnt vmcnt(0)
950 ; G_SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
951 ; G_SI-NEXT: s_endpgm
952 ;
953 ; G_GFX7-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
954 ; G_GFX7: ; %bb.0: ; %main_body
955 ; G_GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
956 ; G_GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
957 ; G_GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xf
958 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
959 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s2
960 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s3
961 ; G_GFX7-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 4 offen glc slc
962 ; G_GFX7-NEXT: s_mov_b32 s2, -1
963 ; G_GFX7-NEXT: s_mov_b32 s3, 0xf000
964 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
965 ; G_GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
966 ; G_GFX7-NEXT: s_endpgm
967 ;
968 ; G_GFX10-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
969 ; G_GFX10: ; %bb.0: ; %main_body
970 ; G_GFX10-NEXT: s_clause 0x2
971 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
972 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
973 ; G_GFX10-NEXT: s_nop 0
974 ; G_GFX10-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c
975 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
976 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
977 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
978 ; G_GFX10-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 4 offen glc slc
979 ; G_GFX10-NEXT: v_mov_b32_e32 v1, 0
980 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
981 ; G_GFX10-NEXT: global_store_dword v1, v0, s[0:1]
982 ; G_GFX10-NEXT: s_endpgm
983 ;
984 ; G_GFX1030-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
985 ; G_GFX1030: ; %bb.0: ; %main_body
986 ; G_GFX1030-NEXT: s_clause 0x2
987 ; G_GFX1030-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
988 ; G_GFX1030-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
989 ; G_GFX1030-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c
990 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
991 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s2
992 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s3
993 ; G_GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 4 offen glc slc
994 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, 0
995 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
996 ; G_GFX1030-NEXT: global_store_dword v1, v0, s[0:1]
997 ; G_GFX1030-NEXT: s_endpgm
998 main_body:
999 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 4, i32 2)
1000 store float %ret, float addrspace(1)* %out, align 8
1001 ret void
1002 }
1004 define amdgpu_kernel void @raw_buffer_atomic_max_rtn_f64_off4_slc(<4 x i32> inreg %rsrc, double %data, i32 %vindex, double addrspace(3)* %out) {
1005 ; SI-LABEL: raw_buffer_atomic_max_rtn_f64_off4_slc:
1006 ; SI: ; %bb.0: ; %main_body
1007 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1008 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
1009 ; SI-NEXT: s_load_dword s8, s[0:1], 0xf
1010 ; SI-NEXT: s_load_dword s0, s[0:1], 0x10
1011 ; SI-NEXT: s_mov_b32 m0, -1
1012 ; SI-NEXT: s_waitcnt lgkmcnt(0)
1013 ; SI-NEXT: v_mov_b32_e32 v0, s2
1014 ; SI-NEXT: v_mov_b32_e32 v1, s3
1015 ; SI-NEXT: v_mov_b32_e32 v2, s8
1016 ; SI-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 4 offen glc slc
1017 ; SI-NEXT: v_mov_b32_e32 v2, s0
1018 ; SI-NEXT: s_waitcnt vmcnt(0)
1019 ; SI-NEXT: ds_write_b64 v2, v[0:1]
1020 ; SI-NEXT: s_endpgm
1021 ;
1022 ; GFX7-LABEL: raw_buffer_atomic_max_rtn_f64_off4_slc:
1023 ; GFX7: ; %bb.0: ; %main_body
1024 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1025 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
1026 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xf
1027 ; GFX7-NEXT: s_mov_b32 m0, -1
1028 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
1029 ; GFX7-NEXT: v_mov_b32_e32 v0, s2
1030 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
1031 ; GFX7-NEXT: v_mov_b32_e32 v2, s0
1032 ; GFX7-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 4 offen glc slc
1033 ; GFX7-NEXT: v_mov_b32_e32 v2, s1
1034 ; GFX7-NEXT: s_waitcnt vmcnt(0)
1035 ; GFX7-NEXT: ds_write_b64 v2, v[0:1]
1036 ; GFX7-NEXT: s_endpgm
1037 ;
1038 ; GFX10-LABEL: raw_buffer_atomic_max_rtn_f64_off4_slc:
1039 ; GFX10: ; %bb.0: ; %main_body
1040 ; GFX10-NEXT: s_clause 0x2
1041 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
1042 ; GFX10-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x3c
1043 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1044 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
1045 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
1046 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
1047 ; GFX10-NEXT: v_mov_b32_e32 v2, s8
1048 ; GFX10-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 4 offen glc slc
1049 ; GFX10-NEXT: v_mov_b32_e32 v2, s9
1050 ; GFX10-NEXT: s_waitcnt vmcnt(0)
1051 ; GFX10-NEXT: ds_write_b64 v2, v[0:1]
1052 ; GFX10-NEXT: s_endpgm
1053 ;
1054 ; GFX1030-LABEL: raw_buffer_atomic_max_rtn_f64_off4_slc:
1055 ; GFX1030: ; %bb.0: ; %main_body
1056 ; GFX1030-NEXT: s_clause 0x2
1057 ; GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
1058 ; GFX1030-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x3c
1059 ; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1060 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
1061 ; GFX1030-NEXT: v_mov_b32_e32 v0, s4
1062 ; GFX1030-NEXT: v_mov_b32_e32 v1, s5
1063 ; GFX1030-NEXT: v_mov_b32_e32 v2, s6
1064 ; GFX1030-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 4 offen glc slc
1065 ; GFX1030-NEXT: v_mov_b32_e32 v2, s7
1066 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
1067 ; GFX1030-NEXT: ds_write_b64 v2, v[0:1]
1068 ; GFX1030-NEXT: s_endpgm
1069 ;
1070 ; G_SI-LABEL: raw_buffer_atomic_max_rtn_f64_off4_slc:
1071 ; G_SI: ; %bb.0: ; %main_body
1072 ; G_SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1073 ; G_SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
1074 ; G_SI-NEXT: s_load_dword s8, s[0:1], 0x10
1075 ; G_SI-NEXT: s_load_dword s0, s[0:1], 0xf
1076 ; G_SI-NEXT: s_mov_b32 m0, -1
1077 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
1078 ; G_SI-NEXT: v_mov_b32_e32 v0, s2
1079 ; G_SI-NEXT: v_mov_b32_e32 v1, s3
1080 ; G_SI-NEXT: v_mov_b32_e32 v2, s0
1081 ; G_SI-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 4 offen glc slc
1082 ; G_SI-NEXT: v_mov_b32_e32 v2, s8
1083 ; G_SI-NEXT: s_waitcnt vmcnt(0)
1084 ; G_SI-NEXT: ds_write_b64 v2, v[0:1]
1085 ; G_SI-NEXT: s_endpgm
1086 ;
1087 ; G_GFX7-LABEL: raw_buffer_atomic_max_rtn_f64_off4_slc:
1088 ; G_GFX7: ; %bb.0: ; %main_body
1089 ; G_GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
1090 ; G_GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
1091 ; G_GFX7-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xf
1092 ; G_GFX7-NEXT: s_mov_b32 m0, -1
1093 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
1094 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s2
1095 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s3
1096 ; G_GFX7-NEXT: v_mov_b32_e32 v2, s0
1097 ; G_GFX7-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 4 offen glc slc
1098 ; G_GFX7-NEXT: v_mov_b32_e32 v2, s1
1099 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
1100 ; G_GFX7-NEXT: ds_write_b64 v2, v[0:1]
1101 ; G_GFX7-NEXT: s_endpgm
1102 ;
1103 ; G_GFX10-LABEL: raw_buffer_atomic_max_rtn_f64_off4_slc:
1104 ; G_GFX10: ; %bb.0: ; %main_body
1105 ; G_GFX10-NEXT: s_clause 0x2
1106 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
1107 ; G_GFX10-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x3c
1108 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
1109 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
1110 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
1111 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
1112 ; G_GFX10-NEXT: v_mov_b32_e32 v2, s8
1113 ; G_GFX10-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[4:7], 4 offen glc slc
1114 ; G_GFX10-NEXT: v_mov_b32_e32 v2, s9
1115 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
1116 ; G_GFX10-NEXT: ds_write_b64 v2, v[0:1]
1117 ; G_GFX10-NEXT: s_endpgm
1118 ;
1119 ; G_GFX1030-LABEL: raw_buffer_atomic_max_rtn_f64_off4_slc:
1120 ; G_GFX1030: ; %bb.0: ; %main_body
1121 ; G_GFX1030-NEXT: s_clause 0x2
1122 ; G_GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
1123 ; G_GFX1030-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x3c
1124 ; G_GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1125 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
1126 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s4
1127 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s5
1128 ; G_GFX1030-NEXT: v_mov_b32_e32 v2, s6
1129 ; G_GFX1030-NEXT: buffer_atomic_fmax_x2 v[0:1], v2, s[0:3], 4 offen glc slc
1130 ; G_GFX1030-NEXT: v_mov_b32_e32 v2, s7
1131 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
1132 ; G_GFX1030-NEXT: ds_write_b64 v2, v[0:1]
1133 ; G_GFX1030-NEXT: s_endpgm
1134 main_body:
1135 %ret = call double @llvm.amdgcn.raw.buffer.atomic.fmax.f64(double %data, <4 x i32> %rsrc, i32 %vindex, i32 4, i32 2)
1136 store double %ret, double addrspace(3)* %out, align 8
1137 ret void
1138 }
1140 define amdgpu_ps float @atomic_fmin_1d(<8 x i32> inreg %rsrc, float %data, i32 %s) {
1141 ; SI-LABEL: atomic_fmin_1d:
1142 ; SI: ; %bb.0: ; %main_body
1143 ; SI-NEXT: image_atomic_fmin v0, v1, s[0:7] dmask:0x1 unorm glc
1144 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
1145 ; SI-NEXT: ; return to shader part epilog
1146 ;
1147 ; GFX7-LABEL: atomic_fmin_1d:
1148 ; GFX7: ; %bb.0: ; %main_body
1149 ; GFX7-NEXT: image_atomic_fmin v0, v1, s[0:7] dmask:0x1 unorm glc
1150 ; GFX7-NEXT: s_waitcnt vmcnt(0)
1151 ; GFX7-NEXT: ; return to shader part epilog
1152 ;
1153 ; GFX10-LABEL: atomic_fmin_1d:
1154 ; GFX10: ; %bb.0: ; %main_body
1155 ; GFX10-NEXT: image_atomic_fmin v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc
1156 ; GFX10-NEXT: s_waitcnt vmcnt(0)
1157 ; GFX10-NEXT: ; return to shader part epilog
1158 ;
1159 ; GFX1030-LABEL: atomic_fmin_1d:
1160 ; GFX1030: ; %bb.0: ; %main_body
1161 ; GFX1030-NEXT: image_atomic_fmin v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc
1162 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
1163 ; GFX1030-NEXT: ; return to shader part epilog
1164 ;
1165 ; G_SI-LABEL: atomic_fmin_1d:
1166 ; G_SI: ; %bb.0: ; %main_body
1167 ; G_SI-NEXT: image_atomic_fmin v0, v1, s[0:7] dmask:0x1 unorm glc
1168 ; G_SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
1169 ; G_SI-NEXT: ; return to shader part epilog
1170 ;
1171 ; G_GFX7-LABEL: atomic_fmin_1d:
1172 ; G_GFX7: ; %bb.0: ; %main_body
1173 ; G_GFX7-NEXT: image_atomic_fmin v0, v1, s[0:7] dmask:0x1 unorm glc
1174 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
1175 ; G_GFX7-NEXT: ; return to shader part epilog
1176 ;
1177 ; G_GFX10-LABEL: atomic_fmin_1d:
1178 ; G_GFX10: ; %bb.0: ; %main_body
1179 ; G_GFX10-NEXT: image_atomic_fmin v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc
1180 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
1181 ; G_GFX10-NEXT: ; return to shader part epilog
1182 ;
1183 ; G_GFX1030-LABEL: atomic_fmin_1d:
1184 ; G_GFX1030: ; %bb.0: ; %main_body
1185 ; G_GFX1030-NEXT: image_atomic_fmin v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc
1186 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
1187 ; G_GFX1030-NEXT: ; return to shader part epilog
1188 main_body:
1189 %v = call float @llvm.amdgcn.image.atomic.fmin.1d.f32.f32(float %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
1190 ret float %v
1191 }
1193 define amdgpu_ps float @atomic_fmax_1d(<8 x i32> inreg %rsrc, float %data, i32 %s) {
1194 ; SI-LABEL: atomic_fmax_1d:
1195 ; SI: ; %bb.0: ; %main_body
1196 ; SI-NEXT: image_atomic_fmax v0, v1, s[0:7] dmask:0x1 unorm glc
1197 ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
1198 ; SI-NEXT: ; return to shader part epilog
1199 ;
1200 ; GFX7-LABEL: atomic_fmax_1d:
1201 ; GFX7: ; %bb.0: ; %main_body
1202 ; GFX7-NEXT: image_atomic_fmax v0, v1, s[0:7] dmask:0x1 unorm glc
1203 ; GFX7-NEXT: s_waitcnt vmcnt(0)
1204 ; GFX7-NEXT: ; return to shader part epilog
1205 ;
1206 ; GFX10-LABEL: atomic_fmax_1d:
1207 ; GFX10: ; %bb.0: ; %main_body
1208 ; GFX10-NEXT: image_atomic_fmax v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc
1209 ; GFX10-NEXT: s_waitcnt vmcnt(0)
1210 ; GFX10-NEXT: ; return to shader part epilog
1211 ;
1212 ; GFX1030-LABEL: atomic_fmax_1d:
1213 ; GFX1030: ; %bb.0: ; %main_body
1214 ; GFX1030-NEXT: image_atomic_fmax v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc
1215 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
1216 ; GFX1030-NEXT: ; return to shader part epilog
1217 ;
1218 ; G_SI-LABEL: atomic_fmax_1d:
1219 ; G_SI: ; %bb.0: ; %main_body
1220 ; G_SI-NEXT: image_atomic_fmax v0, v1, s[0:7] dmask:0x1 unorm glc
1221 ; G_SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
1222 ; G_SI-NEXT: ; return to shader part epilog
1223 ;
1224 ; G_GFX7-LABEL: atomic_fmax_1d:
1225 ; G_GFX7: ; %bb.0: ; %main_body
1226 ; G_GFX7-NEXT: image_atomic_fmax v0, v1, s[0:7] dmask:0x1 unorm glc
1227 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
1228 ; G_GFX7-NEXT: ; return to shader part epilog
1229 ;
1230 ; G_GFX10-LABEL: atomic_fmax_1d:
1231 ; G_GFX10: ; %bb.0: ; %main_body
1232 ; G_GFX10-NEXT: image_atomic_fmax v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc
1233 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
1234 ; G_GFX10-NEXT: ; return to shader part epilog
1235 ;
1236 ; G_GFX1030-LABEL: atomic_fmax_1d:
1237 ; G_GFX1030: ; %bb.0: ; %main_body
1238 ; G_GFX1030-NEXT: image_atomic_fmax v0, v1, s[0:7] dmask:0x1 dim:SQ_RSRC_IMG_1D unorm glc
1239 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
1240 ; G_GFX1030-NEXT: ; return to shader part epilog
1241 main_body:
1242 %v = call float @llvm.amdgcn.image.atomic.fmax.1d.f32.f32(float %data, i32 %s, <8 x i32> %rsrc, i32 0, i32 0)
1243 ret float %v
1244 }