| blob | 73909dc918f0a745e903b687a4b1ee9f25969637 |
1 ; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each
2 ; pass. Ignore it with 'grep -v'.
3 ; fixme: the following line is added to cleanup bots, will be removed in weeks.
4 ; RUN: rm -f %S/llc-pipeline.s
5 ; RUN: llc -O0 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \
6 ; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O0 %s
7 ; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \
8 ; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1 %s
9 ; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -amdgpu-scalar-ir-passes -amdgpu-sdwa-peephole \
10 ; RUN: -amdgpu-load-store-vectorizer -amdgpu-enable-pre-ra-optimizations -debug-pass=Structure < %s 2>&1 \
11 ; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1-OPTS %s
12 ; RUN: llc -O2 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \
13 ; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O2 %s
14 ; RUN: llc -O3 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \
15 ; RUN: | grep -v 'Verify generated machine code' | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O3 %s
17 ; REQUIRES: asserts
19 ; GCN-O0:Target Library Information
20 ; GCN-O0-NEXT:Target Pass Configuration
21 ; GCN-O0-NEXT:Machine Module Information
22 ; GCN-O0-NEXT:Target Transform Information
23 ; GCN-O0-NEXT:Assumption Cache Tracker
24 ; GCN-O0-NEXT:Profile summary info
25 ; GCN-O0-NEXT:Argument Register Usage Information Storage
26 ; GCN-O0-NEXT:Create Garbage Collector Module Metadata
27 ; GCN-O0-NEXT:Register Usage Information Storage
28 ; GCN-O0-NEXT:Machine Branch Probability Analysis
29 ; GCN-O0-NEXT: ModulePass Manager
30 ; GCN-O0-NEXT: Pre-ISel Intrinsic Lowering
31 ; GCN-O0-NEXT: AMDGPU Printf lowering
32 ; GCN-O0-NEXT: FunctionPass Manager
33 ; GCN-O0-NEXT: Dominator Tree Construction
34 ; GCN-O0-NEXT: Lower ctors and dtors for AMDGPU
35 ; GCN-O0-NEXT: Fix function bitcasts for AMDGPU
36 ; GCN-O0-NEXT: FunctionPass Manager
37 ; GCN-O0-NEXT: Early propagate attributes from kernels to functions
38 ; GCN-O0-NEXT: AMDGPU Lower Intrinsics
39 ; GCN-O0-NEXT: AMDGPU Inline All Functions
40 ; GCN-O0-NEXT: CallGraph Construction
41 ; GCN-O0-NEXT: Call Graph SCC Pass Manager
42 ; GCN-O0-NEXT: Inliner for always_inline functions
43 ; GCN-O0-NEXT: A No-Op Barrier Pass
44 ; GCN-O0-NEXT: Lower OpenCL enqueued blocks
45 ; GCN-O0-NEXT: Lower uses of LDS variables from non-kernel functions
46 ; GCN-O0-NEXT: FunctionPass Manager
47 ; GCN-O0-NEXT: Expand Atomic instructions
48 ; GCN-O0-NEXT: Lower constant intrinsics
49 ; GCN-O0-NEXT: Remove unreachable blocks from the CFG
50 ; GCN-O0-NEXT: Expand vector predication intrinsics
51 ; GCN-O0-NEXT: Scalarize Masked Memory Intrinsics
52 ; GCN-O0-NEXT: Expand reduction intrinsics
53 ; GCN-O0-NEXT: CallGraph Construction
54 ; GCN-O0-NEXT: Call Graph SCC Pass Manager
55 ; GCN-O0-NEXT: AMDGPU Annotate Kernel Features
56 ; GCN-O0-NEXT: FunctionPass Manager
57 ; GCN-O0-NEXT: AMDGPU Lower Kernel Arguments
58 ; GCN-O0-NEXT: Lazy Value Information Analysis
59 ; GCN-O0-NEXT: Lower SwitchInst's to branches
60 ; GCN-O0-NEXT: Lower invoke and unwind, for unwindless code generators
61 ; GCN-O0-NEXT: Remove unreachable blocks from the CFG
62 ; GCN-O0-NEXT: Post-Dominator Tree Construction
63 ; GCN-O0-NEXT: Dominator Tree Construction
64 ; GCN-O0-NEXT: Natural Loop Information
65 ; GCN-O0-NEXT: Legacy Divergence Analysis
66 ; GCN-O0-NEXT: Unify divergent function exit nodes
67 ; GCN-O0-NEXT: Lazy Value Information Analysis
68 ; GCN-O0-NEXT: Lower SwitchInst's to branches
69 ; GCN-O0-NEXT: Dominator Tree Construction
70 ; GCN-O0-NEXT: Natural Loop Information
71 ; GCN-O0-NEXT: Convert irreducible control-flow into natural loops
72 ; GCN-O0-NEXT: Fixup each natural loop to have a single exit block
73 ; GCN-O0-NEXT: Post-Dominator Tree Construction
74 ; GCN-O0-NEXT: Dominance Frontier Construction
75 ; GCN-O0-NEXT: Detect single entry single exit regions
76 ; GCN-O0-NEXT: Region Pass Manager
77 ; GCN-O0-NEXT: Structurize control flow
78 ; GCN-O0-NEXT: Post-Dominator Tree Construction
79 ; GCN-O0-NEXT: Natural Loop Information
80 ; GCN-O0-NEXT: Legacy Divergence Analysis
81 ; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl)
82 ; GCN-O0-NEXT: Function Alias Analysis Results
83 ; GCN-O0-NEXT: Memory SSA
84 ; GCN-O0-NEXT: AMDGPU Annotate Uniform Values
85 ; GCN-O0-NEXT: SI annotate control flow
86 ; GCN-O0-NEXT: LCSSA Verifier
87 ; GCN-O0-NEXT: Loop-Closed SSA Form Pass
88 ; GCN-O0-NEXT: DummyCGSCCPass
89 ; GCN-O0-NEXT: FunctionPass Manager
90 ; GCN-O0-NEXT: Safe Stack instrumentation pass
91 ; GCN-O0-NEXT: Insert stack protectors
92 ; GCN-O0-NEXT: Dominator Tree Construction
93 ; GCN-O0-NEXT: Post-Dominator Tree Construction
94 ; GCN-O0-NEXT: Natural Loop Information
95 ; GCN-O0-NEXT: Legacy Divergence Analysis
96 ; GCN-O0-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection
97 ; GCN-O0-NEXT: MachineDominator Tree Construction
98 ; GCN-O0-NEXT: SI Fix SGPR copies
99 ; GCN-O0-NEXT: MachinePostDominator Tree Construction
100 ; GCN-O0-NEXT: SI Lower i1 Copies
101 ; GCN-O0-NEXT: Finalize ISel and expand pseudo-instructions
102 ; GCN-O0-NEXT: Local Stack Slot Allocation
103 ; GCN-O0-NEXT: Register Usage Information Propagation
104 ; GCN-O0-NEXT: Eliminate PHI nodes for register allocation
105 ; GCN-O0-NEXT: SI Lower control flow pseudo instructions
106 ; GCN-O0-NEXT: Two-Address instruction pass
107 ; GCN-O0-NEXT: Basic Alias Analysis (stateless AA impl)
108 ; GCN-O0-NEXT: Function Alias Analysis Results
109 ; GCN-O0-NEXT: MachineDominator Tree Construction
110 ; GCN-O0-NEXT: Slot index numbering
111 ; GCN-O0-NEXT: Live Interval Analysis
112 ; GCN-O0-NEXT: MachinePostDominator Tree Construction
113 ; GCN-O0-NEXT: SI Whole Quad Mode
114 ; GCN-O0-NEXT: Virtual Register Map
115 ; GCN-O0-NEXT: Live Register Matrix
116 ; GCN-O0-NEXT: SI Pre-allocate WWM Registers
117 ; GCN-O0-NEXT: Fast Register Allocator
118 ; GCN-O0-NEXT: SI lower SGPR spill instructions
119 ; GCN-O0-NEXT: Fast Register Allocator
120 ; GCN-O0-NEXT: SI Fix VGPR copies
121 ; GCN-O0-NEXT: Remove Redundant DEBUG_VALUE analysis
122 ; GCN-O0-NEXT: Fixup Statepoint Caller Saved
123 ; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis
124 ; GCN-O0-NEXT: Machine Optimization Remark Emitter
125 ; GCN-O0-NEXT: Prologue/Epilogue Insertion & Frame Finalization
126 ; GCN-O0-NEXT: Post-RA pseudo instruction expansion pass
127 ; GCN-O0-NEXT: SI post-RA bundler
128 ; GCN-O0-NEXT: Insert fentry calls
129 ; GCN-O0-NEXT: Insert XRay ops
130 ; GCN-O0-NEXT: SI Memory Legalizer
131 ; GCN-O0-NEXT: MachinePostDominator Tree Construction
132 ; GCN-O0-NEXT: SI insert wait instructions
133 ; GCN-O0-NEXT: Insert required mode register values
134 ; GCN-O0-NEXT: MachineDominator Tree Construction
135 ; GCN-O0-NEXT: SI Final Branch Preparation
136 ; GCN-O0-NEXT: Post RA hazard recognizer
137 ; GCN-O0-NEXT: Branch relaxation pass
138 ; GCN-O0-NEXT: Register Usage Information Collector Pass
139 ; GCN-O0-NEXT: Live DEBUG_VALUE analysis
140 ; GCN-O0-NEXT: Function register usage analysis
141 ; GCN-O0-NEXT: FunctionPass Manager
142 ; GCN-O0-NEXT: Lazy Machine Block Frequency Analysis
143 ; GCN-O0-NEXT: Machine Optimization Remark Emitter
144 ; GCN-O0-NEXT: AMDGPU Assembly Printer
145 ; GCN-O0-NEXT: Free MachineFunction
146 ; GCN-O0-NEXT:Pass Arguments: -domtree
147 ; GCN-O0-NEXT: FunctionPass Manager
148 ; GCN-O0-NEXT: Dominator Tree Construction
150 ; GCN-O1:Target Library Information
151 ; GCN-O1-NEXT:Target Pass Configuration
152 ; GCN-O1-NEXT:Machine Module Information
153 ; GCN-O1-NEXT:Target Transform Information
154 ; GCN-O1-NEXT:Assumption Cache Tracker
155 ; GCN-O1-NEXT:Profile summary info
156 ; GCN-O1-NEXT:AMDGPU Address space based Alias Analysis
157 ; GCN-O1-NEXT:External Alias Analysis
158 ; GCN-O1-NEXT:Type-Based Alias Analysis
159 ; GCN-O1-NEXT:Scoped NoAlias Alias Analysis
160 ; GCN-O1-NEXT:Argument Register Usage Information Storage
161 ; GCN-O1-NEXT:Create Garbage Collector Module Metadata
162 ; GCN-O1-NEXT:Machine Branch Probability Analysis
163 ; GCN-O1-NEXT:Register Usage Information Storage
164 ; GCN-O1-NEXT: ModulePass Manager
165 ; GCN-O1-NEXT: Pre-ISel Intrinsic Lowering
166 ; GCN-O1-NEXT: AMDGPU Printf lowering
167 ; GCN-O1-NEXT: FunctionPass Manager
168 ; GCN-O1-NEXT: Dominator Tree Construction
169 ; GCN-O1-NEXT: Lower ctors and dtors for AMDGPU
170 ; GCN-O1-NEXT: Fix function bitcasts for AMDGPU
171 ; GCN-O1-NEXT: FunctionPass Manager
172 ; GCN-O1-NEXT: Early propagate attributes from kernels to functions
173 ; GCN-O1-NEXT: AMDGPU Lower Intrinsics
174 ; GCN-O1-NEXT: AMDGPU Inline All Functions
175 ; GCN-O1-NEXT: CallGraph Construction
176 ; GCN-O1-NEXT: Call Graph SCC Pass Manager
177 ; GCN-O1-NEXT: Inliner for always_inline functions
178 ; GCN-O1-NEXT: A No-Op Barrier Pass
179 ; GCN-O1-NEXT: Lower OpenCL enqueued blocks
180 ; GCN-O1-NEXT: Lower uses of LDS variables from non-kernel functions
181 ; GCN-O1-NEXT: FunctionPass Manager
182 ; GCN-O1-NEXT: Infer address spaces
183 ; GCN-O1-NEXT: Expand Atomic instructions
184 ; GCN-O1-NEXT: AMDGPU Promote Alloca
185 ; GCN-O1-NEXT: Dominator Tree Construction
186 ; GCN-O1-NEXT: SROA
187 ; GCN-O1-NEXT: Post-Dominator Tree Construction
188 ; GCN-O1-NEXT: Natural Loop Information
189 ; GCN-O1-NEXT: Legacy Divergence Analysis
190 ; GCN-O1-NEXT: AMDGPU IR optimizations
191 ; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)
192 ; GCN-O1-NEXT: Canonicalize natural loops
193 ; GCN-O1-NEXT: Scalar Evolution Analysis
194 ; GCN-O1-NEXT: Loop Pass Manager
195 ; GCN-O1-NEXT: Canonicalize Freeze Instructions in Loops
196 ; GCN-O1-NEXT: Induction Variable Users
197 ; GCN-O1-NEXT: Loop Strength Reduction
198 ; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)
199 ; GCN-O1-NEXT: Function Alias Analysis Results
200 ; GCN-O1-NEXT: Merge contiguous icmps into a memcmp
201 ; GCN-O1-NEXT: Natural Loop Information
202 ; GCN-O1-NEXT: Lazy Branch Probability Analysis
203 ; GCN-O1-NEXT: Lazy Block Frequency Analysis
204 ; GCN-O1-NEXT: Expand memcmp() to load/stores
205 ; GCN-O1-NEXT: Lower constant intrinsics
206 ; GCN-O1-NEXT: Remove unreachable blocks from the CFG
207 ; GCN-O1-NEXT: Natural Loop Information
208 ; GCN-O1-NEXT: Post-Dominator Tree Construction
209 ; GCN-O1-NEXT: Branch Probability Analysis
210 ; GCN-O1-NEXT: Block Frequency Analysis
211 ; GCN-O1-NEXT: Constant Hoisting
212 ; GCN-O1-NEXT: Replace intrinsics with calls to vector library
213 ; GCN-O1-NEXT: Partially inline calls to library functions
214 ; GCN-O1-NEXT: Expand vector predication intrinsics
215 ; GCN-O1-NEXT: Scalarize Masked Memory Intrinsics
216 ; GCN-O1-NEXT: Expand reduction intrinsics
217 ; GCN-O1-NEXT: CallGraph Construction
218 ; GCN-O1-NEXT: Call Graph SCC Pass Manager
219 ; GCN-O1-NEXT: AMDGPU Annotate Kernel Features
220 ; GCN-O1-NEXT: FunctionPass Manager
221 ; GCN-O1-NEXT: AMDGPU Lower Kernel Arguments
222 ; GCN-O1-NEXT: Dominator Tree Construction
223 ; GCN-O1-NEXT: Natural Loop Information
224 ; GCN-O1-NEXT: CodeGen Prepare
225 ; GCN-O1-NEXT: Lazy Value Information Analysis
226 ; GCN-O1-NEXT: Lower SwitchInst's to branches
227 ; GCN-O1-NEXT: Lower invoke and unwind, for unwindless code generators
228 ; GCN-O1-NEXT: Remove unreachable blocks from the CFG
229 ; GCN-O1-NEXT: Dominator Tree Construction
230 ; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)
231 ; GCN-O1-NEXT: Function Alias Analysis Results
232 ; GCN-O1-NEXT: Flatten the CFG
233 ; GCN-O1-NEXT: Dominator Tree Construction
234 ; GCN-O1-NEXT: Post-Dominator Tree Construction
235 ; GCN-O1-NEXT: Natural Loop Information
236 ; GCN-O1-NEXT: Legacy Divergence Analysis
237 ; GCN-O1-NEXT: AMDGPU IR late optimizations
238 ; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)
239 ; GCN-O1-NEXT: Function Alias Analysis Results
240 ; GCN-O1-NEXT: Code sinking
241 ; GCN-O1-NEXT: Legacy Divergence Analysis
242 ; GCN-O1-NEXT: Unify divergent function exit nodes
243 ; GCN-O1-NEXT: Lazy Value Information Analysis
244 ; GCN-O1-NEXT: Lower SwitchInst's to branches
245 ; GCN-O1-NEXT: Dominator Tree Construction
246 ; GCN-O1-NEXT: Natural Loop Information
247 ; GCN-O1-NEXT: Convert irreducible control-flow into natural loops
248 ; GCN-O1-NEXT: Fixup each natural loop to have a single exit block
249 ; GCN-O1-NEXT: Post-Dominator Tree Construction
250 ; GCN-O1-NEXT: Dominance Frontier Construction
251 ; GCN-O1-NEXT: Detect single entry single exit regions
252 ; GCN-O1-NEXT: Region Pass Manager
253 ; GCN-O1-NEXT: Structurize control flow
254 ; GCN-O1-NEXT: Post-Dominator Tree Construction
255 ; GCN-O1-NEXT: Natural Loop Information
256 ; GCN-O1-NEXT: Legacy Divergence Analysis
257 ; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)
258 ; GCN-O1-NEXT: Function Alias Analysis Results
259 ; GCN-O1-NEXT: Memory SSA
260 ; GCN-O1-NEXT: AMDGPU Annotate Uniform Values
261 ; GCN-O1-NEXT: SI annotate control flow
262 ; GCN-O1-NEXT: LCSSA Verifier
263 ; GCN-O1-NEXT: Loop-Closed SSA Form Pass
264 ; GCN-O1-NEXT: DummyCGSCCPass
265 ; GCN-O1-NEXT: FunctionPass Manager
266 ; GCN-O1-NEXT: Safe Stack instrumentation pass
267 ; GCN-O1-NEXT: Insert stack protectors
268 ; GCN-O1-NEXT: Dominator Tree Construction
269 ; GCN-O1-NEXT: Post-Dominator Tree Construction
270 ; GCN-O1-NEXT: Natural Loop Information
271 ; GCN-O1-NEXT: Legacy Divergence Analysis
272 ; GCN-O1-NEXT: Basic Alias Analysis (stateless AA impl)
273 ; GCN-O1-NEXT: Function Alias Analysis Results
274 ; GCN-O1-NEXT: Branch Probability Analysis
275 ; GCN-O1-NEXT: Lazy Branch Probability Analysis
276 ; GCN-O1-NEXT: Lazy Block Frequency Analysis
277 ; GCN-O1-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection
278 ; GCN-O1-NEXT: MachineDominator Tree Construction
279 ; GCN-O1-NEXT: SI Fix SGPR copies
280 ; GCN-O1-NEXT: MachinePostDominator Tree Construction
281 ; GCN-O1-NEXT: SI Lower i1 Copies
282 ; GCN-O1-NEXT: Finalize ISel and expand pseudo-instructions
283 ; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis
284 ; GCN-O1-NEXT: Early Tail Duplication
285 ; GCN-O1-NEXT: Optimize machine instruction PHIs
286 ; GCN-O1-NEXT: Slot index numbering
287 ; GCN-O1-NEXT: Merge disjoint stack slots
288 ; GCN-O1-NEXT: Local Stack Slot Allocation
289 ; GCN-O1-NEXT: Remove dead machine instructions
290 ; GCN-O1-NEXT: MachineDominator Tree Construction
291 ; GCN-O1-NEXT: Machine Natural Loop Construction
292 ; GCN-O1-NEXT: Machine Block Frequency Analysis
293 ; GCN-O1-NEXT: Early Machine Loop Invariant Code Motion
294 ; GCN-O1-NEXT: MachineDominator Tree Construction
295 ; GCN-O1-NEXT: Machine Block Frequency Analysis
296 ; GCN-O1-NEXT: Machine Common Subexpression Elimination
297 ; GCN-O1-NEXT: MachinePostDominator Tree Construction
298 ; GCN-O1-NEXT: Machine code sinking
299 ; GCN-O1-NEXT: Peephole Optimizations
300 ; GCN-O1-NEXT: Remove dead machine instructions
301 ; GCN-O1-NEXT: SI Fold Operands
302 ; GCN-O1-NEXT: GCN DPP Combine
303 ; GCN-O1-NEXT: SI Load Store Optimizer
304 ; GCN-O1-NEXT: Remove dead machine instructions
305 ; GCN-O1-NEXT: SI Shrink Instructions
306 ; GCN-O1-NEXT: Register Usage Information Propagation
307 ; GCN-O1-NEXT: Detect Dead Lanes
308 ; GCN-O1-NEXT: Remove dead machine instructions
309 ; GCN-O1-NEXT: Process Implicit Definitions
310 ; GCN-O1-NEXT: Remove unreachable machine basic blocks
311 ; GCN-O1-NEXT: Live Variable Analysis
312 ; GCN-O1-NEXT: MachineDominator Tree Construction
313 ; GCN-O1-NEXT: SI Optimize VGPR LiveRange
314 ; GCN-O1-NEXT: Eliminate PHI nodes for register allocation
315 ; GCN-O1-NEXT: SI Lower control flow pseudo instructions
316 ; GCN-O1-NEXT: Two-Address instruction pass
317 ; GCN-O1-NEXT: MachineDominator Tree Construction
318 ; GCN-O1-NEXT: Slot index numbering
319 ; GCN-O1-NEXT: Live Interval Analysis
320 ; GCN-O1-NEXT: Machine Natural Loop Construction
321 ; GCN-O1-NEXT: Simple Register Coalescing
322 ; GCN-O1-NEXT: Rename Disconnected Subregister Components
323 ; GCN-O1-NEXT: Machine Instruction Scheduler
324 ; GCN-O1-NEXT: MachinePostDominator Tree Construction
325 ; GCN-O1-NEXT: SI Whole Quad Mode
326 ; GCN-O1-NEXT: Virtual Register Map
327 ; GCN-O1-NEXT: Live Register Matrix
328 ; GCN-O1-NEXT: SI Pre-allocate WWM Registers
329 ; GCN-O1-NEXT: SI optimize exec mask operations pre-RA
330 ; GCN-O1-NEXT: Machine Natural Loop Construction
331 ; GCN-O1-NEXT: Machine Block Frequency Analysis
332 ; GCN-O1-NEXT: Debug Variable Analysis
333 ; GCN-O1-NEXT: Live Stack Slot Analysis
334 ; GCN-O1-NEXT: Virtual Register Map
335 ; GCN-O1-NEXT: Live Register Matrix
336 ; GCN-O1-NEXT: Bundle Machine CFG Edges
337 ; GCN-O1-NEXT: Spill Code Placement Analysis
338 ; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis
339 ; GCN-O1-NEXT: Machine Optimization Remark Emitter
340 ; GCN-O1-NEXT: Greedy Register Allocator
341 ; GCN-O1-NEXT: Virtual Register Rewriter
342 ; GCN-O1-NEXT: SI lower SGPR spill instructions
343 ; GCN-O1-NEXT: Virtual Register Map
344 ; GCN-O1-NEXT: Live Register Matrix
345 ; GCN-O1-NEXT: Greedy Register Allocator
346 ; GCN-O1-NEXT: GCN NSA Reassign
347 ; GCN-O1-NEXT: Virtual Register Rewriter
348 ; GCN-O1-NEXT: Stack Slot Coloring
349 ; GCN-O1-NEXT: Machine Copy Propagation Pass
350 ; GCN-O1-NEXT: Machine Loop Invariant Code Motion
351 ; GCN-O1-NEXT: SI Fix VGPR copies
352 ; GCN-O1-NEXT: SI optimize exec mask operations
353 ; GCN-O1-NEXT: Remove Redundant DEBUG_VALUE analysis
354 ; GCN-O1-NEXT: Fixup Statepoint Caller Saved
355 ; GCN-O1-NEXT: PostRA Machine Sink
356 ; GCN-O1-NEXT: MachineDominator Tree Construction
357 ; GCN-O1-NEXT: Machine Natural Loop Construction
358 ; GCN-O1-NEXT: Machine Block Frequency Analysis
359 ; GCN-O1-NEXT: MachinePostDominator Tree Construction
360 ; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis
361 ; GCN-O1-NEXT: Machine Optimization Remark Emitter
362 ; GCN-O1-NEXT: Shrink Wrapping analysis
363 ; GCN-O1-NEXT: Prologue/Epilogue Insertion & Frame Finalization
364 ; GCN-O1-NEXT: Control Flow Optimizer
365 ; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis
366 ; GCN-O1-NEXT: Tail Duplication
367 ; GCN-O1-NEXT: Machine Copy Propagation Pass
368 ; GCN-O1-NEXT: Post-RA pseudo instruction expansion pass
369 ; GCN-O1-NEXT: SI post-RA bundler
370 ; GCN-O1-NEXT: MachineDominator Tree Construction
371 ; GCN-O1-NEXT: Machine Natural Loop Construction
372 ; GCN-O1-NEXT: Post RA top-down list latency scheduler
373 ; GCN-O1-NEXT: Machine Block Frequency Analysis
374 ; GCN-O1-NEXT: MachinePostDominator Tree Construction
375 ; GCN-O1-NEXT: Branch Probability Basic Block Placement
376 ; GCN-O1-NEXT: Insert fentry calls
377 ; GCN-O1-NEXT: Insert XRay ops
378 ; GCN-O1-NEXT: SI Memory Legalizer
379 ; GCN-O1-NEXT: MachinePostDominator Tree Construction
380 ; GCN-O1-NEXT: SI insert wait instructions
381 ; GCN-O1-NEXT: SI Shrink Instructions
382 ; GCN-O1-NEXT: Insert required mode register values
383 ; GCN-O1-NEXT: SI Insert Hard Clauses
384 ; GCN-O1-NEXT: MachineDominator Tree Construction
385 ; GCN-O1-NEXT: SI Final Branch Preparation
386 ; GCN-O1-NEXT: SI peephole optimizations
387 ; GCN-O1-NEXT: Post RA hazard recognizer
388 ; GCN-O1-NEXT: Branch relaxation pass
389 ; GCN-O1-NEXT: Register Usage Information Collector Pass
390 ; GCN-O1-NEXT: Live DEBUG_VALUE analysis
391 ; GCN-O1-NEXT: Function register usage analysis
392 ; GCN-O1-NEXT: FunctionPass Manager
393 ; GCN-O1-NEXT: Lazy Machine Block Frequency Analysis
394 ; GCN-O1-NEXT: Machine Optimization Remark Emitter
395 ; GCN-O1-NEXT: AMDGPU Assembly Printer
396 ; GCN-O1-NEXT: Free MachineFunction
397 ; GCN-O1-NEXT:Pass Arguments: -domtree
398 ; GCN-O1-NEXT: FunctionPass Manager
399 ; GCN-O1-NEXT: Dominator Tree Construction
401 ; GCN-O1-OPTS:Target Library Information
402 ; GCN-O1-OPTS-NEXT:Target Pass Configuration
403 ; GCN-O1-OPTS-NEXT:Machine Module Information
404 ; GCN-O1-OPTS-NEXT:Target Transform Information
405 ; GCN-O1-OPTS-NEXT:Assumption Cache Tracker
406 ; GCN-O1-OPTS-NEXT:Profile summary info
407 ; GCN-O1-OPTS-NEXT:AMDGPU Address space based Alias Analysis
408 ; GCN-O1-OPTS-NEXT:External Alias Analysis
409 ; GCN-O1-OPTS-NEXT:Type-Based Alias Analysis
410 ; GCN-O1-OPTS-NEXT:Scoped NoAlias Alias Analysis
411 ; GCN-O1-OPTS-NEXT:Argument Register Usage Information Storage
412 ; GCN-O1-OPTS-NEXT:Create Garbage Collector Module Metadata
413 ; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis
414 ; GCN-O1-OPTS-NEXT:Register Usage Information Storage
415 ; GCN-O1-OPTS-NEXT: ModulePass Manager
416 ; GCN-O1-OPTS-NEXT: Pre-ISel Intrinsic Lowering
417 ; GCN-O1-OPTS-NEXT: AMDGPU Printf lowering
418 ; GCN-O1-OPTS-NEXT: FunctionPass Manager
419 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
420 ; GCN-O1-OPTS-NEXT: Lower ctors and dtors for AMDGPU
421 ; GCN-O1-OPTS-NEXT: Fix function bitcasts for AMDGPU
422 ; GCN-O1-OPTS-NEXT: FunctionPass Manager
423 ; GCN-O1-OPTS-NEXT: Early propagate attributes from kernels to functions
424 ; GCN-O1-OPTS-NEXT: AMDGPU Lower Intrinsics
425 ; GCN-O1-OPTS-NEXT: AMDGPU Inline All Functions
426 ; GCN-O1-OPTS-NEXT: CallGraph Construction
427 ; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager
428 ; GCN-O1-OPTS-NEXT: Inliner for always_inline functions
429 ; GCN-O1-OPTS-NEXT: A No-Op Barrier Pass
430 ; GCN-O1-OPTS-NEXT: Lower OpenCL enqueued blocks
431 ; GCN-O1-OPTS-NEXT: Lower uses of LDS variables from non-kernel functions
432 ; GCN-O1-OPTS-NEXT: FunctionPass Manager
433 ; GCN-O1-OPTS-NEXT: Infer address spaces
434 ; GCN-O1-OPTS-NEXT: Expand Atomic instructions
435 ; GCN-O1-OPTS-NEXT: AMDGPU Promote Alloca
436 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
437 ; GCN-O1-OPTS-NEXT: SROA
438 ; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)
439 ; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
440 ; GCN-O1-OPTS-NEXT: Memory SSA
441 ; GCN-O1-OPTS-NEXT: Natural Loop Information
442 ; GCN-O1-OPTS-NEXT: Canonicalize natural loops
443 ; GCN-O1-OPTS-NEXT: LCSSA Verifier
444 ; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass
445 ; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis
446 ; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis
447 ; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis
448 ; GCN-O1-OPTS-NEXT: Loop Pass Manager
449 ; GCN-O1-OPTS-NEXT: Loop Invariant Code Motion
450 ; GCN-O1-OPTS-NEXT: Split GEPs to a variadic base and a constant offset for better CSE
451 ; GCN-O1-OPTS-NEXT: Speculatively execute instructions
452 ; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis
453 ; GCN-O1-OPTS-NEXT: Straight line strength reduction
454 ; GCN-O1-OPTS-NEXT: Early CSE
455 ; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis
456 ; GCN-O1-OPTS-NEXT: Nary reassociation
457 ; GCN-O1-OPTS-NEXT: Early CSE
458 ; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
459 ; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis
460 ; GCN-O1-OPTS-NEXT: AMDGPU IR optimizations
461 ; GCN-O1-OPTS-NEXT: Canonicalize natural loops
462 ; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis
463 ; GCN-O1-OPTS-NEXT: Loop Pass Manager
464 ; GCN-O1-OPTS-NEXT: Canonicalize Freeze Instructions in Loops
465 ; GCN-O1-OPTS-NEXT: Induction Variable Users
466 ; GCN-O1-OPTS-NEXT: Loop Strength Reduction
467 ; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)
468 ; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
469 ; GCN-O1-OPTS-NEXT: Merge contiguous icmps into a memcmp
470 ; GCN-O1-OPTS-NEXT: Natural Loop Information
471 ; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis
472 ; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis
473 ; GCN-O1-OPTS-NEXT: Expand memcmp() to load/stores
474 ; GCN-O1-OPTS-NEXT: Lower constant intrinsics
475 ; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG
476 ; GCN-O1-OPTS-NEXT: Natural Loop Information
477 ; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
478 ; GCN-O1-OPTS-NEXT: Branch Probability Analysis
479 ; GCN-O1-OPTS-NEXT: Block Frequency Analysis
480 ; GCN-O1-OPTS-NEXT: Constant Hoisting
481 ; GCN-O1-OPTS-NEXT: Replace intrinsics with calls to vector library
482 ; GCN-O1-OPTS-NEXT: Partially inline calls to library functions
483 ; GCN-O1-OPTS-NEXT: Expand vector predication intrinsics
484 ; GCN-O1-OPTS-NEXT: Scalarize Masked Memory Intrinsics
485 ; GCN-O1-OPTS-NEXT: Expand reduction intrinsics
486 ; GCN-O1-OPTS-NEXT: Early CSE
487 ; GCN-O1-OPTS-NEXT: CallGraph Construction
488 ; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager
489 ; GCN-O1-OPTS-NEXT: AMDGPU Annotate Kernel Features
490 ; GCN-O1-OPTS-NEXT: FunctionPass Manager
491 ; GCN-O1-OPTS-NEXT: AMDGPU Lower Kernel Arguments
492 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
493 ; GCN-O1-OPTS-NEXT: Natural Loop Information
494 ; GCN-O1-OPTS-NEXT: CodeGen Prepare
495 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
496 ; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)
497 ; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
498 ; GCN-O1-OPTS-NEXT: Natural Loop Information
499 ; GCN-O1-OPTS-NEXT: Scalar Evolution Analysis
500 ; GCN-O1-OPTS-NEXT: GPU Load and Store Vectorizer
501 ; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis
502 ; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches
503 ; GCN-O1-OPTS-NEXT: Lower invoke and unwind, for unwindless code generators
504 ; GCN-O1-OPTS-NEXT: Remove unreachable blocks from the CFG
505 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
506 ; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)
507 ; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
508 ; GCN-O1-OPTS-NEXT: Flatten the CFG
509 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
510 ; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
511 ; GCN-O1-OPTS-NEXT: Natural Loop Information
512 ; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis
513 ; GCN-O1-OPTS-NEXT: AMDGPU IR late optimizations
514 ; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)
515 ; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
516 ; GCN-O1-OPTS-NEXT: Code sinking
517 ; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis
518 ; GCN-O1-OPTS-NEXT: Unify divergent function exit nodes
519 ; GCN-O1-OPTS-NEXT: Lazy Value Information Analysis
520 ; GCN-O1-OPTS-NEXT: Lower SwitchInst's to branches
521 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
522 ; GCN-O1-OPTS-NEXT: Natural Loop Information
523 ; GCN-O1-OPTS-NEXT: Convert irreducible control-flow into natural loops
524 ; GCN-O1-OPTS-NEXT: Fixup each natural loop to have a single exit block
525 ; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
526 ; GCN-O1-OPTS-NEXT: Dominance Frontier Construction
527 ; GCN-O1-OPTS-NEXT: Detect single entry single exit regions
528 ; GCN-O1-OPTS-NEXT: Region Pass Manager
529 ; GCN-O1-OPTS-NEXT: Structurize control flow
530 ; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
531 ; GCN-O1-OPTS-NEXT: Natural Loop Information
532 ; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis
533 ; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)
534 ; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
535 ; GCN-O1-OPTS-NEXT: Memory SSA
536 ; GCN-O1-OPTS-NEXT: AMDGPU Annotate Uniform Values
537 ; GCN-O1-OPTS-NEXT: SI annotate control flow
538 ; GCN-O1-OPTS-NEXT: LCSSA Verifier
539 ; GCN-O1-OPTS-NEXT: Loop-Closed SSA Form Pass
540 ; GCN-O1-OPTS-NEXT: DummyCGSCCPass
541 ; GCN-O1-OPTS-NEXT: FunctionPass Manager
542 ; GCN-O1-OPTS-NEXT: Safe Stack instrumentation pass
543 ; GCN-O1-OPTS-NEXT: Insert stack protectors
544 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
545 ; GCN-O1-OPTS-NEXT: Post-Dominator Tree Construction
546 ; GCN-O1-OPTS-NEXT: Natural Loop Information
547 ; GCN-O1-OPTS-NEXT: Legacy Divergence Analysis
548 ; GCN-O1-OPTS-NEXT: Basic Alias Analysis (stateless AA impl)
549 ; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
550 ; GCN-O1-OPTS-NEXT: Branch Probability Analysis
551 ; GCN-O1-OPTS-NEXT: Lazy Branch Probability Analysis
552 ; GCN-O1-OPTS-NEXT: Lazy Block Frequency Analysis
553 ; GCN-O1-OPTS-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection
554 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
555 ; GCN-O1-OPTS-NEXT: SI Fix SGPR copies
556 ; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction
557 ; GCN-O1-OPTS-NEXT: SI Lower i1 Copies
558 ; GCN-O1-OPTS-NEXT: Finalize ISel and expand pseudo-instructions
559 ; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis
560 ; GCN-O1-OPTS-NEXT: Early Tail Duplication
561 ; GCN-O1-OPTS-NEXT: Optimize machine instruction PHIs
562 ; GCN-O1-OPTS-NEXT: Slot index numbering
563 ; GCN-O1-OPTS-NEXT: Merge disjoint stack slots
564 ; GCN-O1-OPTS-NEXT: Local Stack Slot Allocation
565 ; GCN-O1-OPTS-NEXT: Remove dead machine instructions
566 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
567 ; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction
568 ; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis
569 ; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion
570 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
571 ; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis
572 ; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination
573 ; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction
574 ; GCN-O1-OPTS-NEXT: Machine code sinking
575 ; GCN-O1-OPTS-NEXT: Peephole Optimizations
576 ; GCN-O1-OPTS-NEXT: Remove dead machine instructions
577 ; GCN-O1-OPTS-NEXT: SI Fold Operands
578 ; GCN-O1-OPTS-NEXT: GCN DPP Combine
579 ; GCN-O1-OPTS-NEXT: SI Load Store Optimizer
580 ; GCN-O1-OPTS-NEXT: SI Peephole SDWA
581 ; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis
582 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
583 ; GCN-O1-OPTS-NEXT: Early Machine Loop Invariant Code Motion
584 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
585 ; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis
586 ; GCN-O1-OPTS-NEXT: Machine Common Subexpression Elimination
587 ; GCN-O1-OPTS-NEXT: SI Fold Operands
588 ; GCN-O1-OPTS-NEXT: Remove dead machine instructions
589 ; GCN-O1-OPTS-NEXT: SI Shrink Instructions
590 ; GCN-O1-OPTS-NEXT: Register Usage Information Propagation
591 ; GCN-O1-OPTS-NEXT: Detect Dead Lanes
592 ; GCN-O1-OPTS-NEXT: Remove dead machine instructions
593 ; GCN-O1-OPTS-NEXT: Process Implicit Definitions
594 ; GCN-O1-OPTS-NEXT: Remove unreachable machine basic blocks
595 ; GCN-O1-OPTS-NEXT: Live Variable Analysis
596 ; GCN-O1-OPTS-NEXT: SI Optimize VGPR LiveRange
597 ; GCN-O1-OPTS-NEXT: Eliminate PHI nodes for register allocation
598 ; GCN-O1-OPTS-NEXT: SI Lower control flow pseudo instructions
599 ; GCN-O1-OPTS-NEXT: Two-Address instruction pass
600 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
601 ; GCN-O1-OPTS-NEXT: Slot index numbering
602 ; GCN-O1-OPTS-NEXT: Live Interval Analysis
603 ; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction
604 ; GCN-O1-OPTS-NEXT: Simple Register Coalescing
605 ; GCN-O1-OPTS-NEXT: Rename Disconnected Subregister Components
606 ; GCN-O1-OPTS-NEXT: AMDGPU Pre-RA optimizations
607 ; GCN-O1-OPTS-NEXT: Machine Instruction Scheduler
608 ; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction
609 ; GCN-O1-OPTS-NEXT: SI Whole Quad Mode
610 ; GCN-O1-OPTS-NEXT: Virtual Register Map
611 ; GCN-O1-OPTS-NEXT: Live Register Matrix
612 ; GCN-O1-OPTS-NEXT: SI Pre-allocate WWM Registers
613 ; GCN-O1-OPTS-NEXT: SI optimize exec mask operations pre-RA
614 ; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction
615 ; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis
616 ; GCN-O1-OPTS-NEXT: Debug Variable Analysis
617 ; GCN-O1-OPTS-NEXT: Live Stack Slot Analysis
618 ; GCN-O1-OPTS-NEXT: Virtual Register Map
619 ; GCN-O1-OPTS-NEXT: Live Register Matrix
620 ; GCN-O1-OPTS-NEXT: Bundle Machine CFG Edges
621 ; GCN-O1-OPTS-NEXT: Spill Code Placement Analysis
622 ; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis
623 ; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter
624 ; GCN-O1-OPTS-NEXT: Greedy Register Allocator
625 ; GCN-O1-OPTS-NEXT: Virtual Register Rewriter
626 ; GCN-O1-OPTS-NEXT: SI lower SGPR spill instructions
627 ; GCN-O1-OPTS-NEXT: Virtual Register Map
628 ; GCN-O1-OPTS-NEXT: Live Register Matrix
629 ; GCN-O1-OPTS-NEXT: Greedy Register Allocator
630 ; GCN-O1-OPTS-NEXT: GCN NSA Reassign
631 ; GCN-O1-OPTS-NEXT: Virtual Register Rewriter
632 ; GCN-O1-OPTS-NEXT: Stack Slot Coloring
633 ; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass
634 ; GCN-O1-OPTS-NEXT: Machine Loop Invariant Code Motion
635 ; GCN-O1-OPTS-NEXT: SI Fix VGPR copies
636 ; GCN-O1-OPTS-NEXT: SI optimize exec mask operations
637 ; GCN-O1-OPTS-NEXT: Remove Redundant DEBUG_VALUE analysis
638 ; GCN-O1-OPTS-NEXT: Fixup Statepoint Caller Saved
639 ; GCN-O1-OPTS-NEXT: PostRA Machine Sink
640 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
641 ; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction
642 ; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis
643 ; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction
644 ; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis
645 ; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter
646 ; GCN-O1-OPTS-NEXT: Shrink Wrapping analysis
647 ; GCN-O1-OPTS-NEXT: Prologue/Epilogue Insertion & Frame Finalization
648 ; GCN-O1-OPTS-NEXT: Control Flow Optimizer
649 ; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis
650 ; GCN-O1-OPTS-NEXT: Tail Duplication
651 ; GCN-O1-OPTS-NEXT: Machine Copy Propagation Pass
652 ; GCN-O1-OPTS-NEXT: Post-RA pseudo instruction expansion pass
653 ; GCN-O1-OPTS-NEXT: SI post-RA bundler
654 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
655 ; GCN-O1-OPTS-NEXT: Machine Natural Loop Construction
656 ; GCN-O1-OPTS-NEXT: Post RA top-down list latency scheduler
657 ; GCN-O1-OPTS-NEXT: Machine Block Frequency Analysis
658 ; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction
659 ; GCN-O1-OPTS-NEXT: Branch Probability Basic Block Placement
660 ; GCN-O1-OPTS-NEXT: Insert fentry calls
661 ; GCN-O1-OPTS-NEXT: Insert XRay ops
662 ; GCN-O1-OPTS-NEXT: SI Memory Legalizer
663 ; GCN-O1-OPTS-NEXT: MachinePostDominator Tree Construction
664 ; GCN-O1-OPTS-NEXT: SI insert wait instructions
665 ; GCN-O1-OPTS-NEXT: SI Shrink Instructions
666 ; GCN-O1-OPTS-NEXT: Insert required mode register values
667 ; GCN-O1-OPTS-NEXT: SI Insert Hard Clauses
668 ; GCN-O1-OPTS-NEXT: MachineDominator Tree Construction
669 ; GCN-O1-OPTS-NEXT: SI Final Branch Preparation
670 ; GCN-O1-OPTS-NEXT: SI peephole optimizations
671 ; GCN-O1-OPTS-NEXT: Post RA hazard recognizer
672 ; GCN-O1-OPTS-NEXT: Branch relaxation pass
673 ; GCN-O1-OPTS-NEXT: Register Usage Information Collector Pass
674 ; GCN-O1-OPTS-NEXT: Live DEBUG_VALUE analysis
675 ; GCN-O1-OPTS-NEXT: Function register usage analysis
676 ; GCN-O1-OPTS-NEXT: FunctionPass Manager
677 ; GCN-O1-OPTS-NEXT: Lazy Machine Block Frequency Analysis
678 ; GCN-O1-OPTS-NEXT: Machine Optimization Remark Emitter
679 ; GCN-O1-OPTS-NEXT: AMDGPU Assembly Printer
680 ; GCN-O1-OPTS-NEXT: Free MachineFunction
681 ; GCN-O1-OPTS-NEXT:Pass Arguments: -domtree
682 ; GCN-O1-OPTS-NEXT: FunctionPass Manager
683 ; GCN-O1-OPTS-NEXT: Dominator Tree Construction
685 ; GCN-O2:Target Library Information
686 ; GCN-O2-NEXT:Target Pass Configuration
687 ; GCN-O2-NEXT:Machine Module Information
688 ; GCN-O2-NEXT:Target Transform Information
689 ; GCN-O2-NEXT:Assumption Cache Tracker
690 ; GCN-O2-NEXT:Profile summary info
691 ; GCN-O2-NEXT:AMDGPU Address space based Alias Analysis
692 ; GCN-O2-NEXT:External Alias Analysis
693 ; GCN-O2-NEXT:Type-Based Alias Analysis
694 ; GCN-O2-NEXT:Scoped NoAlias Alias Analysis
695 ; GCN-O2-NEXT:Argument Register Usage Information Storage
696 ; GCN-O2-NEXT:Create Garbage Collector Module Metadata
697 ; GCN-O2-NEXT:Machine Branch Probability Analysis
698 ; GCN-O2-NEXT:Register Usage Information Storage
699 ; GCN-O2-NEXT: ModulePass Manager
700 ; GCN-O2-NEXT: Pre-ISel Intrinsic Lowering
701 ; GCN-O2-NEXT: AMDGPU Printf lowering
702 ; GCN-O2-NEXT: FunctionPass Manager
703 ; GCN-O2-NEXT: Dominator Tree Construction
704 ; GCN-O2-NEXT: Lower ctors and dtors for AMDGPU
705 ; GCN-O2-NEXT: Fix function bitcasts for AMDGPU
706 ; GCN-O2-NEXT: FunctionPass Manager
707 ; GCN-O2-NEXT: Early propagate attributes from kernels to functions
708 ; GCN-O2-NEXT: AMDGPU Lower Intrinsics
709 ; GCN-O2-NEXT: AMDGPU Inline All Functions
710 ; GCN-O2-NEXT: CallGraph Construction
711 ; GCN-O2-NEXT: Call Graph SCC Pass Manager
712 ; GCN-O2-NEXT: Inliner for always_inline functions
713 ; GCN-O2-NEXT: A No-Op Barrier Pass
714 ; GCN-O2-NEXT: Lower OpenCL enqueued blocks
715 ; GCN-O2-NEXT: Lower uses of LDS variables from non-kernel functions
716 ; GCN-O2-NEXT: FunctionPass Manager
717 ; GCN-O2-NEXT: Infer address spaces
718 ; GCN-O2-NEXT: Expand Atomic instructions
719 ; GCN-O2-NEXT: AMDGPU Promote Alloca
720 ; GCN-O2-NEXT: Dominator Tree Construction
721 ; GCN-O2-NEXT: SROA
722 ; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)
723 ; GCN-O2-NEXT: Function Alias Analysis Results
724 ; GCN-O2-NEXT: Memory SSA
725 ; GCN-O2-NEXT: Natural Loop Information
726 ; GCN-O2-NEXT: Canonicalize natural loops
727 ; GCN-O2-NEXT: LCSSA Verifier
728 ; GCN-O2-NEXT: Loop-Closed SSA Form Pass
729 ; GCN-O2-NEXT: Scalar Evolution Analysis
730 ; GCN-O2-NEXT: Lazy Branch Probability Analysis
731 ; GCN-O2-NEXT: Lazy Block Frequency Analysis
732 ; GCN-O2-NEXT: Loop Pass Manager
733 ; GCN-O2-NEXT: Loop Invariant Code Motion
734 ; GCN-O2-NEXT: Split GEPs to a variadic base and a constant offset for better CSE
735 ; GCN-O2-NEXT: Speculatively execute instructions
736 ; GCN-O2-NEXT: Scalar Evolution Analysis
737 ; GCN-O2-NEXT: Straight line strength reduction
738 ; GCN-O2-NEXT: Early CSE
739 ; GCN-O2-NEXT: Scalar Evolution Analysis
740 ; GCN-O2-NEXT: Nary reassociation
741 ; GCN-O2-NEXT: Early CSE
742 ; GCN-O2-NEXT: Post-Dominator Tree Construction
743 ; GCN-O2-NEXT: Legacy Divergence Analysis
744 ; GCN-O2-NEXT: AMDGPU IR optimizations
745 ; GCN-O2-NEXT: Canonicalize natural loops
746 ; GCN-O2-NEXT: Scalar Evolution Analysis
747 ; GCN-O2-NEXT: Loop Pass Manager
748 ; GCN-O2-NEXT: Canonicalize Freeze Instructions in Loops
749 ; GCN-O2-NEXT: Induction Variable Users
750 ; GCN-O2-NEXT: Loop Strength Reduction
751 ; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)
752 ; GCN-O2-NEXT: Function Alias Analysis Results
753 ; GCN-O2-NEXT: Merge contiguous icmps into a memcmp
754 ; GCN-O2-NEXT: Natural Loop Information
755 ; GCN-O2-NEXT: Lazy Branch Probability Analysis
756 ; GCN-O2-NEXT: Lazy Block Frequency Analysis
757 ; GCN-O2-NEXT: Expand memcmp() to load/stores
758 ; GCN-O2-NEXT: Lower constant intrinsics
759 ; GCN-O2-NEXT: Remove unreachable blocks from the CFG
760 ; GCN-O2-NEXT: Natural Loop Information
761 ; GCN-O2-NEXT: Post-Dominator Tree Construction
762 ; GCN-O2-NEXT: Branch Probability Analysis
763 ; GCN-O2-NEXT: Block Frequency Analysis
764 ; GCN-O2-NEXT: Constant Hoisting
765 ; GCN-O2-NEXT: Replace intrinsics with calls to vector library
766 ; GCN-O2-NEXT: Partially inline calls to library functions
767 ; GCN-O2-NEXT: Expand vector predication intrinsics
768 ; GCN-O2-NEXT: Scalarize Masked Memory Intrinsics
769 ; GCN-O2-NEXT: Expand reduction intrinsics
770 ; GCN-O2-NEXT: Early CSE
771 ; GCN-O2-NEXT: CallGraph Construction
772 ; GCN-O2-NEXT: Call Graph SCC Pass Manager
773 ; GCN-O2-NEXT: AMDGPU Annotate Kernel Features
774 ; GCN-O2-NEXT: FunctionPass Manager
775 ; GCN-O2-NEXT: AMDGPU Lower Kernel Arguments
776 ; GCN-O2-NEXT: Dominator Tree Construction
777 ; GCN-O2-NEXT: Natural Loop Information
778 ; GCN-O2-NEXT: CodeGen Prepare
779 ; GCN-O2-NEXT: Dominator Tree Construction
780 ; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)
781 ; GCN-O2-NEXT: Function Alias Analysis Results
782 ; GCN-O2-NEXT: Natural Loop Information
783 ; GCN-O2-NEXT: Scalar Evolution Analysis
784 ; GCN-O2-NEXT: GPU Load and Store Vectorizer
785 ; GCN-O2-NEXT: Lazy Value Information Analysis
786 ; GCN-O2-NEXT: Lower SwitchInst's to branches
787 ; GCN-O2-NEXT: Lower invoke and unwind, for unwindless code generators
788 ; GCN-O2-NEXT: Remove unreachable blocks from the CFG
789 ; GCN-O2-NEXT: Dominator Tree Construction
790 ; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)
791 ; GCN-O2-NEXT: Function Alias Analysis Results
792 ; GCN-O2-NEXT: Flatten the CFG
793 ; GCN-O2-NEXT: Dominator Tree Construction
794 ; GCN-O2-NEXT: Post-Dominator Tree Construction
795 ; GCN-O2-NEXT: Natural Loop Information
796 ; GCN-O2-NEXT: Legacy Divergence Analysis
797 ; GCN-O2-NEXT: AMDGPU IR late optimizations
798 ; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)
799 ; GCN-O2-NEXT: Function Alias Analysis Results
800 ; GCN-O2-NEXT: Code sinking
801 ; GCN-O2-NEXT: Legacy Divergence Analysis
802 ; GCN-O2-NEXT: Unify divergent function exit nodes
803 ; GCN-O2-NEXT: Lazy Value Information Analysis
804 ; GCN-O2-NEXT: Lower SwitchInst's to branches
805 ; GCN-O2-NEXT: Dominator Tree Construction
806 ; GCN-O2-NEXT: Natural Loop Information
807 ; GCN-O2-NEXT: Convert irreducible control-flow into natural loops
808 ; GCN-O2-NEXT: Fixup each natural loop to have a single exit block
809 ; GCN-O2-NEXT: Post-Dominator Tree Construction
810 ; GCN-O2-NEXT: Dominance Frontier Construction
811 ; GCN-O2-NEXT: Detect single entry single exit regions
812 ; GCN-O2-NEXT: Region Pass Manager
813 ; GCN-O2-NEXT: Structurize control flow
814 ; GCN-O2-NEXT: Post-Dominator Tree Construction
815 ; GCN-O2-NEXT: Natural Loop Information
816 ; GCN-O2-NEXT: Legacy Divergence Analysis
817 ; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)
818 ; GCN-O2-NEXT: Function Alias Analysis Results
819 ; GCN-O2-NEXT: Memory SSA
820 ; GCN-O2-NEXT: AMDGPU Annotate Uniform Values
821 ; GCN-O2-NEXT: SI annotate control flow
822 ; GCN-O2-NEXT: LCSSA Verifier
823 ; GCN-O2-NEXT: Loop-Closed SSA Form Pass
824 ; GCN-O2-NEXT: Analysis if a function is memory bound
825 ; GCN-O2-NEXT: DummyCGSCCPass
826 ; GCN-O2-NEXT: FunctionPass Manager
827 ; GCN-O2-NEXT: Safe Stack instrumentation pass
828 ; GCN-O2-NEXT: Insert stack protectors
829 ; GCN-O2-NEXT: Dominator Tree Construction
830 ; GCN-O2-NEXT: Post-Dominator Tree Construction
831 ; GCN-O2-NEXT: Natural Loop Information
832 ; GCN-O2-NEXT: Legacy Divergence Analysis
833 ; GCN-O2-NEXT: Basic Alias Analysis (stateless AA impl)
834 ; GCN-O2-NEXT: Function Alias Analysis Results
835 ; GCN-O2-NEXT: Branch Probability Analysis
836 ; GCN-O2-NEXT: Lazy Branch Probability Analysis
837 ; GCN-O2-NEXT: Lazy Block Frequency Analysis
838 ; GCN-O2-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection
839 ; GCN-O2-NEXT: MachineDominator Tree Construction
840 ; GCN-O2-NEXT: SI Fix SGPR copies
841 ; GCN-O2-NEXT: MachinePostDominator Tree Construction
842 ; GCN-O2-NEXT: SI Lower i1 Copies
843 ; GCN-O2-NEXT: Finalize ISel and expand pseudo-instructions
844 ; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis
845 ; GCN-O2-NEXT: Early Tail Duplication
846 ; GCN-O2-NEXT: Optimize machine instruction PHIs
847 ; GCN-O2-NEXT: Slot index numbering
848 ; GCN-O2-NEXT: Merge disjoint stack slots
849 ; GCN-O2-NEXT: Local Stack Slot Allocation
850 ; GCN-O2-NEXT: Remove dead machine instructions
851 ; GCN-O2-NEXT: MachineDominator Tree Construction
852 ; GCN-O2-NEXT: Machine Natural Loop Construction
853 ; GCN-O2-NEXT: Machine Block Frequency Analysis
854 ; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion
855 ; GCN-O2-NEXT: MachineDominator Tree Construction
856 ; GCN-O2-NEXT: Machine Block Frequency Analysis
857 ; GCN-O2-NEXT: Machine Common Subexpression Elimination
858 ; GCN-O2-NEXT: MachinePostDominator Tree Construction
859 ; GCN-O2-NEXT: Machine code sinking
860 ; GCN-O2-NEXT: Peephole Optimizations
861 ; GCN-O2-NEXT: Remove dead machine instructions
862 ; GCN-O2-NEXT: SI Fold Operands
863 ; GCN-O2-NEXT: GCN DPP Combine
864 ; GCN-O2-NEXT: SI Load Store Optimizer
865 ; GCN-O2-NEXT: SI Peephole SDWA
866 ; GCN-O2-NEXT: Machine Block Frequency Analysis
867 ; GCN-O2-NEXT: MachineDominator Tree Construction
868 ; GCN-O2-NEXT: Early Machine Loop Invariant Code Motion
869 ; GCN-O2-NEXT: MachineDominator Tree Construction
870 ; GCN-O2-NEXT: Machine Block Frequency Analysis
871 ; GCN-O2-NEXT: Machine Common Subexpression Elimination
872 ; GCN-O2-NEXT: SI Fold Operands
873 ; GCN-O2-NEXT: Remove dead machine instructions
874 ; GCN-O2-NEXT: SI Shrink Instructions
875 ; GCN-O2-NEXT: Register Usage Information Propagation
876 ; GCN-O2-NEXT: Detect Dead Lanes
877 ; GCN-O2-NEXT: Remove dead machine instructions
878 ; GCN-O2-NEXT: Process Implicit Definitions
879 ; GCN-O2-NEXT: Remove unreachable machine basic blocks
880 ; GCN-O2-NEXT: Live Variable Analysis
881 ; GCN-O2-NEXT: SI Optimize VGPR LiveRange
882 ; GCN-O2-NEXT: Eliminate PHI nodes for register allocation
883 ; GCN-O2-NEXT: SI Lower control flow pseudo instructions
884 ; GCN-O2-NEXT: Two-Address instruction pass
885 ; GCN-O2-NEXT: MachineDominator Tree Construction
886 ; GCN-O2-NEXT: Slot index numbering
887 ; GCN-O2-NEXT: Live Interval Analysis
888 ; GCN-O2-NEXT: Machine Natural Loop Construction
889 ; GCN-O2-NEXT: Simple Register Coalescing
890 ; GCN-O2-NEXT: Rename Disconnected Subregister Components
891 ; GCN-O2-NEXT: AMDGPU Pre-RA optimizations
892 ; GCN-O2-NEXT: Machine Instruction Scheduler
893 ; GCN-O2-NEXT: MachinePostDominator Tree Construction
894 ; GCN-O2-NEXT: SI Whole Quad Mode
895 ; GCN-O2-NEXT: Virtual Register Map
896 ; GCN-O2-NEXT: Live Register Matrix
897 ; GCN-O2-NEXT: SI Pre-allocate WWM Registers
898 ; GCN-O2-NEXT: SI optimize exec mask operations pre-RA
899 ; GCN-O2-NEXT: SI Form memory clauses
900 ; GCN-O2-NEXT: Machine Natural Loop Construction
901 ; GCN-O2-NEXT: Machine Block Frequency Analysis
902 ; GCN-O2-NEXT: Debug Variable Analysis
903 ; GCN-O2-NEXT: Live Stack Slot Analysis
904 ; GCN-O2-NEXT: Virtual Register Map
905 ; GCN-O2-NEXT: Live Register Matrix
906 ; GCN-O2-NEXT: Bundle Machine CFG Edges
907 ; GCN-O2-NEXT: Spill Code Placement Analysis
908 ; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis
909 ; GCN-O2-NEXT: Machine Optimization Remark Emitter
910 ; GCN-O2-NEXT: Greedy Register Allocator
911 ; GCN-O2-NEXT: Virtual Register Rewriter
912 ; GCN-O2-NEXT: SI lower SGPR spill instructions
913 ; GCN-O2-NEXT: Virtual Register Map
914 ; GCN-O2-NEXT: Live Register Matrix
915 ; GCN-O2-NEXT: Greedy Register Allocator
916 ; GCN-O2-NEXT: GCN NSA Reassign
917 ; GCN-O2-NEXT: Virtual Register Rewriter
918 ; GCN-O2-NEXT: Stack Slot Coloring
919 ; GCN-O2-NEXT: Machine Copy Propagation Pass
920 ; GCN-O2-NEXT: Machine Loop Invariant Code Motion
921 ; GCN-O2-NEXT: SI Fix VGPR copies
922 ; GCN-O2-NEXT: SI optimize exec mask operations
923 ; GCN-O2-NEXT: Remove Redundant DEBUG_VALUE analysis
924 ; GCN-O2-NEXT: Fixup Statepoint Caller Saved
925 ; GCN-O2-NEXT: PostRA Machine Sink
926 ; GCN-O2-NEXT: MachineDominator Tree Construction
927 ; GCN-O2-NEXT: Machine Natural Loop Construction
928 ; GCN-O2-NEXT: Machine Block Frequency Analysis
929 ; GCN-O2-NEXT: MachinePostDominator Tree Construction
930 ; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis
931 ; GCN-O2-NEXT: Machine Optimization Remark Emitter
932 ; GCN-O2-NEXT: Shrink Wrapping analysis
933 ; GCN-O2-NEXT: Prologue/Epilogue Insertion & Frame Finalization
934 ; GCN-O2-NEXT: Control Flow Optimizer
935 ; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis
936 ; GCN-O2-NEXT: Tail Duplication
937 ; GCN-O2-NEXT: Machine Copy Propagation Pass
938 ; GCN-O2-NEXT: Post-RA pseudo instruction expansion pass
939 ; GCN-O2-NEXT: SI post-RA bundler
940 ; GCN-O2-NEXT: MachineDominator Tree Construction
941 ; GCN-O2-NEXT: Machine Natural Loop Construction
942 ; GCN-O2-NEXT: Post RA top-down list latency scheduler
943 ; GCN-O2-NEXT: Machine Block Frequency Analysis
944 ; GCN-O2-NEXT: MachinePostDominator Tree Construction
945 ; GCN-O2-NEXT: Branch Probability Basic Block Placement
946 ; GCN-O2-NEXT: Insert fentry calls
947 ; GCN-O2-NEXT: Insert XRay ops
948 ; GCN-O2-NEXT: SI Memory Legalizer
949 ; GCN-O2-NEXT: MachinePostDominator Tree Construction
950 ; GCN-O2-NEXT: SI insert wait instructions
951 ; GCN-O2-NEXT: SI Shrink Instructions
952 ; GCN-O2-NEXT: Insert required mode register values
953 ; GCN-O2-NEXT: SI Insert Hard Clauses
954 ; GCN-O2-NEXT: MachineDominator Tree Construction
955 ; GCN-O2-NEXT: SI Final Branch Preparation
956 ; GCN-O2-NEXT: SI peephole optimizations
957 ; GCN-O2-NEXT: Post RA hazard recognizer
958 ; GCN-O2-NEXT: Branch relaxation pass
959 ; GCN-O2-NEXT: Register Usage Information Collector Pass
960 ; GCN-O2-NEXT: Live DEBUG_VALUE analysis
961 ; GCN-O2-NEXT: Function register usage analysis
962 ; GCN-O2-NEXT: FunctionPass Manager
963 ; GCN-O2-NEXT: Lazy Machine Block Frequency Analysis
964 ; GCN-O2-NEXT: Machine Optimization Remark Emitter
965 ; GCN-O2-NEXT: AMDGPU Assembly Printer
966 ; GCN-O2-NEXT: Free MachineFunction
967 ; GCN-O2-NEXT:Pass Arguments: -domtree
968 ; GCN-O2-NEXT: FunctionPass Manager
969 ; GCN-O2-NEXT: Dominator Tree Construction
971 ; GCN-O3:Target Library Information
972 ; GCN-O3-NEXT:Target Pass Configuration
973 ; GCN-O3-NEXT:Machine Module Information
974 ; GCN-O3-NEXT:Target Transform Information
975 ; GCN-O3-NEXT:Assumption Cache Tracker
976 ; GCN-O3-NEXT:Profile summary info
977 ; GCN-O3-NEXT:AMDGPU Address space based Alias Analysis
978 ; GCN-O3-NEXT:External Alias Analysis
979 ; GCN-O3-NEXT:Type-Based Alias Analysis
980 ; GCN-O3-NEXT:Scoped NoAlias Alias Analysis
981 ; GCN-O3-NEXT:Argument Register Usage Information Storage
982 ; GCN-O3-NEXT:Create Garbage Collector Module Metadata
983 ; GCN-O3-NEXT:Machine Branch Probability Analysis
984 ; GCN-O3-NEXT:Register Usage Information Storage
985 ; GCN-O3-NEXT: ModulePass Manager
986 ; GCN-O3-NEXT: Pre-ISel Intrinsic Lowering
987 ; GCN-O3-NEXT: AMDGPU Printf lowering
988 ; GCN-O3-NEXT: FunctionPass Manager
989 ; GCN-O3-NEXT: Dominator Tree Construction
990 ; GCN-O3-NEXT: Lower ctors and dtors for AMDGPU
991 ; GCN-O3-NEXT: Fix function bitcasts for AMDGPU
992 ; GCN-O3-NEXT: FunctionPass Manager
993 ; GCN-O3-NEXT: Early propagate attributes from kernels to functions
994 ; GCN-O3-NEXT: AMDGPU Lower Intrinsics
995 ; GCN-O3-NEXT: AMDGPU Inline All Functions
996 ; GCN-O3-NEXT: CallGraph Construction
997 ; GCN-O3-NEXT: Call Graph SCC Pass Manager
998 ; GCN-O3-NEXT: Inliner for always_inline functions
999 ; GCN-O3-NEXT: A No-Op Barrier Pass
1000 ; GCN-O3-NEXT: Lower OpenCL enqueued blocks
1001 ; GCN-O3-NEXT: Lower uses of LDS variables from non-kernel functions
1002 ; GCN-O3-NEXT: FunctionPass Manager
1003 ; GCN-O3-NEXT: Infer address spaces
1004 ; GCN-O3-NEXT: Expand Atomic instructions
1005 ; GCN-O3-NEXT: AMDGPU Promote Alloca
1006 ; GCN-O3-NEXT: Dominator Tree Construction
1007 ; GCN-O3-NEXT: SROA
1008 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1009 ; GCN-O3-NEXT: Function Alias Analysis Results
1010 ; GCN-O3-NEXT: Memory SSA
1011 ; GCN-O3-NEXT: Natural Loop Information
1012 ; GCN-O3-NEXT: Canonicalize natural loops
1013 ; GCN-O3-NEXT: LCSSA Verifier
1014 ; GCN-O3-NEXT: Loop-Closed SSA Form Pass
1015 ; GCN-O3-NEXT: Scalar Evolution Analysis
1016 ; GCN-O3-NEXT: Lazy Branch Probability Analysis
1017 ; GCN-O3-NEXT: Lazy Block Frequency Analysis
1018 ; GCN-O3-NEXT: Loop Pass Manager
1019 ; GCN-O3-NEXT: Loop Invariant Code Motion
1020 ; GCN-O3-NEXT: Split GEPs to a variadic base and a constant offset for better CSE
1021 ; GCN-O3-NEXT: Speculatively execute instructions
1022 ; GCN-O3-NEXT: Scalar Evolution Analysis
1023 ; GCN-O3-NEXT: Straight line strength reduction
1024 ; GCN-O3-NEXT: Phi Values Analysis
1025 ; GCN-O3-NEXT: Function Alias Analysis Results
1026 ; GCN-O3-NEXT: Memory Dependence Analysis
1027 ; GCN-O3-NEXT: Optimization Remark Emitter
1028 ; GCN-O3-NEXT: Global Value Numbering
1029 ; GCN-O3-NEXT: Scalar Evolution Analysis
1030 ; GCN-O3-NEXT: Nary reassociation
1031 ; GCN-O3-NEXT: Early CSE
1032 ; GCN-O3-NEXT: Post-Dominator Tree Construction
1033 ; GCN-O3-NEXT: Legacy Divergence Analysis
1034 ; GCN-O3-NEXT: AMDGPU IR optimizations
1035 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1036 ; GCN-O3-NEXT: Canonicalize natural loops
1037 ; GCN-O3-NEXT: Scalar Evolution Analysis
1038 ; GCN-O3-NEXT: Loop Pass Manager
1039 ; GCN-O3-NEXT: Canonicalize Freeze Instructions in Loops
1040 ; GCN-O3-NEXT: Induction Variable Users
1041 ; GCN-O3-NEXT: Loop Strength Reduction
1042 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1043 ; GCN-O3-NEXT: Function Alias Analysis Results
1044 ; GCN-O3-NEXT: Merge contiguous icmps into a memcmp
1045 ; GCN-O3-NEXT: Natural Loop Information
1046 ; GCN-O3-NEXT: Lazy Branch Probability Analysis
1047 ; GCN-O3-NEXT: Lazy Block Frequency Analysis
1048 ; GCN-O3-NEXT: Expand memcmp() to load/stores
1049 ; GCN-O3-NEXT: Lower constant intrinsics
1050 ; GCN-O3-NEXT: Remove unreachable blocks from the CFG
1051 ; GCN-O3-NEXT: Natural Loop Information
1052 ; GCN-O3-NEXT: Post-Dominator Tree Construction
1053 ; GCN-O3-NEXT: Branch Probability Analysis
1054 ; GCN-O3-NEXT: Block Frequency Analysis
1055 ; GCN-O3-NEXT: Constant Hoisting
1056 ; GCN-O3-NEXT: Replace intrinsics with calls to vector library
1057 ; GCN-O3-NEXT: Partially inline calls to library functions
1058 ; GCN-O3-NEXT: Expand vector predication intrinsics
1059 ; GCN-O3-NEXT: Scalarize Masked Memory Intrinsics
1060 ; GCN-O3-NEXT: Expand reduction intrinsics
1061 ; GCN-O3-NEXT: Natural Loop Information
1062 ; GCN-O3-NEXT: Phi Values Analysis
1063 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1064 ; GCN-O3-NEXT: Function Alias Analysis Results
1065 ; GCN-O3-NEXT: Memory Dependence Analysis
1066 ; GCN-O3-NEXT: Lazy Branch Probability Analysis
1067 ; GCN-O3-NEXT: Lazy Block Frequency Analysis
1068 ; GCN-O3-NEXT: Optimization Remark Emitter
1069 ; GCN-O3-NEXT: Global Value Numbering
1070 ; GCN-O3-NEXT: CallGraph Construction
1071 ; GCN-O3-NEXT: Call Graph SCC Pass Manager
1072 ; GCN-O3-NEXT: AMDGPU Annotate Kernel Features
1073 ; GCN-O3-NEXT: FunctionPass Manager
1074 ; GCN-O3-NEXT: AMDGPU Lower Kernel Arguments
1075 ; GCN-O3-NEXT: Dominator Tree Construction
1076 ; GCN-O3-NEXT: Natural Loop Information
1077 ; GCN-O3-NEXT: CodeGen Prepare
1078 ; GCN-O3-NEXT: Dominator Tree Construction
1079 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1080 ; GCN-O3-NEXT: Function Alias Analysis Results
1081 ; GCN-O3-NEXT: Natural Loop Information
1082 ; GCN-O3-NEXT: Scalar Evolution Analysis
1083 ; GCN-O3-NEXT: GPU Load and Store Vectorizer
1084 ; GCN-O3-NEXT: Lazy Value Information Analysis
1085 ; GCN-O3-NEXT: Lower SwitchInst's to branches
1086 ; GCN-O3-NEXT: Lower invoke and unwind, for unwindless code generators
1087 ; GCN-O3-NEXT: Remove unreachable blocks from the CFG
1088 ; GCN-O3-NEXT: Dominator Tree Construction
1089 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1090 ; GCN-O3-NEXT: Function Alias Analysis Results
1091 ; GCN-O3-NEXT: Flatten the CFG
1092 ; GCN-O3-NEXT: Dominator Tree Construction
1093 ; GCN-O3-NEXT: Post-Dominator Tree Construction
1094 ; GCN-O3-NEXT: Natural Loop Information
1095 ; GCN-O3-NEXT: Legacy Divergence Analysis
1096 ; GCN-O3-NEXT: AMDGPU IR late optimizations
1097 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1098 ; GCN-O3-NEXT: Function Alias Analysis Results
1099 ; GCN-O3-NEXT: Code sinking
1100 ; GCN-O3-NEXT: Legacy Divergence Analysis
1101 ; GCN-O3-NEXT: Unify divergent function exit nodes
1102 ; GCN-O3-NEXT: Lazy Value Information Analysis
1103 ; GCN-O3-NEXT: Lower SwitchInst's to branches
1104 ; GCN-O3-NEXT: Dominator Tree Construction
1105 ; GCN-O3-NEXT: Natural Loop Information
1106 ; GCN-O3-NEXT: Convert irreducible control-flow into natural loops
1107 ; GCN-O3-NEXT: Fixup each natural loop to have a single exit block
1108 ; GCN-O3-NEXT: Post-Dominator Tree Construction
1109 ; GCN-O3-NEXT: Dominance Frontier Construction
1110 ; GCN-O3-NEXT: Detect single entry single exit regions
1111 ; GCN-O3-NEXT: Region Pass Manager
1112 ; GCN-O3-NEXT: Structurize control flow
1113 ; GCN-O3-NEXT: Post-Dominator Tree Construction
1114 ; GCN-O3-NEXT: Natural Loop Information
1115 ; GCN-O3-NEXT: Legacy Divergence Analysis
1116 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1117 ; GCN-O3-NEXT: Function Alias Analysis Results
1118 ; GCN-O3-NEXT: Memory SSA
1119 ; GCN-O3-NEXT: AMDGPU Annotate Uniform Values
1120 ; GCN-O3-NEXT: SI annotate control flow
1121 ; GCN-O3-NEXT: LCSSA Verifier
1122 ; GCN-O3-NEXT: Loop-Closed SSA Form Pass
1123 ; GCN-O3-NEXT: Analysis if a function is memory bound
1124 ; GCN-O3-NEXT: DummyCGSCCPass
1125 ; GCN-O3-NEXT: FunctionPass Manager
1126 ; GCN-O3-NEXT: Safe Stack instrumentation pass
1127 ; GCN-O3-NEXT: Insert stack protectors
1128 ; GCN-O3-NEXT: Dominator Tree Construction
1129 ; GCN-O3-NEXT: Post-Dominator Tree Construction
1130 ; GCN-O3-NEXT: Natural Loop Information
1131 ; GCN-O3-NEXT: Legacy Divergence Analysis
1132 ; GCN-O3-NEXT: Basic Alias Analysis (stateless AA impl)
1133 ; GCN-O3-NEXT: Function Alias Analysis Results
1134 ; GCN-O3-NEXT: Branch Probability Analysis
1135 ; GCN-O3-NEXT: Lazy Branch Probability Analysis
1136 ; GCN-O3-NEXT: Lazy Block Frequency Analysis
1137 ; GCN-O3-NEXT: AMDGPU DAG->DAG Pattern Instruction Selection
1138 ; GCN-O3-NEXT: MachineDominator Tree Construction
1139 ; GCN-O3-NEXT: SI Fix SGPR copies
1140 ; GCN-O3-NEXT: MachinePostDominator Tree Construction
1141 ; GCN-O3-NEXT: SI Lower i1 Copies
1142 ; GCN-O3-NEXT: Finalize ISel and expand pseudo-instructions
1143 ; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis
1144 ; GCN-O3-NEXT: Early Tail Duplication
1145 ; GCN-O3-NEXT: Optimize machine instruction PHIs
1146 ; GCN-O3-NEXT: Slot index numbering
1147 ; GCN-O3-NEXT: Merge disjoint stack slots
1148 ; GCN-O3-NEXT: Local Stack Slot Allocation
1149 ; GCN-O3-NEXT: Remove dead machine instructions
1150 ; GCN-O3-NEXT: MachineDominator Tree Construction
1151 ; GCN-O3-NEXT: Machine Natural Loop Construction
1152 ; GCN-O3-NEXT: Machine Block Frequency Analysis
1153 ; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion
1154 ; GCN-O3-NEXT: MachineDominator Tree Construction
1155 ; GCN-O3-NEXT: Machine Block Frequency Analysis
1156 ; GCN-O3-NEXT: Machine Common Subexpression Elimination
1157 ; GCN-O3-NEXT: MachinePostDominator Tree Construction
1158 ; GCN-O3-NEXT: Machine code sinking
1159 ; GCN-O3-NEXT: Peephole Optimizations
1160 ; GCN-O3-NEXT: Remove dead machine instructions
1161 ; GCN-O3-NEXT: SI Fold Operands
1162 ; GCN-O3-NEXT: GCN DPP Combine
1163 ; GCN-O3-NEXT: SI Load Store Optimizer
1164 ; GCN-O3-NEXT: SI Peephole SDWA
1165 ; GCN-O3-NEXT: Machine Block Frequency Analysis
1166 ; GCN-O3-NEXT: MachineDominator Tree Construction
1167 ; GCN-O3-NEXT: Early Machine Loop Invariant Code Motion
1168 ; GCN-O3-NEXT: MachineDominator Tree Construction
1169 ; GCN-O3-NEXT: Machine Block Frequency Analysis
1170 ; GCN-O3-NEXT: Machine Common Subexpression Elimination
1171 ; GCN-O3-NEXT: SI Fold Operands
1172 ; GCN-O3-NEXT: Remove dead machine instructions
1173 ; GCN-O3-NEXT: SI Shrink Instructions
1174 ; GCN-O3-NEXT: Register Usage Information Propagation
1175 ; GCN-O3-NEXT: Detect Dead Lanes
1176 ; GCN-O3-NEXT: Remove dead machine instructions
1177 ; GCN-O3-NEXT: Process Implicit Definitions
1178 ; GCN-O3-NEXT: Remove unreachable machine basic blocks
1179 ; GCN-O3-NEXT: Live Variable Analysis
1180 ; GCN-O3-NEXT: SI Optimize VGPR LiveRange
1181 ; GCN-O3-NEXT: Eliminate PHI nodes for register allocation
1182 ; GCN-O3-NEXT: SI Lower control flow pseudo instructions
1183 ; GCN-O3-NEXT: Two-Address instruction pass
1184 ; GCN-O3-NEXT: MachineDominator Tree Construction
1185 ; GCN-O3-NEXT: Slot index numbering
1186 ; GCN-O3-NEXT: Live Interval Analysis
1187 ; GCN-O3-NEXT: Machine Natural Loop Construction
1188 ; GCN-O3-NEXT: Simple Register Coalescing
1189 ; GCN-O3-NEXT: Rename Disconnected Subregister Components
1190 ; GCN-O3-NEXT: AMDGPU Pre-RA optimizations
1191 ; GCN-O3-NEXT: Machine Instruction Scheduler
1192 ; GCN-O3-NEXT: MachinePostDominator Tree Construction
1193 ; GCN-O3-NEXT: SI Whole Quad Mode
1194 ; GCN-O3-NEXT: Virtual Register Map
1195 ; GCN-O3-NEXT: Live Register Matrix
1196 ; GCN-O3-NEXT: SI Pre-allocate WWM Registers
1197 ; GCN-O3-NEXT: SI optimize exec mask operations pre-RA
1198 ; GCN-O3-NEXT: SI Form memory clauses
1199 ; GCN-O3-NEXT: Machine Natural Loop Construction
1200 ; GCN-O3-NEXT: Machine Block Frequency Analysis
1201 ; GCN-O3-NEXT: Debug Variable Analysis
1202 ; GCN-O3-NEXT: Live Stack Slot Analysis
1203 ; GCN-O3-NEXT: Virtual Register Map
1204 ; GCN-O3-NEXT: Live Register Matrix
1205 ; GCN-O3-NEXT: Bundle Machine CFG Edges
1206 ; GCN-O3-NEXT: Spill Code Placement Analysis
1207 ; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis
1208 ; GCN-O3-NEXT: Machine Optimization Remark Emitter
1209 ; GCN-O3-NEXT: Greedy Register Allocator
1210 ; GCN-O3-NEXT: Virtual Register Rewriter
1211 ; GCN-O3-NEXT: SI lower SGPR spill instructions
1212 ; GCN-O3-NEXT: Virtual Register Map
1213 ; GCN-O3-NEXT: Live Register Matrix
1214 ; GCN-O3-NEXT: Greedy Register Allocator
1215 ; GCN-O3-NEXT: GCN NSA Reassign
1216 ; GCN-O3-NEXT: Virtual Register Rewriter
1217 ; GCN-O3-NEXT: Stack Slot Coloring
1218 ; GCN-O3-NEXT: Machine Copy Propagation Pass
1219 ; GCN-O3-NEXT: Machine Loop Invariant Code Motion
1220 ; GCN-O3-NEXT: SI Fix VGPR copies
1221 ; GCN-O3-NEXT: SI optimize exec mask operations
1222 ; GCN-O3-NEXT: Remove Redundant DEBUG_VALUE analysis
1223 ; GCN-O3-NEXT: Fixup Statepoint Caller Saved
1224 ; GCN-O3-NEXT: PostRA Machine Sink
1225 ; GCN-O3-NEXT: MachineDominator Tree Construction
1226 ; GCN-O3-NEXT: Machine Natural Loop Construction
1227 ; GCN-O3-NEXT: Machine Block Frequency Analysis
1228 ; GCN-O3-NEXT: MachinePostDominator Tree Construction
1229 ; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis
1230 ; GCN-O3-NEXT: Machine Optimization Remark Emitter
1231 ; GCN-O3-NEXT: Shrink Wrapping analysis
1232 ; GCN-O3-NEXT: Prologue/Epilogue Insertion & Frame Finalization
1233 ; GCN-O3-NEXT: Control Flow Optimizer
1234 ; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis
1235 ; GCN-O3-NEXT: Tail Duplication
1236 ; GCN-O3-NEXT: Machine Copy Propagation Pass
1237 ; GCN-O3-NEXT: Post-RA pseudo instruction expansion pass
1238 ; GCN-O3-NEXT: SI post-RA bundler
1239 ; GCN-O3-NEXT: MachineDominator Tree Construction
1240 ; GCN-O3-NEXT: Machine Natural Loop Construction
1241 ; GCN-O3-NEXT: Post RA top-down list latency scheduler
1242 ; GCN-O3-NEXT: Machine Block Frequency Analysis
1243 ; GCN-O3-NEXT: MachinePostDominator Tree Construction
1244 ; GCN-O3-NEXT: Branch Probability Basic Block Placement
1245 ; GCN-O3-NEXT: Insert fentry calls
1246 ; GCN-O3-NEXT: Insert XRay ops
1247 ; GCN-O3-NEXT: SI Memory Legalizer
1248 ; GCN-O3-NEXT: MachinePostDominator Tree Construction
1249 ; GCN-O3-NEXT: SI insert wait instructions
1250 ; GCN-O3-NEXT: SI Shrink Instructions
1251 ; GCN-O3-NEXT: Insert required mode register values
1252 ; GCN-O3-NEXT: SI Insert Hard Clauses
1253 ; GCN-O3-NEXT: MachineDominator Tree Construction
1254 ; GCN-O3-NEXT: SI Final Branch Preparation
1255 ; GCN-O3-NEXT: SI peephole optimizations
1256 ; GCN-O3-NEXT: Post RA hazard recognizer
1257 ; GCN-O3-NEXT: Branch relaxation pass
1258 ; GCN-O3-NEXT: Register Usage Information Collector Pass
1259 ; GCN-O3-NEXT: Live DEBUG_VALUE analysis
1260 ; GCN-O3-NEXT: Function register usage analysis
1261 ; GCN-O3-NEXT: FunctionPass Manager
1262 ; GCN-O3-NEXT: Lazy Machine Block Frequency Analysis
1263 ; GCN-O3-NEXT: Machine Optimization Remark Emitter
1264 ; GCN-O3-NEXT: AMDGPU Assembly Printer
1265 ; GCN-O3-NEXT: Free MachineFunction
1266 ; GCN-O3-NEXT:Pass Arguments: -domtree
1267 ; GCN-O3-NEXT: FunctionPass Manager
1268 ; GCN-O3-NEXT: Dominator Tree Construction
1270 define void @empty() {
1271 ret void
1272 }