1 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=CHECK,WAVE64 %s
2 ; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=CHECK,WAVE32 %s
4 ;CHECK-LABEL: {{^}}ret:
5 ;CHECK: v_cmp_eq_u32_e32 [[CMP:[^,]+]], v0, v1
6 ;WAVE64: s_wqm_b64 [[WQM:[^,]+]], [[CMP]]
7 ;WAVE32: s_wqm_b32 [[WQM:[^,]+]], [[CMP]]
8 ;CHECK: v_cndmask_b32_e64 v0, 0, 1.0, [[WQM]]
9 define amdgpu_ps float @ret(i32 %v0, i32 %v1) #1 {
11 %c = icmp eq i32 %v0, %v1
12 %w = call i1 @llvm.amdgcn.wqm.vote(i1 %c)
13 %r = select i1 %w, float 1.0, float 0.0
17 ;CHECK-LABEL: {{^}}true:
20 define amdgpu_ps float @true() #1 {
22 %w = call i1 @llvm.amdgcn.wqm.vote(i1 true)
23 %r = select i1 %w, float 1.0, float 0.0
27 ;CHECK-LABEL: {{^}}false:
30 define amdgpu_ps float @false() #1 {
32 %w = call i1 @llvm.amdgcn.wqm.vote(i1 false)
33 %r = select i1 %w, float 1.0, float 0.0
37 ; Note: an almost identical test for this exists in llvm.amdgcn.kill.ll
38 ;CHECK-LABEL: {{^}}kill:
39 ;CHECK: v_cmp_eq_u32_e32 [[CMP:[^,]+]], v0, v1
41 ;WAVE64: s_wqm_b64 [[WQM:[^,]+]], [[CMP]]
42 ;WAVE64: s_xor_b64 [[KILL:[^,]+]], [[WQM]], exec
43 ;WAVE64: s_andn2_b64 [[MASK:[^,]+]], [[EXEC:[^,]+]], [[KILL]]
44 ;WAVE64: s_and_b64 exec, exec, [[MASK]]
46 ;WAVE32: s_wqm_b32 [[WQM:[^,]+]], [[CMP]]
47 ;WAVE32: s_xor_b32 [[KILL:[^,]+]], [[WQM]], exec
48 ;WAVE32: s_andn2_b32 [[MASK:[^,]+]], [[EXEC:[^,]+]], [[KILL]]
49 ;WAVE32: s_and_b32 exec_lo, exec_lo, [[MASK]]
52 define amdgpu_ps float @kill(i32 %v0, i32 %v1) #1 {
54 %c = icmp eq i32 %v0, %v1
55 %w = call i1 @llvm.amdgcn.wqm.vote(i1 %c)
56 call void @llvm.amdgcn.kill(i1 %w)
60 declare void @llvm.amdgcn.kill(i1) #1
61 declare i1 @llvm.amdgcn.wqm.vote(i1)
63 attributes #1 = { nounwind }