1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
2 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-enable-ds128 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
3 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefixes=EG,FUNC %s
5 ; Testing for ds_read/write_128
6 ; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=SI,FUNC %s
7 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
8 ; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=+enable-ds128 < %s | FileCheck -check-prefixes=CIVI,FUNC %s
10 ; FUNC-LABEL: {{^}}load_f32_local:
11 ; SICIVI: s_mov_b32 m0
16 define amdgpu_kernel void @load_f32_local(float addrspace(1)* %out, float addrspace(3)* %in) #0 {
18 %tmp0 = load float, float addrspace(3)* %in
19 store float %tmp0, float addrspace(1)* %out
23 ; FUNC-LABEL: {{^}}load_v2f32_local:
24 ; SICIVI: s_mov_b32 m0
31 define amdgpu_kernel void @load_v2f32_local(<2 x float> addrspace(1)* %out, <2 x float> addrspace(3)* %in) #0 {
33 %tmp0 = load <2 x float>, <2 x float> addrspace(3)* %in
34 store <2 x float> %tmp0, <2 x float> addrspace(1)* %out
38 ; FIXME: should this do a read2_b64?
39 ; FUNC-LABEL: {{^}}local_load_v3f32:
40 ; SICIVI: s_mov_b32 m0
43 ; SI-DAG: ds_read_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:8
44 ; SI-DAG: ds_read_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+$}}
45 ; CIVI-DAG: ds_read_b96 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+$}}
47 ; SI-DAG: ds_write_b64
48 ; SI-DAG: ds_write_b32 v{{[0-9]+}}, v{{[0-9]+}} offset:8{{$}}
49 ; CIVI-DAG: ds_write_b96 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}
54 define amdgpu_kernel void @local_load_v3f32(<3 x float> addrspace(3)* %out, <3 x float> addrspace(3)* %in) #0 {
56 %tmp0 = load <3 x float>, <3 x float> addrspace(3)* %in
57 store <3 x float> %tmp0, <3 x float> addrspace(3)* %out
61 ; FUNC-LABEL: {{^}}local_load_v4f32:
62 ; SICIVI: s_mov_b32 m0
71 define amdgpu_kernel void @local_load_v4f32(<4 x float> addrspace(3)* %out, <4 x float> addrspace(3)* %in) #0 {
73 %tmp0 = load <4 x float>, <4 x float> addrspace(3)* %in
74 store <4 x float> %tmp0, <4 x float> addrspace(3)* %out
78 ; FUNC-LABEL: {{^}}local_load_v8f32:
79 ; SICIVI: s_mov_b32 m0
93 define amdgpu_kernel void @local_load_v8f32(<8 x float> addrspace(3)* %out, <8 x float> addrspace(3)* %in) #0 {
95 %tmp0 = load <8 x float>, <8 x float> addrspace(3)* %in
96 store <8 x float> %tmp0, <8 x float> addrspace(3)* %out
100 ; FUNC-LABEL: {{^}}local_load_v16f32:
101 ; SICIVI: s_mov_b32 m0
125 define amdgpu_kernel void @local_load_v16f32(<16 x float> addrspace(3)* %out, <16 x float> addrspace(3)* %in) #0 {
127 %tmp0 = load <16 x float>, <16 x float> addrspace(3)* %in
128 store <16 x float> %tmp0, <16 x float> addrspace(3)* %out
132 ; Tests if ds_read/write_b128 gets generated for the 16 byte aligned load.
133 ; FUNC-LABEL: {{^}}local_v4f32_to_128:
135 ; SI-NOT: ds_read_b128
136 ; SI-NOT: ds_write_b128
139 ; CIVI: ds_write_b128
145 define amdgpu_kernel void @local_v4f32_to_128(<4 x float> addrspace(3)* %out, <4 x float> addrspace(3)* %in) {
146 %ld = load <4 x float>, <4 x float> addrspace(3)* %in, align 16
147 store <4 x float> %ld, <4 x float> addrspace(3)* %out, align 16
151 attributes #0 = { nounwind }