| blob | d3f6b7c9539dbc8f757a3aab20273d727a0a778a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -march=amdgcn -mcpu=gfx900 --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck --check-prefix=NOHSA-TRAP-GFX900-V2 %s
3 ; RUN: llc -march=amdgcn -mcpu=gfx900 --amdhsa-code-object-version=3 -verify-machineinstrs < %s | FileCheck --check-prefix=NOHSA-TRAP-GFX900-V3 %s
4 ; RUN: llc -march=amdgcn -mcpu=gfx900 --amdhsa-code-object-version=4 -verify-machineinstrs < %s | FileCheck --check-prefix=NOHSA-TRAP-GFX900-V4 %s
5 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX803-V2 %s
6 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=3 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX803-V3 %s
7 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=4 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX803-V4 %s
8 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX900-V2 %s
9 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=3 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX900-V3 %s
10 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=4 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX900-V4 %s
11 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-trap-handler --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-NOTRAP-GFX900-V2 %s
12 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-trap-handler --amdhsa-code-object-version=3 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-NOTRAP-GFX900-V3 %s
13 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-trap-handler --amdhsa-code-object-version=4 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-NOTRAP-GFX900-V4 %s
15 declare void @llvm.trap() #0
16 declare void @llvm.debugtrap() #1
18 define amdgpu_kernel void @trap(i32 addrspace(1)* nocapture readonly %arg0) {
19 ; NOHSA-TRAP-GFX900-V2-LABEL: trap:
20 ; NOHSA-TRAP-GFX900-V2: ; %bb.0:
21 ; NOHSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
22 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
23 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
24 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
25 ; NOHSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
26 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
27 ; NOHSA-TRAP-GFX900-V2-NEXT: s_endpgm
28 ;
29 ; NOHSA-TRAP-GFX900-V3-LABEL: trap:
30 ; NOHSA-TRAP-GFX900-V3: ; %bb.0:
31 ; NOHSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
32 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
33 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
34 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
35 ; NOHSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
36 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
37 ; NOHSA-TRAP-GFX900-V3-NEXT: s_endpgm
38 ;
39 ; NOHSA-TRAP-GFX900-V4-LABEL: trap:
40 ; NOHSA-TRAP-GFX900-V4: ; %bb.0:
41 ; NOHSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
42 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
43 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
44 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
45 ; NOHSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
46 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
47 ; NOHSA-TRAP-GFX900-V4-NEXT: s_endpgm
48 ;
49 ; HSA-TRAP-GFX803-V2-LABEL: trap:
50 ; HSA-TRAP-GFX803-V2: .amd_kernel_code_t
51 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_major = 1
52 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_minor = 2
53 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_kind = 1
54 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_major = 8
55 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_minor = 0
56 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_stepping = 3
57 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_entry_byte_offset = 256
58 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_prefetch_byte_size = 0
59 ; HSA-TRAP-GFX803-V2-NEXT: granulated_workitem_vgpr_count = 0
60 ; HSA-TRAP-GFX803-V2-NEXT: granulated_wavefront_sgpr_count = 0
61 ; HSA-TRAP-GFX803-V2-NEXT: priority = 0
62 ; HSA-TRAP-GFX803-V2-NEXT: float_mode = 240
63 ; HSA-TRAP-GFX803-V2-NEXT: priv = 0
64 ; HSA-TRAP-GFX803-V2-NEXT: enable_dx10_clamp = 1
65 ; HSA-TRAP-GFX803-V2-NEXT: debug_mode = 0
66 ; HSA-TRAP-GFX803-V2-NEXT: enable_ieee_mode = 1
67 ; HSA-TRAP-GFX803-V2-NEXT: enable_wgp_mode = 0
68 ; HSA-TRAP-GFX803-V2-NEXT: enable_mem_ordered = 0
69 ; HSA-TRAP-GFX803-V2-NEXT: enable_fwd_progress = 0
70 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
71 ; HSA-TRAP-GFX803-V2-NEXT: user_sgpr_count = 8
72 ; HSA-TRAP-GFX803-V2-NEXT: enable_trap_handler = 0
73 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_x = 1
74 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_y = 0
75 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_z = 0
76 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_info = 0
77 ; HSA-TRAP-GFX803-V2-NEXT: enable_vgpr_workitem_id = 0
78 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception_msb = 0
79 ; HSA-TRAP-GFX803-V2-NEXT: granulated_lds_size = 0
80 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception = 0
81 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_buffer = 1
82 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_ptr = 0
83 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_queue_ptr = 1
84 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
85 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_id = 0
86 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_flat_scratch_init = 0
87 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_size = 0
88 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
89 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
90 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
91 ; HSA-TRAP-GFX803-V2-NEXT: enable_wavefront_size32 = 0
92 ; HSA-TRAP-GFX803-V2-NEXT: enable_ordered_append_gds = 0
93 ; HSA-TRAP-GFX803-V2-NEXT: private_element_size = 1
94 ; HSA-TRAP-GFX803-V2-NEXT: is_ptr64 = 1
95 ; HSA-TRAP-GFX803-V2-NEXT: is_dynamic_callstack = 0
96 ; HSA-TRAP-GFX803-V2-NEXT: is_debug_enabled = 0
97 ; HSA-TRAP-GFX803-V2-NEXT: is_xnack_enabled = 0
98 ; HSA-TRAP-GFX803-V2-NEXT: workitem_private_segment_byte_size = 0
99 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_group_segment_byte_size = 0
100 ; HSA-TRAP-GFX803-V2-NEXT: gds_segment_byte_size = 0
101 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_byte_size = 8
102 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_fbarrier_count = 0
103 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_sgpr_count = 8
104 ; HSA-TRAP-GFX803-V2-NEXT: workitem_vgpr_count = 3
105 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_first = 0
106 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_count = 0
107 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_first = 0
108 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_count = 0
109 ; HSA-TRAP-GFX803-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
110 ; HSA-TRAP-GFX803-V2-NEXT: debug_private_segment_buffer_sgpr = 0
111 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_alignment = 4
112 ; HSA-TRAP-GFX803-V2-NEXT: group_segment_alignment = 4
113 ; HSA-TRAP-GFX803-V2-NEXT: private_segment_alignment = 4
114 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_size = 6
115 ; HSA-TRAP-GFX803-V2-NEXT: call_convention = -1
116 ; HSA-TRAP-GFX803-V2-NEXT: runtime_loader_kernel_symbol = 0
117 ; HSA-TRAP-GFX803-V2-NEXT: .end_amd_kernel_code_t
118 ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.0:
119 ; HSA-TRAP-GFX803-V2-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
120 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v2, 1
121 ; HSA-TRAP-GFX803-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
122 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt lgkmcnt(0)
123 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s2
124 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s3
125 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v2
126 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
127 ; HSA-TRAP-GFX803-V2-NEXT: s_trap 2
128 ;
129 ; HSA-TRAP-GFX803-V3-LABEL: trap:
130 ; HSA-TRAP-GFX803-V3: ; %bb.0:
131 ; HSA-TRAP-GFX803-V3-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
132 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v2, 1
133 ; HSA-TRAP-GFX803-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
134 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt lgkmcnt(0)
135 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s2
136 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s3
137 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v2
138 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
139 ; HSA-TRAP-GFX803-V3-NEXT: s_trap 2
140 ;
141 ; HSA-TRAP-GFX803-V4-LABEL: trap:
142 ; HSA-TRAP-GFX803-V4: ; %bb.0:
143 ; HSA-TRAP-GFX803-V4-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
144 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v2, 1
145 ; HSA-TRAP-GFX803-V4-NEXT: s_mov_b64 s[0:1], s[4:5]
146 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt lgkmcnt(0)
147 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s2
148 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s3
149 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v2
150 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
151 ; HSA-TRAP-GFX803-V4-NEXT: s_trap 2
152 ;
153 ; HSA-TRAP-GFX900-V2-LABEL: trap:
154 ; HSA-TRAP-GFX900-V2: .amd_kernel_code_t
155 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_major = 1
156 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
157 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_kind = 1
158 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
159 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
160 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
161 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
162 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
163 ; HSA-TRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
164 ; HSA-TRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 0
165 ; HSA-TRAP-GFX900-V2-NEXT: priority = 0
166 ; HSA-TRAP-GFX900-V2-NEXT: float_mode = 240
167 ; HSA-TRAP-GFX900-V2-NEXT: priv = 0
168 ; HSA-TRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
169 ; HSA-TRAP-GFX900-V2-NEXT: debug_mode = 0
170 ; HSA-TRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
171 ; HSA-TRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
172 ; HSA-TRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
173 ; HSA-TRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
174 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
175 ; HSA-TRAP-GFX900-V2-NEXT: user_sgpr_count = 8
176 ; HSA-TRAP-GFX900-V2-NEXT: enable_trap_handler = 0
177 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
178 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
179 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
180 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
181 ; HSA-TRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
182 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception_msb = 0
183 ; HSA-TRAP-GFX900-V2-NEXT: granulated_lds_size = 0
184 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception = 0
185 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
186 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
187 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
188 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
189 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
190 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
191 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
192 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
193 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
194 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
195 ; HSA-TRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
196 ; HSA-TRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
197 ; HSA-TRAP-GFX900-V2-NEXT: private_element_size = 1
198 ; HSA-TRAP-GFX900-V2-NEXT: is_ptr64 = 1
199 ; HSA-TRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
200 ; HSA-TRAP-GFX900-V2-NEXT: is_debug_enabled = 0
201 ; HSA-TRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
202 ; HSA-TRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
203 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
204 ; HSA-TRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
205 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
206 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
207 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 8
208 ; HSA-TRAP-GFX900-V2-NEXT: workitem_vgpr_count = 2
209 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
210 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
211 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
212 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
213 ; HSA-TRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
214 ; HSA-TRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
215 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
216 ; HSA-TRAP-GFX900-V2-NEXT: group_segment_alignment = 4
217 ; HSA-TRAP-GFX900-V2-NEXT: private_segment_alignment = 4
218 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_size = 6
219 ; HSA-TRAP-GFX900-V2-NEXT: call_convention = -1
220 ; HSA-TRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
221 ; HSA-TRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
222 ; HSA-TRAP-GFX900-V2-NEXT: ; %bb.0:
223 ; HSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
224 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
225 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
226 ; HSA-TRAP-GFX900-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
227 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
228 ; HSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[2:3]
229 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
230 ; HSA-TRAP-GFX900-V2-NEXT: s_trap 2
231 ;
232 ; HSA-TRAP-GFX900-V3-LABEL: trap:
233 ; HSA-TRAP-GFX900-V3: ; %bb.0:
234 ; HSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
235 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
236 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
237 ; HSA-TRAP-GFX900-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
238 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
239 ; HSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[2:3]
240 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
241 ; HSA-TRAP-GFX900-V3-NEXT: s_trap 2
242 ;
243 ; HSA-TRAP-GFX900-V4-LABEL: trap:
244 ; HSA-TRAP-GFX900-V4: ; %bb.0:
245 ; HSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
246 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
247 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
248 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
249 ; HSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
250 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
251 ; HSA-TRAP-GFX900-V4-NEXT: s_trap 2
252 ;
253 ; HSA-NOTRAP-GFX900-V2-LABEL: trap:
254 ; HSA-NOTRAP-GFX900-V2: .amd_kernel_code_t
255 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_major = 1
256 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
257 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_kind = 1
258 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
259 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
260 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
261 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
262 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
263 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
264 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 0
265 ; HSA-NOTRAP-GFX900-V2-NEXT: priority = 0
266 ; HSA-NOTRAP-GFX900-V2-NEXT: float_mode = 240
267 ; HSA-NOTRAP-GFX900-V2-NEXT: priv = 0
268 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
269 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_mode = 0
270 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
271 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
272 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
273 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
274 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
275 ; HSA-NOTRAP-GFX900-V2-NEXT: user_sgpr_count = 8
276 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_trap_handler = 0
277 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
278 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
279 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
280 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
281 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
282 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception_msb = 0
283 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_lds_size = 0
284 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception = 0
285 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
286 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
287 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
288 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
289 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
290 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
291 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
292 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
293 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
294 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
295 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
296 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
297 ; HSA-NOTRAP-GFX900-V2-NEXT: private_element_size = 1
298 ; HSA-NOTRAP-GFX900-V2-NEXT: is_ptr64 = 1
299 ; HSA-NOTRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
300 ; HSA-NOTRAP-GFX900-V2-NEXT: is_debug_enabled = 0
301 ; HSA-NOTRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
302 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
303 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
304 ; HSA-NOTRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
305 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
306 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
307 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 8
308 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_vgpr_count = 2
309 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
310 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
311 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
312 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
313 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
314 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
315 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
316 ; HSA-NOTRAP-GFX900-V2-NEXT: group_segment_alignment = 4
317 ; HSA-NOTRAP-GFX900-V2-NEXT: private_segment_alignment = 4
318 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_size = 6
319 ; HSA-NOTRAP-GFX900-V2-NEXT: call_convention = -1
320 ; HSA-NOTRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
321 ; HSA-NOTRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
322 ; HSA-NOTRAP-GFX900-V2-NEXT: ; %bb.0:
323 ; HSA-NOTRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
324 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
325 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
326 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
327 ; HSA-NOTRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
328 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
329 ; HSA-NOTRAP-GFX900-V2-NEXT: s_endpgm
330 ;
331 ; HSA-NOTRAP-GFX900-V3-LABEL: trap:
332 ; HSA-NOTRAP-GFX900-V3: ; %bb.0:
333 ; HSA-NOTRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
334 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
335 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
336 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
337 ; HSA-NOTRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
338 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
339 ; HSA-NOTRAP-GFX900-V3-NEXT: s_endpgm
340 ;
341 ; HSA-NOTRAP-GFX900-V4-LABEL: trap:
342 ; HSA-NOTRAP-GFX900-V4: ; %bb.0:
343 ; HSA-NOTRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
344 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
345 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
346 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
347 ; HSA-NOTRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
348 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
349 ; HSA-NOTRAP-GFX900-V4-NEXT: s_endpgm
350 store volatile i32 1, i32 addrspace(1)* %arg0
351 call void @llvm.trap()
352 unreachable
353 store volatile i32 2, i32 addrspace(1)* %arg0
354 ret void
355 }
357 define amdgpu_kernel void @non_entry_trap(i32 addrspace(1)* nocapture readonly %arg0) local_unnamed_addr {
358 ; NOHSA-TRAP-GFX900-V2-LABEL: non_entry_trap:
359 ; NOHSA-TRAP-GFX900-V2: ; %bb.0: ; %entry
360 ; NOHSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
361 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
362 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
363 ; NOHSA-TRAP-GFX900-V2-NEXT: global_load_dword v1, v0, s[0:1] glc
364 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
365 ; NOHSA-TRAP-GFX900-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
366 ; NOHSA-TRAP-GFX900-V2-NEXT: s_and_b64 vcc, exec, vcc
367 ; NOHSA-TRAP-GFX900-V2-NEXT: s_cbranch_vccz BB1_2
368 ; NOHSA-TRAP-GFX900-V2-NEXT: ; %bb.1: ; %ret
369 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 3
370 ; NOHSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
371 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
372 ; NOHSA-TRAP-GFX900-V2-NEXT: s_endpgm
373 ; NOHSA-TRAP-GFX900-V2-NEXT: BB1_2: ; %trap
374 ; NOHSA-TRAP-GFX900-V2-NEXT: s_endpgm
375 ;
376 ; NOHSA-TRAP-GFX900-V3-LABEL: non_entry_trap:
377 ; NOHSA-TRAP-GFX900-V3: ; %bb.0: ; %entry
378 ; NOHSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
379 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
380 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
381 ; NOHSA-TRAP-GFX900-V3-NEXT: global_load_dword v1, v0, s[0:1] glc
382 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
383 ; NOHSA-TRAP-GFX900-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
384 ; NOHSA-TRAP-GFX900-V3-NEXT: s_and_b64 vcc, exec, vcc
385 ; NOHSA-TRAP-GFX900-V3-NEXT: s_cbranch_vccz BB1_2
386 ; NOHSA-TRAP-GFX900-V3-NEXT: ; %bb.1: ; %ret
387 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 3
388 ; NOHSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
389 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
390 ; NOHSA-TRAP-GFX900-V3-NEXT: s_endpgm
391 ; NOHSA-TRAP-GFX900-V3-NEXT: BB1_2: ; %trap
392 ; NOHSA-TRAP-GFX900-V3-NEXT: s_endpgm
393 ;
394 ; NOHSA-TRAP-GFX900-V4-LABEL: non_entry_trap:
395 ; NOHSA-TRAP-GFX900-V4: ; %bb.0: ; %entry
396 ; NOHSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
397 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
398 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
399 ; NOHSA-TRAP-GFX900-V4-NEXT: global_load_dword v1, v0, s[0:1] glc
400 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
401 ; NOHSA-TRAP-GFX900-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
402 ; NOHSA-TRAP-GFX900-V4-NEXT: s_and_b64 vcc, exec, vcc
403 ; NOHSA-TRAP-GFX900-V4-NEXT: s_cbranch_vccz BB1_2
404 ; NOHSA-TRAP-GFX900-V4-NEXT: ; %bb.1: ; %ret
405 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 3
406 ; NOHSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
407 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
408 ; NOHSA-TRAP-GFX900-V4-NEXT: s_endpgm
409 ; NOHSA-TRAP-GFX900-V4-NEXT: BB1_2: ; %trap
410 ; NOHSA-TRAP-GFX900-V4-NEXT: s_endpgm
411 ;
412 ; HSA-TRAP-GFX803-V2-LABEL: non_entry_trap:
413 ; HSA-TRAP-GFX803-V2: .amd_kernel_code_t
414 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_major = 1
415 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_minor = 2
416 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_kind = 1
417 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_major = 8
418 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_minor = 0
419 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_stepping = 3
420 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_entry_byte_offset = 256
421 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_prefetch_byte_size = 0
422 ; HSA-TRAP-GFX803-V2-NEXT: granulated_workitem_vgpr_count = 0
423 ; HSA-TRAP-GFX803-V2-NEXT: granulated_wavefront_sgpr_count = 1
424 ; HSA-TRAP-GFX803-V2-NEXT: priority = 0
425 ; HSA-TRAP-GFX803-V2-NEXT: float_mode = 240
426 ; HSA-TRAP-GFX803-V2-NEXT: priv = 0
427 ; HSA-TRAP-GFX803-V2-NEXT: enable_dx10_clamp = 1
428 ; HSA-TRAP-GFX803-V2-NEXT: debug_mode = 0
429 ; HSA-TRAP-GFX803-V2-NEXT: enable_ieee_mode = 1
430 ; HSA-TRAP-GFX803-V2-NEXT: enable_wgp_mode = 0
431 ; HSA-TRAP-GFX803-V2-NEXT: enable_mem_ordered = 0
432 ; HSA-TRAP-GFX803-V2-NEXT: enable_fwd_progress = 0
433 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
434 ; HSA-TRAP-GFX803-V2-NEXT: user_sgpr_count = 8
435 ; HSA-TRAP-GFX803-V2-NEXT: enable_trap_handler = 0
436 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_x = 1
437 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_y = 0
438 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_z = 0
439 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_info = 0
440 ; HSA-TRAP-GFX803-V2-NEXT: enable_vgpr_workitem_id = 0
441 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception_msb = 0
442 ; HSA-TRAP-GFX803-V2-NEXT: granulated_lds_size = 0
443 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception = 0
444 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_buffer = 1
445 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_ptr = 0
446 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_queue_ptr = 1
447 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
448 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_id = 0
449 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_flat_scratch_init = 0
450 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_size = 0
451 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
452 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
453 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
454 ; HSA-TRAP-GFX803-V2-NEXT: enable_wavefront_size32 = 0
455 ; HSA-TRAP-GFX803-V2-NEXT: enable_ordered_append_gds = 0
456 ; HSA-TRAP-GFX803-V2-NEXT: private_element_size = 1
457 ; HSA-TRAP-GFX803-V2-NEXT: is_ptr64 = 1
458 ; HSA-TRAP-GFX803-V2-NEXT: is_dynamic_callstack = 0
459 ; HSA-TRAP-GFX803-V2-NEXT: is_debug_enabled = 0
460 ; HSA-TRAP-GFX803-V2-NEXT: is_xnack_enabled = 0
461 ; HSA-TRAP-GFX803-V2-NEXT: workitem_private_segment_byte_size = 0
462 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_group_segment_byte_size = 0
463 ; HSA-TRAP-GFX803-V2-NEXT: gds_segment_byte_size = 0
464 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_byte_size = 8
465 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_fbarrier_count = 0
466 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_sgpr_count = 10
467 ; HSA-TRAP-GFX803-V2-NEXT: workitem_vgpr_count = 3
468 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_first = 0
469 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_count = 0
470 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_first = 0
471 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_count = 0
472 ; HSA-TRAP-GFX803-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
473 ; HSA-TRAP-GFX803-V2-NEXT: debug_private_segment_buffer_sgpr = 0
474 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_alignment = 4
475 ; HSA-TRAP-GFX803-V2-NEXT: group_segment_alignment = 4
476 ; HSA-TRAP-GFX803-V2-NEXT: private_segment_alignment = 4
477 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_size = 6
478 ; HSA-TRAP-GFX803-V2-NEXT: call_convention = -1
479 ; HSA-TRAP-GFX803-V2-NEXT: runtime_loader_kernel_symbol = 0
480 ; HSA-TRAP-GFX803-V2-NEXT: .end_amd_kernel_code_t
481 ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.0: ; %entry
482 ; HSA-TRAP-GFX803-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
483 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt lgkmcnt(0)
484 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
485 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1
486 ; HSA-TRAP-GFX803-V2-NEXT: flat_load_dword v0, v[0:1] glc
487 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
488 ; HSA-TRAP-GFX803-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
489 ; HSA-TRAP-GFX803-V2-NEXT: s_and_b64 vcc, exec, vcc
490 ; HSA-TRAP-GFX803-V2-NEXT: s_cbranch_vccz BB1_2
491 ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.1: ; %ret
492 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
493 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v2, 3
494 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1
495 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v2
496 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
497 ; HSA-TRAP-GFX803-V2-NEXT: s_endpgm
498 ; HSA-TRAP-GFX803-V2-NEXT: BB1_2: ; %trap
499 ; HSA-TRAP-GFX803-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
500 ; HSA-TRAP-GFX803-V2-NEXT: s_trap 2
501 ;
502 ; HSA-TRAP-GFX803-V3-LABEL: non_entry_trap:
503 ; HSA-TRAP-GFX803-V3: ; %bb.0: ; %entry
504 ; HSA-TRAP-GFX803-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
505 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt lgkmcnt(0)
506 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
507 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1
508 ; HSA-TRAP-GFX803-V3-NEXT: flat_load_dword v0, v[0:1] glc
509 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
510 ; HSA-TRAP-GFX803-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
511 ; HSA-TRAP-GFX803-V3-NEXT: s_and_b64 vcc, exec, vcc
512 ; HSA-TRAP-GFX803-V3-NEXT: s_cbranch_vccz BB1_2
513 ; HSA-TRAP-GFX803-V3-NEXT: ; %bb.1: ; %ret
514 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
515 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v2, 3
516 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1
517 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v2
518 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
519 ; HSA-TRAP-GFX803-V3-NEXT: s_endpgm
520 ; HSA-TRAP-GFX803-V3-NEXT: BB1_2: ; %trap
521 ; HSA-TRAP-GFX803-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
522 ; HSA-TRAP-GFX803-V3-NEXT: s_trap 2
523 ;
524 ; HSA-TRAP-GFX803-V4-LABEL: non_entry_trap:
525 ; HSA-TRAP-GFX803-V4: ; %bb.0: ; %entry
526 ; HSA-TRAP-GFX803-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
527 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt lgkmcnt(0)
528 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
529 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1
530 ; HSA-TRAP-GFX803-V4-NEXT: flat_load_dword v0, v[0:1] glc
531 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
532 ; HSA-TRAP-GFX803-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
533 ; HSA-TRAP-GFX803-V4-NEXT: s_and_b64 vcc, exec, vcc
534 ; HSA-TRAP-GFX803-V4-NEXT: s_cbranch_vccz BB1_2
535 ; HSA-TRAP-GFX803-V4-NEXT: ; %bb.1: ; %ret
536 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
537 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v2, 3
538 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1
539 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v2
540 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
541 ; HSA-TRAP-GFX803-V4-NEXT: s_endpgm
542 ; HSA-TRAP-GFX803-V4-NEXT: BB1_2: ; %trap
543 ; HSA-TRAP-GFX803-V4-NEXT: s_mov_b64 s[0:1], s[4:5]
544 ; HSA-TRAP-GFX803-V4-NEXT: s_trap 2
545 ;
546 ; HSA-TRAP-GFX900-V2-LABEL: non_entry_trap:
547 ; HSA-TRAP-GFX900-V2: .amd_kernel_code_t
548 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_major = 1
549 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
550 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_kind = 1
551 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
552 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
553 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
554 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
555 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
556 ; HSA-TRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
557 ; HSA-TRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 1
558 ; HSA-TRAP-GFX900-V2-NEXT: priority = 0
559 ; HSA-TRAP-GFX900-V2-NEXT: float_mode = 240
560 ; HSA-TRAP-GFX900-V2-NEXT: priv = 0
561 ; HSA-TRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
562 ; HSA-TRAP-GFX900-V2-NEXT: debug_mode = 0
563 ; HSA-TRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
564 ; HSA-TRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
565 ; HSA-TRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
566 ; HSA-TRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
567 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
568 ; HSA-TRAP-GFX900-V2-NEXT: user_sgpr_count = 8
569 ; HSA-TRAP-GFX900-V2-NEXT: enable_trap_handler = 0
570 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
571 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
572 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
573 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
574 ; HSA-TRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
575 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception_msb = 0
576 ; HSA-TRAP-GFX900-V2-NEXT: granulated_lds_size = 0
577 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception = 0
578 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
579 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
580 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
581 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
582 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
583 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
584 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
585 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
586 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
587 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
588 ; HSA-TRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
589 ; HSA-TRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
590 ; HSA-TRAP-GFX900-V2-NEXT: private_element_size = 1
591 ; HSA-TRAP-GFX900-V2-NEXT: is_ptr64 = 1
592 ; HSA-TRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
593 ; HSA-TRAP-GFX900-V2-NEXT: is_debug_enabled = 0
594 ; HSA-TRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
595 ; HSA-TRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
596 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
597 ; HSA-TRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
598 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
599 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
600 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 10
601 ; HSA-TRAP-GFX900-V2-NEXT: workitem_vgpr_count = 2
602 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
603 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
604 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
605 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
606 ; HSA-TRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
607 ; HSA-TRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
608 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
609 ; HSA-TRAP-GFX900-V2-NEXT: group_segment_alignment = 4
610 ; HSA-TRAP-GFX900-V2-NEXT: private_segment_alignment = 4
611 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_size = 6
612 ; HSA-TRAP-GFX900-V2-NEXT: call_convention = -1
613 ; HSA-TRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
614 ; HSA-TRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
615 ; HSA-TRAP-GFX900-V2-NEXT: ; %bb.0: ; %entry
616 ; HSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
617 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
618 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
619 ; HSA-TRAP-GFX900-V2-NEXT: global_load_dword v1, v0, s[0:1] glc
620 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
621 ; HSA-TRAP-GFX900-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
622 ; HSA-TRAP-GFX900-V2-NEXT: s_and_b64 vcc, exec, vcc
623 ; HSA-TRAP-GFX900-V2-NEXT: s_cbranch_vccz BB1_2
624 ; HSA-TRAP-GFX900-V2-NEXT: ; %bb.1: ; %ret
625 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 3
626 ; HSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
627 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
628 ; HSA-TRAP-GFX900-V2-NEXT: s_endpgm
629 ; HSA-TRAP-GFX900-V2-NEXT: BB1_2: ; %trap
630 ; HSA-TRAP-GFX900-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
631 ; HSA-TRAP-GFX900-V2-NEXT: s_trap 2
632 ;
633 ; HSA-TRAP-GFX900-V3-LABEL: non_entry_trap:
634 ; HSA-TRAP-GFX900-V3: ; %bb.0: ; %entry
635 ; HSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
636 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
637 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
638 ; HSA-TRAP-GFX900-V3-NEXT: global_load_dword v1, v0, s[0:1] glc
639 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
640 ; HSA-TRAP-GFX900-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
641 ; HSA-TRAP-GFX900-V3-NEXT: s_and_b64 vcc, exec, vcc
642 ; HSA-TRAP-GFX900-V3-NEXT: s_cbranch_vccz BB1_2
643 ; HSA-TRAP-GFX900-V3-NEXT: ; %bb.1: ; %ret
644 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 3
645 ; HSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
646 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
647 ; HSA-TRAP-GFX900-V3-NEXT: s_endpgm
648 ; HSA-TRAP-GFX900-V3-NEXT: BB1_2: ; %trap
649 ; HSA-TRAP-GFX900-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
650 ; HSA-TRAP-GFX900-V3-NEXT: s_trap 2
651 ;
652 ; HSA-TRAP-GFX900-V4-LABEL: non_entry_trap:
653 ; HSA-TRAP-GFX900-V4: ; %bb.0: ; %entry
654 ; HSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
655 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
656 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
657 ; HSA-TRAP-GFX900-V4-NEXT: global_load_dword v1, v0, s[0:1] glc
658 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
659 ; HSA-TRAP-GFX900-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
660 ; HSA-TRAP-GFX900-V4-NEXT: s_and_b64 vcc, exec, vcc
661 ; HSA-TRAP-GFX900-V4-NEXT: s_cbranch_vccz BB1_2
662 ; HSA-TRAP-GFX900-V4-NEXT: ; %bb.1: ; %ret
663 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 3
664 ; HSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
665 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
666 ; HSA-TRAP-GFX900-V4-NEXT: s_endpgm
667 ; HSA-TRAP-GFX900-V4-NEXT: BB1_2: ; %trap
668 ; HSA-TRAP-GFX900-V4-NEXT: s_trap 2
669 ;
670 ; HSA-NOTRAP-GFX900-V2-LABEL: non_entry_trap:
671 ; HSA-NOTRAP-GFX900-V2: .amd_kernel_code_t
672 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_major = 1
673 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
674 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_kind = 1
675 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
676 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
677 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
678 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
679 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
680 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
681 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 1
682 ; HSA-NOTRAP-GFX900-V2-NEXT: priority = 0
683 ; HSA-NOTRAP-GFX900-V2-NEXT: float_mode = 240
684 ; HSA-NOTRAP-GFX900-V2-NEXT: priv = 0
685 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
686 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_mode = 0
687 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
688 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
689 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
690 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
691 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
692 ; HSA-NOTRAP-GFX900-V2-NEXT: user_sgpr_count = 8
693 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_trap_handler = 0
694 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
695 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
696 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
697 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
698 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
699 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception_msb = 0
700 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_lds_size = 0
701 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception = 0
702 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
703 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
704 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
705 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
706 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
707 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
708 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
709 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
710 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
711 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
712 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
713 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
714 ; HSA-NOTRAP-GFX900-V2-NEXT: private_element_size = 1
715 ; HSA-NOTRAP-GFX900-V2-NEXT: is_ptr64 = 1
716 ; HSA-NOTRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
717 ; HSA-NOTRAP-GFX900-V2-NEXT: is_debug_enabled = 0
718 ; HSA-NOTRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
719 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
720 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
721 ; HSA-NOTRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
722 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
723 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
724 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 10
725 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_vgpr_count = 2
726 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
727 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
728 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
729 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
730 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
731 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
732 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
733 ; HSA-NOTRAP-GFX900-V2-NEXT: group_segment_alignment = 4
734 ; HSA-NOTRAP-GFX900-V2-NEXT: private_segment_alignment = 4
735 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_size = 6
736 ; HSA-NOTRAP-GFX900-V2-NEXT: call_convention = -1
737 ; HSA-NOTRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
738 ; HSA-NOTRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
739 ; HSA-NOTRAP-GFX900-V2-NEXT: ; %bb.0: ; %entry
740 ; HSA-NOTRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
741 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
742 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
743 ; HSA-NOTRAP-GFX900-V2-NEXT: global_load_dword v1, v0, s[0:1] glc
744 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
745 ; HSA-NOTRAP-GFX900-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
746 ; HSA-NOTRAP-GFX900-V2-NEXT: s_and_b64 vcc, exec, vcc
747 ; HSA-NOTRAP-GFX900-V2-NEXT: s_cbranch_vccz BB1_2
748 ; HSA-NOTRAP-GFX900-V2-NEXT: ; %bb.1: ; %ret
749 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 3
750 ; HSA-NOTRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
751 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
752 ; HSA-NOTRAP-GFX900-V2-NEXT: s_endpgm
753 ; HSA-NOTRAP-GFX900-V2-NEXT: BB1_2: ; %trap
754 ; HSA-NOTRAP-GFX900-V2-NEXT: s_endpgm
755 ;
756 ; HSA-NOTRAP-GFX900-V3-LABEL: non_entry_trap:
757 ; HSA-NOTRAP-GFX900-V3: ; %bb.0: ; %entry
758 ; HSA-NOTRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
759 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
760 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
761 ; HSA-NOTRAP-GFX900-V3-NEXT: global_load_dword v1, v0, s[0:1] glc
762 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
763 ; HSA-NOTRAP-GFX900-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
764 ; HSA-NOTRAP-GFX900-V3-NEXT: s_and_b64 vcc, exec, vcc
765 ; HSA-NOTRAP-GFX900-V3-NEXT: s_cbranch_vccz BB1_2
766 ; HSA-NOTRAP-GFX900-V3-NEXT: ; %bb.1: ; %ret
767 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 3
768 ; HSA-NOTRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
769 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
770 ; HSA-NOTRAP-GFX900-V3-NEXT: s_endpgm
771 ; HSA-NOTRAP-GFX900-V3-NEXT: BB1_2: ; %trap
772 ; HSA-NOTRAP-GFX900-V3-NEXT: s_endpgm
773 ;
774 ; HSA-NOTRAP-GFX900-V4-LABEL: non_entry_trap:
775 ; HSA-NOTRAP-GFX900-V4: ; %bb.0: ; %entry
776 ; HSA-NOTRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
777 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
778 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
779 ; HSA-NOTRAP-GFX900-V4-NEXT: global_load_dword v1, v0, s[0:1] glc
780 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
781 ; HSA-NOTRAP-GFX900-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
782 ; HSA-NOTRAP-GFX900-V4-NEXT: s_and_b64 vcc, exec, vcc
783 ; HSA-NOTRAP-GFX900-V4-NEXT: s_cbranch_vccz BB1_2
784 ; HSA-NOTRAP-GFX900-V4-NEXT: ; %bb.1: ; %ret
785 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 3
786 ; HSA-NOTRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
787 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
788 ; HSA-NOTRAP-GFX900-V4-NEXT: s_endpgm
789 ; HSA-NOTRAP-GFX900-V4-NEXT: BB1_2: ; %trap
790 ; HSA-NOTRAP-GFX900-V4-NEXT: s_endpgm
791 entry:
792 %tmp29 = load volatile i32, i32 addrspace(1)* %arg0
793 %cmp = icmp eq i32 %tmp29, -1
794 br i1 %cmp, label %ret, label %trap
796 trap:
797 call void @llvm.trap()
798 unreachable
800 ret:
801 store volatile i32 3, i32 addrspace(1)* %arg0
802 ret void
803 }
805 define amdgpu_kernel void @debugtrap(i32 addrspace(1)* nocapture readonly %arg0) {
806 ; NOHSA-TRAP-GFX900-V2-LABEL: debugtrap:
807 ; NOHSA-TRAP-GFX900-V2: ; %bb.0:
808 ; NOHSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
809 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
810 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
811 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v2, 2
812 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
813 ; NOHSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
814 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
815 ; NOHSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v2, s[0:1]
816 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
817 ; NOHSA-TRAP-GFX900-V2-NEXT: s_endpgm
818 ;
819 ; NOHSA-TRAP-GFX900-V3-LABEL: debugtrap:
820 ; NOHSA-TRAP-GFX900-V3: ; %bb.0:
821 ; NOHSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
822 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
823 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
824 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v2, 2
825 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
826 ; NOHSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
827 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
828 ; NOHSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v2, s[0:1]
829 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
830 ; NOHSA-TRAP-GFX900-V3-NEXT: s_endpgm
831 ;
832 ; NOHSA-TRAP-GFX900-V4-LABEL: debugtrap:
833 ; NOHSA-TRAP-GFX900-V4: ; %bb.0:
834 ; NOHSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
835 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
836 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
837 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v2, 2
838 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
839 ; NOHSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
840 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
841 ; NOHSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v2, s[0:1]
842 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
843 ; NOHSA-TRAP-GFX900-V4-NEXT: s_endpgm
844 ;
845 ; HSA-TRAP-GFX803-V2-LABEL: debugtrap:
846 ; HSA-TRAP-GFX803-V2: .amd_kernel_code_t
847 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_major = 1
848 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_minor = 2
849 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_kind = 1
850 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_major = 8
851 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_minor = 0
852 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_stepping = 3
853 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_entry_byte_offset = 256
854 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_prefetch_byte_size = 0
855 ; HSA-TRAP-GFX803-V2-NEXT: granulated_workitem_vgpr_count = 0
856 ; HSA-TRAP-GFX803-V2-NEXT: granulated_wavefront_sgpr_count = 0
857 ; HSA-TRAP-GFX803-V2-NEXT: priority = 0
858 ; HSA-TRAP-GFX803-V2-NEXT: float_mode = 240
859 ; HSA-TRAP-GFX803-V2-NEXT: priv = 0
860 ; HSA-TRAP-GFX803-V2-NEXT: enable_dx10_clamp = 1
861 ; HSA-TRAP-GFX803-V2-NEXT: debug_mode = 0
862 ; HSA-TRAP-GFX803-V2-NEXT: enable_ieee_mode = 1
863 ; HSA-TRAP-GFX803-V2-NEXT: enable_wgp_mode = 0
864 ; HSA-TRAP-GFX803-V2-NEXT: enable_mem_ordered = 0
865 ; HSA-TRAP-GFX803-V2-NEXT: enable_fwd_progress = 0
866 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
867 ; HSA-TRAP-GFX803-V2-NEXT: user_sgpr_count = 8
868 ; HSA-TRAP-GFX803-V2-NEXT: enable_trap_handler = 0
869 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_x = 1
870 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_y = 0
871 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_z = 0
872 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_info = 0
873 ; HSA-TRAP-GFX803-V2-NEXT: enable_vgpr_workitem_id = 0
874 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception_msb = 0
875 ; HSA-TRAP-GFX803-V2-NEXT: granulated_lds_size = 0
876 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception = 0
877 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_buffer = 1
878 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_ptr = 0
879 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_queue_ptr = 1
880 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
881 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_id = 0
882 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_flat_scratch_init = 0
883 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_size = 0
884 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
885 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
886 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
887 ; HSA-TRAP-GFX803-V2-NEXT: enable_wavefront_size32 = 0
888 ; HSA-TRAP-GFX803-V2-NEXT: enable_ordered_append_gds = 0
889 ; HSA-TRAP-GFX803-V2-NEXT: private_element_size = 1
890 ; HSA-TRAP-GFX803-V2-NEXT: is_ptr64 = 1
891 ; HSA-TRAP-GFX803-V2-NEXT: is_dynamic_callstack = 0
892 ; HSA-TRAP-GFX803-V2-NEXT: is_debug_enabled = 0
893 ; HSA-TRAP-GFX803-V2-NEXT: is_xnack_enabled = 0
894 ; HSA-TRAP-GFX803-V2-NEXT: workitem_private_segment_byte_size = 0
895 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_group_segment_byte_size = 0
896 ; HSA-TRAP-GFX803-V2-NEXT: gds_segment_byte_size = 0
897 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_byte_size = 8
898 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_fbarrier_count = 0
899 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_sgpr_count = 8
900 ; HSA-TRAP-GFX803-V2-NEXT: workitem_vgpr_count = 4
901 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_first = 0
902 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_count = 0
903 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_first = 0
904 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_count = 0
905 ; HSA-TRAP-GFX803-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
906 ; HSA-TRAP-GFX803-V2-NEXT: debug_private_segment_buffer_sgpr = 0
907 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_alignment = 4
908 ; HSA-TRAP-GFX803-V2-NEXT: group_segment_alignment = 4
909 ; HSA-TRAP-GFX803-V2-NEXT: private_segment_alignment = 4
910 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_size = 6
911 ; HSA-TRAP-GFX803-V2-NEXT: call_convention = -1
912 ; HSA-TRAP-GFX803-V2-NEXT: runtime_loader_kernel_symbol = 0
913 ; HSA-TRAP-GFX803-V2-NEXT: .end_amd_kernel_code_t
914 ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.0:
915 ; HSA-TRAP-GFX803-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
916 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v2, 1
917 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v3, 2
918 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt lgkmcnt(0)
919 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
920 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1
921 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v2
922 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
923 ; HSA-TRAP-GFX803-V2-NEXT: s_trap 3
924 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v3
925 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
926 ; HSA-TRAP-GFX803-V2-NEXT: s_endpgm
927 ;
928 ; HSA-TRAP-GFX803-V3-LABEL: debugtrap:
929 ; HSA-TRAP-GFX803-V3: ; %bb.0:
930 ; HSA-TRAP-GFX803-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
931 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v2, 1
932 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v3, 2
933 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt lgkmcnt(0)
934 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
935 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1
936 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v2
937 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
938 ; HSA-TRAP-GFX803-V3-NEXT: s_trap 3
939 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v3
940 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
941 ; HSA-TRAP-GFX803-V3-NEXT: s_endpgm
942 ;
943 ; HSA-TRAP-GFX803-V4-LABEL: debugtrap:
944 ; HSA-TRAP-GFX803-V4: ; %bb.0:
945 ; HSA-TRAP-GFX803-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
946 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v2, 1
947 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v3, 2
948 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt lgkmcnt(0)
949 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
950 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1
951 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v2
952 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
953 ; HSA-TRAP-GFX803-V4-NEXT: s_trap 3
954 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v3
955 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
956 ; HSA-TRAP-GFX803-V4-NEXT: s_endpgm
957 ;
958 ; HSA-TRAP-GFX900-V2-LABEL: debugtrap:
959 ; HSA-TRAP-GFX900-V2: .amd_kernel_code_t
960 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_major = 1
961 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
962 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_kind = 1
963 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
964 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
965 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
966 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
967 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
968 ; HSA-TRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
969 ; HSA-TRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 0
970 ; HSA-TRAP-GFX900-V2-NEXT: priority = 0
971 ; HSA-TRAP-GFX900-V2-NEXT: float_mode = 240
972 ; HSA-TRAP-GFX900-V2-NEXT: priv = 0
973 ; HSA-TRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
974 ; HSA-TRAP-GFX900-V2-NEXT: debug_mode = 0
975 ; HSA-TRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
976 ; HSA-TRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
977 ; HSA-TRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
978 ; HSA-TRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
979 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
980 ; HSA-TRAP-GFX900-V2-NEXT: user_sgpr_count = 8
981 ; HSA-TRAP-GFX900-V2-NEXT: enable_trap_handler = 0
982 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
983 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
984 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
985 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
986 ; HSA-TRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
987 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception_msb = 0
988 ; HSA-TRAP-GFX900-V2-NEXT: granulated_lds_size = 0
989 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception = 0
990 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
991 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
992 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
993 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
994 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
995 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
996 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
997 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
998 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
999 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
1000 ; HSA-TRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
1001 ; HSA-TRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
1002 ; HSA-TRAP-GFX900-V2-NEXT: private_element_size = 1
1003 ; HSA-TRAP-GFX900-V2-NEXT: is_ptr64 = 1
1004 ; HSA-TRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
1005 ; HSA-TRAP-GFX900-V2-NEXT: is_debug_enabled = 0
1006 ; HSA-TRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
1007 ; HSA-TRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
1008 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
1009 ; HSA-TRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
1010 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
1011 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
1012 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 8
1013 ; HSA-TRAP-GFX900-V2-NEXT: workitem_vgpr_count = 3
1014 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
1015 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
1016 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
1017 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
1018 ; HSA-TRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
1019 ; HSA-TRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
1020 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
1021 ; HSA-TRAP-GFX900-V2-NEXT: group_segment_alignment = 4
1022 ; HSA-TRAP-GFX900-V2-NEXT: private_segment_alignment = 4
1023 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_size = 6
1024 ; HSA-TRAP-GFX900-V2-NEXT: call_convention = -1
1025 ; HSA-TRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
1026 ; HSA-TRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
1027 ; HSA-TRAP-GFX900-V2-NEXT: ; %bb.0:
1028 ; HSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
1029 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
1030 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
1031 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v2, 2
1032 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
1033 ; HSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
1034 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
1035 ; HSA-TRAP-GFX900-V2-NEXT: s_trap 3
1036 ; HSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v2, s[0:1]
1037 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
1038 ; HSA-TRAP-GFX900-V2-NEXT: s_endpgm
1039 ;
1040 ; HSA-TRAP-GFX900-V3-LABEL: debugtrap:
1041 ; HSA-TRAP-GFX900-V3: ; %bb.0:
1042 ; HSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
1043 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
1044 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
1045 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v2, 2
1046 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
1047 ; HSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
1048 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
1049 ; HSA-TRAP-GFX900-V3-NEXT: s_trap 3
1050 ; HSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v2, s[0:1]
1051 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
1052 ; HSA-TRAP-GFX900-V3-NEXT: s_endpgm
1053 ;
1054 ; HSA-TRAP-GFX900-V4-LABEL: debugtrap:
1055 ; HSA-TRAP-GFX900-V4: ; %bb.0:
1056 ; HSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
1057 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
1058 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
1059 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v2, 2
1060 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
1061 ; HSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
1062 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
1063 ; HSA-TRAP-GFX900-V4-NEXT: s_trap 3
1064 ; HSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v2, s[0:1]
1065 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
1066 ; HSA-TRAP-GFX900-V4-NEXT: s_endpgm
1067 ;
1068 ; HSA-NOTRAP-GFX900-V2-LABEL: debugtrap:
1069 ; HSA-NOTRAP-GFX900-V2: .amd_kernel_code_t
1070 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_major = 1
1071 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
1072 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_kind = 1
1073 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
1074 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
1075 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
1076 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
1077 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
1078 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
1079 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 0
1080 ; HSA-NOTRAP-GFX900-V2-NEXT: priority = 0
1081 ; HSA-NOTRAP-GFX900-V2-NEXT: float_mode = 240
1082 ; HSA-NOTRAP-GFX900-V2-NEXT: priv = 0
1083 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
1084 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_mode = 0
1085 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
1086 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
1087 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
1088 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
1089 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
1090 ; HSA-NOTRAP-GFX900-V2-NEXT: user_sgpr_count = 8
1091 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_trap_handler = 0
1092 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
1093 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
1094 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
1095 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
1096 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
1097 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception_msb = 0
1098 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_lds_size = 0
1099 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception = 0
1100 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
1101 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
1102 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
1103 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
1104 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
1105 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
1106 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
1107 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
1108 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
1109 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
1110 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
1111 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
1112 ; HSA-NOTRAP-GFX900-V2-NEXT: private_element_size = 1
1113 ; HSA-NOTRAP-GFX900-V2-NEXT: is_ptr64 = 1
1114 ; HSA-NOTRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
1115 ; HSA-NOTRAP-GFX900-V2-NEXT: is_debug_enabled = 0
1116 ; HSA-NOTRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
1117 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
1118 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
1119 ; HSA-NOTRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
1120 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
1121 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
1122 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 8
1123 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_vgpr_count = 3
1124 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
1125 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
1126 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
1127 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
1128 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
1129 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
1130 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
1131 ; HSA-NOTRAP-GFX900-V2-NEXT: group_segment_alignment = 4
1132 ; HSA-NOTRAP-GFX900-V2-NEXT: private_segment_alignment = 4
1133 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_size = 6
1134 ; HSA-NOTRAP-GFX900-V2-NEXT: call_convention = -1
1135 ; HSA-NOTRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
1136 ; HSA-NOTRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
1137 ; HSA-NOTRAP-GFX900-V2-NEXT: ; %bb.0:
1138 ; HSA-NOTRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
1139 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
1140 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
1141 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v2, 2
1142 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
1143 ; HSA-NOTRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
1144 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
1145 ; HSA-NOTRAP-GFX900-V2-NEXT: global_store_dword v0, v2, s[0:1]
1146 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
1147 ; HSA-NOTRAP-GFX900-V2-NEXT: s_endpgm
1148 ;
1149 ; HSA-NOTRAP-GFX900-V3-LABEL: debugtrap:
1150 ; HSA-NOTRAP-GFX900-V3: ; %bb.0:
1151 ; HSA-NOTRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
1152 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
1153 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
1154 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v2, 2
1155 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
1156 ; HSA-NOTRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
1157 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
1158 ; HSA-NOTRAP-GFX900-V3-NEXT: global_store_dword v0, v2, s[0:1]
1159 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
1160 ; HSA-NOTRAP-GFX900-V3-NEXT: s_endpgm
1161 ;
1162 ; HSA-NOTRAP-GFX900-V4-LABEL: debugtrap:
1163 ; HSA-NOTRAP-GFX900-V4: ; %bb.0:
1164 ; HSA-NOTRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
1165 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
1166 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
1167 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v2, 2
1168 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
1169 ; HSA-NOTRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
1170 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
1171 ; HSA-NOTRAP-GFX900-V4-NEXT: global_store_dword v0, v2, s[0:1]
1172 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
1173 ; HSA-NOTRAP-GFX900-V4-NEXT: s_endpgm
1174 store volatile i32 1, i32 addrspace(1)* %arg0
1175 call void @llvm.debugtrap()
1176 store volatile i32 2, i32 addrspace(1)* %arg0
1177 ret void
1178 }
1180 attributes #0 = { nounwind noreturn }
1181 attributes #1 = { nounwind }