| blob | 6a8d9def5663889973b1c4e022f6457a9246972a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-T1
3 ; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2NODSP
4 ; RUN: llc < %s -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefix=CHECK-T2 --check-prefix=CHECK-T2DSP
5 ; RUN: llc < %s -mtriple=armv8a-none-eabi | FileCheck %s --check-prefix=CHECK-ARM
7 declare i4 @llvm.sadd.sat.i4(i4, i4)
8 declare i8 @llvm.sadd.sat.i8(i8, i8)
9 declare i16 @llvm.sadd.sat.i16(i16, i16)
10 declare i32 @llvm.sadd.sat.i32(i32, i32)
11 declare i64 @llvm.sadd.sat.i64(i64, i64)
13 define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
14 ; CHECK-T1-LABEL: func32:
15 ; CHECK-T1: @ %bb.0:
16 ; CHECK-T1-NEXT: muls r1, r2, r1
17 ; CHECK-T1-NEXT: adds r0, r0, r1
18 ; CHECK-T1-NEXT: bvc .LBB0_2
19 ; CHECK-T1-NEXT: @ %bb.1:
20 ; CHECK-T1-NEXT: asrs r1, r0, #31
21 ; CHECK-T1-NEXT: movs r0, #1
22 ; CHECK-T1-NEXT: lsls r0, r0, #31
23 ; CHECK-T1-NEXT: eors r0, r1
24 ; CHECK-T1-NEXT: .LBB0_2:
25 ; CHECK-T1-NEXT: bx lr
26 ;
27 ; CHECK-T2NODSP-LABEL: func32:
28 ; CHECK-T2NODSP: @ %bb.0:
29 ; CHECK-T2NODSP-NEXT: mla r1, r1, r2, r0
30 ; CHECK-T2NODSP-NEXT: mov.w r2, #-2147483648
31 ; CHECK-T2NODSP-NEXT: cmp r1, r0
32 ; CHECK-T2NODSP-NEXT: it vs
33 ; CHECK-T2NODSP-NEXT: eorvs.w r1, r2, r1, asr #31
34 ; CHECK-T2NODSP-NEXT: mov r0, r1
35 ; CHECK-T2NODSP-NEXT: bx lr
36 ;
37 ; CHECK-T2DSP-LABEL: func32:
38 ; CHECK-T2DSP: @ %bb.0:
39 ; CHECK-T2DSP-NEXT: muls r1, r2, r1
40 ; CHECK-T2DSP-NEXT: qadd r0, r0, r1
41 ; CHECK-T2DSP-NEXT: bx lr
42 ;
43 ; CHECK-ARM-LABEL: func32:
44 ; CHECK-ARM: @ %bb.0:
45 ; CHECK-ARM-NEXT: mul r1, r1, r2
46 ; CHECK-ARM-NEXT: qadd r0, r0, r1
47 ; CHECK-ARM-NEXT: bx lr
48 %a = mul i32 %y, %z
49 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %a)
50 ret i32 %tmp
51 }
53 define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {
54 ; CHECK-T1-LABEL: func64:
55 ; CHECK-T1: @ %bb.0:
56 ; CHECK-T1-NEXT: .save {r4, lr}
57 ; CHECK-T1-NEXT: push {r4, lr}
58 ; CHECK-T1-NEXT: ldr r3, [sp, #12]
59 ; CHECK-T1-NEXT: mov r2, r1
60 ; CHECK-T1-NEXT: eors r2, r3
61 ; CHECK-T1-NEXT: ldr r4, [sp, #8]
62 ; CHECK-T1-NEXT: adds r4, r0, r4
63 ; CHECK-T1-NEXT: adcs r3, r1
64 ; CHECK-T1-NEXT: eors r1, r3
65 ; CHECK-T1-NEXT: bics r1, r2
66 ; CHECK-T1-NEXT: asrs r2, r3, #31
67 ; CHECK-T1-NEXT: cmp r1, #0
68 ; CHECK-T1-NEXT: mov r0, r2
69 ; CHECK-T1-NEXT: bmi .LBB1_2
70 ; CHECK-T1-NEXT: @ %bb.1:
71 ; CHECK-T1-NEXT: mov r0, r4
72 ; CHECK-T1-NEXT: .LBB1_2:
73 ; CHECK-T1-NEXT: cmp r1, #0
74 ; CHECK-T1-NEXT: bmi .LBB1_4
75 ; CHECK-T1-NEXT: @ %bb.3:
76 ; CHECK-T1-NEXT: mov r1, r3
77 ; CHECK-T1-NEXT: pop {r4, pc}
78 ; CHECK-T1-NEXT: .LBB1_4:
79 ; CHECK-T1-NEXT: movs r1, #1
80 ; CHECK-T1-NEXT: lsls r1, r1, #31
81 ; CHECK-T1-NEXT: eors r2, r1
82 ; CHECK-T1-NEXT: mov r1, r2
83 ; CHECK-T1-NEXT: pop {r4, pc}
84 ;
85 ; CHECK-T2-LABEL: func64:
86 ; CHECK-T2: @ %bb.0:
87 ; CHECK-T2-NEXT: ldr r2, [sp]
88 ; CHECK-T2-NEXT: ldr.w r12, [sp, #4]
89 ; CHECK-T2-NEXT: adds r0, r0, r2
90 ; CHECK-T2-NEXT: adc.w r2, r1, r12
91 ; CHECK-T2-NEXT: eor.w r3, r1, r12
92 ; CHECK-T2-NEXT: eors r1, r2
93 ; CHECK-T2-NEXT: bics r1, r3
94 ; CHECK-T2-NEXT: cmp r1, #0
95 ; CHECK-T2-NEXT: mov.w r1, #-2147483648
96 ; CHECK-T2-NEXT: it mi
97 ; CHECK-T2-NEXT: asrmi r0, r2, #31
98 ; CHECK-T2-NEXT: it mi
99 ; CHECK-T2-NEXT: eormi.w r2, r1, r2, asr #31
100 ; CHECK-T2-NEXT: mov r1, r2
101 ; CHECK-T2-NEXT: bx lr
102 ;
103 ; CHECK-ARM-LABEL: func64:
104 ; CHECK-ARM: @ %bb.0:
105 ; CHECK-ARM-NEXT: ldr r12, [sp]
106 ; CHECK-ARM-NEXT: ldr r2, [sp, #4]
107 ; CHECK-ARM-NEXT: adds r0, r0, r12
108 ; CHECK-ARM-NEXT: eor r3, r1, r2
109 ; CHECK-ARM-NEXT: adc r2, r1, r2
110 ; CHECK-ARM-NEXT: eor r1, r1, r2
111 ; CHECK-ARM-NEXT: bic r1, r1, r3
112 ; CHECK-ARM-NEXT: cmp r1, #0
113 ; CHECK-ARM-NEXT: mov r1, #-2147483648
114 ; CHECK-ARM-NEXT: asrmi r0, r2, #31
115 ; CHECK-ARM-NEXT: eormi r2, r1, r2, asr #31
116 ; CHECK-ARM-NEXT: mov r1, r2
117 ; CHECK-ARM-NEXT: bx lr
118 %a = mul i64 %y, %z
119 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %z)
120 ret i64 %tmp
121 }
123 define signext i16 @func16(i16 signext %x, i16 signext %y, i16 signext %z) nounwind {
124 ; CHECK-T1-LABEL: func16:
125 ; CHECK-T1: @ %bb.0:
126 ; CHECK-T1-NEXT: muls r1, r2, r1
127 ; CHECK-T1-NEXT: sxth r1, r1
128 ; CHECK-T1-NEXT: adds r0, r0, r1
129 ; CHECK-T1-NEXT: ldr r1, .LCPI2_0
130 ; CHECK-T1-NEXT: cmp r0, r1
131 ; CHECK-T1-NEXT: blt .LBB2_2
132 ; CHECK-T1-NEXT: @ %bb.1:
133 ; CHECK-T1-NEXT: mov r0, r1
134 ; CHECK-T1-NEXT: .LBB2_2:
135 ; CHECK-T1-NEXT: ldr r1, .LCPI2_1
136 ; CHECK-T1-NEXT: cmp r0, r1
137 ; CHECK-T1-NEXT: bgt .LBB2_4
138 ; CHECK-T1-NEXT: @ %bb.3:
139 ; CHECK-T1-NEXT: mov r0, r1
140 ; CHECK-T1-NEXT: .LBB2_4:
141 ; CHECK-T1-NEXT: bx lr
142 ; CHECK-T1-NEXT: .p2align 2
143 ; CHECK-T1-NEXT: @ %bb.5:
144 ; CHECK-T1-NEXT: .LCPI2_0:
145 ; CHECK-T1-NEXT: .long 32767 @ 0x7fff
146 ; CHECK-T1-NEXT: .LCPI2_1:
147 ; CHECK-T1-NEXT: .long 4294934528 @ 0xffff8000
148 ;
149 ; CHECK-T2NODSP-LABEL: func16:
150 ; CHECK-T2NODSP: @ %bb.0:
151 ; CHECK-T2NODSP-NEXT: muls r1, r2, r1
152 ; CHECK-T2NODSP-NEXT: sxth r1, r1
153 ; CHECK-T2NODSP-NEXT: add r0, r1
154 ; CHECK-T2NODSP-NEXT: movw r1, #32767
155 ; CHECK-T2NODSP-NEXT: cmp r0, r1
156 ; CHECK-T2NODSP-NEXT: it lt
157 ; CHECK-T2NODSP-NEXT: movlt r1, r0
158 ; CHECK-T2NODSP-NEXT: movw r0, #32768
159 ; CHECK-T2NODSP-NEXT: movt r0, #65535
160 ; CHECK-T2NODSP-NEXT: cmn.w r1, #32768
161 ; CHECK-T2NODSP-NEXT: it gt
162 ; CHECK-T2NODSP-NEXT: movgt r0, r1
163 ; CHECK-T2NODSP-NEXT: bx lr
164 ;
165 ; CHECK-T2DSP-LABEL: func16:
166 ; CHECK-T2DSP: @ %bb.0:
167 ; CHECK-T2DSP-NEXT: muls r1, r2, r1
168 ; CHECK-T2DSP-NEXT: qadd16 r0, r0, r1
169 ; CHECK-T2DSP-NEXT: sxth r0, r0
170 ; CHECK-T2DSP-NEXT: bx lr
171 ;
172 ; CHECK-ARM-LABEL: func16:
173 ; CHECK-ARM: @ %bb.0:
174 ; CHECK-ARM-NEXT: smulbb r1, r1, r2
175 ; CHECK-ARM-NEXT: qadd16 r0, r0, r1
176 ; CHECK-ARM-NEXT: sxth r0, r0
177 ; CHECK-ARM-NEXT: bx lr
178 %a = mul i16 %y, %z
179 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %a)
180 ret i16 %tmp
181 }
183 define signext i8 @func8(i8 signext %x, i8 signext %y, i8 signext %z) nounwind {
184 ; CHECK-T1-LABEL: func8:
185 ; CHECK-T1: @ %bb.0:
186 ; CHECK-T1-NEXT: muls r1, r2, r1
187 ; CHECK-T1-NEXT: sxtb r1, r1
188 ; CHECK-T1-NEXT: adds r0, r0, r1
189 ; CHECK-T1-NEXT: movs r1, #127
190 ; CHECK-T1-NEXT: cmp r0, #127
191 ; CHECK-T1-NEXT: blt .LBB3_2
192 ; CHECK-T1-NEXT: @ %bb.1:
193 ; CHECK-T1-NEXT: mov r0, r1
194 ; CHECK-T1-NEXT: .LBB3_2:
195 ; CHECK-T1-NEXT: mvns r1, r1
196 ; CHECK-T1-NEXT: cmp r0, r1
197 ; CHECK-T1-NEXT: bgt .LBB3_4
198 ; CHECK-T1-NEXT: @ %bb.3:
199 ; CHECK-T1-NEXT: mov r0, r1
200 ; CHECK-T1-NEXT: .LBB3_4:
201 ; CHECK-T1-NEXT: bx lr
202 ;
203 ; CHECK-T2NODSP-LABEL: func8:
204 ; CHECK-T2NODSP: @ %bb.0:
205 ; CHECK-T2NODSP-NEXT: muls r1, r2, r1
206 ; CHECK-T2NODSP-NEXT: sxtb r1, r1
207 ; CHECK-T2NODSP-NEXT: add r0, r1
208 ; CHECK-T2NODSP-NEXT: cmp r0, #127
209 ; CHECK-T2NODSP-NEXT: it ge
210 ; CHECK-T2NODSP-NEXT: movge r0, #127
211 ; CHECK-T2NODSP-NEXT: cmn.w r0, #128
212 ; CHECK-T2NODSP-NEXT: it le
213 ; CHECK-T2NODSP-NEXT: mvnle r0, #127
214 ; CHECK-T2NODSP-NEXT: bx lr
215 ;
216 ; CHECK-T2DSP-LABEL: func8:
217 ; CHECK-T2DSP: @ %bb.0:
218 ; CHECK-T2DSP-NEXT: muls r1, r2, r1
219 ; CHECK-T2DSP-NEXT: qadd8 r0, r0, r1
220 ; CHECK-T2DSP-NEXT: sxtb r0, r0
221 ; CHECK-T2DSP-NEXT: bx lr
222 ;
223 ; CHECK-ARM-LABEL: func8:
224 ; CHECK-ARM: @ %bb.0:
225 ; CHECK-ARM-NEXT: smulbb r1, r1, r2
226 ; CHECK-ARM-NEXT: qadd8 r0, r0, r1
227 ; CHECK-ARM-NEXT: sxtb r0, r0
228 ; CHECK-ARM-NEXT: bx lr
229 %a = mul i8 %y, %z
230 %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %a)
231 ret i8 %tmp
232 }
234 define signext i4 @func4(i4 signext %x, i4 signext %y, i4 signext %z) nounwind {
235 ; CHECK-T1-LABEL: func4:
236 ; CHECK-T1: @ %bb.0:
237 ; CHECK-T1-NEXT: muls r1, r2, r1
238 ; CHECK-T1-NEXT: lsls r1, r1, #28
239 ; CHECK-T1-NEXT: asrs r1, r1, #28
240 ; CHECK-T1-NEXT: adds r0, r0, r1
241 ; CHECK-T1-NEXT: movs r1, #7
242 ; CHECK-T1-NEXT: cmp r0, #7
243 ; CHECK-T1-NEXT: blt .LBB4_2
244 ; CHECK-T1-NEXT: @ %bb.1:
245 ; CHECK-T1-NEXT: mov r0, r1
246 ; CHECK-T1-NEXT: .LBB4_2:
247 ; CHECK-T1-NEXT: mvns r1, r1
248 ; CHECK-T1-NEXT: cmp r0, r1
249 ; CHECK-T1-NEXT: bgt .LBB4_4
250 ; CHECK-T1-NEXT: @ %bb.3:
251 ; CHECK-T1-NEXT: mov r0, r1
252 ; CHECK-T1-NEXT: .LBB4_4:
253 ; CHECK-T1-NEXT: bx lr
254 ;
255 ; CHECK-T2NODSP-LABEL: func4:
256 ; CHECK-T2NODSP: @ %bb.0:
257 ; CHECK-T2NODSP-NEXT: muls r1, r2, r1
258 ; CHECK-T2NODSP-NEXT: lsls r1, r1, #28
259 ; CHECK-T2NODSP-NEXT: add.w r0, r0, r1, asr #28
260 ; CHECK-T2NODSP-NEXT: cmp r0, #7
261 ; CHECK-T2NODSP-NEXT: it ge
262 ; CHECK-T2NODSP-NEXT: movge r0, #7
263 ; CHECK-T2NODSP-NEXT: cmn.w r0, #8
264 ; CHECK-T2NODSP-NEXT: it le
265 ; CHECK-T2NODSP-NEXT: mvnle r0, #7
266 ; CHECK-T2NODSP-NEXT: bx lr
267 ;
268 ; CHECK-T2DSP-LABEL: func4:
269 ; CHECK-T2DSP: @ %bb.0:
270 ; CHECK-T2DSP-NEXT: muls r1, r2, r1
271 ; CHECK-T2DSP-NEXT: lsls r0, r0, #28
272 ; CHECK-T2DSP-NEXT: lsls r1, r1, #28
273 ; CHECK-T2DSP-NEXT: qadd r0, r0, r1
274 ; CHECK-T2DSP-NEXT: asrs r0, r0, #28
275 ; CHECK-T2DSP-NEXT: bx lr
276 ;
277 ; CHECK-ARM-LABEL: func4:
278 ; CHECK-ARM: @ %bb.0:
279 ; CHECK-ARM-NEXT: smulbb r1, r1, r2
280 ; CHECK-ARM-NEXT: lsl r0, r0, #28
281 ; CHECK-ARM-NEXT: lsl r1, r1, #28
282 ; CHECK-ARM-NEXT: qadd r0, r0, r1
283 ; CHECK-ARM-NEXT: asr r0, r0, #28
284 ; CHECK-ARM-NEXT: bx lr
285 %a = mul i4 %y, %z
286 %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %a)
287 ret i4 %tmp
288 }