1 ; RUN: llc -march=hexagon -enable-pipeliner < %s
4 ; Check that we correctly rename instructions that use a Phi's loop value,
5 ; and the Phi and loop value are defined after the instruction.
7 %s.0 = type { [4 x i8], i16, i16, i32, [8 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [4 x %s.1], [4 x i8], i32, i32, [4 x i8], [14 x %s.2] }
8 %s.1 = type { i32, i32 }
9 %s.2 = type { [4 x i8] }
11 ; Function Attrs: nounwind
12 define void @f0(%s.0* nocapture %a0) #0 {
14 br i1 undef, label %b1, label %b2
26 br i1 undef, label %b7, label %b5
29 br i1 undef, label %b6, label %b7
31 b6: ; preds = %b6, %b5
32 %v0 = phi i32 [ %v10, %b6 ], [ 0, %b5 ]
33 %v1 = load i32, i32* undef, align 4
34 %v2 = getelementptr inbounds %s.0, %s.0* %a0, i32 0, i32 29, i32 %v0
35 %v3 = bitcast %s.2* %v2 to i32*
36 %v4 = load i32, i32* %v3, align 4
37 %v5 = and i32 %v1, 65535
38 %v6 = and i32 %v4, -65536
40 %v8 = and i32 %v7, -2031617
42 store i32 %v9, i32* %v3, align 4
43 %v10 = add nsw i32 %v0, 1
44 %v11 = icmp eq i32 %v10, undef
45 br i1 %v11, label %b7, label %b6
47 b7: ; preds = %b6, %b5, %b4
50 b8: ; preds = %b8, %b2
51 br i1 undef, label %b9, label %b8
54 br i1 undef, label %b3, label %b4
57 attributes #0 = { nounwind "target-cpu"="hexagonv55" }