1 # RUN: llc %s -mtriple=m68k -start-after=prologepilog -O0 -filetype=obj \
2 # RUN: -code-model=small -relocation-model=pic -o - \
3 # RUN: | extract-section .text -h \
6 #------------------------------------------------------------------------------
7 # Test branch relaxation. By default codegen choses smallest branch instruction,
8 # during object code generation it might get clear that offset does not fit and
9 # bigger instruction is required.
10 #------------------------------------------------------------------------------
14 # The offset for the small branch is from the PC value, which points to the
15 # next instruction, because there is no extension word here.
17 # 002 CHECK-SAME: 23f9 0000 0000 0000 0000
18 # 00C CHECK-SAME: 23f9 0000 0000 0000 0000
19 # 016 CHECK-SAME: 23f9 0000 0000 0000 0000
20 # 020 CHECK-SAME: 23f9 0000 0000 0000 0000
21 # 02A CHECK-SAME: 23f9 0000 0000 0000 0000
22 # 034 CHECK-SAME: 23f9 0000 0000 0000 0000
23 # 03E CHECK-SAME: 23f9 0000 0000 0000 0000
24 # 048 CHECK-SAME: 23f9 0000 0000 0000 0000
25 # 052 CHECK-SAME: 23f9 0000 0000 0000 0000
26 # 05C CHECK-SAME: 23f9 0000 0000 0000 0000
27 # 066 CHECK-SAME: 23f9 0000 0000 0000 0000
28 # 070 CHECK-SAME: 23f9 0000 0000 0000 0000
29 # 07A CHECK-SAME: d0bc 0000 0000
30 # 080 CHECK-SAME: 4e75
38 MOV32bb 0, 0, implicit-def $ccr
39 MOV32bb 0, 0, implicit-def $ccr
40 MOV32bb 0, 0, implicit-def $ccr
41 MOV32bb 0, 0, implicit-def $ccr
42 MOV32bb 0, 0, implicit-def $ccr
43 MOV32bb 0, 0, implicit-def $ccr
44 MOV32bb 0, 0, implicit-def $ccr
45 MOV32bb 0, 0, implicit-def $ccr
46 MOV32bb 0, 0, implicit-def $ccr
47 MOV32bb 0, 0, implicit-def $ccr
48 MOV32bb 0, 0, implicit-def $ccr
49 MOV32bb 0, 0, implicit-def $ccr
51 $d0 = ADD32di $d0, 0, implicit-def $ccr
56 # 084 CHECK-SAME 6000 0084
57 # 088 CHECK-SAME: 23f9 0000 0000 0000 0000
58 # 092 CHECK-SAME: 23f9 0000 0000 0000 0000
59 # 09C CHECK-SAME: 23f9 0000 0000 0000 0000
60 # 0A6 CHECK-SAME: 23f9 0000 0000 0000 0000
61 # 0B0 CHECK-SAME: 23f9 0000 0000 0000 0000
62 # 0BA CHECK-SAME: 23f9 0000 0000 0000 0000
63 # 0C4 CHECK-SAME: 23f9 0000 0000 0000 0000
64 # 0CE CHECK-SAME: 23f9 0000 0000 0000 0000
65 # 0D8 CHECK-SAME: 23f9 0000 0000 0000 0000
66 # 0E2 CHECK-SAME: 23f9 0000 0000 0000 0000
67 # 0EC CHECK-SAME: 23f9 0000 0000 0000 0000
68 # 0F6 CHECK-SAME: 23f9 0000 0000 0000 0000
69 # 100 CHECK-SAME: 23f9 0000 0000 0000 0000
70 # 10A CHECK-SAME: d0bc 0000 0000
71 # 110 CHECK-SAME: 4e75
79 MOV32bb 0, 0, implicit-def $ccr
80 MOV32bb 0, 0, implicit-def $ccr
81 MOV32bb 0, 0, implicit-def $ccr
82 MOV32bb 0, 0, implicit-def $ccr
83 MOV32bb 0, 0, implicit-def $ccr
84 MOV32bb 0, 0, implicit-def $ccr
85 MOV32bb 0, 0, implicit-def $ccr
86 MOV32bb 0, 0, implicit-def $ccr
87 MOV32bb 0, 0, implicit-def $ccr
88 MOV32bb 0, 0, implicit-def $ccr
89 MOV32bb 0, 0, implicit-def $ccr
90 MOV32bb 0, 0, implicit-def $ccr
91 MOV32bb 0, 0, implicit-def $ccr
93 $d0 = ADD32di $d0, 0, implicit-def $ccr
98 # Because of the way M68k encodes branches it is not possible to encode 0
99 # offset with the smallest insruction(0 in the offset field means exension word
100 # is used) thus we switch to the wider instruction.
101 # 114 CHECK-SAME: 6000 0002
102 # 118 CHECK-SAME: d0bc 0000 0000
103 # 11E CHECK-SAME: 4e75
111 $d0 = ADD32di $d0, 0, implicit-def $ccr