1 ; RUN: llc -O2 -mtriple powerpc-ibm-aix-xcoff -stop-after=machine-cp -verify-machineinstrs < %s | \
2 ; RUN: FileCheck --check-prefix=32BIT %s
4 ; RUN: llc -O2 -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec \
5 ; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | \
6 ; RUN: FileCheck --check-prefix=ASM32 %s
8 define i32 @int_va_arg(i32 %a, ...) local_unnamed_addr {
10 %arg1 = alloca i8*, align 4
11 %arg2 = alloca i8*, align 4
12 %0 = bitcast i8** %arg1 to i8*
13 call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
14 %1 = bitcast i8** %arg2 to i8*
15 call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %1)
16 call void @llvm.va_start(i8* nonnull %0)
17 call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
18 %argp.cur = load i8*, i8** %arg1, align 4
19 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
20 store i8* %argp.next, i8** %arg1, align 4
21 %2 = bitcast i8* %argp.cur to i32*
22 %3 = load i32, i32* %2, align 4
23 %add = add nsw i32 %3, %a
24 %argp.cur2 = load i8*, i8** %arg2, align 4
25 %argp.next3 = getelementptr inbounds i8, i8* %argp.cur2, i32 4
26 store i8* %argp.next3, i8** %arg2, align 4
27 %4 = bitcast i8* %argp.cur2 to i32*
28 %5 = load i32, i32* %4, align 4
30 %add4 = add nsw i32 %add, %mul
31 call void @llvm.va_end(i8* nonnull %0)
32 call void @llvm.va_end(i8* nonnull %1)
33 call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1)
34 call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
38 declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
39 declare void @llvm.va_start(i8*)
40 declare void @llvm.va_copy(i8*, i8*)
41 declare void @llvm.va_end(i8*)
42 declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
44 ; 32BIT-LABEL: name: int_va_arg
45 ; 32BIT-LABEL; liveins:
46 ; 32BIT-DAG: - { reg: '$r3', virtual-reg: '' }
47 ; 32BIT-DAG: - { reg: '$r4', virtual-reg: '' }
48 ; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }
49 ; 32BIT-DAG: - { reg: '$r6', virtual-reg: '' }
50 ; 32BIT-DAG: - { reg: '$r7', virtual-reg: '' }
51 ; 32BIT-DAG: - { reg: '$r8', virtual-reg: '' }
52 ; 32BIT-DAG: - { reg: '$r9', virtual-reg: '' }
53 ; 32BIT-DAG: - { reg: '$r10', virtual-reg: '' }
55 ; 32BIT-LABEL: fixedStack:
56 ; 32BIT-DAG: - { id: 0, type: default, offset: 28, size: 4
59 ; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4
60 ; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4
62 ; 32BIT-LABEL: body: |
63 ; 32BIT-DAG: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
64 ; 32BIT-DAG: STW killed renamable $r4, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0)
65 ; 32BIT-DAG: STW killed renamable $r5, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
66 ; 32BIT-DAG: STW killed renamable $r6, 8, %fixed-stack.0 :: (store (s32))
67 ; 32BIT-DAG: STW killed renamable $r7, 12, %fixed-stack.0 :: (store (s32))
68 ; 32BIT-DAG: STW killed renamable $r8, 16, %fixed-stack.0 :: (store (s32))
69 ; 32BIT-DAG: STW killed renamable $r9, 20, %fixed-stack.0 :: (store (s32))
70 ; 32BIT-DAG: STW killed renamable $r10, 24, %fixed-stack.0 :: (store (s32))
71 ; 32BIT-DAG: STW killed renamable $r4, 0, %stack.1.arg2 :: (store (s32) into %ir.arg2)
72 ; 32BIT-DAG: renamable $r4 = ADDI %fixed-stack.0, 4
73 ; 32BIT-DAG: STW killed renamable $r11, 0, %stack.1.arg2 :: (store (s32) into %ir.1)
74 ; 32BIT-DAG: renamable $r11 = ADDI %fixed-stack.0, 0
75 ; 32BIT-DAG: STW renamable $r11, 0, %stack.0.arg1 :: (store (s32) into %ir.0)
76 ; 32BIT-DAG: STW renamable $r4, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
77 ; 32BIT-DAG: renamable $r6 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.2)
78 ; 32BIT-DAG: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.4)
79 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r6, killed renamable $r3
80 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
81 ; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $r3
83 ; ASM32-LABEL: .int_va_arg:
84 ; set up fixed stack frame for incoming va_args r4->r10
85 ; ASM32-DAG: stw 4, 28(1)
86 ; ASM32-DAG: stw 5, 32(1)
87 ; ASM32-DAG: stw 6, 36(1)
88 ; ASM32-DAG: stw 7, 40(1)
89 ; ASM32-DAG: stw 8, 44(1)
90 ; ASM32-DAG: stw 9, 48(1)
91 ; ASM32-DAG: stw 10, 52(1)
92 ; load of arg1 from fixed stack offset
93 ; ASM32-DAG: lwz [[ARG1:[0-9]+]], 28(1)
94 ; va_copy load of arg2 from fixed stack offset
95 ; ASM32-DAG: lwz [[ARG2:[0-9]+]], 28(1)
98 define i32 @int_stack_va_arg(i32 %one, i32 %two, i32 %three, i32 %four, i32 %five, i32 %six, i32 %seven, i32 %eight, ...) local_unnamed_addr {
100 %arg1 = alloca i8*, align 4
101 %arg2 = alloca i8*, align 4
102 %0 = bitcast i8** %arg1 to i8*
103 call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
104 %1 = bitcast i8** %arg2 to i8*
105 call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %1)
106 call void @llvm.va_start(i8* nonnull %0)
107 call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
108 %add = add nsw i32 %two, %one
109 %add2 = add nsw i32 %add, %three
110 %add3 = add nsw i32 %add2, %four
111 %add4 = add nsw i32 %add3, %five
112 %add5 = add nsw i32 %add4, %six
113 %add6 = add nsw i32 %add5, %seven
114 %add7 = add nsw i32 %add6, %eight
115 %argp.cur = load i8*, i8** %arg1, align 4
116 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
117 store i8* %argp.next, i8** %arg1, align 4
118 %2 = bitcast i8* %argp.cur to i32*
119 %3 = load i32, i32* %2, align 4
120 %add8 = add nsw i32 %add7, %3
121 %argp.cur9 = load i8*, i8** %arg2, align 4
122 %argp.next10 = getelementptr inbounds i8, i8* %argp.cur9, i32 4
123 store i8* %argp.next10, i8** %arg2, align 4
124 %4 = bitcast i8* %argp.cur9 to i32*
125 %5 = load i32, i32* %4, align 4
127 %add11 = add nsw i32 %add8, %mul
128 call void @llvm.va_end(i8* nonnull %0)
129 call void @llvm.va_end(i8* nonnull %1)
130 call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1)
131 call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
135 ; 32BIT-LABEL: name: int_stack_va_arg
136 ; 32BIT-LABEL: liveins:
137 ; 32BIT-DAG: - { reg: '$r3', virtual-reg: '' }
138 ; 32BIT-DAG: - { reg: '$r4', virtual-reg: '' }
139 ; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }
140 ; 32BIT-DAG: - { reg: '$r6', virtual-reg: '' }
141 ; 32BIT-DAG: - { reg: '$r7', virtual-reg: '' }
142 ; 32BIT-DAG: - { reg: '$r8', virtual-reg: '' }
143 ; 32BIT-DAG: - { reg: '$r9', virtual-reg: '' }
144 ; 32BIT-DAG: - { reg: '$r10', virtual-reg: '' }
146 ; 32BIT-LABEL: fixedStack:
147 ; 32BIT-DAG: - { id: 0, type: default, offset: 56, size: 4
149 ; 32BIT-LABEL: stack:
150 ; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4
151 ; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4
153 ; 32BIT-LABEL: body: |
154 ; 32BIT-DAG: liveins: $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10
155 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r4
156 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r5
157 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r6
158 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r7
159 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r8
160 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r9
161 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, killed renamable $r10
162 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r4, killed renamable $r3
163 ; 32BIT-DAG: renamable $r4 = ADDI %fixed-stack.0, 0
164 ; 32BIT-DAG: STW killed renamable $r4, 0, %stack.0.arg1 :: (store (s32) into %ir.arg1)
165 ; 32BIT-DAG: renamable $r3 = nsw ADD4 killed renamable $r3, renamable $r4
166 ; 32BIT-DAG: renamable $r4 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.4, align 8)
167 ; 32BIT-DAG: renamable $r11 = LI 4
168 ; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $r3
170 ; ASM32-LABEL: .int_stack_va_arg:
171 ; ASM32-DAG: add 3, 4, 3
172 ; ASM32-DAG: add 3, 3, 5
173 ; ASM32-DAG: add 3, 3, 6
174 ; ASM32-DAG: add 3, 3, 7
175 ; ASM32-DAG: add 3, 3, 8
176 ; ASM32-DAG: add 3, 3, 9
177 ; ASM32-DAG: add 3, 3, 10
178 ; ASM32-DAG: lwz [[ARG1:[0-9]+]], 56(1)
179 ; ASM32-DAG: li [[ARG2:[0-9]+]], [[ARG1]]
180 ; ASM32-DAG: add 3, 3, [[ARG1:[0-9]+]]
181 ; ASM32-DAG: add 3, 3, [[ARG2:[0-9]+]]
184 define double @double_va_arg(double %a, ...) local_unnamed_addr {
186 %arg1 = alloca i8*, align 4
187 %arg2 = alloca i8*, align 4
188 %0 = bitcast i8** %arg1 to i8*
189 call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
190 %1 = bitcast i8** %arg2 to i8*
191 call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %1)
192 call void @llvm.va_start(i8* nonnull %0)
193 call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
194 %argp.cur = load i8*, i8** %arg1, align 4
195 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 8
196 store i8* %argp.next, i8** %arg1, align 4
197 %2 = bitcast i8* %argp.cur to double*
198 %3 = load double, double* %2, align 4
199 %add = fadd double %3, %a
200 %argp.cur2 = load i8*, i8** %arg2, align 4
201 %argp.next3 = getelementptr inbounds i8, i8* %argp.cur2, i32 8
202 store i8* %argp.next3, i8** %arg2, align 4
203 %4 = bitcast i8* %argp.cur2 to double*
204 %5 = load double, double* %4, align 4
205 %mul = fmul double %5, 2.000000e+00
206 %add4 = fadd double %add, %mul
207 call void @llvm.va_end(i8* nonnull %0)
208 call void @llvm.va_end(i8* nonnull %1)
209 call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1)
210 call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
214 ; 32BIT-LABEL: name: double_va_arg
215 ; 32BIT-LABEL: liveins:
216 ; 32BIT-DAG: - { reg: '$f1', virtual-reg: '' }
217 ; 32BIT-DAG: - { reg: '$r5', virtual-reg: '' }
218 ; 32BIT-DAG: - { reg: '$r6', virtual-reg: '' }
219 ; 32BIT-DAG: - { reg: '$r7', virtual-reg: '' }
220 ; 32BIT-DAG: - { reg: '$r8', virtual-reg: '' }
221 ; 32BIT-DAG: - { reg: '$r9', virtual-reg: '' }
222 ; 32BIT-DAG: - { reg: '$r10', virtual-reg: '' }
224 ; 32BIT-LABEL: fixedStack:
225 ; 32BIT-DAG: - { id: 0, type: default, offset: 32, size: 4
227 ; 32BIT-LABEL: stack:
228 ; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4
229 ; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4
231 ; 32BIT-LABEL: body: |
232 ; 32BIT-DAG: liveins: $f1, $r5, $r6, $r7, $r8, $r9, $r10
233 ; 32BIT-DAG: renamable $r3 = ADDI %fixed-stack.0, 0
234 ; 32BIT-DAG: STW renamable $r5, 0, %fixed-stack.0 :: (store (s32) into %fixed-stack.0, align 16)
235 ; 32BIT-DAG: STW renamable $r6, 4, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 4)
236 ; 32BIT-DAG: STW killed renamable $r7, 8, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 8, align 8)
237 ; 32BIT-DAG: STW killed renamable $r8, 12, %fixed-stack.0 :: (store (s32))
238 ; 32BIT-DAG: STW killed renamable $r9, 16, %fixed-stack.0 :: (store (s32) into %fixed-stack.0 + 16, align 16)
239 ; 32BIT-DAG: STW killed renamable $r10, 20, %fixed-stack.0 :: (store (s32))
240 ; 32BIT-DAG: STW renamable $r3, 0, %stack.0.arg1 :: (store (s32) into %ir.0)
241 ; 32BIT-DAG: STW killed renamable $r3, 0, %stack.1.arg2 :: (store (s32) into %ir.1)
242 ; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $f1
244 ; ASM32-LABEL: .double_va_arg:
245 ; ASM32-DAG: stw 5, 32(1)
246 ; ASM32-DAG: stw 6, 36(1)
247 ; ASM32-DAG: stw 7, 40(1)
248 ; ASM32-DAG: stw 8, 44(1)
249 ; ASM32-DAG: stw 9, 48(1)
250 ; ASM32-DAG: stw 10, 52(1)
251 ; ASM32-DAG: stw [[ARG1A:[0-9]+]], -12(1)
252 ; ASM32-DAG: stw [[ARG1B:[0-9]+]], -16(1)
253 ; ASM32-DAG: stw [[ARG2A:[0-9]+]], -20(1)
254 ; ASM32-DAG: stw [[ARG2B:[0-9]+]], -24(1)
255 ; ASM32-DAG: lfd [[ARG1:[0-9]+]], -16(1)
256 ; ASM32-DAG: fadd 0, [[ARG1]], 1
257 ; ASM32-DAG: fadd 1, 1, 1
258 ; ASM32-DAG: lfd [[ARG2:[0-9]+]], -24(1)
259 ; ASM32-DAG: fadd 1, 0, [[ARG2]]
262 define double @double_stack_va_arg(double %one, double %two, double %three, double %four, double %five, double %six, double %seven, double %eight, double %nine, double %ten, double %eleven, double %twelve, double %thirteen, ...) local_unnamed_addr {
264 %arg1 = alloca i8*, align 4
265 %arg2 = alloca i8*, align 4
266 %0 = bitcast i8** %arg1 to i8*
267 call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0)
268 %1 = bitcast i8** %arg2 to i8*
269 call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %1)
270 call void @llvm.va_start(i8* nonnull %0)
271 call void @llvm.va_copy(i8* nonnull %1, i8* nonnull %0)
272 %add = fadd double %one, %two
273 %add2 = fadd double %add, %three
274 %add3 = fadd double %add2, %four
275 %add4 = fadd double %add3, %five
276 %add5 = fadd double %add4, %six
277 %add6 = fadd double %add5, %seven
278 %add7 = fadd double %add6, %eight
279 %add8 = fadd double %add7, %nine
280 %add9 = fadd double %add8, %ten
281 %add10 = fadd double %add9, %eleven
282 %add11 = fadd double %add10, %twelve
283 %add12 = fadd double %add11, %thirteen
284 %2 = bitcast i8** %arg1 to double**
285 %argp.cur1 = load double*, double** %2, align 4
286 %3 = load double, double* %argp.cur1, align 4
287 %add13 = fadd double %add12, %3
288 %4 = bitcast i8** %arg2 to double**
289 %argp.cur142 = load double*, double** %4, align 4
290 %5 = load double, double* %argp.cur142, align 4
291 %mul = fmul double %5, 2.000000e+00
292 %add16 = fadd double %add13, %mul
293 call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %1)
294 call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0)
298 ; 32BIT-LABEL: name: double_stack_va_arg
299 ; 32BIT-LABEL: liveins:
300 ; 32BIT-DAG: - { reg: '$f1', virtual-reg: '' }
301 ; 32BIT-DAG: - { reg: '$f2', virtual-reg: '' }
302 ; 32BIT-DAG: - { reg: '$f3', virtual-reg: '' }
303 ; 32BIT-DAG: - { reg: '$f4', virtual-reg: '' }
304 ; 32BIT-DAG: - { reg: '$f5', virtual-reg: '' }
305 ; 32BIT-DAG: - { reg: '$f6', virtual-reg: '' }
306 ; 32BIT-DAG: - { reg: '$f7', virtual-reg: '' }
307 ; 32BIT-DAG: - { reg: '$f8', virtual-reg: '' }
308 ; 32BIT-DAG: - { reg: '$f9', virtual-reg: '' }
309 ; 32BIT-DAG: - { reg: '$f10', virtual-reg: '' }
310 ; 32BIT-DAG: - { reg: '$f11', virtual-reg: '' }
311 ; 32BIT-DAG: - { reg: '$f12', virtual-reg: '' }
312 ; 32BIT-DAG: - { reg: '$f13', virtual-reg: '' }
314 ; 32BIT-LABEL: fixedStack:
315 ; 32BIT-DAG: - { id: 0, type: default, offset: 128, size: 4
317 ; 32BIT-LABEL: stack:
318 ; 32BIT-DAG: - { id: 0, name: arg1, type: default, offset: 0, size: 4, alignment: 4,
319 ; 32BIT-DAG: - { id: 1, name: arg2, type: default, offset: 0, size: 4, alignment: 4,
320 ; 32BIT-DAG: - { id: 2, name: '', type: default, offset: 0, size: 8, alignment: 8,
321 ; 32BIT-DAG: - { id: 3, name: '', type: default, offset: 0, size: 8, alignment: 8,
323 ; 32BIT-LABEL: body: |
324 ; 32BIT-DAG: liveins: $f1, $f2, $f3, $f4, $f5, $f6, $f7, $f8, $f9, $f10, $f11, $f12, $f13
325 ; 32BIT-DAG: renamable $r3 = ADDI %fixed-stack.0, 0
326 ; 32BIT-DAG: STW killed renamable $r3, 0, %stack.0.arg1 :: (store (s32) into %ir.0)
327 ; 32BIT-DAG: renamable $r3 = LWZ 0, %fixed-stack.0 :: (load (s32) from %ir.argp.cur142, align 16)
328 ; 32BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
329 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f1, killed renamable $f2, implicit $rm
330 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f3, implicit $rm
331 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f4, implicit $rm
332 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f5, implicit $rm
333 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f6, implicit $rm
334 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f7, implicit $rm
335 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f8, implicit $rm
336 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f9, implicit $rm
337 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f10, implicit $rm
338 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f11, implicit $rm
339 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f12, implicit $rm
340 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f13, implicit $rm
341 ; 32BIT-DAG: renamable $r4 = LWZ 4, %fixed-stack.0 :: (load (s32) from %ir.argp.cur1 + 4)
342 ; 32BIT-DAG: STW renamable $r4, 4, %stack.2 :: (store (s32) into %stack.2 + 4)
343 ; 32BIT-DAG: renamable $f1 = LFD 0, %stack.2 :: (load (s64) from %stack.2)
344 ; 32BIT-DAG: STW killed renamable $r3, 0, %stack.3 :: (store (s32) into %stack.3, align 8)
345 ; 32BIT-DAG: STW killed renamable $r4, 4, %stack.3 :: (store (s32) into %stack.3 + 4)
346 ; 32BIT-DAG: renamable $f2 = LFD 0, %stack.3 :: (load (s64) from %stack.3)
347 ; 32BIT-DAG: renamable $f0 = nofpexcept FADD killed renamable $f0, killed renamable $f1, implicit $rm
348 ; 32BIT-DAG: STW renamable $r3, 0, %stack.2 :: (store (s32) into %stack.2, align 8)
349 ; 32BIT-DAG: renamable $f1 = nofpexcept FADD killed renamable $f2, renamable $f2, implicit $rm
350 ; 32BIT-DAG: BLR implicit $lr, implicit $rm, implicit $f1
352 ; ASM32-LABEL: .double_stack_va_arg:
353 ; ASM32-DAG: fadd 0, 1, 2
354 ; ASM32-DAG: fadd 0, 0, 3
355 ; ASM32-DAG: fadd 0, 0, 4
356 ; ASM32-DAG: fadd 0, 0, 5
357 ; ASM32-DAG: fadd 0, 0, 6
358 ; ASM32-DAG: fadd 0, 0, 7
359 ; ASM32-DAG: fadd 0, 0, 8
360 ; ASM32-DAG: fadd 0, 0, 9
361 ; ASM32-DAG: fadd 0, 0, 10
362 ; ASM32-DAG: fadd 0, 0, 11
363 ; ASM32-DAG: fadd 0, 0, 12
364 ; ASM32-DAG: fadd 0, 0, 13
365 ; ASM32-DAG: lwz [[ARG1:[0-9]+]], 128(1)
366 ; ASM32-DAG: lwz [[ARG2:[0-9]+]], 132(1)
367 ; ASM32-DAG: lfd [[ARG1:[0-9]+]], -16(1)
368 ; ASM32-DAG: lfd [[ARG2:[0-9]+]], -24(1)
369 ; ASM32-DAG: fadd 0, 0, [[ARG1]]
370 ; ASM32-DAG: fadd [[ARG1]], 0, [[ARG2]]