| blob | b8f99ec08a294d32277f9d268afd5eef32aded87 |
1 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck -check-prefixes=CHECK,CHECKLX %s
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECK,CHECKAIX %s
3 ; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECK,CHECKAIX32 %s
5 ; The instructions ADDIStocHA8/LDtocL are used to calculate the address of
6 ; globals. The ones that are in bb.3.if.end could not be hoisted by Machine
7 ; LICM due to BCTRL_LDinto_toc in bb2.if.then. This call causes the compiler
8 ; to insert a save TOC to stack before the call and load into X2 to restore TOC
9 ; after. By communicating to Machine LICM that X2 is guaranteed to have the
10 ; same value before and after BCTRL_LDinto_toc, these instructions can be
11 ; hoisted out of bb.3.if.end to outside of the loop.
13 ; Pre Machine LICM MIR
14 ;
15 ;body:
16 ; bb.0.entry:
17 ; successors: %bb.2.if.then(0x40000000), %bb.3.if.end(0x40000000)
18 ; liveins: %x3
19 ;
20 ; %4 = COPY %x3
21 ; %5 = ADDIStocHA8 %x2, @ga
22 ; %6 = LDtocL @ga, killed %5 :: (load (s64) from got)
23 ; %7 = LWZ 0, %6 :: (volatile dereferenceable load (s32) from @ga)
24 ; %8 = ADDIStocHA8 %x2, @gb
25 ; %9 = LDtocL @gb, killed %8 :: (load (s64) from got)
26 ; %10 = LWZ 0, killed %9 :: (volatile dereferenceable load (s32) from @gb)
27 ; %0 = LWZ 0, %6 :: (volatile dereferenceable load (s32) from @ga)
28 ; %11 = CMPW killed %7, killed %10
29 ; BCC 44, killed %11, %bb.2.if.then
30 ; B %bb.3.if.end
31 ;
32 ; bb.2.if.then:
33 ; %1 = PHI %0, %bb.0.entry, %3, %bb.3.if.end
34 ; ADJCALLSTACKDOWN 32, 0, implicit-def dead %r1, implicit %r1
35 ; %20 = COPY %x2
36 ; STD %20, 24, %x1 :: (store (s64) into stack + 24)
37 ; %21 = EXTSW_32_64 %1
38 ; %x3 = COPY %21
39 ; %x12 = COPY %4
40 ; MTCTR8 %4, implicit-def %ctr8
41 ; BCTRL8_LDinto_toc 24, %x1, csr_ppc64_altivec, implicit-def dead %lr8, implicit-def dead %x2, implicit %ctr8, implicit %rm, implicit %x3, implicit %x12, implicit %x2, implicit-def %r1, implicit-def %x3
42 ; ADJCALLSTACKUP 32, 0, implicit-def dead %r1, implicit %r1
43 ; %22 = COPY %x3
44 ; %x3 = COPY %22
45 ; BLR8 implicit %lr8, implicit %rm, implicit %x3
46 ;
47 ; bb.3.if.end:
48 ; successors: %bb.2.if.then(0x04000000), %bb.3.if.end(0x7c000000)
49 ;
50 ; %2 = PHI %0, %bb.0.entry, %3, %bb.3.if.end
51 ; %12 = ADDI %2, 1
52 ; %13 = ADDIStocHA8 %x2, @ga
53 ; %14 = LDtocL @ga, killed %13 :: (load (s64) from got)
54 ; STW killed %12, 0, %14 :: (volatile store (s32) into @ga)
55 ; %15 = LWZ 0, %14 :: (volatile dereferenceable load (s32) from @ga)
56 ; %16 = ADDIStocHA8 %x2, @gb
57 ; %17 = LDtocL @gb, killed %16 :: (load (s64) from got)
58 ; %18 = LWZ 0, killed %17 :: (volatile dereferenceable load (s32) from @gb)
59 ; %3 = LWZ 0, %14 :: (volatile dereferenceable load (s32) from @ga)
60 ; %19 = CMPW killed %15, killed %18
61 ; BCC 44, killed %19, %bb.2.if.then
62 ; B %bb.3.if.end
64 @ga = external global i32, align 4
65 @gb = external global i32, align 4
66 define signext i32 @test(i32 (i32)* nocapture %FP) local_unnamed_addr #0 {
67 ; CHECK-LABEL: test:
68 ; CHECK: # %bb.0: # %entry
69 ; CHECK-NEXT: mflr 0
70 ; CHECKLX: addis 4, 2, .LC0@toc@ha
71 ; CHECKLX-NEXT: addis 5, 2, .LC1@toc@ha
72 ; CHECKLX-NEXT: mr 12, 3
73 ; CHECKLX-NEXT: ld 4, .LC0@toc@l(4)
74 ; CHECKLX-NEXT: ld 5, .LC1@toc@l(5)
75 ; CHECKLX-NEXT: lwz 6, 0(4)
76 ; CHECKLX-NEXT: lwz 7, 0(5)
77 ; CHECKLX-NEXT: cmpw 6, 7
78 ; CHECKLX-NEXT: lwz 6, 0(4)
79 ; CHECKLX-NEXT: bgt 0, .LBB0_2
80 ; CHECKLX-NOT: addis {{[0-9]+}}, 2, .LC0@toc@ha
81 ; CHECKLX-NOT: addis {{[0-9]+}}, 2, .LC1@toc@ha
82 ; CHECKLX-NEXT: .p2align 5
83 ; CHECKLX-NEXT: .LBB0_1: # %if.end
84 ; CHECKLX-NOT: addis {{[0-9]+}}, 2, .LC0@toc@ha
85 ; CHECKLX-NOT: addis {{[0-9]+}}, 2, .LC1@toc@ha
86 ; CHECKAIX: ld 5, L..C0(2)
87 ; CHECKAIX-NEXT: ld 6, L..C1(2)
88 ; CHECKAIX-NEXT: L..BB0_1: # %if.end
89 ; CHECKAIX-NOT: ld {{[0-9]+}}, L..C0(2)
90 ; CHECKAIX-NOT: ld {{[0-9]+}}, L..C1(2)
91 ; CHECKAIX32: lwz 5, L..C0(2)
92 ; CHECKAIX32-NEXT: lwz 6, L..C1(2)
93 ; CHECKAIX32-NEXT: L..BB0_1: # %if.end
94 ; CHECKAIX32-NOT: lwz 5, L..C0(2)
95 ; CHECKAIX32-NOT: lwz 6, L..C1(2)
96 ; CHECK: blr
97 entry:
98 %0 = load volatile i32, i32* @ga, align 4
99 %1 = load volatile i32, i32* @gb, align 4
100 %cmp1 = icmp sgt i32 %0, %1
101 %2 = load volatile i32, i32* @ga, align 4
102 br i1 %cmp1, label %if.then, label %if.end
104 if.then: ; preds = %if.end, %entry
105 %.lcssa = phi i32 [ %2, %entry ], [ %6, %if.end ]
106 %call = tail call signext i32 %FP(i32 signext %.lcssa) #1
107 ret i32 %call
109 if.end: ; preds = %entry, %if.end
110 %3 = phi i32 [ %6, %if.end ], [ %2, %entry ]
111 %inc = add nsw i32 %3, 1
112 store volatile i32 %inc, i32* @ga, align 4
113 %4 = load volatile i32, i32* @ga, align 4
114 %5 = load volatile i32, i32* @gb, align 4
115 %cmp = icmp sgt i32 %4, %5
116 %6 = load volatile i32, i32* @ga, align 4
117 br i1 %cmp, label %if.then, label %if.end
118 }