| blob | b4166bde22ab85f01477224e8937e82ca50cd0d1 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3 ; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4 ; RUN: FileCheck %s
5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
6 ; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-BE
9 ; This test case tests spilling the CR GT bit on Power10. On Power10, this is
10 ; achieved by setb %reg, %CRREG (gt bit) -> stw %reg, $FI instead of:
11 ; mfocrf %reg, %CRREG -> rlwinm %reg1, %reg, $SH, 0, 0 -> stw %reg1, $FI.
13 ; Without fine-grained control over clobbering individual CR bits,
14 ; it is difficult to produce a concise test case that will ensure a specific
15 ; bit of any CR field is spilled. We need to test the spilling of a CR bit
16 ; other than the LT bit. Hence this test case is rather complex.
18 define dso_local fastcc void @P10_Spill_CR_GT() unnamed_addr {
19 ; CHECK-LABEL: P10_Spill_CR_GT:
20 ; CHECK: .localentry P10_Spill_CR_GT, 1
21 ; CHECK-NEXT: # %bb.0: # %bb
22 ; CHECK-NEXT: mflr r0
23 ; CHECK-NEXT: mfcr r12
24 ; CHECK-NEXT: std r0, 16(r1)
25 ; CHECK-NEXT: stw r12, 8(r1)
26 ; CHECK-NEXT: stdu r1, -64(r1)
27 ; CHECK-NEXT: .cfi_def_cfa_offset 64
28 ; CHECK-NEXT: .cfi_offset lr, 16
29 ; CHECK-NEXT: .cfi_offset r29, -24
30 ; CHECK-NEXT: .cfi_offset r30, -16
31 ; CHECK-NEXT: .cfi_offset cr2, 8
32 ; CHECK-NEXT: .cfi_offset cr3, 8
33 ; CHECK-NEXT: .cfi_offset cr4, 8
34 ; CHECK-NEXT: lwz r3, 0(r3)
35 ; CHECK-NEXT: std r29, 40(r1) # 8-byte Folded Spill
36 ; CHECK-NEXT: std r30, 48(r1) # 8-byte Folded Spill
37 ; CHECK-NEXT: paddi r29, 0, .LJTI0_0@PCREL, 1
38 ; CHECK-NEXT: srwi r4, r3, 4
39 ; CHECK-NEXT: srwi r3, r3, 5
40 ; CHECK-NEXT: andi. r4, r4, 1
41 ; CHECK-NEXT: li r4, 0
42 ; CHECK-NEXT: crmove 4*cr2+gt, gt
43 ; CHECK-NEXT: andi. r3, r3, 1
44 ; CHECK-NEXT: crmove 4*cr2+lt, gt
45 ; CHECK-NEXT: cmplwi cr3, r3, 336
46 ; CHECK-NEXT: li r3, 0
47 ; CHECK-NEXT: sldi r30, r3, 2
48 ; CHECK-NEXT: b .LBB0_2
49 ; CHECK-NEXT: .LBB0_1: # %bb43
50 ; CHECK-NEXT: #
51 ; CHECK-NEXT: bl call_1@notoc
52 ; CHECK-NEXT: li r4, 0
53 ; CHECK-NEXT: setnbc r3, 4*cr4+eq
54 ; CHECK-NEXT: stb r4, 0(r3)
55 ; CHECK-NEXT: li r4, 0
56 ; CHECK-NEXT: .p2align 4
57 ; CHECK-NEXT: .LBB0_2: # %bb5
58 ; CHECK-NEXT: #
59 ; CHECK-NEXT: bc 12, 4*cr2+gt, .LBB0_31
60 ; CHECK-NEXT: # %bb.3: # %bb10
61 ; CHECK-NEXT: #
62 ; CHECK-NEXT: bgt cr3, .LBB0_5
63 ; CHECK-NEXT: # %bb.4: # %bb10
64 ; CHECK-NEXT: #
65 ; CHECK-NEXT: mr r3, r4
66 ; CHECK-NEXT: lwz r5, 0(r3)
67 ; CHECK-NEXT: rlwinm r4, r5, 0, 21, 22
68 ; CHECK-NEXT: cmpwi cr4, r4, 512
69 ; CHECK-NEXT: lwax r4, r30, r29
70 ; CHECK-NEXT: add r4, r4, r29
71 ; CHECK-NEXT: mtctr r4
72 ; CHECK-NEXT: li r4, 0
73 ; CHECK-NEXT: bctr
74 ; CHECK-NEXT: .LBB0_5: # %bb13
75 ; CHECK-NEXT: #
76 ; CHECK-NEXT: li r4, 16
77 ; CHECK-NEXT: b .LBB0_2
78 ; CHECK-NEXT: .p2align 4
79 ; CHECK-NEXT: .LBB0_6: # %bb22
80 ; CHECK-NEXT: #
81 ; CHECK-NEXT: b .LBB0_6
82 ; CHECK-NEXT: .p2align 4
83 ; CHECK-NEXT: .LBB0_7: # %bb28
84 ; CHECK-NEXT: #
85 ; CHECK-NEXT: b .LBB0_7
86 ; CHECK-NEXT: .p2align 4
87 ; CHECK-NEXT: .LBB0_8: # %bb52
88 ; CHECK-NEXT: #
89 ; CHECK-NEXT: b .LBB0_8
90 ; CHECK-NEXT: .p2align 4
91 ; CHECK-NEXT: .LBB0_9: # %bb17
92 ; CHECK-NEXT: #
93 ; CHECK-NEXT: b .LBB0_9
94 ; CHECK-NEXT: .p2align 4
95 ; CHECK-NEXT: .LBB0_10: # %bb26
96 ; CHECK-NEXT: #
97 ; CHECK-NEXT: b .LBB0_10
98 ; CHECK-NEXT: .p2align 4
99 ; CHECK-NEXT: .LBB0_11: # %bb42
100 ; CHECK-NEXT: #
101 ; CHECK-NEXT: b .LBB0_11
102 ; CHECK-NEXT: .p2align 4
103 ; CHECK-NEXT: .LBB0_12: # %bb54
104 ; CHECK-NEXT: #
105 ; CHECK-NEXT: b .LBB0_12
106 ; CHECK-NEXT: .p2align 4
107 ; CHECK-NEXT: .LBB0_13: # %bb61
108 ; CHECK-NEXT: #
109 ; CHECK-NEXT: b .LBB0_13
110 ; CHECK-NEXT: .p2align 4
111 ; CHECK-NEXT: .LBB0_14: # %bb47
112 ; CHECK-NEXT: #
113 ; CHECK-NEXT: b .LBB0_14
114 ; CHECK-NEXT: .p2align 4
115 ; CHECK-NEXT: .LBB0_15: # %bb24
116 ; CHECK-NEXT: #
117 ; CHECK-NEXT: b .LBB0_15
118 ; CHECK-NEXT: .p2align 4
119 ; CHECK-NEXT: .LBB0_16: # %bb19
120 ; CHECK-NEXT: #
121 ; CHECK-NEXT: b .LBB0_16
122 ; CHECK-NEXT: .p2align 4
123 ; CHECK-NEXT: .LBB0_17: # %bb59
124 ; CHECK-NEXT: #
125 ; CHECK-NEXT: b .LBB0_17
126 ; CHECK-NEXT: .p2align 4
127 ; CHECK-NEXT: .LBB0_18: # %bb46
128 ; CHECK-NEXT: #
129 ; CHECK-NEXT: b .LBB0_18
130 ; CHECK-NEXT: .p2align 4
131 ; CHECK-NEXT: .LBB0_19: # %bb49
132 ; CHECK-NEXT: #
133 ; CHECK-NEXT: b .LBB0_19
134 ; CHECK-NEXT: .p2align 4
135 ; CHECK-NEXT: .LBB0_20: # %bb57
136 ; CHECK-NEXT: #
137 ; CHECK-NEXT: b .LBB0_20
138 ; CHECK-NEXT: .p2align 4
139 ; CHECK-NEXT: .LBB0_21: # %bb18
140 ; CHECK-NEXT: #
141 ; CHECK-NEXT: b .LBB0_21
142 ; CHECK-NEXT: .p2align 4
143 ; CHECK-NEXT: .LBB0_22: # %bb58
144 ; CHECK-NEXT: #
145 ; CHECK-NEXT: b .LBB0_22
146 ; CHECK-NEXT: .p2align 4
147 ; CHECK-NEXT: .LBB0_23: # %bb23
148 ; CHECK-NEXT: #
149 ; CHECK-NEXT: b .LBB0_23
150 ; CHECK-NEXT: .p2align 4
151 ; CHECK-NEXT: .LBB0_24: # %bb60
152 ; CHECK-NEXT: #
153 ; CHECK-NEXT: b .LBB0_24
154 ; CHECK-NEXT: .p2align 4
155 ; CHECK-NEXT: .LBB0_25: # %bb55
156 ; CHECK-NEXT: #
157 ; CHECK-NEXT: b .LBB0_25
158 ; CHECK-NEXT: .p2align 4
159 ; CHECK-NEXT: .LBB0_26: # %bb62
160 ; CHECK-NEXT: #
161 ; CHECK-NEXT: b .LBB0_26
162 ; CHECK-NEXT: .p2align 4
163 ; CHECK-NEXT: .LBB0_27: # %bb56
164 ; CHECK-NEXT: #
165 ; CHECK-NEXT: b .LBB0_27
166 ; CHECK-NEXT: .p2align 4
167 ; CHECK-NEXT: .LBB0_28: # %bb20
168 ; CHECK-NEXT: #
169 ; CHECK-NEXT: b .LBB0_28
170 ; CHECK-NEXT: .p2align 4
171 ; CHECK-NEXT: .LBB0_29: # %bb50
172 ; CHECK-NEXT: #
173 ; CHECK-NEXT: b .LBB0_29
174 ; CHECK-NEXT: .p2align 4
175 ; CHECK-NEXT: .LBB0_30: # %bb48
176 ; CHECK-NEXT: #
177 ; CHECK-NEXT: b .LBB0_30
178 ; CHECK-NEXT: .LBB0_31: # %bb9
179 ; CHECK-NEXT: ld r30, 48(r1) # 8-byte Folded Reload
180 ; CHECK-NEXT: ld r29, 40(r1) # 8-byte Folded Reload
181 ; CHECK-NEXT: addi r1, r1, 64
182 ; CHECK-NEXT: ld r0, 16(r1)
183 ; CHECK-NEXT: lwz r12, 8(r1)
184 ; CHECK-NEXT: mtlr r0
185 ; CHECK-NEXT: mtocrf 32, r12
186 ; CHECK-NEXT: mtocrf 16, r12
187 ; CHECK-NEXT: mtocrf 8, r12
188 ; CHECK-NEXT: blr
189 ; CHECK-NEXT: .LBB0_32: # %bb29
190 ; CHECK-NEXT: mcrf cr0, cr4
191 ; CHECK-NEXT: cmpwi cr3, r5, 366
192 ; CHECK-NEXT: cmpwi cr4, r3, 0
193 ; CHECK-NEXT: li r29, 0
194 ; CHECK-NEXT: setnbc r30, eq
195 ; CHECK-NEXT: bc 12, 4*cr2+lt, .LBB0_36
196 ; CHECK-NEXT: .p2align 5
197 ; CHECK-NEXT: .LBB0_33: # %bb36
198 ; CHECK-NEXT: bc 12, 4*cr4+eq, .LBB0_35
199 ; CHECK-NEXT: .LBB0_34: # %bb32
200 ; CHECK-NEXT: bc 4, 4*cr2+lt, .LBB0_33
201 ; CHECK-NEXT: b .LBB0_36
202 ; CHECK-NEXT: .p2align 5
203 ; CHECK-NEXT: .LBB0_35: # %bb39
204 ; CHECK-NEXT: bl call_2@notoc
205 ; CHECK-NEXT: bc 4, 4*cr2+lt, .LBB0_33
206 ; CHECK-NEXT: .LBB0_36: # %bb33
207 ; CHECK-NEXT: stb r29, 0(r30)
208 ; CHECK-NEXT: bc 4, 4*cr4+eq, .LBB0_34
209 ; CHECK-NEXT: b .LBB0_35
210 ;
211 ; CHECK-BE-LABEL: P10_Spill_CR_GT:
212 ; CHECK-BE: # %bb.0: # %bb
213 ; CHECK-BE-NEXT: mflr r0
214 ; CHECK-BE-NEXT: mfcr r12
215 ; CHECK-BE-NEXT: std r0, 16(r1)
216 ; CHECK-BE-NEXT: stw r12, 8(r1)
217 ; CHECK-BE-NEXT: stdu r1, -144(r1)
218 ; CHECK-BE-NEXT: .cfi_def_cfa_offset 144
219 ; CHECK-BE-NEXT: .cfi_offset lr, 16
220 ; CHECK-BE-NEXT: .cfi_offset r29, -24
221 ; CHECK-BE-NEXT: .cfi_offset r30, -16
222 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
223 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
224 ; CHECK-BE-NEXT: .cfi_offset cr2, 8
225 ; CHECK-BE-NEXT: lwz r3, 0(r3)
226 ; CHECK-BE-NEXT: std r29, 120(r1) # 8-byte Folded Spill
227 ; CHECK-BE-NEXT: std r30, 128(r1) # 8-byte Folded Spill
228 ; CHECK-BE-NEXT: srwi r4, r3, 4
229 ; CHECK-BE-NEXT: srwi r3, r3, 5
230 ; CHECK-BE-NEXT: andi. r4, r4, 1
231 ; CHECK-BE-NEXT: li r4, 0
232 ; CHECK-BE-NEXT: crmove 4*cr2+gt, gt
233 ; CHECK-BE-NEXT: andi. r3, r3, 1
234 ; CHECK-BE-NEXT: crmove 4*cr2+lt, gt
235 ; CHECK-BE-NEXT: cmplwi cr3, r3, 336
236 ; CHECK-BE-NEXT: li r3, 0
237 ; CHECK-BE-NEXT: sldi r30, r3, 2
238 ; CHECK-BE-NEXT: addis r3, r2, .LC0@toc@ha
239 ; CHECK-BE-NEXT: ld r29, .LC0@toc@l(r3)
240 ; CHECK-BE-NEXT: b .LBB0_2
241 ; CHECK-BE-NEXT: .LBB0_1: # %bb43
242 ; CHECK-BE-NEXT: #
243 ; CHECK-BE-NEXT: bl call_1
244 ; CHECK-BE-NEXT: nop
245 ; CHECK-BE-NEXT: li r4, 0
246 ; CHECK-BE-NEXT: setnbc r3, 4*cr4+eq
247 ; CHECK-BE-NEXT: stb r4, 0(r3)
248 ; CHECK-BE-NEXT: li r4, 0
249 ; CHECK-BE-NEXT: .p2align 4
250 ; CHECK-BE-NEXT: .LBB0_2: # %bb5
251 ; CHECK-BE-NEXT: #
252 ; CHECK-BE-NEXT: bc 12, 4*cr2+gt, .LBB0_31
253 ; CHECK-BE-NEXT: # %bb.3: # %bb10
254 ; CHECK-BE-NEXT: #
255 ; CHECK-BE-NEXT: bgt cr3, .LBB0_5
256 ; CHECK-BE-NEXT: # %bb.4: # %bb10
257 ; CHECK-BE-NEXT: #
258 ; CHECK-BE-NEXT: mr r3, r4
259 ; CHECK-BE-NEXT: lwz r5, 0(r3)
260 ; CHECK-BE-NEXT: rlwinm r4, r5, 0, 21, 22
261 ; CHECK-BE-NEXT: cmpwi cr4, r4, 512
262 ; CHECK-BE-NEXT: lwax r4, r30, r29
263 ; CHECK-BE-NEXT: add r4, r4, r29
264 ; CHECK-BE-NEXT: mtctr r4
265 ; CHECK-BE-NEXT: li r4, 0
266 ; CHECK-BE-NEXT: bctr
267 ; CHECK-BE-NEXT: .LBB0_5: # %bb13
268 ; CHECK-BE-NEXT: #
269 ; CHECK-BE-NEXT: li r4, 16
270 ; CHECK-BE-NEXT: b .LBB0_2
271 ; CHECK-BE-NEXT: .p2align 4
272 ; CHECK-BE-NEXT: .LBB0_6: # %bb22
273 ; CHECK-BE-NEXT: #
274 ; CHECK-BE-NEXT: b .LBB0_6
275 ; CHECK-BE-NEXT: .p2align 4
276 ; CHECK-BE-NEXT: .LBB0_7: # %bb28
277 ; CHECK-BE-NEXT: #
278 ; CHECK-BE-NEXT: b .LBB0_7
279 ; CHECK-BE-NEXT: .p2align 4
280 ; CHECK-BE-NEXT: .LBB0_8: # %bb52
281 ; CHECK-BE-NEXT: #
282 ; CHECK-BE-NEXT: b .LBB0_8
283 ; CHECK-BE-NEXT: .p2align 4
284 ; CHECK-BE-NEXT: .LBB0_9: # %bb17
285 ; CHECK-BE-NEXT: #
286 ; CHECK-BE-NEXT: b .LBB0_9
287 ; CHECK-BE-NEXT: .p2align 4
288 ; CHECK-BE-NEXT: .LBB0_10: # %bb26
289 ; CHECK-BE-NEXT: #
290 ; CHECK-BE-NEXT: b .LBB0_10
291 ; CHECK-BE-NEXT: .p2align 4
292 ; CHECK-BE-NEXT: .LBB0_11: # %bb42
293 ; CHECK-BE-NEXT: #
294 ; CHECK-BE-NEXT: b .LBB0_11
295 ; CHECK-BE-NEXT: .p2align 4
296 ; CHECK-BE-NEXT: .LBB0_12: # %bb54
297 ; CHECK-BE-NEXT: #
298 ; CHECK-BE-NEXT: b .LBB0_12
299 ; CHECK-BE-NEXT: .p2align 4
300 ; CHECK-BE-NEXT: .LBB0_13: # %bb61
301 ; CHECK-BE-NEXT: #
302 ; CHECK-BE-NEXT: b .LBB0_13
303 ; CHECK-BE-NEXT: .p2align 4
304 ; CHECK-BE-NEXT: .LBB0_14: # %bb47
305 ; CHECK-BE-NEXT: #
306 ; CHECK-BE-NEXT: b .LBB0_14
307 ; CHECK-BE-NEXT: .p2align 4
308 ; CHECK-BE-NEXT: .LBB0_15: # %bb24
309 ; CHECK-BE-NEXT: #
310 ; CHECK-BE-NEXT: b .LBB0_15
311 ; CHECK-BE-NEXT: .p2align 4
312 ; CHECK-BE-NEXT: .LBB0_16: # %bb19
313 ; CHECK-BE-NEXT: #
314 ; CHECK-BE-NEXT: b .LBB0_16
315 ; CHECK-BE-NEXT: .p2align 4
316 ; CHECK-BE-NEXT: .LBB0_17: # %bb59
317 ; CHECK-BE-NEXT: #
318 ; CHECK-BE-NEXT: b .LBB0_17
319 ; CHECK-BE-NEXT: .p2align 4
320 ; CHECK-BE-NEXT: .LBB0_18: # %bb46
321 ; CHECK-BE-NEXT: #
322 ; CHECK-BE-NEXT: b .LBB0_18
323 ; CHECK-BE-NEXT: .p2align 4
324 ; CHECK-BE-NEXT: .LBB0_19: # %bb49
325 ; CHECK-BE-NEXT: #
326 ; CHECK-BE-NEXT: b .LBB0_19
327 ; CHECK-BE-NEXT: .p2align 4
328 ; CHECK-BE-NEXT: .LBB0_20: # %bb57
329 ; CHECK-BE-NEXT: #
330 ; CHECK-BE-NEXT: b .LBB0_20
331 ; CHECK-BE-NEXT: .p2align 4
332 ; CHECK-BE-NEXT: .LBB0_21: # %bb18
333 ; CHECK-BE-NEXT: #
334 ; CHECK-BE-NEXT: b .LBB0_21
335 ; CHECK-BE-NEXT: .p2align 4
336 ; CHECK-BE-NEXT: .LBB0_22: # %bb58
337 ; CHECK-BE-NEXT: #
338 ; CHECK-BE-NEXT: b .LBB0_22
339 ; CHECK-BE-NEXT: .p2align 4
340 ; CHECK-BE-NEXT: .LBB0_23: # %bb23
341 ; CHECK-BE-NEXT: #
342 ; CHECK-BE-NEXT: b .LBB0_23
343 ; CHECK-BE-NEXT: .p2align 4
344 ; CHECK-BE-NEXT: .LBB0_24: # %bb60
345 ; CHECK-BE-NEXT: #
346 ; CHECK-BE-NEXT: b .LBB0_24
347 ; CHECK-BE-NEXT: .p2align 4
348 ; CHECK-BE-NEXT: .LBB0_25: # %bb55
349 ; CHECK-BE-NEXT: #
350 ; CHECK-BE-NEXT: b .LBB0_25
351 ; CHECK-BE-NEXT: .p2align 4
352 ; CHECK-BE-NEXT: .LBB0_26: # %bb62
353 ; CHECK-BE-NEXT: #
354 ; CHECK-BE-NEXT: b .LBB0_26
355 ; CHECK-BE-NEXT: .p2align 4
356 ; CHECK-BE-NEXT: .LBB0_27: # %bb56
357 ; CHECK-BE-NEXT: #
358 ; CHECK-BE-NEXT: b .LBB0_27
359 ; CHECK-BE-NEXT: .p2align 4
360 ; CHECK-BE-NEXT: .LBB0_28: # %bb20
361 ; CHECK-BE-NEXT: #
362 ; CHECK-BE-NEXT: b .LBB0_28
363 ; CHECK-BE-NEXT: .p2align 4
364 ; CHECK-BE-NEXT: .LBB0_29: # %bb50
365 ; CHECK-BE-NEXT: #
366 ; CHECK-BE-NEXT: b .LBB0_29
367 ; CHECK-BE-NEXT: .p2align 4
368 ; CHECK-BE-NEXT: .LBB0_30: # %bb48
369 ; CHECK-BE-NEXT: #
370 ; CHECK-BE-NEXT: b .LBB0_30
371 ; CHECK-BE-NEXT: .LBB0_31: # %bb9
372 ; CHECK-BE-NEXT: ld r30, 128(r1) # 8-byte Folded Reload
373 ; CHECK-BE-NEXT: ld r29, 120(r1) # 8-byte Folded Reload
374 ; CHECK-BE-NEXT: addi r1, r1, 144
375 ; CHECK-BE-NEXT: ld r0, 16(r1)
376 ; CHECK-BE-NEXT: lwz r12, 8(r1)
377 ; CHECK-BE-NEXT: mtlr r0
378 ; CHECK-BE-NEXT: mtocrf 32, r12
379 ; CHECK-BE-NEXT: mtocrf 16, r12
380 ; CHECK-BE-NEXT: mtocrf 8, r12
381 ; CHECK-BE-NEXT: blr
382 ; CHECK-BE-NEXT: .LBB0_32: # %bb29
383 ; CHECK-BE-NEXT: mcrf cr0, cr4
384 ; CHECK-BE-NEXT: cmpwi cr3, r5, 366
385 ; CHECK-BE-NEXT: cmpwi cr4, r3, 0
386 ; CHECK-BE-NEXT: li r29, 0
387 ; CHECK-BE-NEXT: setnbc r30, eq
388 ; CHECK-BE-NEXT: bc 12, 4*cr2+lt, .LBB0_36
389 ; CHECK-BE-NEXT: .p2align 4
390 ; CHECK-BE-NEXT: .LBB0_33: # %bb36
391 ; CHECK-BE-NEXT: bc 12, 4*cr4+eq, .LBB0_35
392 ; CHECK-BE-NEXT: .LBB0_34: # %bb32
393 ; CHECK-BE-NEXT: bc 4, 4*cr2+lt, .LBB0_33
394 ; CHECK-BE-NEXT: b .LBB0_36
395 ; CHECK-BE-NEXT: .p2align 4
396 ; CHECK-BE-NEXT: .LBB0_35: # %bb39
397 ; CHECK-BE-NEXT: bl call_2
398 ; CHECK-BE-NEXT: nop
399 ; CHECK-BE-NEXT: bc 4, 4*cr2+lt, .LBB0_33
400 ; CHECK-BE-NEXT: .LBB0_36: # %bb33
401 ; CHECK-BE-NEXT: stb r29, 0(r30)
402 ; CHECK-BE-NEXT: bc 4, 4*cr4+eq, .LBB0_34
403 ; CHECK-BE-NEXT: b .LBB0_35
404 bb:
405 %tmp = load i32, i32* undef, align 8
406 %tmp1 = and i32 %tmp, 16
407 %tmp2 = icmp ne i32 %tmp1, 0
408 %tmp3 = and i32 %tmp, 32
409 %tmp4 = icmp ne i32 %tmp3, 0
410 br label %bb5
412 bb5: ; preds = %bb63, %bb
413 %tmp6 = phi i32 [ 0, %bb ], [ %tmp64, %bb63 ]
414 %tmp7 = phi i1 [ %tmp4, %bb ], [ undef, %bb63 ]
415 %tmp8 = load i32, i32* undef, align 8
416 br i1 %tmp2, label %bb9, label %bb10
418 bb9: ; preds = %bb5
419 ret void
421 bb10: ; preds = %bb5
422 %tmp11 = and i32 %tmp8, 1536
423 %tmp12 = icmp eq i32 %tmp11, 512
424 switch i32 undef, label %bb13 [
425 i32 117, label %bb62
426 i32 40, label %bb63
427 i32 302, label %bb63
428 i32 46, label %bb63
429 i32 320, label %bb16
430 i32 64, label %bb16
431 i32 344, label %bb18
432 i32 88, label %bb19
433 i32 376, label %bb63
434 i32 120, label %bb20
435 i32 47, label %bb21
436 i32 65, label %bb21
437 i32 90, label %bb21
438 i32 97, label %bb21
439 i32 66, label %bb63
440 i32 98, label %bb63
441 i32 72, label %bb63
442 i32 104, label %bb63
443 i32 67, label %bb63
444 i32 99, label %bb23
445 i32 87, label %bb24
446 i32 85, label %bb63
447 i32 371, label %bb25
448 i32 115, label %bb25
449 i32 339, label %bb27
450 i32 118, label %bb27
451 i32 110, label %bb27
452 i32 83, label %bb27
453 i32 374, label %bb29
454 i32 366, label %bb29
455 i32 105, label %bb41
456 i32 361, label %bb41
457 i32 73, label %bb43
458 i32 329, label %bb43
459 i32 106, label %bb46
460 i32 74, label %bb47
461 i32 364, label %bb48
462 i32 108, label %bb49
463 i32 332, label %bb50
464 i32 86, label %bb51
465 i32 78, label %bb51
466 i32 76, label %bb51
467 i32 342, label %bb53
468 i32 334, label %bb53
469 i32 112, label %bb55
470 i32 119, label %bb56
471 i32 80, label %bb63
472 i32 113, label %bb57
473 i32 81, label %bb58
474 i32 102, label %bb59
475 i32 100, label %bb60
476 i32 70, label %bb61
477 ]
479 bb13: ; preds = %bb10
480 %tmp14 = icmp eq i32 0, 0
481 %tmp15 = select i1 %tmp14, i32 16, i32 undef
482 br label %bb63
484 bb16: ; preds = %bb10, %bb10
485 br label %bb17
487 bb17: ; preds = %bb17, %bb16
488 br label %bb17
490 bb18: ; preds = %bb18, %bb10
491 br label %bb18
493 bb19: ; preds = %bb19, %bb10
494 br label %bb19
496 bb20: ; preds = %bb20, %bb10
497 br label %bb20
499 bb21: ; preds = %bb10, %bb10, %bb10, %bb10
500 br label %bb22
502 bb22: ; preds = %bb22, %bb21
503 br label %bb22
505 bb23: ; preds = %bb23, %bb10
506 br label %bb23
508 bb24: ; preds = %bb24, %bb10
509 br label %bb24
511 bb25: ; preds = %bb10, %bb10
512 br label %bb26
514 bb26: ; preds = %bb26, %bb25
515 br label %bb26
517 bb27: ; preds = %bb10, %bb10, %bb10, %bb10
518 br label %bb28
520 bb28: ; preds = %bb28, %bb27
521 br label %bb28
523 bb29: ; preds = %bb10, %bb10
524 %tmp30 = icmp eq i32 %tmp8, 366
525 %tmp31 = icmp eq i32 %tmp6, 0
526 br label %bb32
528 bb32: ; preds = %bb40, %bb29
529 br i1 %tmp7, label %bb33, label %bb36
531 bb33: ; preds = %bb32
532 %tmp34 = getelementptr inbounds i8, i8* null, i64 -1
533 %tmp35 = select i1 %tmp12, i8* %tmp34, i8* null
534 store i8 0, i8* %tmp35, align 1
535 br label %bb36
537 bb36: ; preds = %bb33, %bb32
538 br i1 %tmp30, label %bb37, label %bb38
540 bb37: ; preds = %bb36
541 store i16 undef, i16* null, align 2
542 br label %bb38
544 bb38: ; preds = %bb37, %bb36
545 br i1 %tmp31, label %bb39, label %bb40
547 bb39: ; preds = %bb38
548 call void @call_2()
549 br label %bb40
551 bb40: ; preds = %bb39, %bb38
552 br label %bb32
554 bb41: ; preds = %bb10, %bb10
555 br label %bb42
557 bb42: ; preds = %bb42, %bb41
558 br label %bb42
560 bb43: ; preds = %bb10, %bb10
561 call void @call_1()
562 %tmp44 = getelementptr inbounds i8, i8* null, i64 -1
563 %tmp45 = select i1 %tmp12, i8* %tmp44, i8* null
564 store i8 0, i8* %tmp45, align 1
565 br label %bb63
567 bb46: ; preds = %bb46, %bb10
568 br label %bb46
570 bb47: ; preds = %bb47, %bb10
571 br label %bb47
573 bb48: ; preds = %bb48, %bb10
574 br label %bb48
576 bb49: ; preds = %bb49, %bb10
577 br label %bb49
579 bb50: ; preds = %bb50, %bb10
580 br label %bb50
582 bb51: ; preds = %bb10, %bb10, %bb10
583 br label %bb52
585 bb52: ; preds = %bb52, %bb51
586 br label %bb52
588 bb53: ; preds = %bb10, %bb10
589 br label %bb54
591 bb54: ; preds = %bb54, %bb53
592 br label %bb54
594 bb55: ; preds = %bb55, %bb10
595 br label %bb55
597 bb56: ; preds = %bb56, %bb10
598 br label %bb56
600 bb57: ; preds = %bb57, %bb10
601 br label %bb57
603 bb58: ; preds = %bb58, %bb10
604 br label %bb58
606 bb59: ; preds = %bb59, %bb10
607 br label %bb59
609 bb60: ; preds = %bb60, %bb10
610 br label %bb60
612 bb61: ; preds = %bb61, %bb10
613 br label %bb61
615 bb62: ; preds = %bb62, %bb10
616 br label %bb62
618 bb63: ; preds = %bb43, %bb13, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10, %bb10
619 %tmp64 = phi i32 [ %tmp15, %bb13 ], [ 0, %bb43 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ], [ 0, %bb10 ]
620 br label %bb5
621 }
623 declare void @call_1() local_unnamed_addr
625 declare void @call_2() local_unnamed_addr