| blob | 6749d5f948dffdcaed796146903ac6216ee2e615 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
3 ; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s
4 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
5 ; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s -check-prefix=CHECK-PWR8 \
6 ; RUN: -implicit-check-not "\<setb\>"
8 ; Test different patterns with type i64
10 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
11 define i64 @setb1(i64 %a, i64 %b) {
12 ; CHECK-LABEL: setb1:
13 ; CHECK: # %bb.0:
14 ; CHECK-NEXT: cmpd r3, r4
15 ; CHECK-NEXT: setb r3, cr0
16 ; CHECK-NEXT: blr
17 ;
18 ; CHECK-PWR8-LABEL: setb1:
19 ; CHECK-PWR8: # %bb.0:
20 ; CHECK-PWR8-NEXT: xor r6, r3, r4
21 ; CHECK-PWR8-NEXT: li r5, -1
22 ; CHECK-PWR8-NEXT: addic r7, r6, -1
23 ; CHECK-PWR8-NEXT: cmpd r3, r4
24 ; CHECK-PWR8-NEXT: subfe r6, r7, r6
25 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
26 ; CHECK-PWR8-NEXT: blr
27 %t1 = icmp slt i64 %a, %b
28 %t2 = icmp ne i64 %a, %b
29 %t3 = zext i1 %t2 to i64
30 %t4 = select i1 %t1, i64 -1, i64 %t3
31 ret i64 %t4
32 }
34 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
35 define i64 @setb2(i64 %a, i64 %b) {
36 ; CHECK-LABEL: setb2:
37 ; CHECK: # %bb.0:
38 ; CHECK-NEXT: cmpd r3, r4
39 ; CHECK-NEXT: setb r3, cr0
40 ; CHECK-NEXT: blr
41 ;
42 ; CHECK-PWR8-LABEL: setb2:
43 ; CHECK-PWR8: # %bb.0:
44 ; CHECK-PWR8-NEXT: xor r6, r3, r4
45 ; CHECK-PWR8-NEXT: li r5, -1
46 ; CHECK-PWR8-NEXT: addic r7, r6, -1
47 ; CHECK-PWR8-NEXT: cmpd r4, r3
48 ; CHECK-PWR8-NEXT: subfe r6, r7, r6
49 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
50 ; CHECK-PWR8-NEXT: blr
51 %t1 = icmp sgt i64 %b, %a
52 %t2 = icmp ne i64 %a, %b
53 %t3 = zext i1 %t2 to i64
54 %t4 = select i1 %t1, i64 -1, i64 %t3
55 ret i64 %t4
56 }
58 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
59 define i64 @setb3(i64 %a, i64 %b) {
60 ; CHECK-LABEL: setb3:
61 ; CHECK: # %bb.0:
62 ; CHECK-NEXT: cmpd r3, r4
63 ; CHECK-NEXT: setb r3, cr0
64 ; CHECK-NEXT: blr
65 ;
66 ; CHECK-PWR8-LABEL: setb3:
67 ; CHECK-PWR8: # %bb.0:
68 ; CHECK-PWR8-NEXT: xor r6, r4, r3
69 ; CHECK-PWR8-NEXT: li r5, -1
70 ; CHECK-PWR8-NEXT: addic r7, r6, -1
71 ; CHECK-PWR8-NEXT: cmpd r3, r4
72 ; CHECK-PWR8-NEXT: subfe r6, r7, r6
73 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
74 ; CHECK-PWR8-NEXT: blr
75 %t1 = icmp slt i64 %a, %b
76 %t2 = icmp ne i64 %b, %a
77 %t3 = zext i1 %t2 to i64
78 %t4 = select i1 %t1, i64 -1, i64 %t3
79 ret i64 %t4
80 }
82 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
83 define i64 @setb4(i64 %a, i64 %b) {
84 ; CHECK-LABEL: setb4:
85 ; CHECK: # %bb.0:
86 ; CHECK-NEXT: cmpd r3, r4
87 ; CHECK-NEXT: setb r3, cr0
88 ; CHECK-NEXT: blr
89 ;
90 ; CHECK-PWR8-LABEL: setb4:
91 ; CHECK-PWR8: # %bb.0:
92 ; CHECK-PWR8-NEXT: xor r6, r4, r3
93 ; CHECK-PWR8-NEXT: li r5, -1
94 ; CHECK-PWR8-NEXT: addic r7, r6, -1
95 ; CHECK-PWR8-NEXT: cmpd r4, r3
96 ; CHECK-PWR8-NEXT: subfe r6, r7, r6
97 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
98 ; CHECK-PWR8-NEXT: blr
99 %t1 = icmp sgt i64 %b, %a
100 %t2 = icmp ne i64 %b, %a
101 %t3 = zext i1 %t2 to i64
102 %t4 = select i1 %t1, i64 -1, i64 %t3
103 ret i64 %t4
104 }
106 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
107 define i64 @setb5(i64 %a, i64 %b) {
108 ; CHECK-LABEL: setb5:
109 ; CHECK: # %bb.0:
110 ; CHECK-NEXT: cmpd r3, r4
111 ; CHECK-NEXT: setb r3, cr0
112 ; CHECK-NEXT: blr
113 ;
114 ; CHECK-PWR8-LABEL: setb5:
115 ; CHECK-PWR8: # %bb.0:
116 ; CHECK-PWR8-NEXT: sradi r6, r4, 63
117 ; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
118 ; CHECK-PWR8-NEXT: li r5, -1
119 ; CHECK-PWR8-NEXT: subc r8, r4, r3
120 ; CHECK-PWR8-NEXT: cmpd r3, r4
121 ; CHECK-PWR8-NEXT: adde r6, r7, r6
122 ; CHECK-PWR8-NEXT: xori r6, r6, 1
123 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
124 ; CHECK-PWR8-NEXT: blr
125 %t1 = icmp slt i64 %a, %b
126 %t2 = icmp sgt i64 %a, %b
127 %t3 = zext i1 %t2 to i64
128 %t4 = select i1 %t1, i64 -1, i64 %t3
129 ret i64 %t4
130 }
132 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setgt)), setgt
133 define i64 @setb6(i64 %a, i64 %b) {
134 ; CHECK-LABEL: setb6:
135 ; CHECK: # %bb.0:
136 ; CHECK-NEXT: cmpd r3, r4
137 ; CHECK-NEXT: setb r3, cr0
138 ; CHECK-NEXT: blr
139 ;
140 ; CHECK-PWR8-LABEL: setb6:
141 ; CHECK-PWR8: # %bb.0:
142 ; CHECK-PWR8-NEXT: sradi r6, r4, 63
143 ; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
144 ; CHECK-PWR8-NEXT: li r5, -1
145 ; CHECK-PWR8-NEXT: subc r8, r4, r3
146 ; CHECK-PWR8-NEXT: cmpd r4, r3
147 ; CHECK-PWR8-NEXT: adde r6, r7, r6
148 ; CHECK-PWR8-NEXT: xori r6, r6, 1
149 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
150 ; CHECK-PWR8-NEXT: blr
151 %t1 = icmp sgt i64 %b, %a
152 %t2 = icmp sgt i64 %a, %b
153 %t3 = zext i1 %t2 to i64
154 %t4 = select i1 %t1, i64 -1, i64 %t3
155 ret i64 %t4
156 }
158 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
159 define i64 @setb7(i64 %a, i64 %b) {
160 ; CHECK-LABEL: setb7:
161 ; CHECK: # %bb.0:
162 ; CHECK-NEXT: cmpd r3, r4
163 ; CHECK-NEXT: setb r3, cr0
164 ; CHECK-NEXT: blr
165 ;
166 ; CHECK-PWR8-LABEL: setb7:
167 ; CHECK-PWR8: # %bb.0:
168 ; CHECK-PWR8-NEXT: sradi r6, r4, 63
169 ; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
170 ; CHECK-PWR8-NEXT: li r5, -1
171 ; CHECK-PWR8-NEXT: subc r8, r4, r3
172 ; CHECK-PWR8-NEXT: cmpd r3, r4
173 ; CHECK-PWR8-NEXT: adde r6, r7, r6
174 ; CHECK-PWR8-NEXT: xori r6, r6, 1
175 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
176 ; CHECK-PWR8-NEXT: blr
177 %t1 = icmp slt i64 %a, %b
178 %t2 = icmp slt i64 %b, %a
179 %t3 = zext i1 %t2 to i64
180 %t4 = select i1 %t1, i64 -1, i64 %t3
181 ret i64 %t4
182 }
184 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setlt)), setgt
185 define i64 @setb8(i64 %a, i64 %b) {
186 ; CHECK-LABEL: setb8:
187 ; CHECK: # %bb.0:
188 ; CHECK-NEXT: cmpd r3, r4
189 ; CHECK-NEXT: setb r3, cr0
190 ; CHECK-NEXT: blr
191 ;
192 ; CHECK-PWR8-LABEL: setb8:
193 ; CHECK-PWR8: # %bb.0:
194 ; CHECK-PWR8-NEXT: sradi r6, r4, 63
195 ; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
196 ; CHECK-PWR8-NEXT: li r5, -1
197 ; CHECK-PWR8-NEXT: subc r8, r4, r3
198 ; CHECK-PWR8-NEXT: cmpd r4, r3
199 ; CHECK-PWR8-NEXT: adde r6, r7, r6
200 ; CHECK-PWR8-NEXT: xori r6, r6, 1
201 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
202 ; CHECK-PWR8-NEXT: blr
203 %t1 = icmp sgt i64 %b, %a
204 %t2 = icmp slt i64 %b, %a
205 %t3 = zext i1 %t2 to i64
206 %t4 = select i1 %t1, i64 -1, i64 %t3
207 ret i64 %t4
208 }
210 ; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setgt
211 define i64 @setb9(i64 %a, i64 %b) {
212 ; CHECK-LABEL: setb9:
213 ; CHECK: # %bb.0:
214 ; CHECK-NEXT: cmpd r3, r4
215 ; CHECK-NEXT: setb r3, cr0
216 ; CHECK-NEXT: blr
217 ;
218 ; CHECK-PWR8-LABEL: setb9:
219 ; CHECK-PWR8: # %bb.0:
220 ; CHECK-PWR8-NEXT: xor r6, r3, r4
221 ; CHECK-PWR8-NEXT: li r5, 1
222 ; CHECK-PWR8-NEXT: subfic r6, r6, 0
223 ; CHECK-PWR8-NEXT: cmpd r3, r4
224 ; CHECK-PWR8-NEXT: subfe r3, r6, r6
225 ; CHECK-PWR8-NEXT: iselgt r3, r5, r3
226 ; CHECK-PWR8-NEXT: blr
227 %t1 = icmp sgt i64 %a, %b
228 %t2 = icmp ne i64 %a, %b
229 %t3 = sext i1 %t2 to i64
230 %t4 = select i1 %t1, i64 1, i64 %t3
231 ret i64 %t4
232 }
234 ; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setlt
235 define i64 @setb10(i64 %a, i64 %b) {
236 ; CHECK-LABEL: setb10:
237 ; CHECK: # %bb.0:
238 ; CHECK-NEXT: cmpd r3, r4
239 ; CHECK-NEXT: setb r3, cr0
240 ; CHECK-NEXT: blr
241 ;
242 ; CHECK-PWR8-LABEL: setb10:
243 ; CHECK-PWR8: # %bb.0:
244 ; CHECK-PWR8-NEXT: xor r6, r3, r4
245 ; CHECK-PWR8-NEXT: li r5, 1
246 ; CHECK-PWR8-NEXT: subfic r6, r6, 0
247 ; CHECK-PWR8-NEXT: cmpd r4, r3
248 ; CHECK-PWR8-NEXT: subfe r3, r6, r6
249 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
250 ; CHECK-PWR8-NEXT: blr
251 %t1 = icmp slt i64 %b, %a
252 %t2 = icmp ne i64 %a, %b
253 %t3 = sext i1 %t2 to i64
254 %t4 = select i1 %t1, i64 1, i64 %t3
255 ret i64 %t4
256 }
258 ; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setgt
259 define i64 @setb11(i64 %a, i64 %b) {
260 ; CHECK-LABEL: setb11:
261 ; CHECK: # %bb.0:
262 ; CHECK-NEXT: cmpd r3, r4
263 ; CHECK-NEXT: setb r3, cr0
264 ; CHECK-NEXT: blr
265 ;
266 ; CHECK-PWR8-LABEL: setb11:
267 ; CHECK-PWR8: # %bb.0:
268 ; CHECK-PWR8-NEXT: xor r6, r4, r3
269 ; CHECK-PWR8-NEXT: li r5, 1
270 ; CHECK-PWR8-NEXT: subfic r6, r6, 0
271 ; CHECK-PWR8-NEXT: cmpd r3, r4
272 ; CHECK-PWR8-NEXT: subfe r3, r6, r6
273 ; CHECK-PWR8-NEXT: iselgt r3, r5, r3
274 ; CHECK-PWR8-NEXT: blr
275 %t1 = icmp sgt i64 %a, %b
276 %t2 = icmp ne i64 %b, %a
277 %t3 = sext i1 %t2 to i64
278 %t4 = select i1 %t1, i64 1, i64 %t3
279 ret i64 %t4
280 }
282 ; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setlt
283 define i64 @setb12(i64 %a, i64 %b) {
284 ; CHECK-LABEL: setb12:
285 ; CHECK: # %bb.0:
286 ; CHECK-NEXT: cmpd r3, r4
287 ; CHECK-NEXT: setb r3, cr0
288 ; CHECK-NEXT: blr
289 ;
290 ; CHECK-PWR8-LABEL: setb12:
291 ; CHECK-PWR8: # %bb.0:
292 ; CHECK-PWR8-NEXT: xor r6, r4, r3
293 ; CHECK-PWR8-NEXT: li r5, 1
294 ; CHECK-PWR8-NEXT: subfic r6, r6, 0
295 ; CHECK-PWR8-NEXT: cmpd r4, r3
296 ; CHECK-PWR8-NEXT: subfe r3, r6, r6
297 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
298 ; CHECK-PWR8-NEXT: blr
299 %t1 = icmp slt i64 %b, %a
300 %t2 = icmp ne i64 %b, %a
301 %t3 = sext i1 %t2 to i64
302 %t4 = select i1 %t1, i64 1, i64 %t3
303 ret i64 %t4
304 }
306 ; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setlt)), setgt
307 define i64 @setb13(i64 %a, i64 %b) {
308 ; CHECK-LABEL: setb13:
309 ; CHECK: # %bb.0:
310 ; CHECK-NEXT: cmpd r3, r4
311 ; CHECK-NEXT: setb r3, cr0
312 ; CHECK-NEXT: blr
313 ;
314 ; CHECK-PWR8-LABEL: setb13:
315 ; CHECK-PWR8: # %bb.0:
316 ; CHECK-PWR8-NEXT: sradi r6, r3, 63
317 ; CHECK-PWR8-NEXT: rldicl r7, r4, 1, 63
318 ; CHECK-PWR8-NEXT: li r5, 1
319 ; CHECK-PWR8-NEXT: subc r8, r3, r4
320 ; CHECK-PWR8-NEXT: cmpd r3, r4
321 ; CHECK-PWR8-NEXT: adde r6, r7, r6
322 ; CHECK-PWR8-NEXT: xori r6, r6, 1
323 ; CHECK-PWR8-NEXT: neg r6, r6
324 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
325 ; CHECK-PWR8-NEXT: blr
326 %t1 = icmp sgt i64 %a, %b
327 %t2 = icmp slt i64 %a, %b
328 %t3 = sext i1 %t2 to i64
329 %t4 = select i1 %t1, i64 1, i64 %t3
330 ret i64 %t4
331 }
333 ; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setlt)), setlt
334 define i64 @setb14(i64 %a, i64 %b) {
335 ; CHECK-LABEL: setb14:
336 ; CHECK: # %bb.0:
337 ; CHECK-NEXT: cmpd r3, r4
338 ; CHECK-NEXT: setb r3, cr0
339 ; CHECK-NEXT: blr
340 ;
341 ; CHECK-PWR8-LABEL: setb14:
342 ; CHECK-PWR8: # %bb.0:
343 ; CHECK-PWR8-NEXT: sradi r6, r3, 63
344 ; CHECK-PWR8-NEXT: rldicl r7, r4, 1, 63
345 ; CHECK-PWR8-NEXT: li r5, 1
346 ; CHECK-PWR8-NEXT: subc r8, r3, r4
347 ; CHECK-PWR8-NEXT: cmpd r4, r3
348 ; CHECK-PWR8-NEXT: adde r6, r7, r6
349 ; CHECK-PWR8-NEXT: xori r6, r6, 1
350 ; CHECK-PWR8-NEXT: neg r6, r6
351 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
352 ; CHECK-PWR8-NEXT: blr
353 %t1 = icmp slt i64 %b, %a
354 %t2 = icmp slt i64 %a, %b
355 %t3 = sext i1 %t2 to i64
356 %t4 = select i1 %t1, i64 1, i64 %t3
357 ret i64 %t4
358 }
360 ; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setgt)), setgt
361 define i64 @setb15(i64 %a, i64 %b) {
362 ; CHECK-LABEL: setb15:
363 ; CHECK: # %bb.0:
364 ; CHECK-NEXT: cmpd r3, r4
365 ; CHECK-NEXT: setb r3, cr0
366 ; CHECK-NEXT: blr
367 ;
368 ; CHECK-PWR8-LABEL: setb15:
369 ; CHECK-PWR8: # %bb.0:
370 ; CHECK-PWR8-NEXT: sradi r6, r3, 63
371 ; CHECK-PWR8-NEXT: rldicl r7, r4, 1, 63
372 ; CHECK-PWR8-NEXT: li r5, 1
373 ; CHECK-PWR8-NEXT: subc r8, r3, r4
374 ; CHECK-PWR8-NEXT: cmpd r3, r4
375 ; CHECK-PWR8-NEXT: adde r6, r7, r6
376 ; CHECK-PWR8-NEXT: xori r6, r6, 1
377 ; CHECK-PWR8-NEXT: neg r6, r6
378 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
379 ; CHECK-PWR8-NEXT: blr
380 %t1 = icmp sgt i64 %a, %b
381 %t2 = icmp sgt i64 %b, %a
382 %t3 = sext i1 %t2 to i64
383 %t4 = select i1 %t1, i64 1, i64 %t3
384 ret i64 %t4
385 }
387 ; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setgt)), setlt
388 define i64 @setb16(i64 %a, i64 %b) {
389 ; CHECK-LABEL: setb16:
390 ; CHECK: # %bb.0:
391 ; CHECK-NEXT: cmpd r3, r4
392 ; CHECK-NEXT: setb r3, cr0
393 ; CHECK-NEXT: blr
394 ;
395 ; CHECK-PWR8-LABEL: setb16:
396 ; CHECK-PWR8: # %bb.0:
397 ; CHECK-PWR8-NEXT: sradi r6, r3, 63
398 ; CHECK-PWR8-NEXT: rldicl r7, r4, 1, 63
399 ; CHECK-PWR8-NEXT: li r5, 1
400 ; CHECK-PWR8-NEXT: subc r8, r3, r4
401 ; CHECK-PWR8-NEXT: cmpd r4, r3
402 ; CHECK-PWR8-NEXT: adde r6, r7, r6
403 ; CHECK-PWR8-NEXT: xori r6, r6, 1
404 ; CHECK-PWR8-NEXT: neg r6, r6
405 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
406 ; CHECK-PWR8-NEXT: blr
407 %t1 = icmp slt i64 %b, %a
408 %t2 = icmp sgt i64 %b, %a
409 %t3 = sext i1 %t2 to i64
410 %t4 = select i1 %t1, i64 1, i64 %t3
411 ret i64 %t4
412 }
414 ; select_cc lhs, rhs, 0, (select_cc lhs, rhs, 1, -1, setgt), seteq
415 define i64 @setb17(i64 %a, i64 %b) {
416 ; CHECK-LABEL: setb17:
417 ; CHECK: # %bb.0:
418 ; CHECK-NEXT: cmpd r3, r4
419 ; CHECK-NEXT: setb r3, cr0
420 ; CHECK-NEXT: blr
421 ;
422 ; CHECK-PWR8-LABEL: setb17:
423 ; CHECK-PWR8: # %bb.0:
424 ; CHECK-PWR8-NEXT: li r5, -1
425 ; CHECK-PWR8-NEXT: cmpd r3, r4
426 ; CHECK-PWR8-NEXT: li r6, 1
427 ; CHECK-PWR8-NEXT: iselgt r5, r6, r5
428 ; CHECK-PWR8-NEXT: cmpld r3, r4
429 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
430 ; CHECK-PWR8-NEXT: blr
431 %t1 = icmp eq i64 %a, %b
432 %t2 = icmp sgt i64 %a, %b
433 %t3 = select i1 %t2, i64 1, i64 -1
434 %t4 = select i1 %t1, i64 0, i64 %t3
435 ret i64 %t4
436 }
438 ; select_cc lhs, rhs, 0, (select_cc rhs, lhs, 1, -1, setgt), seteq
439 define i64 @setb18(i64 %a, i64 %b) {
440 ; CHECK-LABEL: setb18:
441 ; CHECK: # %bb.0:
442 ; CHECK-NEXT: cmpd r3, r4
443 ; CHECK-NEXT: setb r3, cr0
444 ; CHECK-NEXT: blr
445 ;
446 ; CHECK-PWR8-LABEL: setb18:
447 ; CHECK-PWR8: # %bb.0:
448 ; CHECK-PWR8-NEXT: li r5, -1
449 ; CHECK-PWR8-NEXT: cmpd r3, r4
450 ; CHECK-PWR8-NEXT: li r6, 1
451 ; CHECK-PWR8-NEXT: iselgt r5, r6, r5
452 ; CHECK-PWR8-NEXT: cmpld r4, r3
453 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
454 ; CHECK-PWR8-NEXT: blr
455 %t1 = icmp eq i64 %b, %a
456 %t2 = icmp sgt i64 %a, %b
457 %t3 = select i1 %t2, i64 1, i64 -1
458 %t4 = select i1 %t1, i64 0, i64 %t3
459 ret i64 %t4
460 }
462 ; select_cc lhs, rhs, 0, (select_cc rhs, lhs, 1, -1, setlt), seteq
463 define i64 @setb19(i64 %a, i64 %b) {
464 ; CHECK-LABEL: setb19:
465 ; CHECK: # %bb.0:
466 ; CHECK-NEXT: cmpd r3, r4
467 ; CHECK-NEXT: setb r3, cr0
468 ; CHECK-NEXT: blr
469 ;
470 ; CHECK-PWR8-LABEL: setb19:
471 ; CHECK-PWR8: # %bb.0:
472 ; CHECK-PWR8-NEXT: li r5, -1
473 ; CHECK-PWR8-NEXT: cmpd r4, r3
474 ; CHECK-PWR8-NEXT: li r6, 1
475 ; CHECK-PWR8-NEXT: isellt r5, r6, r5
476 ; CHECK-PWR8-NEXT: cmpld r3, r4
477 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
478 ; CHECK-PWR8-NEXT: blr
479 %t1 = icmp eq i64 %a, %b
480 %t2 = icmp slt i64 %b, %a
481 %t3 = select i1 %t2, i64 1, i64 -1
482 %t4 = select i1 %t1, i64 0, i64 %t3
483 ret i64 %t4
484 }
486 ; select_cc lhs, rhs, 0, (select_cc lhs, rhs, 1, -1, setlt), seteq
487 define i64 @setb20(i64 %a, i64 %b) {
488 ; CHECK-LABEL: setb20:
489 ; CHECK: # %bb.0:
490 ; CHECK-NEXT: cmpd r3, r4
491 ; CHECK-NEXT: setb r3, cr0
492 ; CHECK-NEXT: blr
493 ;
494 ; CHECK-PWR8-LABEL: setb20:
495 ; CHECK-PWR8: # %bb.0:
496 ; CHECK-PWR8-NEXT: li r5, -1
497 ; CHECK-PWR8-NEXT: cmpd r4, r3
498 ; CHECK-PWR8-NEXT: li r6, 1
499 ; CHECK-PWR8-NEXT: isellt r5, r6, r5
500 ; CHECK-PWR8-NEXT: cmpld r4, r3
501 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
502 ; CHECK-PWR8-NEXT: blr
503 %t1 = icmp eq i64 %b, %a
504 %t2 = icmp slt i64 %b, %a
505 %t3 = select i1 %t2, i64 1, i64 -1
506 %t4 = select i1 %t1, i64 0, i64 %t3
507 ret i64 %t4
508 }
510 ; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setlt), seteq
511 define i64 @setb21(i64 %a, i64 %b) {
512 ; CHECK-LABEL: setb21:
513 ; CHECK: # %bb.0:
514 ; CHECK-NEXT: cmpd r3, r4
515 ; CHECK-NEXT: setb r3, cr0
516 ; CHECK-NEXT: blr
517 ;
518 ; CHECK-PWR8-LABEL: setb21:
519 ; CHECK-PWR8: # %bb.0:
520 ; CHECK-PWR8-NEXT: li r5, 1
521 ; CHECK-PWR8-NEXT: cmpd r3, r4
522 ; CHECK-PWR8-NEXT: li r6, -1
523 ; CHECK-PWR8-NEXT: isellt r5, r6, r5
524 ; CHECK-PWR8-NEXT: cmpld r3, r4
525 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
526 ; CHECK-PWR8-NEXT: blr
527 %t1 = icmp eq i64 %a, %b
528 %t2 = icmp slt i64 %a, %b
529 %t3 = select i1 %t2, i64 -1, i64 1
530 %t4 = select i1 %t1, i64 0, i64 %t3
531 ret i64 %t4
532 }
534 ; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setlt), seteq
535 define i64 @setb22(i64 %a, i64 %b) {
536 ; CHECK-LABEL: setb22:
537 ; CHECK: # %bb.0:
538 ; CHECK-NEXT: cmpd r3, r4
539 ; CHECK-NEXT: setb r3, cr0
540 ; CHECK-NEXT: blr
541 ;
542 ; CHECK-PWR8-LABEL: setb22:
543 ; CHECK-PWR8: # %bb.0:
544 ; CHECK-PWR8-NEXT: li r5, 1
545 ; CHECK-PWR8-NEXT: cmpd r3, r4
546 ; CHECK-PWR8-NEXT: li r6, -1
547 ; CHECK-PWR8-NEXT: isellt r5, r6, r5
548 ; CHECK-PWR8-NEXT: cmpld r4, r3
549 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
550 ; CHECK-PWR8-NEXT: blr
551 %t1 = icmp eq i64 %b, %a
552 %t2 = icmp slt i64 %a, %b
553 %t3 = select i1 %t2, i64 -1, i64 1
554 %t4 = select i1 %t1, i64 0, i64 %t3
555 ret i64 %t4
556 }
558 ; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setgt), seteq
559 define i64 @setb23(i64 %a, i64 %b) {
560 ; CHECK-LABEL: setb23:
561 ; CHECK: # %bb.0:
562 ; CHECK-NEXT: cmpd r3, r4
563 ; CHECK-NEXT: setb r3, cr0
564 ; CHECK-NEXT: blr
565 ;
566 ; CHECK-PWR8-LABEL: setb23:
567 ; CHECK-PWR8: # %bb.0:
568 ; CHECK-PWR8-NEXT: li r5, 1
569 ; CHECK-PWR8-NEXT: cmpd r4, r3
570 ; CHECK-PWR8-NEXT: li r6, -1
571 ; CHECK-PWR8-NEXT: iselgt r5, r6, r5
572 ; CHECK-PWR8-NEXT: cmpld r3, r4
573 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
574 ; CHECK-PWR8-NEXT: blr
575 %t1 = icmp eq i64 %a, %b
576 %t2 = icmp sgt i64 %b, %a
577 %t3 = select i1 %t2, i64 -1, i64 1
578 %t4 = select i1 %t1, i64 0, i64 %t3
579 ret i64 %t4
580 }
582 ; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setgt), seteq
583 define i64 @setb24(i64 %a, i64 %b) {
584 ; CHECK-LABEL: setb24:
585 ; CHECK: # %bb.0:
586 ; CHECK-NEXT: cmpd r3, r4
587 ; CHECK-NEXT: setb r3, cr0
588 ; CHECK-NEXT: blr
589 ;
590 ; CHECK-PWR8-LABEL: setb24:
591 ; CHECK-PWR8: # %bb.0:
592 ; CHECK-PWR8-NEXT: li r5, 1
593 ; CHECK-PWR8-NEXT: cmpd r4, r3
594 ; CHECK-PWR8-NEXT: li r6, -1
595 ; CHECK-PWR8-NEXT: iselgt r5, r6, r5
596 ; CHECK-PWR8-NEXT: cmpld r4, r3
597 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
598 ; CHECK-PWR8-NEXT: blr
599 %t1 = icmp eq i64 %b, %a
600 %t2 = icmp sgt i64 %b, %a
601 %t3 = select i1 %t2, i64 -1, i64 1
602 %t4 = select i1 %t1, i64 0, i64 %t3
603 ret i64 %t4
604 }
605 ; end all patterns testing for i64
607 ; Test with swapping the input parameters
609 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
610 define i64 @setb25(i64 %a, i64 %b) {
611 ; CHECK-LABEL: setb25:
612 ; CHECK: # %bb.0:
613 ; CHECK-NEXT: cmpd r4, r3
614 ; CHECK-NEXT: setb r3, cr0
615 ; CHECK-NEXT: blr
616 ;
617 ; CHECK-PWR8-LABEL: setb25:
618 ; CHECK-PWR8: # %bb.0:
619 ; CHECK-PWR8-NEXT: xor r6, r4, r3
620 ; CHECK-PWR8-NEXT: li r5, -1
621 ; CHECK-PWR8-NEXT: addic r7, r6, -1
622 ; CHECK-PWR8-NEXT: cmpd r4, r3
623 ; CHECK-PWR8-NEXT: subfe r6, r7, r6
624 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
625 ; CHECK-PWR8-NEXT: blr
626 %t1 = icmp slt i64 %b, %a
627 %t2 = icmp ne i64 %b, %a
628 %t3 = zext i1 %t2 to i64
629 %t4 = select i1 %t1, i64 -1, i64 %t3
630 ret i64 %t4
631 }
633 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
634 define i64 @setb26(i64 %a, i64 %b) {
635 ; CHECK-LABEL: setb26:
636 ; CHECK: # %bb.0:
637 ; CHECK-NEXT: cmpd r4, r3
638 ; CHECK-NEXT: setb r3, cr0
639 ; CHECK-NEXT: blr
640 ;
641 ; CHECK-PWR8-LABEL: setb26:
642 ; CHECK-PWR8: # %bb.0:
643 ; CHECK-PWR8-NEXT: xor r6, r4, r3
644 ; CHECK-PWR8-NEXT: li r5, -1
645 ; CHECK-PWR8-NEXT: addic r7, r6, -1
646 ; CHECK-PWR8-NEXT: cmpd r3, r4
647 ; CHECK-PWR8-NEXT: subfe r6, r7, r6
648 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
649 ; CHECK-PWR8-NEXT: blr
650 %t1 = icmp sgt i64 %a, %b
651 %t2 = icmp ne i64 %b, %a
652 %t3 = zext i1 %t2 to i64
653 %t4 = select i1 %t1, i64 -1, i64 %t3
654 ret i64 %t4
655 }
657 ; Test with different scalar integer type for selected value
658 ; i32/i16/i8 rather than i64 above
660 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
661 define i64 @setb27(i64 %a, i64 %b) {
662 ; CHECK-LABEL: setb27:
663 ; CHECK: # %bb.0:
664 ; CHECK-NEXT: cmpd r3, r4
665 ; CHECK-NEXT: setb r3, cr0
666 ; CHECK-NEXT: extsw r3, r3
667 ; CHECK-NEXT: blr
668 ;
669 ; CHECK-PWR8-LABEL: setb27:
670 ; CHECK-PWR8: # %bb.0:
671 ; CHECK-PWR8-NEXT: xor r6, r4, r3
672 ; CHECK-PWR8-NEXT: li r5, -1
673 ; CHECK-PWR8-NEXT: addic r7, r6, -1
674 ; CHECK-PWR8-NEXT: cmpd r3, r4
675 ; CHECK-PWR8-NEXT: subfe r6, r7, r6
676 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
677 ; CHECK-PWR8-NEXT: extsw r3, r3
678 ; CHECK-PWR8-NEXT: blr
679 %t1 = icmp slt i64 %a, %b
680 %t2 = icmp ne i64 %b, %a
681 %t3 = zext i1 %t2 to i32
682 %t4 = select i1 %t1, i32 -1, i32 %t3
683 %t5 = sext i32 %t4 to i64
684 ret i64 %t5
685 }
687 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
688 define i64 @setb28(i64 %a, i64 %b) {
689 ; CHECK-LABEL: setb28:
690 ; CHECK: # %bb.0:
691 ; CHECK-NEXT: cmpd r3, r4
692 ; CHECK-NEXT: setb r3, cr0
693 ; CHECK-NEXT: extsw r3, r3
694 ; CHECK-NEXT: blr
695 ;
696 ; CHECK-PWR8-LABEL: setb28:
697 ; CHECK-PWR8: # %bb.0:
698 ; CHECK-PWR8-NEXT: xor r6, r4, r3
699 ; CHECK-PWR8-NEXT: li r5, -1
700 ; CHECK-PWR8-NEXT: addic r7, r6, -1
701 ; CHECK-PWR8-NEXT: cmpd r4, r3
702 ; CHECK-PWR8-NEXT: subfe r6, r7, r6
703 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
704 ; CHECK-PWR8-NEXT: extsw r3, r3
705 ; CHECK-PWR8-NEXT: blr
706 %t1 = icmp sgt i64 %b, %a
707 %t2 = icmp ne i64 %b, %a
708 %t3 = zext i1 %t2 to i16
709 %t4 = select i1 %t1, i16 -1, i16 %t3
710 %t5 = sext i16 %t4 to i64
711 ret i64 %t5
712 }
714 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
715 define i64 @setb29(i64 %a, i64 %b) {
716 ; CHECK-LABEL: setb29:
717 ; CHECK: # %bb.0:
718 ; CHECK-NEXT: cmpd r3, r4
719 ; CHECK-NEXT: setb r3, cr0
720 ; CHECK-NEXT: clrldi r3, r3, 56
721 ; CHECK-NEXT: blr
722 ;
723 ; CHECK-PWR8-LABEL: setb29:
724 ; CHECK-PWR8: # %bb.0:
725 ; CHECK-PWR8-NEXT: sradi r6, r4, 63
726 ; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
727 ; CHECK-PWR8-NEXT: li r5, -1
728 ; CHECK-PWR8-NEXT: subc r8, r4, r3
729 ; CHECK-PWR8-NEXT: cmpd r3, r4
730 ; CHECK-PWR8-NEXT: adde r6, r7, r6
731 ; CHECK-PWR8-NEXT: xori r6, r6, 1
732 ; CHECK-PWR8-NEXT: isellt r3, r5, r6
733 ; CHECK-PWR8-NEXT: clrldi r3, r3, 56
734 ; CHECK-PWR8-NEXT: blr
735 %t1 = icmp slt i64 %a, %b
736 %t2 = icmp sgt i64 %a, %b
737 %t3 = zext i1 %t2 to i8
738 %t4 = select i1 %t1, i8 -1, i8 %t3
739 %t5 = zext i8 %t4 to i64
740 ret i64 %t5
741 }
743 ; Testings to cover different comparison opcodes
744 ; Test with integer type i32/i16/i8 for input parameter
746 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setlt
747 define i64 @setbsw1(i32 %a, i32 %b) {
748 ; CHECK-LABEL: setbsw1:
749 ; CHECK: # %bb.0:
750 ; CHECK-NEXT: cmpw r3, r4
751 ; CHECK-NEXT: setb r3, cr0
752 ; CHECK-NEXT: blr
753 ;
754 ; CHECK-PWR8-LABEL: setbsw1:
755 ; CHECK-PWR8: # %bb.0:
756 ; CHECK-PWR8-NEXT: xor r6, r3, r4
757 ; CHECK-PWR8-NEXT: li r5, -1
758 ; CHECK-PWR8-NEXT: cntlzw r6, r6
759 ; CHECK-PWR8-NEXT: cmpw r3, r4
760 ; CHECK-PWR8-NEXT: srwi r6, r6, 5
761 ; CHECK-PWR8-NEXT: xori r3, r6, 1
762 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
763 ; CHECK-PWR8-NEXT: blr
764 %t1 = icmp slt i32 %a, %b
765 %t2 = icmp ne i32 %a, %b
766 %t3 = zext i1 %t2 to i64
767 %t4 = select i1 %t1, i64 -1, i64 %t3
768 ret i64 %t4
769 }
771 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setgt
772 define i64 @setbsw2(i32 %a, i32 %b) {
773 ; CHECK-LABEL: setbsw2:
774 ; CHECK: # %bb.0:
775 ; CHECK-NEXT: cmpw r3, r4
776 ; CHECK-NEXT: setb r3, cr0
777 ; CHECK-NEXT: blr
778 ;
779 ; CHECK-PWR8-LABEL: setbsw2:
780 ; CHECK-PWR8: # %bb.0:
781 ; CHECK-PWR8-NEXT: xor r6, r3, r4
782 ; CHECK-PWR8-NEXT: li r5, -1
783 ; CHECK-PWR8-NEXT: cntlzw r6, r6
784 ; CHECK-PWR8-NEXT: cmpw r4, r3
785 ; CHECK-PWR8-NEXT: srwi r6, r6, 5
786 ; CHECK-PWR8-NEXT: xori r3, r6, 1
787 ; CHECK-PWR8-NEXT: iselgt r3, r5, r3
788 ; CHECK-PWR8-NEXT: blr
789 %t1 = icmp sgt i32 %b, %a
790 %t2 = icmp ne i32 %a, %b
791 %t3 = zext i1 %t2 to i64
792 %t4 = select i1 %t1, i64 -1, i64 %t3
793 ret i64 %t4
794 }
796 ; select_cc lhs, rhs, 0, (select_cc rhs, lhs, -1, 1, setgt), seteq
797 define i64 @setbsw3(i32 %a, i32 %b) {
798 ; CHECK-LABEL: setbsw3:
799 ; CHECK: # %bb.0:
800 ; CHECK-NEXT: cmpw r3, r4
801 ; CHECK-NEXT: setb r3, cr0
802 ; CHECK-NEXT: blr
803 ;
804 ; CHECK-PWR8-LABEL: setbsw3:
805 ; CHECK-PWR8: # %bb.0:
806 ; CHECK-PWR8-NEXT: li r5, 1
807 ; CHECK-PWR8-NEXT: cmpw r4, r3
808 ; CHECK-PWR8-NEXT: li r6, -1
809 ; CHECK-PWR8-NEXT: iselgt r5, r6, r5
810 ; CHECK-PWR8-NEXT: cmplw r3, r4
811 ; CHECK-PWR8-NEXT: iseleq r3, 0, r5
812 ; CHECK-PWR8-NEXT: blr
813 %t1 = icmp eq i32 %a, %b
814 %t2 = icmp sgt i32 %b, %a
815 %t3 = select i1 %t2, i64 -1, i64 1
816 %t4 = select i1 %t1, i64 0, i64 %t3
817 ret i64 %t4
818 }
820 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setne)), setlt
821 define i64 @setbsh1(i16 signext %a, i16 signext %b) {
822 ; CHECK-LABEL: setbsh1:
823 ; CHECK: # %bb.0:
824 ; CHECK-NEXT: cmpw r3, r4
825 ; CHECK-NEXT: setb r3, cr0
826 ; CHECK-NEXT: blr
827 ;
828 ; CHECK-PWR8-LABEL: setbsh1:
829 ; CHECK-PWR8: # %bb.0:
830 ; CHECK-PWR8-NEXT: xor r6, r4, r3
831 ; CHECK-PWR8-NEXT: li r5, -1
832 ; CHECK-PWR8-NEXT: cntlzw r6, r6
833 ; CHECK-PWR8-NEXT: cmpw r3, r4
834 ; CHECK-PWR8-NEXT: srwi r6, r6, 5
835 ; CHECK-PWR8-NEXT: xori r3, r6, 1
836 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
837 ; CHECK-PWR8-NEXT: blr
838 %t1 = icmp slt i16 %a, %b
839 %t2 = icmp ne i16 %b, %a
840 %t3 = zext i1 %t2 to i64
841 %t4 = select i1 %t1, i64 -1, i64 %t3
842 ret i64 %t4
843 }
845 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setne)), setgt
846 define i64 @setbsh2(i16 signext %a, i16 signext %b) {
847 ; CHECK-LABEL: setbsh2:
848 ; CHECK: # %bb.0:
849 ; CHECK-NEXT: cmpw r3, r4
850 ; CHECK-NEXT: setb r3, cr0
851 ; CHECK-NEXT: blr
852 ;
853 ; CHECK-PWR8-LABEL: setbsh2:
854 ; CHECK-PWR8: # %bb.0:
855 ; CHECK-PWR8-NEXT: xor r6, r4, r3
856 ; CHECK-PWR8-NEXT: li r5, -1
857 ; CHECK-PWR8-NEXT: cntlzw r6, r6
858 ; CHECK-PWR8-NEXT: cmpw r4, r3
859 ; CHECK-PWR8-NEXT: srwi r6, r6, 5
860 ; CHECK-PWR8-NEXT: xori r3, r6, 1
861 ; CHECK-PWR8-NEXT: iselgt r3, r5, r3
862 ; CHECK-PWR8-NEXT: blr
863 %t1 = icmp sgt i16 %b, %a
864 %t2 = icmp ne i16 %b, %a
865 %t3 = zext i1 %t2 to i64
866 %t4 = select i1 %t1, i64 -1, i64 %t3
867 ret i64 %t4
868 }
870 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setgt)), setlt
871 define i64 @setbsc1(i8 %a, i8 %b) {
872 ; CHECK-LABEL: setbsc1:
873 ; CHECK: # %bb.0:
874 ; CHECK-NEXT: extsb r4, r4
875 ; CHECK-NEXT: extsb r3, r3
876 ; CHECK-NEXT: cmpw r3, r4
877 ; CHECK-NEXT: setb r3, cr0
878 ; CHECK-NEXT: blr
879 ;
880 ; CHECK-PWR8-LABEL: setbsc1:
881 ; CHECK-PWR8: # %bb.0:
882 ; CHECK-PWR8-NEXT: extsb r4, r4
883 ; CHECK-PWR8-NEXT: extsb r3, r3
884 ; CHECK-PWR8-NEXT: li r5, -1
885 ; CHECK-PWR8-NEXT: extsw r4, r4
886 ; CHECK-PWR8-NEXT: extsw r3, r3
887 ; CHECK-PWR8-NEXT: sub r6, r4, r3
888 ; CHECK-PWR8-NEXT: cmpw r3, r4
889 ; CHECK-PWR8-NEXT: rldicl r3, r6, 1, 63
890 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
891 ; CHECK-PWR8-NEXT: blr
892 %t1 = icmp slt i8 %a, %b
893 %t2 = icmp sgt i8 %a, %b
894 %t3 = zext i1 %t2 to i64
895 %t4 = select i1 %t1, i64 -1, i64 %t3
896 ret i64 %t4
897 }
899 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setgt)), setgt
900 define i64 @setbsc2(i8 %a, i8 %b) {
901 ; CHECK-LABEL: setbsc2:
902 ; CHECK: # %bb.0:
903 ; CHECK-NEXT: extsb r4, r4
904 ; CHECK-NEXT: extsb r3, r3
905 ; CHECK-NEXT: cmpw r3, r4
906 ; CHECK-NEXT: setb r3, cr0
907 ; CHECK-NEXT: blr
908 ;
909 ; CHECK-PWR8-LABEL: setbsc2:
910 ; CHECK-PWR8: # %bb.0:
911 ; CHECK-PWR8-NEXT: extsb r4, r4
912 ; CHECK-PWR8-NEXT: extsb r3, r3
913 ; CHECK-PWR8-NEXT: li r5, -1
914 ; CHECK-PWR8-NEXT: extsw r4, r4
915 ; CHECK-PWR8-NEXT: extsw r3, r3
916 ; CHECK-PWR8-NEXT: sub r6, r4, r3
917 ; CHECK-PWR8-NEXT: cmpw r4, r3
918 ; CHECK-PWR8-NEXT: rldicl r3, r6, 1, 63
919 ; CHECK-PWR8-NEXT: iselgt r3, r5, r3
920 ; CHECK-PWR8-NEXT: blr
921 %t1 = icmp sgt i8 %b, %a
922 %t2 = icmp sgt i8 %a, %b
923 %t3 = zext i1 %t2 to i64
924 %t4 = select i1 %t1, i64 -1, i64 %t3
925 ret i64 %t4
926 }
928 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
929 define i64 @setbsc3(i4 %a, i4 %b) {
930 ; CHECK-LABEL: setbsc3:
931 ; CHECK: # %bb.0:
932 ; CHECK-NEXT: slwi r4, r4, 28
933 ; CHECK-NEXT: slwi r3, r3, 28
934 ; CHECK-NEXT: srawi r4, r4, 28
935 ; CHECK-NEXT: srawi r3, r3, 28
936 ; CHECK-NEXT: cmpw r3, r4
937 ; CHECK-NEXT: setb r3, cr0
938 ; CHECK-NEXT: blr
939 ;
940 ; CHECK-PWR8-LABEL: setbsc3:
941 ; CHECK-PWR8: # %bb.0:
942 ; CHECK-PWR8-NEXT: slwi r4, r4, 28
943 ; CHECK-PWR8-NEXT: slwi r3, r3, 28
944 ; CHECK-PWR8-NEXT: li r5, -1
945 ; CHECK-PWR8-NEXT: srawi r4, r4, 28
946 ; CHECK-PWR8-NEXT: srawi r3, r3, 28
947 ; CHECK-PWR8-NEXT: extsw r4, r4
948 ; CHECK-PWR8-NEXT: extsw r3, r3
949 ; CHECK-PWR8-NEXT: sub r6, r4, r3
950 ; CHECK-PWR8-NEXT: cmpw r3, r4
951 ; CHECK-PWR8-NEXT: rldicl r3, r6, 1, 63
952 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
953 ; CHECK-PWR8-NEXT: blr
954 %t1 = icmp slt i4 %a, %b
955 %t2 = icmp slt i4 %b, %a
956 %t3 = zext i1 %t2 to i64
957 %t4 = select i1 %t1, i64 -1, i64 %t3
958 ret i64 %t4
959 }
961 ; Test with unsigned integer type i64/i32/i16/i8 for input parameter
963 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setult)), setugt
964 define i64 @setbud1(i64 %a, i64 %b) {
965 ; CHECK-LABEL: setbud1:
966 ; CHECK: # %bb.0:
967 ; CHECK-NEXT: cmpld r3, r4
968 ; CHECK-NEXT: setb r3, cr0
969 ; CHECK-NEXT: blr
970 ;
971 ; CHECK-PWR8-LABEL: setbud1:
972 ; CHECK-PWR8: # %bb.0:
973 ; CHECK-PWR8-NEXT: subc r6, r4, r3
974 ; CHECK-PWR8-NEXT: li r5, -1
975 ; CHECK-PWR8-NEXT: subfe r6, r4, r4
976 ; CHECK-PWR8-NEXT: cmpld r4, r3
977 ; CHECK-PWR8-NEXT: neg r3, r6
978 ; CHECK-PWR8-NEXT: iselgt r3, r5, r3
979 ; CHECK-PWR8-NEXT: blr
980 %t1 = icmp ugt i64 %b, %a
981 %t2 = icmp ult i64 %b, %a
982 %t3 = zext i1 %t2 to i64
983 %t4 = select i1 %t1, i64 -1, i64 %t3
984 ret i64 %t4
985 }
987 ; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setugt
988 define i64 @setbud2(i64 %a, i64 %b) {
989 ; CHECK-LABEL: setbud2:
990 ; CHECK: # %bb.0:
991 ; CHECK-NEXT: cmpld r3, r4
992 ; CHECK-NEXT: setb r3, cr0
993 ; CHECK-NEXT: blr
994 ;
995 ; CHECK-PWR8-LABEL: setbud2:
996 ; CHECK-PWR8: # %bb.0:
997 ; CHECK-PWR8-NEXT: xor r6, r3, r4
998 ; CHECK-PWR8-NEXT: li r5, 1
999 ; CHECK-PWR8-NEXT: subfic r6, r6, 0
1000 ; CHECK-PWR8-NEXT: cmpld r3, r4
1001 ; CHECK-PWR8-NEXT: subfe r3, r6, r6
1002 ; CHECK-PWR8-NEXT: iselgt r3, r5, r3
1003 ; CHECK-PWR8-NEXT: blr
1004 %t1 = icmp ugt i64 %a, %b
1005 %t2 = icmp ne i64 %a, %b
1006 %t3 = sext i1 %t2 to i64
1007 %t4 = select i1 %t1, i64 1, i64 %t3
1008 ret i64 %t4
1009 }
1011 ; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setugt), seteq
1012 define i64 @setbud3(i64 %a, i64 %b) {
1013 ; CHECK-LABEL: setbud3:
1014 ; CHECK: # %bb.0:
1015 ; CHECK-NEXT: cmpld r3, r4
1016 ; CHECK-NEXT: setb r3, cr0
1017 ; CHECK-NEXT: blr
1018 ;
1019 ; CHECK-PWR8-LABEL: setbud3:
1020 ; CHECK-PWR8: # %bb.0:
1021 ; CHECK-PWR8-NEXT: li r5, 1
1022 ; CHECK-PWR8-NEXT: cmpld r4, r3
1023 ; CHECK-PWR8-NEXT: li r3, -1
1024 ; CHECK-PWR8-NEXT: iselgt r3, r3, r5
1025 ; CHECK-PWR8-NEXT: iseleq r3, 0, r3
1026 ; CHECK-PWR8-NEXT: blr
1027 %t1 = icmp eq i64 %b, %a
1028 %t2 = icmp ugt i64 %b, %a
1029 %t3 = select i1 %t2, i64 -1, i64 1
1030 %t4 = select i1 %t1, i64 0, i64 %t3
1031 ret i64 %t4
1032 }
1034 ; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setult
1035 define i64 @setbuw1(i32 %a, i32 %b) {
1036 ; CHECK-LABEL: setbuw1:
1037 ; CHECK: # %bb.0:
1038 ; CHECK-NEXT: cmplw r3, r4
1039 ; CHECK-NEXT: setb r3, cr0
1040 ; CHECK-NEXT: blr
1041 ;
1042 ; CHECK-PWR8-LABEL: setbuw1:
1043 ; CHECK-PWR8: # %bb.0:
1044 ; CHECK-PWR8-NEXT: xor r6, r3, r4
1045 ; CHECK-PWR8-NEXT: li r5, 1
1046 ; CHECK-PWR8-NEXT: cntlzw r6, r6
1047 ; CHECK-PWR8-NEXT: cmplw r4, r3
1048 ; CHECK-PWR8-NEXT: srwi r6, r6, 5
1049 ; CHECK-PWR8-NEXT: xori r6, r6, 1
1050 ; CHECK-PWR8-NEXT: neg r3, r6
1051 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
1052 ; CHECK-PWR8-NEXT: blr
1053 %t1 = icmp ult i32 %b, %a
1054 %t2 = icmp ne i32 %a, %b
1055 %t3 = sext i1 %t2 to i64
1056 %t4 = select i1 %t1, i64 1, i64 %t3
1057 ret i64 %t4
1058 }
1060 ; select_cc lhs, rhs, 1, (sext (setcc rhs, lhs, setne)), setugt
1061 define i64 @setbuw2(i32 %a, i32 %b) {
1062 ; CHECK-LABEL: setbuw2:
1063 ; CHECK: # %bb.0:
1064 ; CHECK-NEXT: cmplw r3, r4
1065 ; CHECK-NEXT: setb r3, cr0
1066 ; CHECK-NEXT: blr
1067 ;
1068 ; CHECK-PWR8-LABEL: setbuw2:
1069 ; CHECK-PWR8: # %bb.0:
1070 ; CHECK-PWR8-NEXT: xor r6, r4, r3
1071 ; CHECK-PWR8-NEXT: li r5, 1
1072 ; CHECK-PWR8-NEXT: cntlzw r6, r6
1073 ; CHECK-PWR8-NEXT: cmplw r3, r4
1074 ; CHECK-PWR8-NEXT: srwi r6, r6, 5
1075 ; CHECK-PWR8-NEXT: xori r6, r6, 1
1076 ; CHECK-PWR8-NEXT: neg r3, r6
1077 ; CHECK-PWR8-NEXT: iselgt r3, r5, r3
1078 ; CHECK-PWR8-NEXT: blr
1079 %t1 = icmp ugt i32 %a, %b
1080 %t2 = icmp ne i32 %b, %a
1081 %t3 = sext i1 %t2 to i64
1082 %t4 = select i1 %t1, i64 1, i64 %t3
1083 ret i64 %t4
1084 }
1086 ; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setne)), setult
1087 define i64 @setbuh(i16 %a, i16 %b) {
1088 ; CHECK-LABEL: setbuh:
1089 ; CHECK: # %bb.0:
1090 ; CHECK-NEXT: clrlwi r4, r4, 16
1091 ; CHECK-NEXT: clrlwi r3, r3, 16
1092 ; CHECK-NEXT: cmplw r3, r4
1093 ; CHECK-NEXT: setb r3, cr0
1094 ; CHECK-NEXT: blr
1095 ;
1096 ; CHECK-PWR8-LABEL: setbuh:
1097 ; CHECK-PWR8: # %bb.0:
1098 ; CHECK-PWR8-NEXT: clrlwi r3, r3, 16
1099 ; CHECK-PWR8-NEXT: clrlwi r4, r4, 16
1100 ; CHECK-PWR8-NEXT: li r5, 1
1101 ; CHECK-PWR8-NEXT: xor r6, r4, r3
1102 ; CHECK-PWR8-NEXT: cmplw r4, r3
1103 ; CHECK-PWR8-NEXT: cntlzw r6, r6
1104 ; CHECK-PWR8-NEXT: srwi r6, r6, 5
1105 ; CHECK-PWR8-NEXT: xori r6, r6, 1
1106 ; CHECK-PWR8-NEXT: neg r3, r6
1107 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
1108 ; CHECK-PWR8-NEXT: blr
1109 %t1 = icmp ult i16 %b, %a
1110 %t2 = icmp ne i16 %b, %a
1111 %t3 = sext i1 %t2 to i64
1112 %t4 = select i1 %t1, i64 1, i64 %t3
1113 ret i64 %t4
1114 }
1116 ; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setult)), setugt
1117 define i64 @setbuc(i8 %a, i8 %b) {
1118 ; CHECK-LABEL: setbuc:
1119 ; CHECK: # %bb.0:
1120 ; CHECK-NEXT: clrlwi r4, r4, 24
1121 ; CHECK-NEXT: clrlwi r3, r3, 24
1122 ; CHECK-NEXT: cmplw r3, r4
1123 ; CHECK-NEXT: setb r3, cr0
1124 ; CHECK-NEXT: blr
1125 ;
1126 ; CHECK-PWR8-LABEL: setbuc:
1127 ; CHECK-PWR8: # %bb.0:
1128 ; CHECK-PWR8-NEXT: clrlwi r3, r3, 24
1129 ; CHECK-PWR8-NEXT: clrlwi r4, r4, 24
1130 ; CHECK-PWR8-NEXT: li r5, 1
1131 ; CHECK-PWR8-NEXT: clrldi r6, r3, 32
1132 ; CHECK-PWR8-NEXT: clrldi r7, r4, 32
1133 ; CHECK-PWR8-NEXT: sub r6, r6, r7
1134 ; CHECK-PWR8-NEXT: cmplw r3, r4
1135 ; CHECK-PWR8-NEXT: sradi r6, r6, 63
1136 ; CHECK-PWR8-NEXT: iselgt r3, r5, r6
1137 ; CHECK-PWR8-NEXT: blr
1138 %t1 = icmp ugt i8 %a, %b
1139 %t2 = icmp ult i8 %a, %b
1140 %t3 = sext i1 %t2 to i64
1141 %t4 = select i1 %t1, i64 1, i64 %t3
1142 ret i64 %t4
1143 }
1145 ; Test with float/double/float128 for input parameter
1147 ; select_cc lhs, rhs, -1, (zext (setcc rhs, lhs, setlt)), setlt
1148 define i64 @setbf1(float %a, float %b) {
1149 ; CHECK-LABEL: setbf1:
1150 ; CHECK: # %bb.0:
1151 ; CHECK-NEXT: fcmpu cr0, f1, f2
1152 ; CHECK-NEXT: setb r3, cr0
1153 ; CHECK-NEXT: blr
1154 ;
1155 ; CHECK-PWR8-LABEL: setbf1:
1156 ; CHECK-PWR8: # %bb.0:
1157 ; CHECK-PWR8-NEXT: fcmpu cr0, f2, f1
1158 ; CHECK-PWR8-NEXT: fcmpu cr1, f1, f2
1159 ; CHECK-PWR8-NEXT: li r3, 0
1160 ; CHECK-PWR8-NEXT: li r4, 1
1161 ; CHECK-PWR8-NEXT: isellt r3, r4, r3
1162 ; CHECK-PWR8-NEXT: li r4, -1
1163 ; CHECK-PWR8-NEXT: isel r3, r4, r3, 4*cr1+lt
1164 ; CHECK-PWR8-NEXT: blr
1165 %t1 = fcmp nnan olt float %a, %b
1166 %t2 = fcmp nnan olt float %b, %a
1167 %t3 = zext i1 %t2 to i64
1168 %t4 = select i1 %t1, i64 -1, i64 %t3
1169 ret i64 %t4
1170 }
1172 ; select_cc lhs, rhs, -1, (zext (setcc lhs, rhs, setlt)), setgt
1173 define i64 @setbf2(float %a, float %b) {
1174 ; CHECK-LABEL: setbf2:
1175 ; CHECK: # %bb.0:
1176 ; CHECK-NEXT: fcmpu cr0, f1, f2
1177 ; CHECK-NEXT: setb r3, cr0
1178 ; CHECK-NEXT: blr
1179 ;
1180 ; CHECK-PWR8-LABEL: setbf2:
1181 ; CHECK-PWR8: # %bb.0:
1182 ; CHECK-PWR8-NEXT: fcmpu cr0, f2, f1
1183 ; CHECK-PWR8-NEXT: li r3, 0
1184 ; CHECK-PWR8-NEXT: li r4, 1
1185 ; CHECK-PWR8-NEXT: isellt r3, r4, r3
1186 ; CHECK-PWR8-NEXT: li r4, -1
1187 ; CHECK-PWR8-NEXT: iselgt r3, r4, r3
1188 ; CHECK-PWR8-NEXT: blr
1189 %t1 = fcmp nnan ogt float %b, %a
1190 %t2 = fcmp nnan olt float %b, %a
1191 %t3 = zext i1 %t2 to i64
1192 %t4 = select i1 %t1, i64 -1, i64 %t3
1193 ret i64 %t4
1194 }
1196 ; select_cc lhs, rhs, 0, (select_cc lhs, rhs, -1, 1, setgt), seteq
1197 define i64 @setbdf1(double %a, double %b) {
1198 ; CHECK-LABEL: setbdf1:
1199 ; CHECK: # %bb.0:
1200 ; CHECK-NEXT: xscmpudp cr0, f1, f2
1201 ; CHECK-NEXT: setb r3, cr0
1202 ; CHECK-NEXT: blr
1203 ;
1204 ; CHECK-PWR8-LABEL: setbdf1:
1205 ; CHECK-PWR8: # %bb.0:
1206 ; CHECK-PWR8-NEXT: xscmpudp cr0, f2, f1
1207 ; CHECK-PWR8-NEXT: li r3, 1
1208 ; CHECK-PWR8-NEXT: li r4, -1
1209 ; CHECK-PWR8-NEXT: iselgt r3, r4, r3
1210 ; CHECK-PWR8-NEXT: iseleq r3, 0, r3
1211 ; CHECK-PWR8-NEXT: blr
1212 %t1 = fcmp nnan oeq double %b, %a
1213 %t2 = fcmp nnan ogt double %b, %a
1214 %t3 = select i1 %t2, i64 -1, i64 1
1215 %t4 = select i1 %t1, i64 0, i64 %t3
1216 ret i64 %t4
1217 }
1219 ; select_cc lhs, rhs, 1, (sext (setcc lhs, rhs, setgt)), setlt
1220 define i64 @setbdf2(double %a, double %b) {
1221 ; CHECK-LABEL: setbdf2:
1222 ; CHECK: # %bb.0:
1223 ; CHECK-NEXT: xscmpudp cr0, f1, f2
1224 ; CHECK-NEXT: setb r3, cr0
1225 ; CHECK-NEXT: blr
1226 ;
1227 ; CHECK-PWR8-LABEL: setbdf2:
1228 ; CHECK-PWR8: # %bb.0:
1229 ; CHECK-PWR8-NEXT: fcmpu cr0, f2, f1
1230 ; CHECK-PWR8-NEXT: xscmpudp cr1, f2, f1
1231 ; CHECK-PWR8-NEXT: li r3, 0
1232 ; CHECK-PWR8-NEXT: li r4, -1
1233 ; CHECK-PWR8-NEXT: iselgt r3, r4, r3
1234 ; CHECK-PWR8-NEXT: li r4, 1
1235 ; CHECK-PWR8-NEXT: isel r3, r4, r3, 4*cr1+lt
1236 ; CHECK-PWR8-NEXT: blr
1237 %t1 = fcmp nnan olt double %b, %a
1238 %t2 = fcmp nnan ogt double %b, %a
1239 %t3 = sext i1 %t2 to i64
1240 %t4 = select i1 %t1, i64 1, i64 %t3
1241 ret i64 %t4
1242 }
1244 define i64 @setbf128(fp128 %a, fp128 %b) {
1245 ; CHECK-LABEL: setbf128:
1246 ; CHECK: # %bb.0:
1247 ; CHECK-NEXT: xscmpuqp cr0, v2, v3
1248 ; CHECK-NEXT: setb r3, cr0
1249 ; CHECK-NEXT: blr
1250 ;
1251 ; CHECK-PWR8-LABEL: setbf128:
1252 ; CHECK-PWR8: # %bb.0:
1253 ; CHECK-PWR8-NEXT: mflr r0
1254 ; CHECK-PWR8-NEXT: std r0, 16(r1)
1255 ; CHECK-PWR8-NEXT: stdu r1, -96(r1)
1256 ; CHECK-PWR8-NEXT: .cfi_def_cfa_offset 96
1257 ; CHECK-PWR8-NEXT: .cfi_offset lr, 16
1258 ; CHECK-PWR8-NEXT: .cfi_offset r30, -16
1259 ; CHECK-PWR8-NEXT: .cfi_offset v30, -48
1260 ; CHECK-PWR8-NEXT: .cfi_offset v31, -32
1261 ; CHECK-PWR8-NEXT: li r3, 48
1262 ; CHECK-PWR8-NEXT: std r30, 80(r1) # 8-byte Folded Spill
1263 ; CHECK-PWR8-NEXT: stvx v30, r1, r3 # 16-byte Folded Spill
1264 ; CHECK-PWR8-NEXT: li r3, 64
1265 ; CHECK-PWR8-NEXT: vmr v30, v2
1266 ; CHECK-PWR8-NEXT: stvx v31, r1, r3 # 16-byte Folded Spill
1267 ; CHECK-PWR8-NEXT: vmr v31, v3
1268 ; CHECK-PWR8-NEXT: bl __ltkf2
1269 ; CHECK-PWR8-NEXT: nop
1270 ; CHECK-PWR8-NEXT: vmr v2, v30
1271 ; CHECK-PWR8-NEXT: srawi r30, r3, 31
1272 ; CHECK-PWR8-NEXT: vmr v3, v31
1273 ; CHECK-PWR8-NEXT: bl __gtkf2
1274 ; CHECK-PWR8-NEXT: nop
1275 ; CHECK-PWR8-NEXT: li r4, 1
1276 ; CHECK-PWR8-NEXT: cmpwi r3, 0
1277 ; CHECK-PWR8-NEXT: iselgt r3, r4, r30
1278 ; CHECK-PWR8-NEXT: li r4, 64
1279 ; CHECK-PWR8-NEXT: ld r30, 80(r1) # 8-byte Folded Reload
1280 ; CHECK-PWR8-NEXT: lvx v31, r1, r4 # 16-byte Folded Reload
1281 ; CHECK-PWR8-NEXT: li r4, 48
1282 ; CHECK-PWR8-NEXT: lvx v30, r1, r4 # 16-byte Folded Reload
1283 ; CHECK-PWR8-NEXT: addi r1, r1, 96
1284 ; CHECK-PWR8-NEXT: ld r0, 16(r1)
1285 ; CHECK-PWR8-NEXT: mtlr r0
1286 ; CHECK-PWR8-NEXT: blr
1287 %t1 = fcmp nnan ogt fp128 %a, %b
1288 %t2 = fcmp nnan olt fp128 %a, %b
1289 %t3 = sext i1 %t2 to i64
1290 %t4 = select i1 %t1, i64 1, i64 %t3
1291 ret i64 %t4
1292 }
1294 ; Some cases we can't leverage setb
1296 define i64 @setbn1(i64 %a, i64 %b) {
1297 ; CHECK-LABEL: setbn1:
1298 ; CHECK: # %bb.0:
1299 ; CHECK-NEXT: xor r5, r3, r4
1300 ; CHECK-NEXT: cmpd r3, r4
1301 ; CHECK-NEXT: li r3, -1
1302 ; CHECK-NEXT: cntlzd r5, r5
1303 ; CHECK-NEXT: rldicl r5, r5, 58, 63
1304 ; CHECK-NEXT: isellt r3, r3, r5
1305 ; CHECK-NEXT: blr
1306 ;
1307 ; CHECK-PWR8-LABEL: setbn1:
1308 ; CHECK-PWR8: # %bb.0:
1309 ; CHECK-PWR8-NEXT: xor r6, r3, r4
1310 ; CHECK-PWR8-NEXT: li r5, -1
1311 ; CHECK-PWR8-NEXT: cntlzd r6, r6
1312 ; CHECK-PWR8-NEXT: cmpd r3, r4
1313 ; CHECK-PWR8-NEXT: rldicl r3, r6, 58, 63
1314 ; CHECK-PWR8-NEXT: isellt r3, r5, r3
1315 ; CHECK-PWR8-NEXT: blr
1316 %t1 = icmp slt i64 %a, %b
1317 %t2 = icmp eq i64 %a, %b
1318 %t3 = zext i1 %t2 to i64
1319 %t4 = select i1 %t1, i64 -1, i64 %t3
1320 ret i64 %t4
1321 }
1323 define i64 @setbn2(double %a, double %b) {
1324 ; CHECK-LABEL: setbn2:
1325 ; CHECK: # %bb.0:
1326 ; CHECK-NEXT: fcmpu cr0, f1, f2
1327 ; CHECK-NEXT: li r3, 1
1328 ; CHECK-NEXT: li r4, -1
1329 ; CHECK-NEXT: cror 4*cr5+lt, un, eq
1330 ; CHECK-NEXT: xscmpudp cr0, f1, f2
1331 ; CHECK-NEXT: isel r3, 0, r3, 4*cr5+lt
1332 ; CHECK-NEXT: isellt r3, r4, r3
1333 ; CHECK-NEXT: blr
1334 ;
1335 ; CHECK-PWR8-LABEL: setbn2:
1336 ; CHECK-PWR8: # %bb.0:
1337 ; CHECK-PWR8-NEXT: fcmpu cr0, f1, f2
1338 ; CHECK-PWR8-NEXT: xscmpudp cr1, f1, f2
1339 ; CHECK-PWR8-NEXT: li r3, 1
1340 ; CHECK-PWR8-NEXT: li r4, -1
1341 ; CHECK-PWR8-NEXT: cror 4*cr5+lt, un, eq
1342 ; CHECK-PWR8-NEXT: isel r3, 0, r3, 4*cr5+lt
1343 ; CHECK-PWR8-NEXT: isel r3, r4, r3, 4*cr1+lt
1344 ; CHECK-PWR8-NEXT: blr
1345 %t1 = fcmp olt double %a, %b
1346 %t2 = fcmp one double %a, %b
1347 %t3 = zext i1 %t2 to i64
1348 %t4 = select i1 %t1, i64 -1, i64 %t3
1349 ret i64 %t4
1350 }
1352 define i64 @setbn3(float %a, float %b) {
1353 ; CHECK-LABEL: setbn3:
1354 ; CHECK: # %bb.0:
1355 ; CHECK-NEXT: fcmpu cr0, f1, f2
1356 ; CHECK-NEXT: li r3, 1
1357 ; CHECK-NEXT: li r4, -1
1358 ; CHECK-NEXT: iseleq r3, 0, r3
1359 ; CHECK-NEXT: cror 4*cr5+lt, lt, un
1360 ; CHECK-NEXT: isel r3, r4, r3, 4*cr5+lt
1361 ; CHECK-NEXT: blr
1362 ;
1363 ; CHECK-PWR8-LABEL: setbn3:
1364 ; CHECK-PWR8: # %bb.0:
1365 ; CHECK-PWR8-NEXT: fcmpu cr0, f1, f2
1366 ; CHECK-PWR8-NEXT: li r3, 1
1367 ; CHECK-PWR8-NEXT: li r4, -1
1368 ; CHECK-PWR8-NEXT: cror 4*cr5+lt, lt, un
1369 ; CHECK-PWR8-NEXT: iseleq r3, 0, r3
1370 ; CHECK-PWR8-NEXT: isel r3, r4, r3, 4*cr5+lt
1371 ; CHECK-PWR8-NEXT: blr
1372 %t1 = fcmp ult float %a, %b
1373 %t2 = fcmp une float %a, %b
1374 %t3 = zext i1 %t2 to i64
1375 %t4 = select i1 %t1, i64 -1, i64 %t3
1376 ret i64 %t4
1377 }
1379 ; Verify this case doesn't crash
1380 define void @setbn4(i128 %0, i32* %sel.out) {
1381 ; CHECK-LABEL: setbn4:
1382 ; CHECK: # %bb.0: # %entry
1383 ; CHECK-NEXT: li r6, 1
1384 ; CHECK-NEXT: cmpdi cr1, r3, 0
1385 ; CHECK-NEXT: li r3, 1
1386 ; CHECK-NEXT: rldic r6, r6, 48, 15
1387 ; CHECK-NEXT: cmpld r4, r6
1388 ; CHECK-NEXT: crandc 4*cr5+lt, gt, eq
1389 ; CHECK-NEXT: crandc 4*cr5+gt, eq, 4*cr1+eq
1390 ; CHECK-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
1391 ; CHECK-NEXT: rldicl. r4, r4, 16, 48
1392 ; CHECK-NEXT: li r4, -1
1393 ; CHECK-NEXT: isel r3, 0, r3, 4*cr5+lt
1394 ; CHECK-NEXT: iseleq r3, r4, r3
1395 ; CHECK-NEXT: stw r3, 0(r5)
1396 ; CHECK-NEXT: blr
1397 ;
1398 ; CHECK-PWR8-LABEL: setbn4:
1399 ; CHECK-PWR8: # %bb.0: # %entry
1400 ; CHECK-PWR8-NEXT: li r6, 1
1401 ; CHECK-PWR8-NEXT: cmpdi cr1, r3, 0
1402 ; CHECK-PWR8-NEXT: li r3, 1
1403 ; CHECK-PWR8-NEXT: rldic r6, r6, 48, 15
1404 ; CHECK-PWR8-NEXT: cmpld r4, r6
1405 ; CHECK-PWR8-NEXT: crandc 4*cr5+lt, gt, eq
1406 ; CHECK-PWR8-NEXT: crandc 4*cr5+gt, eq, 4*cr1+eq
1407 ; CHECK-PWR8-NEXT: rldicl. r4, r4, 16, 48
1408 ; CHECK-PWR8-NEXT: li r4, -1
1409 ; CHECK-PWR8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
1410 ; CHECK-PWR8-NEXT: isel r3, 0, r3, 4*cr5+lt
1411 ; CHECK-PWR8-NEXT: iseleq r3, r4, r3
1412 ; CHECK-PWR8-NEXT: stw r3, 0(r5)
1413 ; CHECK-PWR8-NEXT: blr
1414 entry:
1415 %c1 = icmp ult i128 %0, 5192296858534827628530496329220096
1416 %c2 = icmp ugt i128 %0, 5192296858534827628530496329220096
1417 %ext = zext i1 %c2 to i32
1418 %sel = select i1 %c1, i32 -1, i32 %ext
1419 store i32 %sel, i32* %sel.out, align 4
1420 ret void
1421 }