| blob | 71a9484000a5ca22789f16b73d46600146f52924 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3 ; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4 ; RUN: FileCheck %s --check-prefix=CHECK-P8
5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-P9
8 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
10 ; RUN: FileCheck %s --check-prefix=CHECK-BE
12 define i32 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
13 ; CHECK-P8-LABEL: test2elt:
14 ; CHECK-P8: # %bb.0: # %entry
15 ; CHECK-P8-NEXT: mtfprd f0, r3
16 ; CHECK-P8-NEXT: xxswapd v2, vs0
17 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
18 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
19 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
20 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
21 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
22 ; CHECK-P8-NEXT: mffprwz r4, f0
23 ; CHECK-P8-NEXT: mtvsrd v3, r4
24 ; CHECK-P8-NEXT: mffprwz r3, f1
25 ; CHECK-P8-NEXT: mtvsrd v2, r3
26 ; CHECK-P8-NEXT: vmrghh v2, v3, v2
27 ; CHECK-P8-NEXT: xxswapd vs0, v2
28 ; CHECK-P8-NEXT: mffprwz r3, f0
29 ; CHECK-P8-NEXT: blr
30 ;
31 ; CHECK-P9-LABEL: test2elt:
32 ; CHECK-P9: # %bb.0: # %entry
33 ; CHECK-P9-NEXT: mtfprd f0, r3
34 ; CHECK-P9-NEXT: xxswapd v2, vs0
35 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
36 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
37 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
38 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
39 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
40 ; CHECK-P9-NEXT: mffprwz r3, f1
41 ; CHECK-P9-NEXT: mtvsrd v2, r3
42 ; CHECK-P9-NEXT: mffprwz r3, f0
43 ; CHECK-P9-NEXT: mtvsrd v3, r3
44 ; CHECK-P9-NEXT: li r3, 0
45 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
46 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
47 ; CHECK-P9-NEXT: blr
48 ;
49 ; CHECK-BE-LABEL: test2elt:
50 ; CHECK-BE: # %bb.0: # %entry
51 ; CHECK-BE-NEXT: mtfprd f0, r3
52 ; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
53 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
54 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
55 ; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
56 ; CHECK-BE-NEXT: lxv v2, 0(r3)
57 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
58 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
59 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
60 ; CHECK-BE-NEXT: mffprwz r3, f1
61 ; CHECK-BE-NEXT: mtvsrwz v3, r3
62 ; CHECK-BE-NEXT: mffprwz r3, f0
63 ; CHECK-BE-NEXT: mtvsrwz v4, r3
64 ; CHECK-BE-NEXT: li r3, 0
65 ; CHECK-BE-NEXT: vperm v2, v3, v4, v2
66 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
67 ; CHECK-BE-NEXT: blr
68 entry:
69 %0 = bitcast i64 %a.coerce to <2 x float>
70 %1 = fptoui <2 x float> %0 to <2 x i16>
71 %2 = bitcast <2 x i16> %1 to i32
72 ret i32 %2
73 }
75 define i64 @test4elt(<4 x float> %a) local_unnamed_addr #1 {
76 ; CHECK-P8-LABEL: test4elt:
77 ; CHECK-P8: # %bb.0: # %entry
78 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
79 ; CHECK-P8-NEXT: xscvspdpn f1, v2
80 ; CHECK-P8-NEXT: xxswapd vs2, v2
81 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
82 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
83 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
84 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
85 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
86 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
87 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
88 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
89 ; CHECK-P8-NEXT: mffprwz r3, f1
90 ; CHECK-P8-NEXT: mtvsrd v2, r3
91 ; CHECK-P8-NEXT: mffprwz r3, f0
92 ; CHECK-P8-NEXT: mffprwz r4, f2
93 ; CHECK-P8-NEXT: mtvsrd v3, r3
94 ; CHECK-P8-NEXT: mffprwz r3, f3
95 ; CHECK-P8-NEXT: mtvsrd v4, r4
96 ; CHECK-P8-NEXT: mtvsrd v5, r3
97 ; CHECK-P8-NEXT: vmrghh v3, v4, v3
98 ; CHECK-P8-NEXT: vmrghh v2, v2, v5
99 ; CHECK-P8-NEXT: vmrglw v2, v2, v3
100 ; CHECK-P8-NEXT: xxswapd vs0, v2
101 ; CHECK-P8-NEXT: mffprd r3, f0
102 ; CHECK-P8-NEXT: blr
103 ;
104 ; CHECK-P9-LABEL: test4elt:
105 ; CHECK-P9: # %bb.0: # %entry
106 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
107 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
108 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
109 ; CHECK-P9-NEXT: mffprwz r3, f0
110 ; CHECK-P9-NEXT: xxswapd vs0, v2
111 ; CHECK-P9-NEXT: mtvsrd v3, r3
112 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
113 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
114 ; CHECK-P9-NEXT: mffprwz r3, f0
115 ; CHECK-P9-NEXT: xscvspdpn f0, v2
116 ; CHECK-P9-NEXT: mtvsrd v4, r3
117 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
118 ; CHECK-P9-NEXT: vmrghh v3, v4, v3
119 ; CHECK-P9-NEXT: mffprwz r3, f0
120 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
121 ; CHECK-P9-NEXT: mtvsrd v4, r3
122 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
123 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
124 ; CHECK-P9-NEXT: mffprwz r3, f0
125 ; CHECK-P9-NEXT: mtvsrd v2, r3
126 ; CHECK-P9-NEXT: vmrghh v2, v4, v2
127 ; CHECK-P9-NEXT: vmrglw v2, v2, v3
128 ; CHECK-P9-NEXT: mfvsrld r3, v2
129 ; CHECK-P9-NEXT: blr
130 ;
131 ; CHECK-BE-LABEL: test4elt:
132 ; CHECK-BE: # %bb.0: # %entry
133 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
134 ; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
135 ; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
136 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
137 ; CHECK-BE-NEXT: lxv v3, 0(r3)
138 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
139 ; CHECK-BE-NEXT: mffprwz r3, f0
140 ; CHECK-BE-NEXT: xxswapd vs0, v2
141 ; CHECK-BE-NEXT: mtvsrwz v4, r3
142 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
143 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
144 ; CHECK-BE-NEXT: mffprwz r3, f0
145 ; CHECK-BE-NEXT: xscvspdpn f0, v2
146 ; CHECK-BE-NEXT: mtvsrwz v5, r3
147 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
148 ; CHECK-BE-NEXT: vperm v4, v5, v4, v3
149 ; CHECK-BE-NEXT: mffprwz r3, f0
150 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
151 ; CHECK-BE-NEXT: mtvsrwz v5, r3
152 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
153 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
154 ; CHECK-BE-NEXT: mffprwz r3, f0
155 ; CHECK-BE-NEXT: mtvsrwz v2, r3
156 ; CHECK-BE-NEXT: vperm v2, v5, v2, v3
157 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
158 ; CHECK-BE-NEXT: mfvsrd r3, v2
159 ; CHECK-BE-NEXT: blr
160 entry:
161 %0 = fptoui <4 x float> %a to <4 x i16>
162 %1 = bitcast <4 x i16> %0 to i64
163 ret i64 %1
164 }
166 define <8 x i16> @test8elt(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
167 ; CHECK-P8-LABEL: test8elt:
168 ; CHECK-P8: # %bb.0: # %entry
169 ; CHECK-P8-NEXT: lvx v2, 0, r3
170 ; CHECK-P8-NEXT: li r4, 16
171 ; CHECK-P8-NEXT: lvx v3, r3, r4
172 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
173 ; CHECK-P8-NEXT: xxswapd vs1, v2
174 ; CHECK-P8-NEXT: xscvspdpn f2, v2
175 ; CHECK-P8-NEXT: xxsldwi vs4, v2, v2, 1
176 ; CHECK-P8-NEXT: xxsldwi vs5, v3, v3, 3
177 ; CHECK-P8-NEXT: xscvspdpn f3, v3
178 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
179 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
180 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
181 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
182 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
183 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
184 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
185 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
186 ; CHECK-P8-NEXT: mffprwz r3, f0
187 ; CHECK-P8-NEXT: xxswapd vs0, v3
188 ; CHECK-P8-NEXT: mffprwz r4, f1
189 ; CHECK-P8-NEXT: xxsldwi vs1, v3, v3, 1
190 ; CHECK-P8-NEXT: mtvsrd v2, r3
191 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
192 ; CHECK-P8-NEXT: mffprwz r3, f2
193 ; CHECK-P8-NEXT: xscvdpsxws f2, f4
194 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
195 ; CHECK-P8-NEXT: xscvdpsxws f4, f5
196 ; CHECK-P8-NEXT: mtvsrd v4, r4
197 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
198 ; CHECK-P8-NEXT: vmrghh v2, v4, v2
199 ; CHECK-P8-NEXT: mffprwz r4, f2
200 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
201 ; CHECK-P8-NEXT: mtvsrd v3, r3
202 ; CHECK-P8-NEXT: mffprwz r3, f3
203 ; CHECK-P8-NEXT: mtvsrd v4, r4
204 ; CHECK-P8-NEXT: mffprwz r4, f0
205 ; CHECK-P8-NEXT: vmrghh v3, v3, v4
206 ; CHECK-P8-NEXT: mtvsrd v4, r3
207 ; CHECK-P8-NEXT: mffprwz r3, f4
208 ; CHECK-P8-NEXT: mtvsrd v0, r4
209 ; CHECK-P8-NEXT: mtvsrd v5, r3
210 ; CHECK-P8-NEXT: mffprwz r3, f1
211 ; CHECK-P8-NEXT: vmrghh v5, v0, v5
212 ; CHECK-P8-NEXT: mtvsrd v1, r3
213 ; CHECK-P8-NEXT: vmrglw v2, v3, v2
214 ; CHECK-P8-NEXT: vmrghh v4, v4, v1
215 ; CHECK-P8-NEXT: vmrglw v3, v4, v5
216 ; CHECK-P8-NEXT: xxmrgld v2, v3, v2
217 ; CHECK-P8-NEXT: blr
218 ;
219 ; CHECK-P9-LABEL: test8elt:
220 ; CHECK-P9: # %bb.0: # %entry
221 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
222 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
223 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
224 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
225 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
226 ; CHECK-P9-NEXT: mffprwz r3, f2
227 ; CHECK-P9-NEXT: xxswapd vs2, vs1
228 ; CHECK-P9-NEXT: mtvsrd v2, r3
229 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
230 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
231 ; CHECK-P9-NEXT: mffprwz r3, f2
232 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
233 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
234 ; CHECK-P9-NEXT: mtvsrd v3, r3
235 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
236 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
237 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
238 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
239 ; CHECK-P9-NEXT: mffprwz r3, f2
240 ; CHECK-P9-NEXT: mtvsrd v3, r3
241 ; CHECK-P9-NEXT: mffprwz r3, f1
242 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
243 ; CHECK-P9-NEXT: mtvsrd v4, r3
244 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
245 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
246 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
247 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
248 ; CHECK-P9-NEXT: mffprwz r3, f1
249 ; CHECK-P9-NEXT: xxswapd vs1, vs0
250 ; CHECK-P9-NEXT: mtvsrd v3, r3
251 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
252 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
253 ; CHECK-P9-NEXT: mffprwz r3, f1
254 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
255 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
256 ; CHECK-P9-NEXT: mtvsrd v4, r3
257 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
258 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
259 ; CHECK-P9-NEXT: vmrghh v3, v4, v3
260 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
261 ; CHECK-P9-NEXT: mffprwz r3, f1
262 ; CHECK-P9-NEXT: mtvsrd v4, r3
263 ; CHECK-P9-NEXT: mffprwz r3, f0
264 ; CHECK-P9-NEXT: mtvsrd v5, r3
265 ; CHECK-P9-NEXT: vmrghh v4, v4, v5
266 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
267 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
268 ; CHECK-P9-NEXT: blr
269 ;
270 ; CHECK-BE-LABEL: test8elt:
271 ; CHECK-BE: # %bb.0: # %entry
272 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
273 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
274 ; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
275 ; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
276 ; CHECK-BE-NEXT: lxv v2, 0(r3)
277 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
278 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
279 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
280 ; CHECK-BE-NEXT: mffprwz r3, f2
281 ; CHECK-BE-NEXT: xxswapd vs2, vs1
282 ; CHECK-BE-NEXT: mtvsrwz v3, r3
283 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
284 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
285 ; CHECK-BE-NEXT: mffprwz r3, f2
286 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
287 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
288 ; CHECK-BE-NEXT: mtvsrwz v4, r3
289 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
290 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
291 ; CHECK-BE-NEXT: vperm v3, v4, v3, v2
292 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
293 ; CHECK-BE-NEXT: mffprwz r3, f2
294 ; CHECK-BE-NEXT: mtvsrwz v4, r3
295 ; CHECK-BE-NEXT: mffprwz r3, f1
296 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
297 ; CHECK-BE-NEXT: mtvsrwz v5, r3
298 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
299 ; CHECK-BE-NEXT: vperm v4, v4, v5, v2
300 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
301 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
302 ; CHECK-BE-NEXT: mffprwz r3, f1
303 ; CHECK-BE-NEXT: xxswapd vs1, vs0
304 ; CHECK-BE-NEXT: mtvsrwz v4, r3
305 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
306 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
307 ; CHECK-BE-NEXT: mffprwz r3, f1
308 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
309 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
310 ; CHECK-BE-NEXT: mtvsrwz v5, r3
311 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
312 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
313 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
314 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
315 ; CHECK-BE-NEXT: mffprwz r3, f1
316 ; CHECK-BE-NEXT: mtvsrwz v5, r3
317 ; CHECK-BE-NEXT: mffprwz r3, f0
318 ; CHECK-BE-NEXT: mtvsrwz v0, r3
319 ; CHECK-BE-NEXT: vperm v2, v5, v0, v2
320 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
321 ; CHECK-BE-NEXT: xxmrghd v2, v2, v3
322 ; CHECK-BE-NEXT: blr
323 entry:
324 %a = load <8 x float>, <8 x float>* %0, align 32
325 %1 = fptoui <8 x float> %a to <8 x i16>
326 ret <8 x i16> %1
327 }
329 define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
330 ; CHECK-P8-LABEL: test16elt:
331 ; CHECK-P8: # %bb.0: # %entry
332 ; CHECK-P8-NEXT: lvx v5, 0, r4
333 ; CHECK-P8-NEXT: li r5, 16
334 ; CHECK-P8-NEXT: li r6, 32
335 ; CHECK-P8-NEXT: lvx v3, r4, r5
336 ; CHECK-P8-NEXT: lvx v2, r4, r6
337 ; CHECK-P8-NEXT: li r6, 48
338 ; CHECK-P8-NEXT: xxsldwi vs0, v5, v5, 3
339 ; CHECK-P8-NEXT: xscvspdpn f1, v5
340 ; CHECK-P8-NEXT: lvx v4, r4, r6
341 ; CHECK-P8-NEXT: xxswapd vs3, v5
342 ; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1
343 ; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 3
344 ; CHECK-P8-NEXT: xxswapd vs8, v3
345 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
346 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
347 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
348 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
349 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
350 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
351 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
352 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
353 ; CHECK-P8-NEXT: xscvspdpn f2, v3
354 ; CHECK-P8-NEXT: mffprwz r4, f1
355 ; CHECK-P8-NEXT: xscvdpsxws f1, f5
356 ; CHECK-P8-NEXT: mtvsrd v5, r4
357 ; CHECK-P8-NEXT: mffprwz r4, f0
358 ; CHECK-P8-NEXT: xxsldwi vs0, v3, v3, 1
359 ; CHECK-P8-NEXT: xscvspdpn f4, v2
360 ; CHECK-P8-NEXT: xscvdpsxws f5, f7
361 ; CHECK-P8-NEXT: xxsldwi vs7, v4, v4, 3
362 ; CHECK-P8-NEXT: mtvsrd v3, r4
363 ; CHECK-P8-NEXT: mffprwz r4, f3
364 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 3
365 ; CHECK-P8-NEXT: xscvspdpn f6, v4
366 ; CHECK-P8-NEXT: mtvsrd v0, r4
367 ; CHECK-P8-NEXT: mffprwz r4, f1
368 ; CHECK-P8-NEXT: xscvdpsxws f1, f8
369 ; CHECK-P8-NEXT: xxswapd vs8, v4
370 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
371 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
372 ; CHECK-P8-NEXT: mtvsrd v1, r4
373 ; CHECK-P8-NEXT: mffprwz r4, f5
374 ; CHECK-P8-NEXT: xxswapd vs5, v2
375 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
376 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
377 ; CHECK-P8-NEXT: vmrghh v3, v0, v3
378 ; CHECK-P8-NEXT: mtvsrd v0, r4
379 ; CHECK-P8-NEXT: mffprwz r4, f1
380 ; CHECK-P8-NEXT: xscvdpsxws f6, f6
381 ; CHECK-P8-NEXT: xscvspdpn f1, vs5
382 ; CHECK-P8-NEXT: xxsldwi vs5, v2, v2, 1
383 ; CHECK-P8-NEXT: mtvsrd v6, r4
384 ; CHECK-P8-NEXT: mffprwz r4, f2
385 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
386 ; CHECK-P8-NEXT: vmrghh v2, v5, v1
387 ; CHECK-P8-NEXT: vmrghh v5, v6, v0
388 ; CHECK-P8-NEXT: mtvsrd v0, r4
389 ; CHECK-P8-NEXT: mffprwz r4, f4
390 ; CHECK-P8-NEXT: xscvdpsxws f2, f3
391 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
392 ; CHECK-P8-NEXT: mtvsrd v1, r4
393 ; CHECK-P8-NEXT: mffprwz r4, f6
394 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
395 ; CHECK-P8-NEXT: mtvsrd v6, r4
396 ; CHECK-P8-NEXT: mffprwz r4, f0
397 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
398 ; CHECK-P8-NEXT: mtvsrd v7, r4
399 ; CHECK-P8-NEXT: mffprwz r4, f2
400 ; CHECK-P8-NEXT: xxsldwi vs2, v4, v4, 1
401 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
402 ; CHECK-P8-NEXT: xscvdpsxws f0, f5
403 ; CHECK-P8-NEXT: mtvsrd v4, r4
404 ; CHECK-P8-NEXT: mffprwz r4, f1
405 ; CHECK-P8-NEXT: xscvspdpn f1, vs2
406 ; CHECK-P8-NEXT: xscvdpsxws f3, f7
407 ; CHECK-P8-NEXT: mtvsrd v8, r4
408 ; CHECK-P8-NEXT: mffprwz r4, f0
409 ; CHECK-P8-NEXT: xscvdpsxws f0, f8
410 ; CHECK-P8-NEXT: mtvsrd v9, r4
411 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
412 ; CHECK-P8-NEXT: mffprwz r4, f3
413 ; CHECK-P8-NEXT: vmrghh v0, v0, v7
414 ; CHECK-P8-NEXT: mtvsrd v7, r4
415 ; CHECK-P8-NEXT: mffprwz r4, f0
416 ; CHECK-P8-NEXT: vmrghh v4, v8, v4
417 ; CHECK-P8-NEXT: mtvsrd v8, r4
418 ; CHECK-P8-NEXT: mffprwz r4, f1
419 ; CHECK-P8-NEXT: vmrghh v1, v1, v9
420 ; CHECK-P8-NEXT: mtvsrd v9, r4
421 ; CHECK-P8-NEXT: vmrghh v7, v8, v7
422 ; CHECK-P8-NEXT: vmrghh v6, v6, v9
423 ; CHECK-P8-NEXT: vmrglw v2, v2, v3
424 ; CHECK-P8-NEXT: vmrglw v3, v0, v5
425 ; CHECK-P8-NEXT: vmrglw v4, v1, v4
426 ; CHECK-P8-NEXT: vmrglw v5, v6, v7
427 ; CHECK-P8-NEXT: xxmrgld v2, v3, v2
428 ; CHECK-P8-NEXT: stvx v2, 0, r3
429 ; CHECK-P8-NEXT: xxmrgld v3, v5, v4
430 ; CHECK-P8-NEXT: stvx v3, r3, r5
431 ; CHECK-P8-NEXT: blr
432 ;
433 ; CHECK-P9-LABEL: test16elt:
434 ; CHECK-P9: # %bb.0: # %entry
435 ; CHECK-P9-NEXT: lxv vs2, 0(r4)
436 ; CHECK-P9-NEXT: lxv vs1, 16(r4)
437 ; CHECK-P9-NEXT: lxv vs0, 32(r4)
438 ; CHECK-P9-NEXT: xxsldwi vs3, vs2, vs2, 3
439 ; CHECK-P9-NEXT: xxswapd vs4, vs2
440 ; CHECK-P9-NEXT: xscvspdpn f5, vs2
441 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
442 ; CHECK-P9-NEXT: xxsldwi vs6, vs1, vs1, 3
443 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
444 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
445 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
446 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
447 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
448 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
449 ; CHECK-P9-NEXT: mffprwz r5, f3
450 ; CHECK-P9-NEXT: xxswapd vs3, vs1
451 ; CHECK-P9-NEXT: mtvsrd v2, r5
452 ; CHECK-P9-NEXT: mffprwz r5, f4
453 ; CHECK-P9-NEXT: xscvdpsxws f4, f5
454 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
455 ; CHECK-P9-NEXT: mtvsrd v3, r5
456 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
457 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
458 ; CHECK-P9-NEXT: mffprwz r5, f4
459 ; CHECK-P9-NEXT: xscvspdpn f4, vs6
460 ; CHECK-P9-NEXT: mtvsrd v3, r5
461 ; CHECK-P9-NEXT: mffprwz r5, f2
462 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
463 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
464 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
465 ; CHECK-P9-NEXT: mtvsrd v4, r5
466 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
467 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
468 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
469 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
470 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
471 ; CHECK-P9-NEXT: mffprwz r5, f4
472 ; CHECK-P9-NEXT: mtvsrd v4, r5
473 ; CHECK-P9-NEXT: mffprwz r5, f3
474 ; CHECK-P9-NEXT: xxsldwi vs3, vs0, vs0, 3
475 ; CHECK-P9-NEXT: mtvsrd v5, r5
476 ; CHECK-P9-NEXT: mffprwz r5, f2
477 ; CHECK-P9-NEXT: xscvspdpn f2, vs3
478 ; CHECK-P9-NEXT: vmrghh v4, v5, v4
479 ; CHECK-P9-NEXT: mtvsrd v5, r5
480 ; CHECK-P9-NEXT: mffprwz r5, f1
481 ; CHECK-P9-NEXT: xxswapd vs1, vs0
482 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
483 ; CHECK-P9-NEXT: mtvsrd v0, r5
484 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
485 ; CHECK-P9-NEXT: vmrghh v5, v5, v0
486 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
487 ; CHECK-P9-NEXT: vmrglw v3, v5, v4
488 ; CHECK-P9-NEXT: mffprwz r5, f2
489 ; CHECK-P9-NEXT: xscvspdpn f2, vs0
490 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
491 ; CHECK-P9-NEXT: mtvsrd v0, r5
492 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
493 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
494 ; CHECK-P9-NEXT: mffprwz r5, f1
495 ; CHECK-P9-NEXT: lxv vs1, 48(r4)
496 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
497 ; CHECK-P9-NEXT: mtvsrd v1, r5
498 ; CHECK-P9-NEXT: vmrghh v0, v1, v0
499 ; CHECK-P9-NEXT: mffprwz r4, f2
500 ; CHECK-P9-NEXT: xxmrgld vs2, v3, v2
501 ; CHECK-P9-NEXT: mtvsrd v4, r4
502 ; CHECK-P9-NEXT: mffprwz r4, f0
503 ; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 3
504 ; CHECK-P9-NEXT: stxv vs2, 0(r3)
505 ; CHECK-P9-NEXT: mtvsrd v2, r4
506 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
507 ; CHECK-P9-NEXT: vmrghh v2, v4, v2
508 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
509 ; CHECK-P9-NEXT: vmrglw v2, v2, v0
510 ; CHECK-P9-NEXT: mffprwz r4, f0
511 ; CHECK-P9-NEXT: xxswapd vs0, vs1
512 ; CHECK-P9-NEXT: mtvsrd v3, r4
513 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
514 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
515 ; CHECK-P9-NEXT: mffprwz r4, f0
516 ; CHECK-P9-NEXT: xscvspdpn f0, vs1
517 ; CHECK-P9-NEXT: mtvsrd v4, r4
518 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
519 ; CHECK-P9-NEXT: vmrghh v3, v4, v3
520 ; CHECK-P9-NEXT: mffprwz r4, f0
521 ; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 1
522 ; CHECK-P9-NEXT: mtvsrd v4, r4
523 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
524 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
525 ; CHECK-P9-NEXT: mffprwz r4, f0
526 ; CHECK-P9-NEXT: mtvsrd v5, r4
527 ; CHECK-P9-NEXT: vmrghh v4, v4, v5
528 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
529 ; CHECK-P9-NEXT: xxmrgld vs0, v3, v2
530 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
531 ; CHECK-P9-NEXT: blr
532 ;
533 ; CHECK-BE-LABEL: test16elt:
534 ; CHECK-BE: # %bb.0: # %entry
535 ; CHECK-BE-NEXT: lxv vs2, 16(r4)
536 ; CHECK-BE-NEXT: addis r5, r2, .LCPI3_0@toc@ha
537 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
538 ; CHECK-BE-NEXT: lxv vs0, 48(r4)
539 ; CHECK-BE-NEXT: addi r5, r5, .LCPI3_0@toc@l
540 ; CHECK-BE-NEXT: lxv v2, 0(r5)
541 ; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
542 ; CHECK-BE-NEXT: xxswapd vs4, vs2
543 ; CHECK-BE-NEXT: xscvspdpn f5, vs2
544 ; CHECK-BE-NEXT: xxsldwi vs2, vs2, vs2, 1
545 ; CHECK-BE-NEXT: xxsldwi vs6, vs1, vs1, 3
546 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
547 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
548 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
549 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
550 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
551 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
552 ; CHECK-BE-NEXT: mffprwz r5, f3
553 ; CHECK-BE-NEXT: xxswapd vs3, vs1
554 ; CHECK-BE-NEXT: mtvsrwz v3, r5
555 ; CHECK-BE-NEXT: mffprwz r5, f4
556 ; CHECK-BE-NEXT: xscvdpsxws f4, f5
557 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
558 ; CHECK-BE-NEXT: mtvsrwz v4, r5
559 ; CHECK-BE-NEXT: vperm v3, v4, v3, v2
560 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
561 ; CHECK-BE-NEXT: mffprwz r5, f4
562 ; CHECK-BE-NEXT: xscvspdpn f4, vs6
563 ; CHECK-BE-NEXT: mtvsrwz v4, r5
564 ; CHECK-BE-NEXT: mffprwz r5, f2
565 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
566 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
567 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
568 ; CHECK-BE-NEXT: mtvsrwz v5, r5
569 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
570 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
571 ; CHECK-BE-NEXT: vperm v4, v4, v5, v2
572 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
573 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
574 ; CHECK-BE-NEXT: mffprwz r5, f4
575 ; CHECK-BE-NEXT: mtvsrwz v5, r5
576 ; CHECK-BE-NEXT: mffprwz r5, f3
577 ; CHECK-BE-NEXT: xxsldwi vs3, vs0, vs0, 3
578 ; CHECK-BE-NEXT: mtvsrwz v0, r5
579 ; CHECK-BE-NEXT: mffprwz r5, f2
580 ; CHECK-BE-NEXT: xscvspdpn f2, vs3
581 ; CHECK-BE-NEXT: vperm v5, v0, v5, v2
582 ; CHECK-BE-NEXT: mtvsrwz v0, r5
583 ; CHECK-BE-NEXT: mffprwz r5, f1
584 ; CHECK-BE-NEXT: xxswapd vs1, vs0
585 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
586 ; CHECK-BE-NEXT: mtvsrwz v1, r5
587 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
588 ; CHECK-BE-NEXT: vperm v0, v0, v1, v2
589 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
590 ; CHECK-BE-NEXT: vmrghw v4, v0, v5
591 ; CHECK-BE-NEXT: mffprwz r5, f2
592 ; CHECK-BE-NEXT: xscvspdpn f2, vs0
593 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
594 ; CHECK-BE-NEXT: mtvsrwz v1, r5
595 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
596 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
597 ; CHECK-BE-NEXT: mffprwz r5, f1
598 ; CHECK-BE-NEXT: lxv vs1, 32(r4)
599 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
600 ; CHECK-BE-NEXT: mtvsrwz v6, r5
601 ; CHECK-BE-NEXT: vperm v1, v6, v1, v2
602 ; CHECK-BE-NEXT: mffprwz r4, f2
603 ; CHECK-BE-NEXT: xxmrghd vs2, v4, v3
604 ; CHECK-BE-NEXT: mtvsrwz v5, r4
605 ; CHECK-BE-NEXT: mffprwz r4, f0
606 ; CHECK-BE-NEXT: xxsldwi vs0, vs1, vs1, 3
607 ; CHECK-BE-NEXT: stxv vs2, 0(r3)
608 ; CHECK-BE-NEXT: mtvsrwz v3, r4
609 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
610 ; CHECK-BE-NEXT: vperm v3, v5, v3, v2
611 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
612 ; CHECK-BE-NEXT: vmrghw v3, v3, v1
613 ; CHECK-BE-NEXT: mffprwz r4, f0
614 ; CHECK-BE-NEXT: xxswapd vs0, vs1
615 ; CHECK-BE-NEXT: mtvsrwz v4, r4
616 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
617 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
618 ; CHECK-BE-NEXT: mffprwz r4, f0
619 ; CHECK-BE-NEXT: xscvspdpn f0, vs1
620 ; CHECK-BE-NEXT: mtvsrwz v5, r4
621 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
622 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
623 ; CHECK-BE-NEXT: mffprwz r4, f0
624 ; CHECK-BE-NEXT: xxsldwi vs0, vs1, vs1, 1
625 ; CHECK-BE-NEXT: mtvsrwz v5, r4
626 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
627 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
628 ; CHECK-BE-NEXT: mffprwz r4, f0
629 ; CHECK-BE-NEXT: mtvsrwz v0, r4
630 ; CHECK-BE-NEXT: vperm v2, v5, v0, v2
631 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
632 ; CHECK-BE-NEXT: xxmrghd vs0, v2, v3
633 ; CHECK-BE-NEXT: stxv vs0, 16(r3)
634 ; CHECK-BE-NEXT: blr
635 entry:
636 %a = load <16 x float>, <16 x float>* %0, align 64
637 %1 = fptoui <16 x float> %a to <16 x i16>
638 store <16 x i16> %1, <16 x i16>* %agg.result, align 32
639 ret void
640 }
642 define i32 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
643 ; CHECK-P8-LABEL: test2elt_signed:
644 ; CHECK-P8: # %bb.0: # %entry
645 ; CHECK-P8-NEXT: mtfprd f0, r3
646 ; CHECK-P8-NEXT: xxswapd v2, vs0
647 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
648 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
649 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
650 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
651 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
652 ; CHECK-P8-NEXT: mffprwz r4, f0
653 ; CHECK-P8-NEXT: mtvsrd v3, r4
654 ; CHECK-P8-NEXT: mffprwz r3, f1
655 ; CHECK-P8-NEXT: mtvsrd v2, r3
656 ; CHECK-P8-NEXT: vmrghh v2, v3, v2
657 ; CHECK-P8-NEXT: xxswapd vs0, v2
658 ; CHECK-P8-NEXT: mffprwz r3, f0
659 ; CHECK-P8-NEXT: blr
660 ;
661 ; CHECK-P9-LABEL: test2elt_signed:
662 ; CHECK-P9: # %bb.0: # %entry
663 ; CHECK-P9-NEXT: mtfprd f0, r3
664 ; CHECK-P9-NEXT: xxswapd v2, vs0
665 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
666 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
667 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
668 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
669 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
670 ; CHECK-P9-NEXT: mffprwz r3, f1
671 ; CHECK-P9-NEXT: mtvsrd v2, r3
672 ; CHECK-P9-NEXT: mffprwz r3, f0
673 ; CHECK-P9-NEXT: mtvsrd v3, r3
674 ; CHECK-P9-NEXT: li r3, 0
675 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
676 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
677 ; CHECK-P9-NEXT: blr
678 ;
679 ; CHECK-BE-LABEL: test2elt_signed:
680 ; CHECK-BE: # %bb.0: # %entry
681 ; CHECK-BE-NEXT: mtfprd f0, r3
682 ; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
683 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
684 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
685 ; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
686 ; CHECK-BE-NEXT: lxv v2, 0(r3)
687 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
688 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
689 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
690 ; CHECK-BE-NEXT: mffprwz r3, f1
691 ; CHECK-BE-NEXT: mtvsrwz v3, r3
692 ; CHECK-BE-NEXT: mffprwz r3, f0
693 ; CHECK-BE-NEXT: mtvsrwz v4, r3
694 ; CHECK-BE-NEXT: li r3, 0
695 ; CHECK-BE-NEXT: vperm v2, v3, v4, v2
696 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
697 ; CHECK-BE-NEXT: blr
698 entry:
699 %0 = bitcast i64 %a.coerce to <2 x float>
700 %1 = fptosi <2 x float> %0 to <2 x i16>
701 %2 = bitcast <2 x i16> %1 to i32
702 ret i32 %2
703 }
705 define i64 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 {
706 ; CHECK-P8-LABEL: test4elt_signed:
707 ; CHECK-P8: # %bb.0: # %entry
708 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
709 ; CHECK-P8-NEXT: xscvspdpn f1, v2
710 ; CHECK-P8-NEXT: xxswapd vs2, v2
711 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
712 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
713 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
714 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
715 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
716 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
717 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
718 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
719 ; CHECK-P8-NEXT: mffprwz r3, f1
720 ; CHECK-P8-NEXT: mtvsrd v2, r3
721 ; CHECK-P8-NEXT: mffprwz r3, f0
722 ; CHECK-P8-NEXT: mffprwz r4, f2
723 ; CHECK-P8-NEXT: mtvsrd v3, r3
724 ; CHECK-P8-NEXT: mffprwz r3, f3
725 ; CHECK-P8-NEXT: mtvsrd v4, r4
726 ; CHECK-P8-NEXT: mtvsrd v5, r3
727 ; CHECK-P8-NEXT: vmrghh v3, v4, v3
728 ; CHECK-P8-NEXT: vmrghh v2, v2, v5
729 ; CHECK-P8-NEXT: vmrglw v2, v2, v3
730 ; CHECK-P8-NEXT: xxswapd vs0, v2
731 ; CHECK-P8-NEXT: mffprd r3, f0
732 ; CHECK-P8-NEXT: blr
733 ;
734 ; CHECK-P9-LABEL: test4elt_signed:
735 ; CHECK-P9: # %bb.0: # %entry
736 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
737 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
738 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
739 ; CHECK-P9-NEXT: mffprwz r3, f0
740 ; CHECK-P9-NEXT: xxswapd vs0, v2
741 ; CHECK-P9-NEXT: mtvsrd v3, r3
742 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
743 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
744 ; CHECK-P9-NEXT: mffprwz r3, f0
745 ; CHECK-P9-NEXT: xscvspdpn f0, v2
746 ; CHECK-P9-NEXT: mtvsrd v4, r3
747 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
748 ; CHECK-P9-NEXT: vmrghh v3, v4, v3
749 ; CHECK-P9-NEXT: mffprwz r3, f0
750 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
751 ; CHECK-P9-NEXT: mtvsrd v4, r3
752 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
753 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
754 ; CHECK-P9-NEXT: mffprwz r3, f0
755 ; CHECK-P9-NEXT: mtvsrd v2, r3
756 ; CHECK-P9-NEXT: vmrghh v2, v4, v2
757 ; CHECK-P9-NEXT: vmrglw v2, v2, v3
758 ; CHECK-P9-NEXT: mfvsrld r3, v2
759 ; CHECK-P9-NEXT: blr
760 ;
761 ; CHECK-BE-LABEL: test4elt_signed:
762 ; CHECK-BE: # %bb.0: # %entry
763 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
764 ; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
765 ; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
766 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
767 ; CHECK-BE-NEXT: lxv v3, 0(r3)
768 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
769 ; CHECK-BE-NEXT: mffprwz r3, f0
770 ; CHECK-BE-NEXT: xxswapd vs0, v2
771 ; CHECK-BE-NEXT: mtvsrwz v4, r3
772 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
773 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
774 ; CHECK-BE-NEXT: mffprwz r3, f0
775 ; CHECK-BE-NEXT: xscvspdpn f0, v2
776 ; CHECK-BE-NEXT: mtvsrwz v5, r3
777 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
778 ; CHECK-BE-NEXT: vperm v4, v5, v4, v3
779 ; CHECK-BE-NEXT: mffprwz r3, f0
780 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
781 ; CHECK-BE-NEXT: mtvsrwz v5, r3
782 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
783 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
784 ; CHECK-BE-NEXT: mffprwz r3, f0
785 ; CHECK-BE-NEXT: mtvsrwz v2, r3
786 ; CHECK-BE-NEXT: vperm v2, v5, v2, v3
787 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
788 ; CHECK-BE-NEXT: mfvsrd r3, v2
789 ; CHECK-BE-NEXT: blr
790 entry:
791 %0 = fptosi <4 x float> %a to <4 x i16>
792 %1 = bitcast <4 x i16> %0 to i64
793 ret i64 %1
794 }
796 define <8 x i16> @test8elt_signed(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
797 ; CHECK-P8-LABEL: test8elt_signed:
798 ; CHECK-P8: # %bb.0: # %entry
799 ; CHECK-P8-NEXT: lvx v2, 0, r3
800 ; CHECK-P8-NEXT: li r4, 16
801 ; CHECK-P8-NEXT: lvx v3, r3, r4
802 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
803 ; CHECK-P8-NEXT: xxswapd vs1, v2
804 ; CHECK-P8-NEXT: xscvspdpn f2, v2
805 ; CHECK-P8-NEXT: xxsldwi vs4, v2, v2, 1
806 ; CHECK-P8-NEXT: xxsldwi vs5, v3, v3, 3
807 ; CHECK-P8-NEXT: xscvspdpn f3, v3
808 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
809 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
810 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
811 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
812 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
813 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
814 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
815 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
816 ; CHECK-P8-NEXT: mffprwz r3, f0
817 ; CHECK-P8-NEXT: xxswapd vs0, v3
818 ; CHECK-P8-NEXT: mffprwz r4, f1
819 ; CHECK-P8-NEXT: xxsldwi vs1, v3, v3, 1
820 ; CHECK-P8-NEXT: mtvsrd v2, r3
821 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
822 ; CHECK-P8-NEXT: mffprwz r3, f2
823 ; CHECK-P8-NEXT: xscvdpsxws f2, f4
824 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
825 ; CHECK-P8-NEXT: xscvdpsxws f4, f5
826 ; CHECK-P8-NEXT: mtvsrd v4, r4
827 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
828 ; CHECK-P8-NEXT: vmrghh v2, v4, v2
829 ; CHECK-P8-NEXT: mffprwz r4, f2
830 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
831 ; CHECK-P8-NEXT: mtvsrd v3, r3
832 ; CHECK-P8-NEXT: mffprwz r3, f3
833 ; CHECK-P8-NEXT: mtvsrd v4, r4
834 ; CHECK-P8-NEXT: mffprwz r4, f0
835 ; CHECK-P8-NEXT: vmrghh v3, v3, v4
836 ; CHECK-P8-NEXT: mtvsrd v4, r3
837 ; CHECK-P8-NEXT: mffprwz r3, f4
838 ; CHECK-P8-NEXT: mtvsrd v0, r4
839 ; CHECK-P8-NEXT: mtvsrd v5, r3
840 ; CHECK-P8-NEXT: mffprwz r3, f1
841 ; CHECK-P8-NEXT: vmrghh v5, v0, v5
842 ; CHECK-P8-NEXT: mtvsrd v1, r3
843 ; CHECK-P8-NEXT: vmrglw v2, v3, v2
844 ; CHECK-P8-NEXT: vmrghh v4, v4, v1
845 ; CHECK-P8-NEXT: vmrglw v3, v4, v5
846 ; CHECK-P8-NEXT: xxmrgld v2, v3, v2
847 ; CHECK-P8-NEXT: blr
848 ;
849 ; CHECK-P9-LABEL: test8elt_signed:
850 ; CHECK-P9: # %bb.0: # %entry
851 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
852 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
853 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
854 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
855 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
856 ; CHECK-P9-NEXT: mffprwz r3, f2
857 ; CHECK-P9-NEXT: xxswapd vs2, vs1
858 ; CHECK-P9-NEXT: mtvsrd v2, r3
859 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
860 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
861 ; CHECK-P9-NEXT: mffprwz r3, f2
862 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
863 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
864 ; CHECK-P9-NEXT: mtvsrd v3, r3
865 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
866 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
867 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
868 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
869 ; CHECK-P9-NEXT: mffprwz r3, f2
870 ; CHECK-P9-NEXT: mtvsrd v3, r3
871 ; CHECK-P9-NEXT: mffprwz r3, f1
872 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
873 ; CHECK-P9-NEXT: mtvsrd v4, r3
874 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
875 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
876 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
877 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
878 ; CHECK-P9-NEXT: mffprwz r3, f1
879 ; CHECK-P9-NEXT: xxswapd vs1, vs0
880 ; CHECK-P9-NEXT: mtvsrd v3, r3
881 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
882 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
883 ; CHECK-P9-NEXT: mffprwz r3, f1
884 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
885 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
886 ; CHECK-P9-NEXT: mtvsrd v4, r3
887 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
888 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
889 ; CHECK-P9-NEXT: vmrghh v3, v4, v3
890 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
891 ; CHECK-P9-NEXT: mffprwz r3, f1
892 ; CHECK-P9-NEXT: mtvsrd v4, r3
893 ; CHECK-P9-NEXT: mffprwz r3, f0
894 ; CHECK-P9-NEXT: mtvsrd v5, r3
895 ; CHECK-P9-NEXT: vmrghh v4, v4, v5
896 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
897 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
898 ; CHECK-P9-NEXT: blr
899 ;
900 ; CHECK-BE-LABEL: test8elt_signed:
901 ; CHECK-BE: # %bb.0: # %entry
902 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
903 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
904 ; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha
905 ; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l
906 ; CHECK-BE-NEXT: lxv v2, 0(r3)
907 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
908 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
909 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
910 ; CHECK-BE-NEXT: mffprwz r3, f2
911 ; CHECK-BE-NEXT: xxswapd vs2, vs1
912 ; CHECK-BE-NEXT: mtvsrwz v3, r3
913 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
914 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
915 ; CHECK-BE-NEXT: mffprwz r3, f2
916 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
917 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
918 ; CHECK-BE-NEXT: mtvsrwz v4, r3
919 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
920 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
921 ; CHECK-BE-NEXT: vperm v3, v4, v3, v2
922 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
923 ; CHECK-BE-NEXT: mffprwz r3, f2
924 ; CHECK-BE-NEXT: mtvsrwz v4, r3
925 ; CHECK-BE-NEXT: mffprwz r3, f1
926 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
927 ; CHECK-BE-NEXT: mtvsrwz v5, r3
928 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
929 ; CHECK-BE-NEXT: vperm v4, v4, v5, v2
930 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
931 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
932 ; CHECK-BE-NEXT: mffprwz r3, f1
933 ; CHECK-BE-NEXT: xxswapd vs1, vs0
934 ; CHECK-BE-NEXT: mtvsrwz v4, r3
935 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
936 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
937 ; CHECK-BE-NEXT: mffprwz r3, f1
938 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
939 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
940 ; CHECK-BE-NEXT: mtvsrwz v5, r3
941 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
942 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
943 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
944 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
945 ; CHECK-BE-NEXT: mffprwz r3, f1
946 ; CHECK-BE-NEXT: mtvsrwz v5, r3
947 ; CHECK-BE-NEXT: mffprwz r3, f0
948 ; CHECK-BE-NEXT: mtvsrwz v0, r3
949 ; CHECK-BE-NEXT: vperm v2, v5, v0, v2
950 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
951 ; CHECK-BE-NEXT: xxmrghd v2, v2, v3
952 ; CHECK-BE-NEXT: blr
953 entry:
954 %a = load <8 x float>, <8 x float>* %0, align 32
955 %1 = fptosi <8 x float> %a to <8 x i16>
956 ret <8 x i16> %1
957 }
959 define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.result, <16 x float>* nocapture readonly) local_unnamed_addr #3 {
960 ; CHECK-P8-LABEL: test16elt_signed:
961 ; CHECK-P8: # %bb.0: # %entry
962 ; CHECK-P8-NEXT: lvx v5, 0, r4
963 ; CHECK-P8-NEXT: li r5, 16
964 ; CHECK-P8-NEXT: li r6, 32
965 ; CHECK-P8-NEXT: lvx v3, r4, r5
966 ; CHECK-P8-NEXT: lvx v2, r4, r6
967 ; CHECK-P8-NEXT: li r6, 48
968 ; CHECK-P8-NEXT: xxsldwi vs0, v5, v5, 3
969 ; CHECK-P8-NEXT: xscvspdpn f1, v5
970 ; CHECK-P8-NEXT: lvx v4, r4, r6
971 ; CHECK-P8-NEXT: xxswapd vs3, v5
972 ; CHECK-P8-NEXT: xxsldwi vs5, v5, v5, 1
973 ; CHECK-P8-NEXT: xxsldwi vs7, v3, v3, 3
974 ; CHECK-P8-NEXT: xxswapd vs8, v3
975 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
976 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
977 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
978 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
979 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
980 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
981 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
982 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
983 ; CHECK-P8-NEXT: xscvspdpn f2, v3
984 ; CHECK-P8-NEXT: mffprwz r4, f1
985 ; CHECK-P8-NEXT: xscvdpsxws f1, f5
986 ; CHECK-P8-NEXT: mtvsrd v5, r4
987 ; CHECK-P8-NEXT: mffprwz r4, f0
988 ; CHECK-P8-NEXT: xxsldwi vs0, v3, v3, 1
989 ; CHECK-P8-NEXT: xscvspdpn f4, v2
990 ; CHECK-P8-NEXT: xscvdpsxws f5, f7
991 ; CHECK-P8-NEXT: xxsldwi vs7, v4, v4, 3
992 ; CHECK-P8-NEXT: mtvsrd v3, r4
993 ; CHECK-P8-NEXT: mffprwz r4, f3
994 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 3
995 ; CHECK-P8-NEXT: xscvspdpn f6, v4
996 ; CHECK-P8-NEXT: mtvsrd v0, r4
997 ; CHECK-P8-NEXT: mffprwz r4, f1
998 ; CHECK-P8-NEXT: xscvdpsxws f1, f8
999 ; CHECK-P8-NEXT: xxswapd vs8, v4
1000 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
1001 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
1002 ; CHECK-P8-NEXT: mtvsrd v1, r4
1003 ; CHECK-P8-NEXT: mffprwz r4, f5
1004 ; CHECK-P8-NEXT: xxswapd vs5, v2
1005 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
1006 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
1007 ; CHECK-P8-NEXT: vmrghh v3, v0, v3
1008 ; CHECK-P8-NEXT: mtvsrd v0, r4
1009 ; CHECK-P8-NEXT: mffprwz r4, f1
1010 ; CHECK-P8-NEXT: xscvdpsxws f6, f6
1011 ; CHECK-P8-NEXT: xscvspdpn f1, vs5
1012 ; CHECK-P8-NEXT: xxsldwi vs5, v2, v2, 1
1013 ; CHECK-P8-NEXT: mtvsrd v6, r4
1014 ; CHECK-P8-NEXT: mffprwz r4, f2
1015 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1016 ; CHECK-P8-NEXT: vmrghh v2, v5, v1
1017 ; CHECK-P8-NEXT: vmrghh v5, v6, v0
1018 ; CHECK-P8-NEXT: mtvsrd v0, r4
1019 ; CHECK-P8-NEXT: mffprwz r4, f4
1020 ; CHECK-P8-NEXT: xscvdpsxws f2, f3
1021 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
1022 ; CHECK-P8-NEXT: mtvsrd v1, r4
1023 ; CHECK-P8-NEXT: mffprwz r4, f6
1024 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
1025 ; CHECK-P8-NEXT: mtvsrd v6, r4
1026 ; CHECK-P8-NEXT: mffprwz r4, f0
1027 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
1028 ; CHECK-P8-NEXT: mtvsrd v7, r4
1029 ; CHECK-P8-NEXT: mffprwz r4, f2
1030 ; CHECK-P8-NEXT: xxsldwi vs2, v4, v4, 1
1031 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
1032 ; CHECK-P8-NEXT: xscvdpsxws f0, f5
1033 ; CHECK-P8-NEXT: mtvsrd v4, r4
1034 ; CHECK-P8-NEXT: mffprwz r4, f1
1035 ; CHECK-P8-NEXT: xscvspdpn f1, vs2
1036 ; CHECK-P8-NEXT: xscvdpsxws f3, f7
1037 ; CHECK-P8-NEXT: mtvsrd v8, r4
1038 ; CHECK-P8-NEXT: mffprwz r4, f0
1039 ; CHECK-P8-NEXT: xscvdpsxws f0, f8
1040 ; CHECK-P8-NEXT: mtvsrd v9, r4
1041 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
1042 ; CHECK-P8-NEXT: mffprwz r4, f3
1043 ; CHECK-P8-NEXT: vmrghh v0, v0, v7
1044 ; CHECK-P8-NEXT: mtvsrd v7, r4
1045 ; CHECK-P8-NEXT: mffprwz r4, f0
1046 ; CHECK-P8-NEXT: vmrghh v4, v8, v4
1047 ; CHECK-P8-NEXT: mtvsrd v8, r4
1048 ; CHECK-P8-NEXT: mffprwz r4, f1
1049 ; CHECK-P8-NEXT: vmrghh v1, v1, v9
1050 ; CHECK-P8-NEXT: mtvsrd v9, r4
1051 ; CHECK-P8-NEXT: vmrghh v7, v8, v7
1052 ; CHECK-P8-NEXT: vmrghh v6, v6, v9
1053 ; CHECK-P8-NEXT: vmrglw v2, v2, v3
1054 ; CHECK-P8-NEXT: vmrglw v3, v0, v5
1055 ; CHECK-P8-NEXT: vmrglw v4, v1, v4
1056 ; CHECK-P8-NEXT: vmrglw v5, v6, v7
1057 ; CHECK-P8-NEXT: xxmrgld v2, v3, v2
1058 ; CHECK-P8-NEXT: stvx v2, 0, r3
1059 ; CHECK-P8-NEXT: xxmrgld v3, v5, v4
1060 ; CHECK-P8-NEXT: stvx v3, r3, r5
1061 ; CHECK-P8-NEXT: blr
1062 ;
1063 ; CHECK-P9-LABEL: test16elt_signed:
1064 ; CHECK-P9: # %bb.0: # %entry
1065 ; CHECK-P9-NEXT: lxv vs2, 0(r4)
1066 ; CHECK-P9-NEXT: lxv vs1, 16(r4)
1067 ; CHECK-P9-NEXT: lxv vs0, 32(r4)
1068 ; CHECK-P9-NEXT: xxsldwi vs3, vs2, vs2, 3
1069 ; CHECK-P9-NEXT: xxswapd vs4, vs2
1070 ; CHECK-P9-NEXT: xscvspdpn f5, vs2
1071 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
1072 ; CHECK-P9-NEXT: xxsldwi vs6, vs1, vs1, 3
1073 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1074 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
1075 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1076 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1077 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1078 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1079 ; CHECK-P9-NEXT: mffprwz r5, f3
1080 ; CHECK-P9-NEXT: xxswapd vs3, vs1
1081 ; CHECK-P9-NEXT: mtvsrd v2, r5
1082 ; CHECK-P9-NEXT: mffprwz r5, f4
1083 ; CHECK-P9-NEXT: xscvdpsxws f4, f5
1084 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1085 ; CHECK-P9-NEXT: mtvsrd v3, r5
1086 ; CHECK-P9-NEXT: vmrghh v2, v3, v2
1087 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1088 ; CHECK-P9-NEXT: mffprwz r5, f4
1089 ; CHECK-P9-NEXT: xscvspdpn f4, vs6
1090 ; CHECK-P9-NEXT: mtvsrd v3, r5
1091 ; CHECK-P9-NEXT: mffprwz r5, f2
1092 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
1093 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
1094 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1095 ; CHECK-P9-NEXT: mtvsrd v4, r5
1096 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1097 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1098 ; CHECK-P9-NEXT: vmrghh v3, v3, v4
1099 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1100 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
1101 ; CHECK-P9-NEXT: mffprwz r5, f4
1102 ; CHECK-P9-NEXT: mtvsrd v4, r5
1103 ; CHECK-P9-NEXT: mffprwz r5, f3
1104 ; CHECK-P9-NEXT: xxsldwi vs3, vs0, vs0, 3
1105 ; CHECK-P9-NEXT: mtvsrd v5, r5
1106 ; CHECK-P9-NEXT: mffprwz r5, f2
1107 ; CHECK-P9-NEXT: xscvspdpn f2, vs3
1108 ; CHECK-P9-NEXT: vmrghh v4, v5, v4
1109 ; CHECK-P9-NEXT: mtvsrd v5, r5
1110 ; CHECK-P9-NEXT: mffprwz r5, f1
1111 ; CHECK-P9-NEXT: xxswapd vs1, vs0
1112 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1113 ; CHECK-P9-NEXT: mtvsrd v0, r5
1114 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1115 ; CHECK-P9-NEXT: vmrghh v5, v5, v0
1116 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1117 ; CHECK-P9-NEXT: vmrglw v3, v5, v4
1118 ; CHECK-P9-NEXT: mffprwz r5, f2
1119 ; CHECK-P9-NEXT: xscvspdpn f2, vs0
1120 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
1121 ; CHECK-P9-NEXT: mtvsrd v0, r5
1122 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1123 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1124 ; CHECK-P9-NEXT: mffprwz r5, f1
1125 ; CHECK-P9-NEXT: lxv vs1, 48(r4)
1126 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1127 ; CHECK-P9-NEXT: mtvsrd v1, r5
1128 ; CHECK-P9-NEXT: vmrghh v0, v1, v0
1129 ; CHECK-P9-NEXT: mffprwz r4, f2
1130 ; CHECK-P9-NEXT: xxmrgld vs2, v3, v2
1131 ; CHECK-P9-NEXT: mtvsrd v4, r4
1132 ; CHECK-P9-NEXT: mffprwz r4, f0
1133 ; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 3
1134 ; CHECK-P9-NEXT: stxv vs2, 0(r3)
1135 ; CHECK-P9-NEXT: mtvsrd v2, r4
1136 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1137 ; CHECK-P9-NEXT: vmrghh v2, v4, v2
1138 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1139 ; CHECK-P9-NEXT: vmrglw v2, v2, v0
1140 ; CHECK-P9-NEXT: mffprwz r4, f0
1141 ; CHECK-P9-NEXT: xxswapd vs0, vs1
1142 ; CHECK-P9-NEXT: mtvsrd v3, r4
1143 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1144 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1145 ; CHECK-P9-NEXT: mffprwz r4, f0
1146 ; CHECK-P9-NEXT: xscvspdpn f0, vs1
1147 ; CHECK-P9-NEXT: mtvsrd v4, r4
1148 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1149 ; CHECK-P9-NEXT: vmrghh v3, v4, v3
1150 ; CHECK-P9-NEXT: mffprwz r4, f0
1151 ; CHECK-P9-NEXT: xxsldwi vs0, vs1, vs1, 1
1152 ; CHECK-P9-NEXT: mtvsrd v4, r4
1153 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1154 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1155 ; CHECK-P9-NEXT: mffprwz r4, f0
1156 ; CHECK-P9-NEXT: mtvsrd v5, r4
1157 ; CHECK-P9-NEXT: vmrghh v4, v4, v5
1158 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
1159 ; CHECK-P9-NEXT: xxmrgld vs0, v3, v2
1160 ; CHECK-P9-NEXT: stxv vs0, 16(r3)
1161 ; CHECK-P9-NEXT: blr
1162 ;
1163 ; CHECK-BE-LABEL: test16elt_signed:
1164 ; CHECK-BE: # %bb.0: # %entry
1165 ; CHECK-BE-NEXT: lxv vs2, 16(r4)
1166 ; CHECK-BE-NEXT: addis r5, r2, .LCPI7_0@toc@ha
1167 ; CHECK-BE-NEXT: lxv vs1, 0(r4)
1168 ; CHECK-BE-NEXT: lxv vs0, 48(r4)
1169 ; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0@toc@l
1170 ; CHECK-BE-NEXT: lxv v2, 0(r5)
1171 ; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
1172 ; CHECK-BE-NEXT: xxswapd vs4, vs2
1173 ; CHECK-BE-NEXT: xscvspdpn f5, vs2
1174 ; CHECK-BE-NEXT: xxsldwi vs2, vs2, vs2, 1
1175 ; CHECK-BE-NEXT: xxsldwi vs6, vs1, vs1, 3
1176 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1177 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1178 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1179 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1180 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1181 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1182 ; CHECK-BE-NEXT: mffprwz r5, f3
1183 ; CHECK-BE-NEXT: xxswapd vs3, vs1
1184 ; CHECK-BE-NEXT: mtvsrwz v3, r5
1185 ; CHECK-BE-NEXT: mffprwz r5, f4
1186 ; CHECK-BE-NEXT: xscvdpsxws f4, f5
1187 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1188 ; CHECK-BE-NEXT: mtvsrwz v4, r5
1189 ; CHECK-BE-NEXT: vperm v3, v4, v3, v2
1190 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1191 ; CHECK-BE-NEXT: mffprwz r5, f4
1192 ; CHECK-BE-NEXT: xscvspdpn f4, vs6
1193 ; CHECK-BE-NEXT: mtvsrwz v4, r5
1194 ; CHECK-BE-NEXT: mffprwz r5, f2
1195 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
1196 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
1197 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1198 ; CHECK-BE-NEXT: mtvsrwz v5, r5
1199 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1200 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1201 ; CHECK-BE-NEXT: vperm v4, v4, v5, v2
1202 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1203 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
1204 ; CHECK-BE-NEXT: mffprwz r5, f4
1205 ; CHECK-BE-NEXT: mtvsrwz v5, r5
1206 ; CHECK-BE-NEXT: mffprwz r5, f3
1207 ; CHECK-BE-NEXT: xxsldwi vs3, vs0, vs0, 3
1208 ; CHECK-BE-NEXT: mtvsrwz v0, r5
1209 ; CHECK-BE-NEXT: mffprwz r5, f2
1210 ; CHECK-BE-NEXT: xscvspdpn f2, vs3
1211 ; CHECK-BE-NEXT: vperm v5, v0, v5, v2
1212 ; CHECK-BE-NEXT: mtvsrwz v0, r5
1213 ; CHECK-BE-NEXT: mffprwz r5, f1
1214 ; CHECK-BE-NEXT: xxswapd vs1, vs0
1215 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1216 ; CHECK-BE-NEXT: mtvsrwz v1, r5
1217 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1218 ; CHECK-BE-NEXT: vperm v0, v0, v1, v2
1219 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1220 ; CHECK-BE-NEXT: vmrghw v4, v0, v5
1221 ; CHECK-BE-NEXT: mffprwz r5, f2
1222 ; CHECK-BE-NEXT: xscvspdpn f2, vs0
1223 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
1224 ; CHECK-BE-NEXT: mtvsrwz v1, r5
1225 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1226 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1227 ; CHECK-BE-NEXT: mffprwz r5, f1
1228 ; CHECK-BE-NEXT: lxv vs1, 32(r4)
1229 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1230 ; CHECK-BE-NEXT: mtvsrwz v6, r5
1231 ; CHECK-BE-NEXT: vperm v1, v6, v1, v2
1232 ; CHECK-BE-NEXT: mffprwz r4, f2
1233 ; CHECK-BE-NEXT: xxmrghd vs2, v4, v3
1234 ; CHECK-BE-NEXT: mtvsrwz v5, r4
1235 ; CHECK-BE-NEXT: mffprwz r4, f0
1236 ; CHECK-BE-NEXT: xxsldwi vs0, vs1, vs1, 3
1237 ; CHECK-BE-NEXT: stxv vs2, 0(r3)
1238 ; CHECK-BE-NEXT: mtvsrwz v3, r4
1239 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1240 ; CHECK-BE-NEXT: vperm v3, v5, v3, v2
1241 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1242 ; CHECK-BE-NEXT: vmrghw v3, v3, v1
1243 ; CHECK-BE-NEXT: mffprwz r4, f0
1244 ; CHECK-BE-NEXT: xxswapd vs0, vs1
1245 ; CHECK-BE-NEXT: mtvsrwz v4, r4
1246 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1247 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1248 ; CHECK-BE-NEXT: mffprwz r4, f0
1249 ; CHECK-BE-NEXT: xscvspdpn f0, vs1
1250 ; CHECK-BE-NEXT: mtvsrwz v5, r4
1251 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1252 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
1253 ; CHECK-BE-NEXT: mffprwz r4, f0
1254 ; CHECK-BE-NEXT: xxsldwi vs0, vs1, vs1, 1
1255 ; CHECK-BE-NEXT: mtvsrwz v5, r4
1256 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1257 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1258 ; CHECK-BE-NEXT: mffprwz r4, f0
1259 ; CHECK-BE-NEXT: mtvsrwz v0, r4
1260 ; CHECK-BE-NEXT: vperm v2, v5, v0, v2
1261 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
1262 ; CHECK-BE-NEXT: xxmrghd vs0, v2, v3
1263 ; CHECK-BE-NEXT: stxv vs0, 16(r3)
1264 ; CHECK-BE-NEXT: blr
1265 entry:
1266 %a = load <16 x float>, <16 x float>* %0, align 64
1267 %1 = fptosi <16 x float> %a to <16 x i16>
1268 store <16 x i16> %1, <16 x i16>* %agg.result, align 32
1269 ret void
1270 }