| blob | ef6f0111692540211759c330088438c204af1428 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3 ; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4 ; RUN: FileCheck %s --check-prefix=CHECK-P8
5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-P9
8 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
10 ; RUN: FileCheck %s --check-prefix=CHECK-BE
12 define i16 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
13 ; CHECK-P8-LABEL: test2elt:
14 ; CHECK-P8: # %bb.0: # %entry
15 ; CHECK-P8-NEXT: mtfprd f0, r3
16 ; CHECK-P8-NEXT: xxswapd v2, vs0
17 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
18 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
19 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
20 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
21 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
22 ; CHECK-P8-NEXT: mffprwz r4, f0
23 ; CHECK-P8-NEXT: mtvsrd v3, r4
24 ; CHECK-P8-NEXT: mffprwz r3, f1
25 ; CHECK-P8-NEXT: mtvsrd v2, r3
26 ; CHECK-P8-NEXT: vmrghb v2, v3, v2
27 ; CHECK-P8-NEXT: xxswapd vs0, v2
28 ; CHECK-P8-NEXT: mffprd r3, f0
29 ; CHECK-P8-NEXT: clrldi r3, r3, 48
30 ; CHECK-P8-NEXT: sth r3, -2(r1)
31 ; CHECK-P8-NEXT: lhz r3, -2(r1)
32 ; CHECK-P8-NEXT: blr
33 ;
34 ; CHECK-P9-LABEL: test2elt:
35 ; CHECK-P9: # %bb.0: # %entry
36 ; CHECK-P9-NEXT: mtfprd f0, r3
37 ; CHECK-P9-NEXT: xxswapd v2, vs0
38 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
39 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
40 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
41 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
42 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
43 ; CHECK-P9-NEXT: mffprwz r3, f1
44 ; CHECK-P9-NEXT: mtvsrd v2, r3
45 ; CHECK-P9-NEXT: mffprwz r3, f0
46 ; CHECK-P9-NEXT: mtvsrd v3, r3
47 ; CHECK-P9-NEXT: addi r3, r1, -2
48 ; CHECK-P9-NEXT: vmrghb v2, v3, v2
49 ; CHECK-P9-NEXT: vsldoi v2, v2, v2, 8
50 ; CHECK-P9-NEXT: stxsihx v2, 0, r3
51 ; CHECK-P9-NEXT: lhz r3, -2(r1)
52 ; CHECK-P9-NEXT: blr
53 ;
54 ; CHECK-BE-LABEL: test2elt:
55 ; CHECK-BE: # %bb.0: # %entry
56 ; CHECK-BE-NEXT: mtfprd f0, r3
57 ; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
58 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
59 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
60 ; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
61 ; CHECK-BE-NEXT: lxv v2, 0(r3)
62 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
63 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
64 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
65 ; CHECK-BE-NEXT: mffprwz r3, f1
66 ; CHECK-BE-NEXT: mtvsrwz v3, r3
67 ; CHECK-BE-NEXT: mffprwz r3, f0
68 ; CHECK-BE-NEXT: mtvsrwz v4, r3
69 ; CHECK-BE-NEXT: addi r3, r1, -2
70 ; CHECK-BE-NEXT: vperm v2, v3, v4, v2
71 ; CHECK-BE-NEXT: vsldoi v2, v2, v2, 10
72 ; CHECK-BE-NEXT: stxsihx v2, 0, r3
73 ; CHECK-BE-NEXT: lhz r3, -2(r1)
74 ; CHECK-BE-NEXT: blr
75 entry:
76 %0 = bitcast i64 %a.coerce to <2 x float>
77 %1 = fptoui <2 x float> %0 to <2 x i8>
78 %2 = bitcast <2 x i8> %1 to i16
79 ret i16 %2
80 }
82 define i32 @test4elt(<4 x float> %a) local_unnamed_addr #1 {
83 ; CHECK-P8-LABEL: test4elt:
84 ; CHECK-P8: # %bb.0: # %entry
85 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
86 ; CHECK-P8-NEXT: xscvspdpn f1, v2
87 ; CHECK-P8-NEXT: xxswapd vs2, v2
88 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
89 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
90 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
91 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
92 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
93 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
94 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
95 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
96 ; CHECK-P8-NEXT: mffprwz r3, f1
97 ; CHECK-P8-NEXT: mtvsrd v2, r3
98 ; CHECK-P8-NEXT: mffprwz r3, f0
99 ; CHECK-P8-NEXT: mffprwz r4, f2
100 ; CHECK-P8-NEXT: mtvsrd v3, r3
101 ; CHECK-P8-NEXT: mffprwz r3, f3
102 ; CHECK-P8-NEXT: mtvsrd v4, r4
103 ; CHECK-P8-NEXT: mtvsrd v5, r3
104 ; CHECK-P8-NEXT: vmrghb v3, v4, v3
105 ; CHECK-P8-NEXT: vmrghb v2, v2, v5
106 ; CHECK-P8-NEXT: vmrglh v2, v2, v3
107 ; CHECK-P8-NEXT: xxswapd vs0, v2
108 ; CHECK-P8-NEXT: mffprwz r3, f0
109 ; CHECK-P8-NEXT: blr
110 ;
111 ; CHECK-P9-LABEL: test4elt:
112 ; CHECK-P9: # %bb.0: # %entry
113 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
114 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
115 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
116 ; CHECK-P9-NEXT: mffprwz r3, f0
117 ; CHECK-P9-NEXT: xxswapd vs0, v2
118 ; CHECK-P9-NEXT: mtvsrd v3, r3
119 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
120 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
121 ; CHECK-P9-NEXT: mffprwz r3, f0
122 ; CHECK-P9-NEXT: xscvspdpn f0, v2
123 ; CHECK-P9-NEXT: mtvsrd v4, r3
124 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
125 ; CHECK-P9-NEXT: vmrghb v3, v4, v3
126 ; CHECK-P9-NEXT: mffprwz r3, f0
127 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
128 ; CHECK-P9-NEXT: mtvsrd v4, r3
129 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
130 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
131 ; CHECK-P9-NEXT: mffprwz r3, f0
132 ; CHECK-P9-NEXT: mtvsrd v2, r3
133 ; CHECK-P9-NEXT: li r3, 0
134 ; CHECK-P9-NEXT: vmrghb v2, v4, v2
135 ; CHECK-P9-NEXT: vmrglh v2, v2, v3
136 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
137 ; CHECK-P9-NEXT: blr
138 ;
139 ; CHECK-BE-LABEL: test4elt:
140 ; CHECK-BE: # %bb.0: # %entry
141 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
142 ; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
143 ; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
144 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
145 ; CHECK-BE-NEXT: lxv v3, 0(r3)
146 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
147 ; CHECK-BE-NEXT: mffprwz r3, f0
148 ; CHECK-BE-NEXT: xxswapd vs0, v2
149 ; CHECK-BE-NEXT: mtvsrwz v4, r3
150 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
151 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
152 ; CHECK-BE-NEXT: mffprwz r3, f0
153 ; CHECK-BE-NEXT: xscvspdpn f0, v2
154 ; CHECK-BE-NEXT: mtvsrwz v5, r3
155 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
156 ; CHECK-BE-NEXT: vperm v4, v5, v4, v3
157 ; CHECK-BE-NEXT: mffprwz r3, f0
158 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
159 ; CHECK-BE-NEXT: mtvsrwz v5, r3
160 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
161 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
162 ; CHECK-BE-NEXT: mffprwz r3, f0
163 ; CHECK-BE-NEXT: mtvsrwz v2, r3
164 ; CHECK-BE-NEXT: li r3, 0
165 ; CHECK-BE-NEXT: vperm v2, v5, v2, v3
166 ; CHECK-BE-NEXT: vmrghh v2, v2, v4
167 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
168 ; CHECK-BE-NEXT: blr
169 entry:
170 %0 = fptoui <4 x float> %a to <4 x i8>
171 %1 = bitcast <4 x i8> %0 to i32
172 ret i32 %1
173 }
175 define i64 @test8elt(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
176 ; CHECK-P8-LABEL: test8elt:
177 ; CHECK-P8: # %bb.0: # %entry
178 ; CHECK-P8-NEXT: lvx v2, 0, r3
179 ; CHECK-P8-NEXT: li r4, 16
180 ; CHECK-P8-NEXT: lvx v3, r3, r4
181 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
182 ; CHECK-P8-NEXT: xxswapd vs1, v2
183 ; CHECK-P8-NEXT: xscvspdpn f2, v2
184 ; CHECK-P8-NEXT: xxsldwi vs4, v2, v2, 1
185 ; CHECK-P8-NEXT: xxsldwi vs5, v3, v3, 3
186 ; CHECK-P8-NEXT: xscvspdpn f3, v3
187 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
188 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
189 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
190 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
191 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
192 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
193 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
194 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
195 ; CHECK-P8-NEXT: mffprwz r3, f0
196 ; CHECK-P8-NEXT: xxswapd vs0, v3
197 ; CHECK-P8-NEXT: mffprwz r4, f1
198 ; CHECK-P8-NEXT: xxsldwi vs1, v3, v3, 1
199 ; CHECK-P8-NEXT: mtvsrd v2, r3
200 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
201 ; CHECK-P8-NEXT: mffprwz r3, f2
202 ; CHECK-P8-NEXT: xscvdpsxws f2, f4
203 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
204 ; CHECK-P8-NEXT: xscvdpsxws f4, f5
205 ; CHECK-P8-NEXT: mtvsrd v4, r4
206 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
207 ; CHECK-P8-NEXT: vmrghb v2, v4, v2
208 ; CHECK-P8-NEXT: mffprwz r4, f2
209 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
210 ; CHECK-P8-NEXT: mtvsrd v3, r3
211 ; CHECK-P8-NEXT: mffprwz r3, f3
212 ; CHECK-P8-NEXT: mtvsrd v4, r4
213 ; CHECK-P8-NEXT: mffprwz r4, f0
214 ; CHECK-P8-NEXT: vmrghb v3, v3, v4
215 ; CHECK-P8-NEXT: mtvsrd v4, r3
216 ; CHECK-P8-NEXT: mffprwz r3, f4
217 ; CHECK-P8-NEXT: mtvsrd v0, r4
218 ; CHECK-P8-NEXT: mtvsrd v5, r3
219 ; CHECK-P8-NEXT: mffprwz r3, f1
220 ; CHECK-P8-NEXT: vmrghb v5, v0, v5
221 ; CHECK-P8-NEXT: mtvsrd v1, r3
222 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
223 ; CHECK-P8-NEXT: vmrghb v4, v4, v1
224 ; CHECK-P8-NEXT: vmrglh v3, v4, v5
225 ; CHECK-P8-NEXT: vmrglw v2, v3, v2
226 ; CHECK-P8-NEXT: xxswapd vs0, v2
227 ; CHECK-P8-NEXT: mffprd r3, f0
228 ; CHECK-P8-NEXT: blr
229 ;
230 ; CHECK-P9-LABEL: test8elt:
231 ; CHECK-P9: # %bb.0: # %entry
232 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
233 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
234 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
235 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
236 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
237 ; CHECK-P9-NEXT: mffprwz r3, f2
238 ; CHECK-P9-NEXT: xxswapd vs2, vs1
239 ; CHECK-P9-NEXT: mtvsrd v2, r3
240 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
241 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
242 ; CHECK-P9-NEXT: mffprwz r3, f2
243 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
244 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
245 ; CHECK-P9-NEXT: mtvsrd v3, r3
246 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
247 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
248 ; CHECK-P9-NEXT: vmrghb v2, v3, v2
249 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
250 ; CHECK-P9-NEXT: mffprwz r3, f2
251 ; CHECK-P9-NEXT: mtvsrd v3, r3
252 ; CHECK-P9-NEXT: mffprwz r3, f1
253 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
254 ; CHECK-P9-NEXT: mtvsrd v4, r3
255 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
256 ; CHECK-P9-NEXT: vmrghb v3, v3, v4
257 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
258 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
259 ; CHECK-P9-NEXT: mffprwz r3, f1
260 ; CHECK-P9-NEXT: xxswapd vs1, vs0
261 ; CHECK-P9-NEXT: mtvsrd v3, r3
262 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
263 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
264 ; CHECK-P9-NEXT: mffprwz r3, f1
265 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
266 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
267 ; CHECK-P9-NEXT: mtvsrd v4, r3
268 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
269 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
270 ; CHECK-P9-NEXT: vmrghb v3, v4, v3
271 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
272 ; CHECK-P9-NEXT: mffprwz r3, f1
273 ; CHECK-P9-NEXT: mtvsrd v4, r3
274 ; CHECK-P9-NEXT: mffprwz r3, f0
275 ; CHECK-P9-NEXT: mtvsrd v5, r3
276 ; CHECK-P9-NEXT: vmrghb v4, v4, v5
277 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
278 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
279 ; CHECK-P9-NEXT: mfvsrld r3, v2
280 ; CHECK-P9-NEXT: blr
281 ;
282 ; CHECK-BE-LABEL: test8elt:
283 ; CHECK-BE: # %bb.0: # %entry
284 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
285 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
286 ; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
287 ; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
288 ; CHECK-BE-NEXT: lxv v2, 0(r3)
289 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
290 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
291 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
292 ; CHECK-BE-NEXT: mffprwz r3, f2
293 ; CHECK-BE-NEXT: xxswapd vs2, vs1
294 ; CHECK-BE-NEXT: mtvsrwz v3, r3
295 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
296 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
297 ; CHECK-BE-NEXT: mffprwz r3, f2
298 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
299 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
300 ; CHECK-BE-NEXT: mtvsrwz v4, r3
301 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
302 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
303 ; CHECK-BE-NEXT: vperm v3, v4, v3, v2
304 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
305 ; CHECK-BE-NEXT: mffprwz r3, f2
306 ; CHECK-BE-NEXT: mtvsrwz v4, r3
307 ; CHECK-BE-NEXT: mffprwz r3, f1
308 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
309 ; CHECK-BE-NEXT: mtvsrwz v5, r3
310 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
311 ; CHECK-BE-NEXT: vperm v4, v4, v5, v2
312 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
313 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
314 ; CHECK-BE-NEXT: mffprwz r3, f1
315 ; CHECK-BE-NEXT: xxswapd vs1, vs0
316 ; CHECK-BE-NEXT: mtvsrwz v4, r3
317 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
318 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
319 ; CHECK-BE-NEXT: mffprwz r3, f1
320 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
321 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
322 ; CHECK-BE-NEXT: mtvsrwz v5, r3
323 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
324 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
325 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
326 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
327 ; CHECK-BE-NEXT: mffprwz r3, f1
328 ; CHECK-BE-NEXT: mtvsrwz v5, r3
329 ; CHECK-BE-NEXT: mffprwz r3, f0
330 ; CHECK-BE-NEXT: mtvsrwz v0, r3
331 ; CHECK-BE-NEXT: vperm v2, v5, v0, v2
332 ; CHECK-BE-NEXT: vmrghh v2, v2, v4
333 ; CHECK-BE-NEXT: vmrghw v2, v2, v3
334 ; CHECK-BE-NEXT: mfvsrd r3, v2
335 ; CHECK-BE-NEXT: blr
336 entry:
337 %a = load <8 x float>, <8 x float>* %0, align 32
338 %1 = fptoui <8 x float> %a to <8 x i8>
339 %2 = bitcast <8 x i8> %1 to i64
340 ret i64 %2
341 }
343 define <16 x i8> @test16elt(<16 x float>* nocapture readonly) local_unnamed_addr #3 {
344 ; CHECK-P8-LABEL: test16elt:
345 ; CHECK-P8: # %bb.0: # %entry
346 ; CHECK-P8-NEXT: lvx v4, 0, r3
347 ; CHECK-P8-NEXT: li r4, 16
348 ; CHECK-P8-NEXT: li r5, 32
349 ; CHECK-P8-NEXT: lvx v3, r3, r4
350 ; CHECK-P8-NEXT: lvx v2, r3, r5
351 ; CHECK-P8-NEXT: xxsldwi vs0, v4, v4, 3
352 ; CHECK-P8-NEXT: xxswapd vs2, v4
353 ; CHECK-P8-NEXT: xxsldwi vs4, v4, v4, 1
354 ; CHECK-P8-NEXT: xscvspdpn f1, v4
355 ; CHECK-P8-NEXT: xscvspdpn f3, v3
356 ; CHECK-P8-NEXT: xxsldwi vs6, v3, v3, 3
357 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
358 ; CHECK-P8-NEXT: xxswapd vs7, v3
359 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
360 ; CHECK-P8-NEXT: xxsldwi vs8, v3, v3, 1
361 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
362 ; CHECK-P8-NEXT: xxsldwi vs9, v2, v2, 3
363 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
364 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
365 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
366 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
367 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
368 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
369 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
370 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
371 ; CHECK-P8-NEXT: xscvspdpn f9, vs9
372 ; CHECK-P8-NEXT: mffprwz r4, f0
373 ; CHECK-P8-NEXT: xxswapd vs0, v2
374 ; CHECK-P8-NEXT: mffprwz r5, f2
375 ; CHECK-P8-NEXT: mtvsrd v3, r4
376 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
377 ; CHECK-P8-NEXT: mffprwz r4, f1
378 ; CHECK-P8-NEXT: mtvsrd v4, r5
379 ; CHECK-P8-NEXT: mffprwz r5, f4
380 ; CHECK-P8-NEXT: xscvdpsxws f1, f6
381 ; CHECK-P8-NEXT: vmrghb v3, v4, v3
382 ; CHECK-P8-NEXT: mtvsrd v4, r5
383 ; CHECK-P8-NEXT: mffprwz r5, f3
384 ; CHECK-P8-NEXT: xscvdpsxws f3, f7
385 ; CHECK-P8-NEXT: xscvdpsxws f4, f8
386 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
387 ; CHECK-P8-NEXT: mtvsrd v5, r4
388 ; CHECK-P8-NEXT: li r4, 48
389 ; CHECK-P8-NEXT: lvx v0, r3, r4
390 ; CHECK-P8-NEXT: mffprwz r3, f1
391 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
392 ; CHECK-P8-NEXT: xscvspdpn f5, v2
393 ; CHECK-P8-NEXT: mffprwz r4, f3
394 ; CHECK-P8-NEXT: xxsldwi vs3, v0, v0, 3
395 ; CHECK-P8-NEXT: mtvsrd v1, r3
396 ; CHECK-P8-NEXT: mffprwz r3, f4
397 ; CHECK-P8-NEXT: xxswapd vs4, v0
398 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
399 ; CHECK-P8-NEXT: mtvsrd v7, r3
400 ; CHECK-P8-NEXT: mffprwz r3, f0
401 ; CHECK-P8-NEXT: xxsldwi vs0, v0, v0, 1
402 ; CHECK-P8-NEXT: xscvspdpn f2, v0
403 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
404 ; CHECK-P8-NEXT: xscvdpsxws f6, f9
405 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
406 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
407 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
408 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
409 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
410 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
411 ; CHECK-P8-NEXT: mtvsrd v6, r4
412 ; CHECK-P8-NEXT: mffprwz r4, f6
413 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
414 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
415 ; CHECK-P8-NEXT: vmrghb v2, v6, v1
416 ; CHECK-P8-NEXT: mtvsrd v1, r4
417 ; CHECK-P8-NEXT: mffprwz r4, f5
418 ; CHECK-P8-NEXT: mtvsrd v6, r3
419 ; CHECK-P8-NEXT: mffprwz r3, f1
420 ; CHECK-P8-NEXT: vmrghb v4, v5, v4
421 ; CHECK-P8-NEXT: mtvsrd v5, r5
422 ; CHECK-P8-NEXT: vmrghb v0, v6, v1
423 ; CHECK-P8-NEXT: mtvsrd v1, r4
424 ; CHECK-P8-NEXT: mffprwz r4, f2
425 ; CHECK-P8-NEXT: mtvsrd v6, r3
426 ; CHECK-P8-NEXT: mffprwz r3, f3
427 ; CHECK-P8-NEXT: vmrghb v5, v5, v7
428 ; CHECK-P8-NEXT: vmrghb v1, v1, v6
429 ; CHECK-P8-NEXT: mtvsrd v6, r4
430 ; CHECK-P8-NEXT: mffprwz r4, f4
431 ; CHECK-P8-NEXT: mtvsrd v7, r3
432 ; CHECK-P8-NEXT: mffprwz r3, f0
433 ; CHECK-P8-NEXT: mtvsrd v8, r4
434 ; CHECK-P8-NEXT: mtvsrd v9, r3
435 ; CHECK-P8-NEXT: vmrghb v7, v8, v7
436 ; CHECK-P8-NEXT: vmrghb v6, v6, v9
437 ; CHECK-P8-NEXT: vmrglh v3, v4, v3
438 ; CHECK-P8-NEXT: vmrglh v2, v5, v2
439 ; CHECK-P8-NEXT: vmrglh v4, v1, v0
440 ; CHECK-P8-NEXT: vmrglh v5, v6, v7
441 ; CHECK-P8-NEXT: vmrglw v2, v2, v3
442 ; CHECK-P8-NEXT: vmrglw v3, v5, v4
443 ; CHECK-P8-NEXT: xxmrgld v2, v3, v2
444 ; CHECK-P8-NEXT: blr
445 ;
446 ; CHECK-P9-LABEL: test16elt:
447 ; CHECK-P9: # %bb.0: # %entry
448 ; CHECK-P9-NEXT: lxv vs3, 0(r3)
449 ; CHECK-P9-NEXT: lxv vs0, 48(r3)
450 ; CHECK-P9-NEXT: lxv vs1, 32(r3)
451 ; CHECK-P9-NEXT: lxv vs2, 16(r3)
452 ; CHECK-P9-NEXT: xxsldwi vs4, vs3, vs3, 3
453 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
454 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
455 ; CHECK-P9-NEXT: mffprwz r3, f4
456 ; CHECK-P9-NEXT: xxswapd vs4, vs3
457 ; CHECK-P9-NEXT: mtvsrd v2, r3
458 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
459 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
460 ; CHECK-P9-NEXT: mffprwz r3, f4
461 ; CHECK-P9-NEXT: xscvspdpn f4, vs3
462 ; CHECK-P9-NEXT: xxsldwi vs3, vs3, vs3, 1
463 ; CHECK-P9-NEXT: mtvsrd v3, r3
464 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
465 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
466 ; CHECK-P9-NEXT: vmrghb v2, v3, v2
467 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
468 ; CHECK-P9-NEXT: mffprwz r3, f4
469 ; CHECK-P9-NEXT: mtvsrd v3, r3
470 ; CHECK-P9-NEXT: mffprwz r3, f3
471 ; CHECK-P9-NEXT: xxsldwi vs3, vs2, vs2, 3
472 ; CHECK-P9-NEXT: mtvsrd v4, r3
473 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
474 ; CHECK-P9-NEXT: vmrghb v3, v3, v4
475 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
476 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
477 ; CHECK-P9-NEXT: mffprwz r3, f3
478 ; CHECK-P9-NEXT: xxswapd vs3, vs2
479 ; CHECK-P9-NEXT: mtvsrd v3, r3
480 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
481 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
482 ; CHECK-P9-NEXT: mffprwz r3, f3
483 ; CHECK-P9-NEXT: xscvspdpn f3, vs2
484 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
485 ; CHECK-P9-NEXT: mtvsrd v4, r3
486 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
487 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
488 ; CHECK-P9-NEXT: vmrghb v3, v4, v3
489 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
490 ; CHECK-P9-NEXT: mffprwz r3, f3
491 ; CHECK-P9-NEXT: mtvsrd v4, r3
492 ; CHECK-P9-NEXT: mffprwz r3, f2
493 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
494 ; CHECK-P9-NEXT: mtvsrd v5, r3
495 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
496 ; CHECK-P9-NEXT: vmrghb v4, v4, v5
497 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
498 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
499 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
500 ; CHECK-P9-NEXT: mffprwz r3, f2
501 ; CHECK-P9-NEXT: xxswapd vs2, vs1
502 ; CHECK-P9-NEXT: mtvsrd v3, r3
503 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
504 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
505 ; CHECK-P9-NEXT: mffprwz r3, f2
506 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
507 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
508 ; CHECK-P9-NEXT: mtvsrd v4, r3
509 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
510 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
511 ; CHECK-P9-NEXT: vmrghb v3, v4, v3
512 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
513 ; CHECK-P9-NEXT: mffprwz r3, f2
514 ; CHECK-P9-NEXT: mtvsrd v4, r3
515 ; CHECK-P9-NEXT: mffprwz r3, f1
516 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
517 ; CHECK-P9-NEXT: mtvsrd v5, r3
518 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
519 ; CHECK-P9-NEXT: vmrghb v4, v4, v5
520 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
521 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
522 ; CHECK-P9-NEXT: mffprwz r3, f1
523 ; CHECK-P9-NEXT: xxswapd vs1, vs0
524 ; CHECK-P9-NEXT: mtvsrd v4, r3
525 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
526 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
527 ; CHECK-P9-NEXT: mffprwz r3, f1
528 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
529 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
530 ; CHECK-P9-NEXT: mtvsrd v5, r3
531 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
532 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
533 ; CHECK-P9-NEXT: vmrghb v4, v5, v4
534 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
535 ; CHECK-P9-NEXT: mffprwz r3, f1
536 ; CHECK-P9-NEXT: mtvsrd v5, r3
537 ; CHECK-P9-NEXT: mffprwz r3, f0
538 ; CHECK-P9-NEXT: mtvsrd v0, r3
539 ; CHECK-P9-NEXT: vmrghb v5, v5, v0
540 ; CHECK-P9-NEXT: vmrglh v4, v5, v4
541 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
542 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
543 ; CHECK-P9-NEXT: blr
544 ;
545 ; CHECK-BE-LABEL: test16elt:
546 ; CHECK-BE: # %bb.0: # %entry
547 ; CHECK-BE-NEXT: lxv vs3, 48(r3)
548 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
549 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
550 ; CHECK-BE-NEXT: lxv vs2, 32(r3)
551 ; CHECK-BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha
552 ; CHECK-BE-NEXT: addi r3, r3, .LCPI3_0@toc@l
553 ; CHECK-BE-NEXT: lxv v2, 0(r3)
554 ; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
555 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
556 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
557 ; CHECK-BE-NEXT: mffprwz r3, f4
558 ; CHECK-BE-NEXT: xxswapd vs4, vs3
559 ; CHECK-BE-NEXT: mtvsrwz v3, r3
560 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
561 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
562 ; CHECK-BE-NEXT: mffprwz r3, f4
563 ; CHECK-BE-NEXT: xscvspdpn f4, vs3
564 ; CHECK-BE-NEXT: xxsldwi vs3, vs3, vs3, 1
565 ; CHECK-BE-NEXT: mtvsrwz v4, r3
566 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
567 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
568 ; CHECK-BE-NEXT: vperm v3, v4, v3, v2
569 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
570 ; CHECK-BE-NEXT: mffprwz r3, f4
571 ; CHECK-BE-NEXT: mtvsrwz v4, r3
572 ; CHECK-BE-NEXT: mffprwz r3, f3
573 ; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
574 ; CHECK-BE-NEXT: mtvsrwz v5, r3
575 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
576 ; CHECK-BE-NEXT: vperm v4, v4, v5, v2
577 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
578 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
579 ; CHECK-BE-NEXT: mffprwz r3, f3
580 ; CHECK-BE-NEXT: xxswapd vs3, vs2
581 ; CHECK-BE-NEXT: mtvsrwz v4, r3
582 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
583 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
584 ; CHECK-BE-NEXT: mffprwz r3, f3
585 ; CHECK-BE-NEXT: xscvspdpn f3, vs2
586 ; CHECK-BE-NEXT: xxsldwi vs2, vs2, vs2, 1
587 ; CHECK-BE-NEXT: mtvsrwz v5, r3
588 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
589 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
590 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
591 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
592 ; CHECK-BE-NEXT: mffprwz r3, f3
593 ; CHECK-BE-NEXT: mtvsrwz v5, r3
594 ; CHECK-BE-NEXT: mffprwz r3, f2
595 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
596 ; CHECK-BE-NEXT: mtvsrwz v0, r3
597 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
598 ; CHECK-BE-NEXT: vperm v5, v5, v0, v2
599 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
600 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
601 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
602 ; CHECK-BE-NEXT: mffprwz r3, f2
603 ; CHECK-BE-NEXT: xxswapd vs2, vs1
604 ; CHECK-BE-NEXT: mtvsrwz v4, r3
605 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
606 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
607 ; CHECK-BE-NEXT: mffprwz r3, f2
608 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
609 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
610 ; CHECK-BE-NEXT: mtvsrwz v5, r3
611 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
612 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
613 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
614 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
615 ; CHECK-BE-NEXT: mffprwz r3, f2
616 ; CHECK-BE-NEXT: mtvsrwz v5, r3
617 ; CHECK-BE-NEXT: mffprwz r3, f1
618 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
619 ; CHECK-BE-NEXT: mtvsrwz v0, r3
620 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
621 ; CHECK-BE-NEXT: vperm v5, v5, v0, v2
622 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
623 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
624 ; CHECK-BE-NEXT: mffprwz r3, f1
625 ; CHECK-BE-NEXT: xxswapd vs1, vs0
626 ; CHECK-BE-NEXT: mtvsrwz v5, r3
627 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
628 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
629 ; CHECK-BE-NEXT: mffprwz r3, f1
630 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
631 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
632 ; CHECK-BE-NEXT: mtvsrwz v0, r3
633 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
634 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
635 ; CHECK-BE-NEXT: vperm v5, v0, v5, v2
636 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
637 ; CHECK-BE-NEXT: mffprwz r3, f1
638 ; CHECK-BE-NEXT: mtvsrwz v0, r3
639 ; CHECK-BE-NEXT: mffprwz r3, f0
640 ; CHECK-BE-NEXT: mtvsrwz v1, r3
641 ; CHECK-BE-NEXT: vperm v2, v0, v1, v2
642 ; CHECK-BE-NEXT: vmrghh v2, v2, v5
643 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
644 ; CHECK-BE-NEXT: xxmrghd v2, v2, v3
645 ; CHECK-BE-NEXT: blr
646 entry:
647 %a = load <16 x float>, <16 x float>* %0, align 64
648 %1 = fptoui <16 x float> %a to <16 x i8>
649 ret <16 x i8> %1
650 }
652 define i16 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
653 ; CHECK-P8-LABEL: test2elt_signed:
654 ; CHECK-P8: # %bb.0: # %entry
655 ; CHECK-P8-NEXT: mtfprd f0, r3
656 ; CHECK-P8-NEXT: xxswapd v2, vs0
657 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
658 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 3
659 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
660 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
661 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
662 ; CHECK-P8-NEXT: mffprwz r4, f0
663 ; CHECK-P8-NEXT: mtvsrd v3, r4
664 ; CHECK-P8-NEXT: mffprwz r3, f1
665 ; CHECK-P8-NEXT: mtvsrd v2, r3
666 ; CHECK-P8-NEXT: vmrghb v2, v3, v2
667 ; CHECK-P8-NEXT: xxswapd vs0, v2
668 ; CHECK-P8-NEXT: mffprd r3, f0
669 ; CHECK-P8-NEXT: clrldi r3, r3, 48
670 ; CHECK-P8-NEXT: sth r3, -2(r1)
671 ; CHECK-P8-NEXT: lhz r3, -2(r1)
672 ; CHECK-P8-NEXT: blr
673 ;
674 ; CHECK-P9-LABEL: test2elt_signed:
675 ; CHECK-P9: # %bb.0: # %entry
676 ; CHECK-P9-NEXT: mtfprd f0, r3
677 ; CHECK-P9-NEXT: xxswapd v2, vs0
678 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
679 ; CHECK-P9-NEXT: xxsldwi vs1, v2, v2, 3
680 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
681 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
682 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
683 ; CHECK-P9-NEXT: mffprwz r3, f1
684 ; CHECK-P9-NEXT: mtvsrd v2, r3
685 ; CHECK-P9-NEXT: mffprwz r3, f0
686 ; CHECK-P9-NEXT: mtvsrd v3, r3
687 ; CHECK-P9-NEXT: addi r3, r1, -2
688 ; CHECK-P9-NEXT: vmrghb v2, v3, v2
689 ; CHECK-P9-NEXT: vsldoi v2, v2, v2, 8
690 ; CHECK-P9-NEXT: stxsihx v2, 0, r3
691 ; CHECK-P9-NEXT: lhz r3, -2(r1)
692 ; CHECK-P9-NEXT: blr
693 ;
694 ; CHECK-BE-LABEL: test2elt_signed:
695 ; CHECK-BE: # %bb.0: # %entry
696 ; CHECK-BE-NEXT: mtfprd f0, r3
697 ; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
698 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
699 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
700 ; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
701 ; CHECK-BE-NEXT: lxv v2, 0(r3)
702 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
703 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
704 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
705 ; CHECK-BE-NEXT: mffprwz r3, f1
706 ; CHECK-BE-NEXT: mtvsrwz v3, r3
707 ; CHECK-BE-NEXT: mffprwz r3, f0
708 ; CHECK-BE-NEXT: mtvsrwz v4, r3
709 ; CHECK-BE-NEXT: addi r3, r1, -2
710 ; CHECK-BE-NEXT: vperm v2, v3, v4, v2
711 ; CHECK-BE-NEXT: vsldoi v2, v2, v2, 10
712 ; CHECK-BE-NEXT: stxsihx v2, 0, r3
713 ; CHECK-BE-NEXT: lhz r3, -2(r1)
714 ; CHECK-BE-NEXT: blr
715 entry:
716 %0 = bitcast i64 %a.coerce to <2 x float>
717 %1 = fptosi <2 x float> %0 to <2 x i8>
718 %2 = bitcast <2 x i8> %1 to i16
719 ret i16 %2
720 }
722 define i32 @test4elt_signed(<4 x float> %a) local_unnamed_addr #1 {
723 ; CHECK-P8-LABEL: test4elt_signed:
724 ; CHECK-P8: # %bb.0: # %entry
725 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
726 ; CHECK-P8-NEXT: xscvspdpn f1, v2
727 ; CHECK-P8-NEXT: xxswapd vs2, v2
728 ; CHECK-P8-NEXT: xxsldwi vs3, v2, v2, 1
729 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
730 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
731 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
732 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
733 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
734 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
735 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
736 ; CHECK-P8-NEXT: mffprwz r3, f1
737 ; CHECK-P8-NEXT: mtvsrd v2, r3
738 ; CHECK-P8-NEXT: mffprwz r3, f0
739 ; CHECK-P8-NEXT: mffprwz r4, f2
740 ; CHECK-P8-NEXT: mtvsrd v3, r3
741 ; CHECK-P8-NEXT: mffprwz r3, f3
742 ; CHECK-P8-NEXT: mtvsrd v4, r4
743 ; CHECK-P8-NEXT: mtvsrd v5, r3
744 ; CHECK-P8-NEXT: vmrghb v3, v4, v3
745 ; CHECK-P8-NEXT: vmrghb v2, v2, v5
746 ; CHECK-P8-NEXT: vmrglh v2, v2, v3
747 ; CHECK-P8-NEXT: xxswapd vs0, v2
748 ; CHECK-P8-NEXT: mffprwz r3, f0
749 ; CHECK-P8-NEXT: blr
750 ;
751 ; CHECK-P9-LABEL: test4elt_signed:
752 ; CHECK-P9: # %bb.0: # %entry
753 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 3
754 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
755 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
756 ; CHECK-P9-NEXT: mffprwz r3, f0
757 ; CHECK-P9-NEXT: xxswapd vs0, v2
758 ; CHECK-P9-NEXT: mtvsrd v3, r3
759 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
760 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
761 ; CHECK-P9-NEXT: mffprwz r3, f0
762 ; CHECK-P9-NEXT: xscvspdpn f0, v2
763 ; CHECK-P9-NEXT: mtvsrd v4, r3
764 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
765 ; CHECK-P9-NEXT: vmrghb v3, v4, v3
766 ; CHECK-P9-NEXT: mffprwz r3, f0
767 ; CHECK-P9-NEXT: xxsldwi vs0, v2, v2, 1
768 ; CHECK-P9-NEXT: mtvsrd v4, r3
769 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
770 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
771 ; CHECK-P9-NEXT: mffprwz r3, f0
772 ; CHECK-P9-NEXT: mtvsrd v2, r3
773 ; CHECK-P9-NEXT: li r3, 0
774 ; CHECK-P9-NEXT: vmrghb v2, v4, v2
775 ; CHECK-P9-NEXT: vmrglh v2, v2, v3
776 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
777 ; CHECK-P9-NEXT: blr
778 ;
779 ; CHECK-BE-LABEL: test4elt_signed:
780 ; CHECK-BE: # %bb.0: # %entry
781 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 3
782 ; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
783 ; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
784 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
785 ; CHECK-BE-NEXT: lxv v3, 0(r3)
786 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
787 ; CHECK-BE-NEXT: mffprwz r3, f0
788 ; CHECK-BE-NEXT: xxswapd vs0, v2
789 ; CHECK-BE-NEXT: mtvsrwz v4, r3
790 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
791 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
792 ; CHECK-BE-NEXT: mffprwz r3, f0
793 ; CHECK-BE-NEXT: xscvspdpn f0, v2
794 ; CHECK-BE-NEXT: mtvsrwz v5, r3
795 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
796 ; CHECK-BE-NEXT: vperm v4, v5, v4, v3
797 ; CHECK-BE-NEXT: mffprwz r3, f0
798 ; CHECK-BE-NEXT: xxsldwi vs0, v2, v2, 1
799 ; CHECK-BE-NEXT: mtvsrwz v5, r3
800 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
801 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
802 ; CHECK-BE-NEXT: mffprwz r3, f0
803 ; CHECK-BE-NEXT: mtvsrwz v2, r3
804 ; CHECK-BE-NEXT: li r3, 0
805 ; CHECK-BE-NEXT: vperm v2, v5, v2, v3
806 ; CHECK-BE-NEXT: vmrghh v2, v2, v4
807 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
808 ; CHECK-BE-NEXT: blr
809 entry:
810 %0 = fptosi <4 x float> %a to <4 x i8>
811 %1 = bitcast <4 x i8> %0 to i32
812 ret i32 %1
813 }
815 define i64 @test8elt_signed(<8 x float>* nocapture readonly) local_unnamed_addr #2 {
816 ; CHECK-P8-LABEL: test8elt_signed:
817 ; CHECK-P8: # %bb.0: # %entry
818 ; CHECK-P8-NEXT: lvx v2, 0, r3
819 ; CHECK-P8-NEXT: li r4, 16
820 ; CHECK-P8-NEXT: lvx v3, r3, r4
821 ; CHECK-P8-NEXT: xxsldwi vs0, v2, v2, 3
822 ; CHECK-P8-NEXT: xxswapd vs1, v2
823 ; CHECK-P8-NEXT: xscvspdpn f2, v2
824 ; CHECK-P8-NEXT: xxsldwi vs4, v2, v2, 1
825 ; CHECK-P8-NEXT: xxsldwi vs5, v3, v3, 3
826 ; CHECK-P8-NEXT: xscvspdpn f3, v3
827 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
828 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
829 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
830 ; CHECK-P8-NEXT: xscvspdpn f5, vs5
831 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
832 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
833 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
834 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
835 ; CHECK-P8-NEXT: mffprwz r3, f0
836 ; CHECK-P8-NEXT: xxswapd vs0, v3
837 ; CHECK-P8-NEXT: mffprwz r4, f1
838 ; CHECK-P8-NEXT: xxsldwi vs1, v3, v3, 1
839 ; CHECK-P8-NEXT: mtvsrd v2, r3
840 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
841 ; CHECK-P8-NEXT: mffprwz r3, f2
842 ; CHECK-P8-NEXT: xscvdpsxws f2, f4
843 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
844 ; CHECK-P8-NEXT: xscvdpsxws f4, f5
845 ; CHECK-P8-NEXT: mtvsrd v4, r4
846 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
847 ; CHECK-P8-NEXT: vmrghb v2, v4, v2
848 ; CHECK-P8-NEXT: mffprwz r4, f2
849 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
850 ; CHECK-P8-NEXT: mtvsrd v3, r3
851 ; CHECK-P8-NEXT: mffprwz r3, f3
852 ; CHECK-P8-NEXT: mtvsrd v4, r4
853 ; CHECK-P8-NEXT: mffprwz r4, f0
854 ; CHECK-P8-NEXT: vmrghb v3, v3, v4
855 ; CHECK-P8-NEXT: mtvsrd v4, r3
856 ; CHECK-P8-NEXT: mffprwz r3, f4
857 ; CHECK-P8-NEXT: mtvsrd v0, r4
858 ; CHECK-P8-NEXT: mtvsrd v5, r3
859 ; CHECK-P8-NEXT: mffprwz r3, f1
860 ; CHECK-P8-NEXT: vmrghb v5, v0, v5
861 ; CHECK-P8-NEXT: mtvsrd v1, r3
862 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
863 ; CHECK-P8-NEXT: vmrghb v4, v4, v1
864 ; CHECK-P8-NEXT: vmrglh v3, v4, v5
865 ; CHECK-P8-NEXT: vmrglw v2, v3, v2
866 ; CHECK-P8-NEXT: xxswapd vs0, v2
867 ; CHECK-P8-NEXT: mffprd r3, f0
868 ; CHECK-P8-NEXT: blr
869 ;
870 ; CHECK-P9-LABEL: test8elt_signed:
871 ; CHECK-P9: # %bb.0: # %entry
872 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
873 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
874 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
875 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
876 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
877 ; CHECK-P9-NEXT: mffprwz r3, f2
878 ; CHECK-P9-NEXT: xxswapd vs2, vs1
879 ; CHECK-P9-NEXT: mtvsrd v2, r3
880 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
881 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
882 ; CHECK-P9-NEXT: mffprwz r3, f2
883 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
884 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
885 ; CHECK-P9-NEXT: mtvsrd v3, r3
886 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
887 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
888 ; CHECK-P9-NEXT: vmrghb v2, v3, v2
889 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
890 ; CHECK-P9-NEXT: mffprwz r3, f2
891 ; CHECK-P9-NEXT: mtvsrd v3, r3
892 ; CHECK-P9-NEXT: mffprwz r3, f1
893 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
894 ; CHECK-P9-NEXT: mtvsrd v4, r3
895 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
896 ; CHECK-P9-NEXT: vmrghb v3, v3, v4
897 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
898 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
899 ; CHECK-P9-NEXT: mffprwz r3, f1
900 ; CHECK-P9-NEXT: xxswapd vs1, vs0
901 ; CHECK-P9-NEXT: mtvsrd v3, r3
902 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
903 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
904 ; CHECK-P9-NEXT: mffprwz r3, f1
905 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
906 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
907 ; CHECK-P9-NEXT: mtvsrd v4, r3
908 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
909 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
910 ; CHECK-P9-NEXT: vmrghb v3, v4, v3
911 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
912 ; CHECK-P9-NEXT: mffprwz r3, f1
913 ; CHECK-P9-NEXT: mtvsrd v4, r3
914 ; CHECK-P9-NEXT: mffprwz r3, f0
915 ; CHECK-P9-NEXT: mtvsrd v5, r3
916 ; CHECK-P9-NEXT: vmrghb v4, v4, v5
917 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
918 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
919 ; CHECK-P9-NEXT: mfvsrld r3, v2
920 ; CHECK-P9-NEXT: blr
921 ;
922 ; CHECK-BE-LABEL: test8elt_signed:
923 ; CHECK-BE: # %bb.0: # %entry
924 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
925 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
926 ; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha
927 ; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l
928 ; CHECK-BE-NEXT: lxv v2, 0(r3)
929 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
930 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
931 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
932 ; CHECK-BE-NEXT: mffprwz r3, f2
933 ; CHECK-BE-NEXT: xxswapd vs2, vs1
934 ; CHECK-BE-NEXT: mtvsrwz v3, r3
935 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
936 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
937 ; CHECK-BE-NEXT: mffprwz r3, f2
938 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
939 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
940 ; CHECK-BE-NEXT: mtvsrwz v4, r3
941 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
942 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
943 ; CHECK-BE-NEXT: vperm v3, v4, v3, v2
944 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
945 ; CHECK-BE-NEXT: mffprwz r3, f2
946 ; CHECK-BE-NEXT: mtvsrwz v4, r3
947 ; CHECK-BE-NEXT: mffprwz r3, f1
948 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
949 ; CHECK-BE-NEXT: mtvsrwz v5, r3
950 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
951 ; CHECK-BE-NEXT: vperm v4, v4, v5, v2
952 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
953 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
954 ; CHECK-BE-NEXT: mffprwz r3, f1
955 ; CHECK-BE-NEXT: xxswapd vs1, vs0
956 ; CHECK-BE-NEXT: mtvsrwz v4, r3
957 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
958 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
959 ; CHECK-BE-NEXT: mffprwz r3, f1
960 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
961 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
962 ; CHECK-BE-NEXT: mtvsrwz v5, r3
963 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
964 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
965 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
966 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
967 ; CHECK-BE-NEXT: mffprwz r3, f1
968 ; CHECK-BE-NEXT: mtvsrwz v5, r3
969 ; CHECK-BE-NEXT: mffprwz r3, f0
970 ; CHECK-BE-NEXT: mtvsrwz v0, r3
971 ; CHECK-BE-NEXT: vperm v2, v5, v0, v2
972 ; CHECK-BE-NEXT: vmrghh v2, v2, v4
973 ; CHECK-BE-NEXT: vmrghw v2, v2, v3
974 ; CHECK-BE-NEXT: mfvsrd r3, v2
975 ; CHECK-BE-NEXT: blr
976 entry:
977 %a = load <8 x float>, <8 x float>* %0, align 32
978 %1 = fptosi <8 x float> %a to <8 x i8>
979 %2 = bitcast <8 x i8> %1 to i64
980 ret i64 %2
981 }
983 define <16 x i8> @test16elt_signed(<16 x float>* nocapture readonly) local_unnamed_addr #3 {
984 ; CHECK-P8-LABEL: test16elt_signed:
985 ; CHECK-P8: # %bb.0: # %entry
986 ; CHECK-P8-NEXT: lvx v4, 0, r3
987 ; CHECK-P8-NEXT: li r4, 16
988 ; CHECK-P8-NEXT: li r5, 32
989 ; CHECK-P8-NEXT: lvx v3, r3, r4
990 ; CHECK-P8-NEXT: lvx v2, r3, r5
991 ; CHECK-P8-NEXT: xxsldwi vs0, v4, v4, 3
992 ; CHECK-P8-NEXT: xxswapd vs2, v4
993 ; CHECK-P8-NEXT: xxsldwi vs4, v4, v4, 1
994 ; CHECK-P8-NEXT: xscvspdpn f1, v4
995 ; CHECK-P8-NEXT: xscvspdpn f3, v3
996 ; CHECK-P8-NEXT: xxsldwi vs6, v3, v3, 3
997 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
998 ; CHECK-P8-NEXT: xxswapd vs7, v3
999 ; CHECK-P8-NEXT: xscvspdpn f2, vs2
1000 ; CHECK-P8-NEXT: xxsldwi vs8, v3, v3, 1
1001 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
1002 ; CHECK-P8-NEXT: xxsldwi vs9, v2, v2, 3
1003 ; CHECK-P8-NEXT: xscvspdpn f6, vs6
1004 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
1005 ; CHECK-P8-NEXT: xscvspdpn f7, vs7
1006 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1007 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
1008 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
1009 ; CHECK-P8-NEXT: xscvspdpn f8, vs8
1010 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
1011 ; CHECK-P8-NEXT: xscvspdpn f9, vs9
1012 ; CHECK-P8-NEXT: mffprwz r4, f0
1013 ; CHECK-P8-NEXT: xxswapd vs0, v2
1014 ; CHECK-P8-NEXT: mffprwz r5, f2
1015 ; CHECK-P8-NEXT: mtvsrd v3, r4
1016 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
1017 ; CHECK-P8-NEXT: mffprwz r4, f1
1018 ; CHECK-P8-NEXT: mtvsrd v4, r5
1019 ; CHECK-P8-NEXT: mffprwz r5, f4
1020 ; CHECK-P8-NEXT: xscvdpsxws f1, f6
1021 ; CHECK-P8-NEXT: vmrghb v3, v4, v3
1022 ; CHECK-P8-NEXT: mtvsrd v4, r5
1023 ; CHECK-P8-NEXT: mffprwz r5, f3
1024 ; CHECK-P8-NEXT: xscvdpsxws f3, f7
1025 ; CHECK-P8-NEXT: xscvdpsxws f4, f8
1026 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1027 ; CHECK-P8-NEXT: mtvsrd v5, r4
1028 ; CHECK-P8-NEXT: li r4, 48
1029 ; CHECK-P8-NEXT: lvx v0, r3, r4
1030 ; CHECK-P8-NEXT: mffprwz r3, f1
1031 ; CHECK-P8-NEXT: xxsldwi vs1, v2, v2, 1
1032 ; CHECK-P8-NEXT: xscvspdpn f5, v2
1033 ; CHECK-P8-NEXT: mffprwz r4, f3
1034 ; CHECK-P8-NEXT: xxsldwi vs3, v0, v0, 3
1035 ; CHECK-P8-NEXT: mtvsrd v1, r3
1036 ; CHECK-P8-NEXT: mffprwz r3, f4
1037 ; CHECK-P8-NEXT: xxswapd vs4, v0
1038 ; CHECK-P8-NEXT: xscvspdpn f1, vs1
1039 ; CHECK-P8-NEXT: mtvsrd v7, r3
1040 ; CHECK-P8-NEXT: mffprwz r3, f0
1041 ; CHECK-P8-NEXT: xxsldwi vs0, v0, v0, 1
1042 ; CHECK-P8-NEXT: xscvspdpn f2, v0
1043 ; CHECK-P8-NEXT: xscvspdpn f3, vs3
1044 ; CHECK-P8-NEXT: xscvdpsxws f6, f9
1045 ; CHECK-P8-NEXT: xscvspdpn f4, vs4
1046 ; CHECK-P8-NEXT: xscvspdpn f0, vs0
1047 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
1048 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
1049 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
1050 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
1051 ; CHECK-P8-NEXT: mtvsrd v6, r4
1052 ; CHECK-P8-NEXT: mffprwz r4, f6
1053 ; CHECK-P8-NEXT: xscvdpsxws f4, f4
1054 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1055 ; CHECK-P8-NEXT: vmrghb v2, v6, v1
1056 ; CHECK-P8-NEXT: mtvsrd v1, r4
1057 ; CHECK-P8-NEXT: mffprwz r4, f5
1058 ; CHECK-P8-NEXT: mtvsrd v6, r3
1059 ; CHECK-P8-NEXT: mffprwz r3, f1
1060 ; CHECK-P8-NEXT: vmrghb v4, v5, v4
1061 ; CHECK-P8-NEXT: mtvsrd v5, r5
1062 ; CHECK-P8-NEXT: vmrghb v0, v6, v1
1063 ; CHECK-P8-NEXT: mtvsrd v1, r4
1064 ; CHECK-P8-NEXT: mffprwz r4, f2
1065 ; CHECK-P8-NEXT: mtvsrd v6, r3
1066 ; CHECK-P8-NEXT: mffprwz r3, f3
1067 ; CHECK-P8-NEXT: vmrghb v5, v5, v7
1068 ; CHECK-P8-NEXT: vmrghb v1, v1, v6
1069 ; CHECK-P8-NEXT: mtvsrd v6, r4
1070 ; CHECK-P8-NEXT: mffprwz r4, f4
1071 ; CHECK-P8-NEXT: mtvsrd v7, r3
1072 ; CHECK-P8-NEXT: mffprwz r3, f0
1073 ; CHECK-P8-NEXT: mtvsrd v8, r4
1074 ; CHECK-P8-NEXT: mtvsrd v9, r3
1075 ; CHECK-P8-NEXT: vmrghb v7, v8, v7
1076 ; CHECK-P8-NEXT: vmrghb v6, v6, v9
1077 ; CHECK-P8-NEXT: vmrglh v3, v4, v3
1078 ; CHECK-P8-NEXT: vmrglh v2, v5, v2
1079 ; CHECK-P8-NEXT: vmrglh v4, v1, v0
1080 ; CHECK-P8-NEXT: vmrglh v5, v6, v7
1081 ; CHECK-P8-NEXT: vmrglw v2, v2, v3
1082 ; CHECK-P8-NEXT: vmrglw v3, v5, v4
1083 ; CHECK-P8-NEXT: xxmrgld v2, v3, v2
1084 ; CHECK-P8-NEXT: blr
1085 ;
1086 ; CHECK-P9-LABEL: test16elt_signed:
1087 ; CHECK-P9: # %bb.0: # %entry
1088 ; CHECK-P9-NEXT: lxv vs3, 0(r3)
1089 ; CHECK-P9-NEXT: lxv vs0, 48(r3)
1090 ; CHECK-P9-NEXT: lxv vs1, 32(r3)
1091 ; CHECK-P9-NEXT: lxv vs2, 16(r3)
1092 ; CHECK-P9-NEXT: xxsldwi vs4, vs3, vs3, 3
1093 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
1094 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1095 ; CHECK-P9-NEXT: mffprwz r3, f4
1096 ; CHECK-P9-NEXT: xxswapd vs4, vs3
1097 ; CHECK-P9-NEXT: mtvsrd v2, r3
1098 ; CHECK-P9-NEXT: xscvspdpn f4, vs4
1099 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1100 ; CHECK-P9-NEXT: mffprwz r3, f4
1101 ; CHECK-P9-NEXT: xscvspdpn f4, vs3
1102 ; CHECK-P9-NEXT: xxsldwi vs3, vs3, vs3, 1
1103 ; CHECK-P9-NEXT: mtvsrd v3, r3
1104 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1105 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1106 ; CHECK-P9-NEXT: vmrghb v2, v3, v2
1107 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1108 ; CHECK-P9-NEXT: mffprwz r3, f4
1109 ; CHECK-P9-NEXT: mtvsrd v3, r3
1110 ; CHECK-P9-NEXT: mffprwz r3, f3
1111 ; CHECK-P9-NEXT: xxsldwi vs3, vs2, vs2, 3
1112 ; CHECK-P9-NEXT: mtvsrd v4, r3
1113 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1114 ; CHECK-P9-NEXT: vmrghb v3, v3, v4
1115 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1116 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
1117 ; CHECK-P9-NEXT: mffprwz r3, f3
1118 ; CHECK-P9-NEXT: xxswapd vs3, vs2
1119 ; CHECK-P9-NEXT: mtvsrd v3, r3
1120 ; CHECK-P9-NEXT: xscvspdpn f3, vs3
1121 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1122 ; CHECK-P9-NEXT: mffprwz r3, f3
1123 ; CHECK-P9-NEXT: xscvspdpn f3, vs2
1124 ; CHECK-P9-NEXT: xxsldwi vs2, vs2, vs2, 1
1125 ; CHECK-P9-NEXT: mtvsrd v4, r3
1126 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1127 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1128 ; CHECK-P9-NEXT: vmrghb v3, v4, v3
1129 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1130 ; CHECK-P9-NEXT: mffprwz r3, f3
1131 ; CHECK-P9-NEXT: mtvsrd v4, r3
1132 ; CHECK-P9-NEXT: mffprwz r3, f2
1133 ; CHECK-P9-NEXT: xxsldwi vs2, vs1, vs1, 3
1134 ; CHECK-P9-NEXT: mtvsrd v5, r3
1135 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1136 ; CHECK-P9-NEXT: vmrghb v4, v4, v5
1137 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1138 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
1139 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
1140 ; CHECK-P9-NEXT: mffprwz r3, f2
1141 ; CHECK-P9-NEXT: xxswapd vs2, vs1
1142 ; CHECK-P9-NEXT: mtvsrd v3, r3
1143 ; CHECK-P9-NEXT: xscvspdpn f2, vs2
1144 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1145 ; CHECK-P9-NEXT: mffprwz r3, f2
1146 ; CHECK-P9-NEXT: xscvspdpn f2, vs1
1147 ; CHECK-P9-NEXT: xxsldwi vs1, vs1, vs1, 1
1148 ; CHECK-P9-NEXT: mtvsrd v4, r3
1149 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1150 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1151 ; CHECK-P9-NEXT: vmrghb v3, v4, v3
1152 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1153 ; CHECK-P9-NEXT: mffprwz r3, f2
1154 ; CHECK-P9-NEXT: mtvsrd v4, r3
1155 ; CHECK-P9-NEXT: mffprwz r3, f1
1156 ; CHECK-P9-NEXT: xxsldwi vs1, vs0, vs0, 3
1157 ; CHECK-P9-NEXT: mtvsrd v5, r3
1158 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1159 ; CHECK-P9-NEXT: vmrghb v4, v4, v5
1160 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1161 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
1162 ; CHECK-P9-NEXT: mffprwz r3, f1
1163 ; CHECK-P9-NEXT: xxswapd vs1, vs0
1164 ; CHECK-P9-NEXT: mtvsrd v4, r3
1165 ; CHECK-P9-NEXT: xscvspdpn f1, vs1
1166 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1167 ; CHECK-P9-NEXT: mffprwz r3, f1
1168 ; CHECK-P9-NEXT: xscvspdpn f1, vs0
1169 ; CHECK-P9-NEXT: xxsldwi vs0, vs0, vs0, 1
1170 ; CHECK-P9-NEXT: mtvsrd v5, r3
1171 ; CHECK-P9-NEXT: xscvspdpn f0, vs0
1172 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1173 ; CHECK-P9-NEXT: vmrghb v4, v5, v4
1174 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1175 ; CHECK-P9-NEXT: mffprwz r3, f1
1176 ; CHECK-P9-NEXT: mtvsrd v5, r3
1177 ; CHECK-P9-NEXT: mffprwz r3, f0
1178 ; CHECK-P9-NEXT: mtvsrd v0, r3
1179 ; CHECK-P9-NEXT: vmrghb v5, v5, v0
1180 ; CHECK-P9-NEXT: vmrglh v4, v5, v4
1181 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
1182 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
1183 ; CHECK-P9-NEXT: blr
1184 ;
1185 ; CHECK-BE-LABEL: test16elt_signed:
1186 ; CHECK-BE: # %bb.0: # %entry
1187 ; CHECK-BE-NEXT: lxv vs3, 48(r3)
1188 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
1189 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
1190 ; CHECK-BE-NEXT: lxv vs2, 32(r3)
1191 ; CHECK-BE-NEXT: addis r3, r2, .LCPI7_0@toc@ha
1192 ; CHECK-BE-NEXT: addi r3, r3, .LCPI7_0@toc@l
1193 ; CHECK-BE-NEXT: lxv v2, 0(r3)
1194 ; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
1195 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1196 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1197 ; CHECK-BE-NEXT: mffprwz r3, f4
1198 ; CHECK-BE-NEXT: xxswapd vs4, vs3
1199 ; CHECK-BE-NEXT: mtvsrwz v3, r3
1200 ; CHECK-BE-NEXT: xscvspdpn f4, vs4
1201 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1202 ; CHECK-BE-NEXT: mffprwz r3, f4
1203 ; CHECK-BE-NEXT: xscvspdpn f4, vs3
1204 ; CHECK-BE-NEXT: xxsldwi vs3, vs3, vs3, 1
1205 ; CHECK-BE-NEXT: mtvsrwz v4, r3
1206 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1207 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1208 ; CHECK-BE-NEXT: vperm v3, v4, v3, v2
1209 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1210 ; CHECK-BE-NEXT: mffprwz r3, f4
1211 ; CHECK-BE-NEXT: mtvsrwz v4, r3
1212 ; CHECK-BE-NEXT: mffprwz r3, f3
1213 ; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
1214 ; CHECK-BE-NEXT: mtvsrwz v5, r3
1215 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1216 ; CHECK-BE-NEXT: vperm v4, v4, v5, v2
1217 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1218 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1219 ; CHECK-BE-NEXT: mffprwz r3, f3
1220 ; CHECK-BE-NEXT: xxswapd vs3, vs2
1221 ; CHECK-BE-NEXT: mtvsrwz v4, r3
1222 ; CHECK-BE-NEXT: xscvspdpn f3, vs3
1223 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1224 ; CHECK-BE-NEXT: mffprwz r3, f3
1225 ; CHECK-BE-NEXT: xscvspdpn f3, vs2
1226 ; CHECK-BE-NEXT: xxsldwi vs2, vs2, vs2, 1
1227 ; CHECK-BE-NEXT: mtvsrwz v5, r3
1228 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1229 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1230 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
1231 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1232 ; CHECK-BE-NEXT: mffprwz r3, f3
1233 ; CHECK-BE-NEXT: mtvsrwz v5, r3
1234 ; CHECK-BE-NEXT: mffprwz r3, f2
1235 ; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
1236 ; CHECK-BE-NEXT: mtvsrwz v0, r3
1237 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1238 ; CHECK-BE-NEXT: vperm v5, v5, v0, v2
1239 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1240 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
1241 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
1242 ; CHECK-BE-NEXT: mffprwz r3, f2
1243 ; CHECK-BE-NEXT: xxswapd vs2, vs1
1244 ; CHECK-BE-NEXT: mtvsrwz v4, r3
1245 ; CHECK-BE-NEXT: xscvspdpn f2, vs2
1246 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1247 ; CHECK-BE-NEXT: mffprwz r3, f2
1248 ; CHECK-BE-NEXT: xscvspdpn f2, vs1
1249 ; CHECK-BE-NEXT: xxsldwi vs1, vs1, vs1, 1
1250 ; CHECK-BE-NEXT: mtvsrwz v5, r3
1251 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1252 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1253 ; CHECK-BE-NEXT: vperm v4, v5, v4, v2
1254 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1255 ; CHECK-BE-NEXT: mffprwz r3, f2
1256 ; CHECK-BE-NEXT: mtvsrwz v5, r3
1257 ; CHECK-BE-NEXT: mffprwz r3, f1
1258 ; CHECK-BE-NEXT: xxsldwi vs1, vs0, vs0, 3
1259 ; CHECK-BE-NEXT: mtvsrwz v0, r3
1260 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1261 ; CHECK-BE-NEXT: vperm v5, v5, v0, v2
1262 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1263 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
1264 ; CHECK-BE-NEXT: mffprwz r3, f1
1265 ; CHECK-BE-NEXT: xxswapd vs1, vs0
1266 ; CHECK-BE-NEXT: mtvsrwz v5, r3
1267 ; CHECK-BE-NEXT: xscvspdpn f1, vs1
1268 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1269 ; CHECK-BE-NEXT: mffprwz r3, f1
1270 ; CHECK-BE-NEXT: xscvspdpn f1, vs0
1271 ; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
1272 ; CHECK-BE-NEXT: mtvsrwz v0, r3
1273 ; CHECK-BE-NEXT: xscvspdpn f0, vs0
1274 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1275 ; CHECK-BE-NEXT: vperm v5, v0, v5, v2
1276 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1277 ; CHECK-BE-NEXT: mffprwz r3, f1
1278 ; CHECK-BE-NEXT: mtvsrwz v0, r3
1279 ; CHECK-BE-NEXT: mffprwz r3, f0
1280 ; CHECK-BE-NEXT: mtvsrwz v1, r3
1281 ; CHECK-BE-NEXT: vperm v2, v0, v1, v2
1282 ; CHECK-BE-NEXT: vmrghh v2, v2, v5
1283 ; CHECK-BE-NEXT: vmrghw v2, v2, v4
1284 ; CHECK-BE-NEXT: xxmrghd v2, v2, v3
1285 ; CHECK-BE-NEXT: blr
1286 entry:
1287 %a = load <16 x float>, <16 x float>* %0, align 64
1288 %1 = fptosi <16 x float> %a to <16 x i8>
1289 ret <16 x i8> %1
1290 }