1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-b -verify-machineinstrs < %s \
3 ; RUN: | FileCheck %s -check-prefix=RV32B
4 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zbb -verify-machineinstrs < %s \
5 ; RUN: | FileCheck %s -check-prefix=RV32ZBB
7 declare i32 @llvm.riscv.orc.b.i32(i32)
9 define i32 @orcb(i32 %a) nounwind {
12 ; RV32B-NEXT: orc.b a0, a0
15 ; RV32ZBB-LABEL: orcb:
17 ; RV32ZBB-NEXT: orc.b a0, a0
19 %tmp = call i32 @llvm.riscv.orc.b.i32(i32 %a)