| blob | fa93cc0e7e8839ace7bc6728db147ebf192444d6 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m | FileCheck %s --check-prefix=RV32I
3 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m | FileCheck %s --check-prefix=RV64I
4 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbNOZbt
5 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbNOZbt
6 ; RUN: llc < %s -mtriple=riscv32 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV32IZbb,RV32IZbbZbt
7 ; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+experimental-zbb,+experimental-zbt | FileCheck %s --check-prefixes=RV64IZbb,RV64IZbbZbt
9 declare i4 @llvm.ssub.sat.i4(i4, i4)
10 declare i8 @llvm.ssub.sat.i8(i8, i8)
11 declare i16 @llvm.ssub.sat.i16(i16, i16)
12 declare i32 @llvm.ssub.sat.i32(i32, i32)
13 declare i64 @llvm.ssub.sat.i64(i64, i64)
15 define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {
16 ; RV32I-LABEL: func32:
17 ; RV32I: # %bb.0:
18 ; RV32I-NEXT: mv a3, a0
19 ; RV32I-NEXT: mul a0, a1, a2
20 ; RV32I-NEXT: sgtz a1, a0
21 ; RV32I-NEXT: sub a0, a3, a0
22 ; RV32I-NEXT: slt a2, a0, a3
23 ; RV32I-NEXT: beq a1, a2, .LBB0_2
24 ; RV32I-NEXT: # %bb.1:
25 ; RV32I-NEXT: srai a0, a0, 31
26 ; RV32I-NEXT: lui a1, 524288
27 ; RV32I-NEXT: xor a0, a0, a1
28 ; RV32I-NEXT: .LBB0_2:
29 ; RV32I-NEXT: ret
30 ;
31 ; RV64I-LABEL: func32:
32 ; RV64I: # %bb.0:
33 ; RV64I-NEXT: sext.w a0, a0
34 ; RV64I-NEXT: mulw a1, a1, a2
35 ; RV64I-NEXT: sub a0, a0, a1
36 ; RV64I-NEXT: lui a1, 524288
37 ; RV64I-NEXT: addiw a2, a1, -1
38 ; RV64I-NEXT: bge a0, a2, .LBB0_3
39 ; RV64I-NEXT: # %bb.1:
40 ; RV64I-NEXT: bge a1, a0, .LBB0_4
41 ; RV64I-NEXT: .LBB0_2:
42 ; RV64I-NEXT: ret
43 ; RV64I-NEXT: .LBB0_3:
44 ; RV64I-NEXT: mv a0, a2
45 ; RV64I-NEXT: blt a1, a0, .LBB0_2
46 ; RV64I-NEXT: .LBB0_4:
47 ; RV64I-NEXT: lui a0, 524288
48 ; RV64I-NEXT: ret
49 ;
50 ; RV32IZbbNOZbt-LABEL: func32:
51 ; RV32IZbbNOZbt: # %bb.0:
52 ; RV32IZbbNOZbt-NEXT: mv a3, a0
53 ; RV32IZbbNOZbt-NEXT: mul a0, a1, a2
54 ; RV32IZbbNOZbt-NEXT: sgtz a1, a0
55 ; RV32IZbbNOZbt-NEXT: sub a0, a3, a0
56 ; RV32IZbbNOZbt-NEXT: slt a2, a0, a3
57 ; RV32IZbbNOZbt-NEXT: beq a1, a2, .LBB0_2
58 ; RV32IZbbNOZbt-NEXT: # %bb.1:
59 ; RV32IZbbNOZbt-NEXT: srai a0, a0, 31
60 ; RV32IZbbNOZbt-NEXT: lui a1, 524288
61 ; RV32IZbbNOZbt-NEXT: xor a0, a0, a1
62 ; RV32IZbbNOZbt-NEXT: .LBB0_2:
63 ; RV32IZbbNOZbt-NEXT: ret
64 ;
65 ; RV64IZbb-LABEL: func32:
66 ; RV64IZbb: # %bb.0:
67 ; RV64IZbb-NEXT: sext.w a0, a0
68 ; RV64IZbb-NEXT: mulw a1, a1, a2
69 ; RV64IZbb-NEXT: sub a0, a0, a1
70 ; RV64IZbb-NEXT: lui a1, 524288
71 ; RV64IZbb-NEXT: addiw a2, a1, -1
72 ; RV64IZbb-NEXT: min a0, a0, a2
73 ; RV64IZbb-NEXT: max a0, a0, a1
74 ; RV64IZbb-NEXT: ret
75 ;
76 ; RV32IZbbZbt-LABEL: func32:
77 ; RV32IZbbZbt: # %bb.0:
78 ; RV32IZbbZbt-NEXT: mul a1, a1, a2
79 ; RV32IZbbZbt-NEXT: sgtz a2, a1
80 ; RV32IZbbZbt-NEXT: sub a1, a0, a1
81 ; RV32IZbbZbt-NEXT: slt a0, a1, a0
82 ; RV32IZbbZbt-NEXT: xor a0, a2, a0
83 ; RV32IZbbZbt-NEXT: srai a2, a1, 31
84 ; RV32IZbbZbt-NEXT: lui a3, 524288
85 ; RV32IZbbZbt-NEXT: xor a2, a2, a3
86 ; RV32IZbbZbt-NEXT: cmov a0, a0, a2, a1
87 ; RV32IZbbZbt-NEXT: ret
88 %a = mul i32 %y, %z
89 %tmp = call i32 @llvm.ssub.sat.i32(i32 %x, i32 %a)
90 ret i32 %tmp
91 }
93 define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {
94 ; RV32I-LABEL: func64:
95 ; RV32I: # %bb.0:
96 ; RV32I-NEXT: mv a2, a1
97 ; RV32I-NEXT: sltu a1, a0, a4
98 ; RV32I-NEXT: sub a3, a2, a5
99 ; RV32I-NEXT: sub a1, a3, a1
100 ; RV32I-NEXT: xor a3, a2, a1
101 ; RV32I-NEXT: xor a2, a2, a5
102 ; RV32I-NEXT: and a2, a2, a3
103 ; RV32I-NEXT: bltz a2, .LBB1_2
104 ; RV32I-NEXT: # %bb.1:
105 ; RV32I-NEXT: sub a0, a0, a4
106 ; RV32I-NEXT: ret
107 ; RV32I-NEXT: .LBB1_2:
108 ; RV32I-NEXT: srai a0, a1, 31
109 ; RV32I-NEXT: lui a1, 524288
110 ; RV32I-NEXT: xor a1, a0, a1
111 ; RV32I-NEXT: ret
112 ;
113 ; RV64I-LABEL: func64:
114 ; RV64I: # %bb.0:
115 ; RV64I-NEXT: mv a1, a0
116 ; RV64I-NEXT: sgtz a3, a2
117 ; RV64I-NEXT: sub a0, a0, a2
118 ; RV64I-NEXT: slt a1, a0, a1
119 ; RV64I-NEXT: beq a3, a1, .LBB1_2
120 ; RV64I-NEXT: # %bb.1:
121 ; RV64I-NEXT: srai a0, a0, 63
122 ; RV64I-NEXT: addi a1, zero, -1
123 ; RV64I-NEXT: slli a1, a1, 63
124 ; RV64I-NEXT: xor a0, a0, a1
125 ; RV64I-NEXT: .LBB1_2:
126 ; RV64I-NEXT: ret
127 ;
128 ; RV32IZbbNOZbt-LABEL: func64:
129 ; RV32IZbbNOZbt: # %bb.0:
130 ; RV32IZbbNOZbt-NEXT: mv a2, a1
131 ; RV32IZbbNOZbt-NEXT: sltu a1, a0, a4
132 ; RV32IZbbNOZbt-NEXT: sub a3, a2, a5
133 ; RV32IZbbNOZbt-NEXT: sub a1, a3, a1
134 ; RV32IZbbNOZbt-NEXT: xor a3, a2, a1
135 ; RV32IZbbNOZbt-NEXT: xor a2, a2, a5
136 ; RV32IZbbNOZbt-NEXT: and a2, a2, a3
137 ; RV32IZbbNOZbt-NEXT: bltz a2, .LBB1_2
138 ; RV32IZbbNOZbt-NEXT: # %bb.1:
139 ; RV32IZbbNOZbt-NEXT: sub a0, a0, a4
140 ; RV32IZbbNOZbt-NEXT: ret
141 ; RV32IZbbNOZbt-NEXT: .LBB1_2:
142 ; RV32IZbbNOZbt-NEXT: srai a0, a1, 31
143 ; RV32IZbbNOZbt-NEXT: lui a1, 524288
144 ; RV32IZbbNOZbt-NEXT: xor a1, a0, a1
145 ; RV32IZbbNOZbt-NEXT: ret
146 ;
147 ; RV64IZbbNOZbt-LABEL: func64:
148 ; RV64IZbbNOZbt: # %bb.0:
149 ; RV64IZbbNOZbt-NEXT: mv a1, a0
150 ; RV64IZbbNOZbt-NEXT: sgtz a3, a2
151 ; RV64IZbbNOZbt-NEXT: sub a0, a0, a2
152 ; RV64IZbbNOZbt-NEXT: slt a1, a0, a1
153 ; RV64IZbbNOZbt-NEXT: beq a3, a1, .LBB1_2
154 ; RV64IZbbNOZbt-NEXT: # %bb.1:
155 ; RV64IZbbNOZbt-NEXT: srai a0, a0, 63
156 ; RV64IZbbNOZbt-NEXT: addi a1, zero, -1
157 ; RV64IZbbNOZbt-NEXT: slli a1, a1, 63
158 ; RV64IZbbNOZbt-NEXT: xor a0, a0, a1
159 ; RV64IZbbNOZbt-NEXT: .LBB1_2:
160 ; RV64IZbbNOZbt-NEXT: ret
161 ;
162 ; RV32IZbbZbt-LABEL: func64:
163 ; RV32IZbbZbt: # %bb.0:
164 ; RV32IZbbZbt-NEXT: sltu a2, a0, a4
165 ; RV32IZbbZbt-NEXT: sub a3, a1, a5
166 ; RV32IZbbZbt-NEXT: sub a2, a3, a2
167 ; RV32IZbbZbt-NEXT: srai a6, a2, 31
168 ; RV32IZbbZbt-NEXT: lui a3, 524288
169 ; RV32IZbbZbt-NEXT: xor a7, a6, a3
170 ; RV32IZbbZbt-NEXT: xor a3, a1, a2
171 ; RV32IZbbZbt-NEXT: xor a1, a1, a5
172 ; RV32IZbbZbt-NEXT: and a1, a1, a3
173 ; RV32IZbbZbt-NEXT: slti a3, a1, 0
174 ; RV32IZbbZbt-NEXT: cmov a1, a3, a7, a2
175 ; RV32IZbbZbt-NEXT: sub a0, a0, a4
176 ; RV32IZbbZbt-NEXT: cmov a0, a3, a6, a0
177 ; RV32IZbbZbt-NEXT: ret
178 ;
179 ; RV64IZbbZbt-LABEL: func64:
180 ; RV64IZbbZbt: # %bb.0:
181 ; RV64IZbbZbt-NEXT: sgtz a1, a2
182 ; RV64IZbbZbt-NEXT: sub a2, a0, a2
183 ; RV64IZbbZbt-NEXT: slt a0, a2, a0
184 ; RV64IZbbZbt-NEXT: xor a0, a1, a0
185 ; RV64IZbbZbt-NEXT: srai a1, a2, 63
186 ; RV64IZbbZbt-NEXT: addi a3, zero, -1
187 ; RV64IZbbZbt-NEXT: slli a3, a3, 63
188 ; RV64IZbbZbt-NEXT: xor a1, a1, a3
189 ; RV64IZbbZbt-NEXT: cmov a0, a0, a1, a2
190 ; RV64IZbbZbt-NEXT: ret
191 %a = mul i64 %y, %z
192 %tmp = call i64 @llvm.ssub.sat.i64(i64 %x, i64 %z)
193 ret i64 %tmp
194 }
196 define i16 @func16(i16 %x, i16 %y, i16 %z) nounwind {
197 ; RV32I-LABEL: func16:
198 ; RV32I: # %bb.0:
199 ; RV32I-NEXT: slli a0, a0, 16
200 ; RV32I-NEXT: srai a0, a0, 16
201 ; RV32I-NEXT: mul a1, a1, a2
202 ; RV32I-NEXT: slli a1, a1, 16
203 ; RV32I-NEXT: srai a1, a1, 16
204 ; RV32I-NEXT: sub a0, a0, a1
205 ; RV32I-NEXT: lui a1, 8
206 ; RV32I-NEXT: addi a1, a1, -1
207 ; RV32I-NEXT: bge a0, a1, .LBB2_3
208 ; RV32I-NEXT: # %bb.1:
209 ; RV32I-NEXT: lui a1, 1048568
210 ; RV32I-NEXT: bge a1, a0, .LBB2_4
211 ; RV32I-NEXT: .LBB2_2:
212 ; RV32I-NEXT: ret
213 ; RV32I-NEXT: .LBB2_3:
214 ; RV32I-NEXT: mv a0, a1
215 ; RV32I-NEXT: lui a1, 1048568
216 ; RV32I-NEXT: blt a1, a0, .LBB2_2
217 ; RV32I-NEXT: .LBB2_4:
218 ; RV32I-NEXT: lui a0, 1048568
219 ; RV32I-NEXT: ret
220 ;
221 ; RV64I-LABEL: func16:
222 ; RV64I: # %bb.0:
223 ; RV64I-NEXT: slli a0, a0, 48
224 ; RV64I-NEXT: srai a0, a0, 48
225 ; RV64I-NEXT: mulw a1, a1, a2
226 ; RV64I-NEXT: slli a1, a1, 48
227 ; RV64I-NEXT: srai a1, a1, 48
228 ; RV64I-NEXT: sub a0, a0, a1
229 ; RV64I-NEXT: lui a1, 8
230 ; RV64I-NEXT: addiw a1, a1, -1
231 ; RV64I-NEXT: bge a0, a1, .LBB2_3
232 ; RV64I-NEXT: # %bb.1:
233 ; RV64I-NEXT: lui a1, 1048568
234 ; RV64I-NEXT: bge a1, a0, .LBB2_4
235 ; RV64I-NEXT: .LBB2_2:
236 ; RV64I-NEXT: ret
237 ; RV64I-NEXT: .LBB2_3:
238 ; RV64I-NEXT: mv a0, a1
239 ; RV64I-NEXT: lui a1, 1048568
240 ; RV64I-NEXT: blt a1, a0, .LBB2_2
241 ; RV64I-NEXT: .LBB2_4:
242 ; RV64I-NEXT: lui a0, 1048568
243 ; RV64I-NEXT: ret
244 ;
245 ; RV32IZbb-LABEL: func16:
246 ; RV32IZbb: # %bb.0:
247 ; RV32IZbb-NEXT: sext.h a0, a0
248 ; RV32IZbb-NEXT: mul a1, a1, a2
249 ; RV32IZbb-NEXT: sext.h a1, a1
250 ; RV32IZbb-NEXT: sub a0, a0, a1
251 ; RV32IZbb-NEXT: lui a1, 8
252 ; RV32IZbb-NEXT: addi a1, a1, -1
253 ; RV32IZbb-NEXT: min a0, a0, a1
254 ; RV32IZbb-NEXT: lui a1, 1048568
255 ; RV32IZbb-NEXT: max a0, a0, a1
256 ; RV32IZbb-NEXT: ret
257 ;
258 ; RV64IZbb-LABEL: func16:
259 ; RV64IZbb: # %bb.0:
260 ; RV64IZbb-NEXT: sext.h a0, a0
261 ; RV64IZbb-NEXT: mul a1, a1, a2
262 ; RV64IZbb-NEXT: sext.h a1, a1
263 ; RV64IZbb-NEXT: sub a0, a0, a1
264 ; RV64IZbb-NEXT: lui a1, 8
265 ; RV64IZbb-NEXT: addiw a1, a1, -1
266 ; RV64IZbb-NEXT: min a0, a0, a1
267 ; RV64IZbb-NEXT: lui a1, 1048568
268 ; RV64IZbb-NEXT: max a0, a0, a1
269 ; RV64IZbb-NEXT: ret
270 %a = mul i16 %y, %z
271 %tmp = call i16 @llvm.ssub.sat.i16(i16 %x, i16 %a)
272 ret i16 %tmp
273 }
275 define i8 @func8(i8 %x, i8 %y, i8 %z) nounwind {
276 ; RV32I-LABEL: func8:
277 ; RV32I: # %bb.0:
278 ; RV32I-NEXT: slli a0, a0, 24
279 ; RV32I-NEXT: srai a0, a0, 24
280 ; RV32I-NEXT: mul a1, a1, a2
281 ; RV32I-NEXT: slli a1, a1, 24
282 ; RV32I-NEXT: srai a1, a1, 24
283 ; RV32I-NEXT: sub a0, a0, a1
284 ; RV32I-NEXT: addi a1, zero, 127
285 ; RV32I-NEXT: bge a0, a1, .LBB3_3
286 ; RV32I-NEXT: # %bb.1:
287 ; RV32I-NEXT: addi a1, zero, -128
288 ; RV32I-NEXT: bge a1, a0, .LBB3_4
289 ; RV32I-NEXT: .LBB3_2:
290 ; RV32I-NEXT: ret
291 ; RV32I-NEXT: .LBB3_3:
292 ; RV32I-NEXT: addi a0, zero, 127
293 ; RV32I-NEXT: addi a1, zero, -128
294 ; RV32I-NEXT: blt a1, a0, .LBB3_2
295 ; RV32I-NEXT: .LBB3_4:
296 ; RV32I-NEXT: addi a0, zero, -128
297 ; RV32I-NEXT: ret
298 ;
299 ; RV64I-LABEL: func8:
300 ; RV64I: # %bb.0:
301 ; RV64I-NEXT: slli a0, a0, 56
302 ; RV64I-NEXT: srai a0, a0, 56
303 ; RV64I-NEXT: mulw a1, a1, a2
304 ; RV64I-NEXT: slli a1, a1, 56
305 ; RV64I-NEXT: srai a1, a1, 56
306 ; RV64I-NEXT: sub a0, a0, a1
307 ; RV64I-NEXT: addi a1, zero, 127
308 ; RV64I-NEXT: bge a0, a1, .LBB3_3
309 ; RV64I-NEXT: # %bb.1:
310 ; RV64I-NEXT: addi a1, zero, -128
311 ; RV64I-NEXT: bge a1, a0, .LBB3_4
312 ; RV64I-NEXT: .LBB3_2:
313 ; RV64I-NEXT: ret
314 ; RV64I-NEXT: .LBB3_3:
315 ; RV64I-NEXT: addi a0, zero, 127
316 ; RV64I-NEXT: addi a1, zero, -128
317 ; RV64I-NEXT: blt a1, a0, .LBB3_2
318 ; RV64I-NEXT: .LBB3_4:
319 ; RV64I-NEXT: addi a0, zero, -128
320 ; RV64I-NEXT: ret
321 ;
322 ; RV32IZbb-LABEL: func8:
323 ; RV32IZbb: # %bb.0:
324 ; RV32IZbb-NEXT: sext.b a0, a0
325 ; RV32IZbb-NEXT: mul a1, a1, a2
326 ; RV32IZbb-NEXT: sext.b a1, a1
327 ; RV32IZbb-NEXT: sub a0, a0, a1
328 ; RV32IZbb-NEXT: addi a1, zero, 127
329 ; RV32IZbb-NEXT: min a0, a0, a1
330 ; RV32IZbb-NEXT: addi a1, zero, -128
331 ; RV32IZbb-NEXT: max a0, a0, a1
332 ; RV32IZbb-NEXT: ret
333 ;
334 ; RV64IZbb-LABEL: func8:
335 ; RV64IZbb: # %bb.0:
336 ; RV64IZbb-NEXT: sext.b a0, a0
337 ; RV64IZbb-NEXT: mul a1, a1, a2
338 ; RV64IZbb-NEXT: sext.b a1, a1
339 ; RV64IZbb-NEXT: sub a0, a0, a1
340 ; RV64IZbb-NEXT: addi a1, zero, 127
341 ; RV64IZbb-NEXT: min a0, a0, a1
342 ; RV64IZbb-NEXT: addi a1, zero, -128
343 ; RV64IZbb-NEXT: max a0, a0, a1
344 ; RV64IZbb-NEXT: ret
345 %a = mul i8 %y, %z
346 %tmp = call i8 @llvm.ssub.sat.i8(i8 %x, i8 %a)
347 ret i8 %tmp
348 }
350 define i4 @func4(i4 %x, i4 %y, i4 %z) nounwind {
351 ; RV32I-LABEL: func4:
352 ; RV32I: # %bb.0:
353 ; RV32I-NEXT: slli a0, a0, 28
354 ; RV32I-NEXT: srai a0, a0, 28
355 ; RV32I-NEXT: mul a1, a1, a2
356 ; RV32I-NEXT: slli a1, a1, 28
357 ; RV32I-NEXT: srai a1, a1, 28
358 ; RV32I-NEXT: sub a0, a0, a1
359 ; RV32I-NEXT: addi a1, zero, 7
360 ; RV32I-NEXT: bge a0, a1, .LBB4_3
361 ; RV32I-NEXT: # %bb.1:
362 ; RV32I-NEXT: addi a1, zero, -8
363 ; RV32I-NEXT: bge a1, a0, .LBB4_4
364 ; RV32I-NEXT: .LBB4_2:
365 ; RV32I-NEXT: ret
366 ; RV32I-NEXT: .LBB4_3:
367 ; RV32I-NEXT: addi a0, zero, 7
368 ; RV32I-NEXT: addi a1, zero, -8
369 ; RV32I-NEXT: blt a1, a0, .LBB4_2
370 ; RV32I-NEXT: .LBB4_4:
371 ; RV32I-NEXT: addi a0, zero, -8
372 ; RV32I-NEXT: ret
373 ;
374 ; RV64I-LABEL: func4:
375 ; RV64I: # %bb.0:
376 ; RV64I-NEXT: slli a0, a0, 60
377 ; RV64I-NEXT: srai a0, a0, 60
378 ; RV64I-NEXT: mulw a1, a1, a2
379 ; RV64I-NEXT: slli a1, a1, 60
380 ; RV64I-NEXT: srai a1, a1, 60
381 ; RV64I-NEXT: sub a0, a0, a1
382 ; RV64I-NEXT: addi a1, zero, 7
383 ; RV64I-NEXT: bge a0, a1, .LBB4_3
384 ; RV64I-NEXT: # %bb.1:
385 ; RV64I-NEXT: addi a1, zero, -8
386 ; RV64I-NEXT: bge a1, a0, .LBB4_4
387 ; RV64I-NEXT: .LBB4_2:
388 ; RV64I-NEXT: ret
389 ; RV64I-NEXT: .LBB4_3:
390 ; RV64I-NEXT: addi a0, zero, 7
391 ; RV64I-NEXT: addi a1, zero, -8
392 ; RV64I-NEXT: blt a1, a0, .LBB4_2
393 ; RV64I-NEXT: .LBB4_4:
394 ; RV64I-NEXT: addi a0, zero, -8
395 ; RV64I-NEXT: ret
396 ;
397 ; RV32IZbb-LABEL: func4:
398 ; RV32IZbb: # %bb.0:
399 ; RV32IZbb-NEXT: slli a0, a0, 28
400 ; RV32IZbb-NEXT: srai a0, a0, 28
401 ; RV32IZbb-NEXT: mul a1, a1, a2
402 ; RV32IZbb-NEXT: slli a1, a1, 28
403 ; RV32IZbb-NEXT: srai a1, a1, 28
404 ; RV32IZbb-NEXT: sub a0, a0, a1
405 ; RV32IZbb-NEXT: addi a1, zero, 7
406 ; RV32IZbb-NEXT: min a0, a0, a1
407 ; RV32IZbb-NEXT: addi a1, zero, -8
408 ; RV32IZbb-NEXT: max a0, a0, a1
409 ; RV32IZbb-NEXT: ret
410 ;
411 ; RV64IZbb-LABEL: func4:
412 ; RV64IZbb: # %bb.0:
413 ; RV64IZbb-NEXT: slli a0, a0, 60
414 ; RV64IZbb-NEXT: srai a0, a0, 60
415 ; RV64IZbb-NEXT: mulw a1, a1, a2
416 ; RV64IZbb-NEXT: slli a1, a1, 60
417 ; RV64IZbb-NEXT: srai a1, a1, 60
418 ; RV64IZbb-NEXT: sub a0, a0, a1
419 ; RV64IZbb-NEXT: addi a1, zero, 7
420 ; RV64IZbb-NEXT: min a0, a0, a1
421 ; RV64IZbb-NEXT: addi a1, zero, -8
422 ; RV64IZbb-NEXT: max a0, a0, a1
423 ; RV64IZbb-NEXT: ret
424 %a = mul i4 %y, %z
425 %tmp = call i4 @llvm.ssub.sat.i4(i4 %x, i4 %a)
426 ret i4 %tmp
427 }