| blob | 219494b0ea6da1fdec1681ac0dc92fba1794f98a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck -check-prefix=ILP32-ILP32F-FPELIM %s
4 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \
5 ; RUN: | FileCheck -check-prefix=ILP32-ILP32F-WITHFP %s
6 ; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
7 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
8 ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32f \
9 ; RUN: -verify-machineinstrs < %s \
10 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
11 ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \
12 ; RUN: -verify-machineinstrs < %s \
13 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
14 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
15 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
16 ; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64f \
17 ; RUN: -verify-machineinstrs < %s \
18 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
19 ; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64d \
20 ; RUN: -verify-machineinstrs < %s \
21 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
22 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all < %s \
23 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-WITHFP %s
25 ; The same vararg calling convention is used for ilp32/ilp32f/ilp32d and for
26 ; lp64/lp64f/lp64d. Different CHECK lines are required for RV32D due to slight
27 ; codegen differences due to the way the f64 load operations are lowered.
28 ; The nounwind attribute is omitted for some of the tests, to check that CFI
29 ; directives are correctly generated.
31 declare void @llvm.va_start(i8*)
32 declare void @llvm.va_end(i8*)
34 declare void @notdead(i8*)
36 ; Although frontends are recommended to not generate va_arg due to the lack of
37 ; support for aggregate types, we test simple cases here to ensure they are
38 ; lowered correctly
40 define i32 @va1(i8* %fmt, ...) {
41 ; ILP32-ILP32F-FPELIM-LABEL: va1:
42 ; ILP32-ILP32F-FPELIM: # %bb.0:
43 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
44 ; ILP32-ILP32F-FPELIM-NEXT: .cfi_def_cfa_offset 48
45 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1
46 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
47 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
48 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
49 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
50 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
51 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
52 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
53 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 24
54 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
55 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
56 ; ILP32-ILP32F-FPELIM-NEXT: ret
57 ;
58 ; ILP32-ILP32F-WITHFP-LABEL: va1:
59 ; ILP32-ILP32F-WITHFP: # %bb.0:
60 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
61 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 48
62 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
63 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
64 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset ra, -36
65 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset s0, -40
66 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
67 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa s0, 32
68 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
69 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
70 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
71 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
72 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
73 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
74 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
75 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
76 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
77 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
78 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
79 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
80 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
81 ; ILP32-ILP32F-WITHFP-NEXT: ret
82 ;
83 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1:
84 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
85 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
86 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 48
87 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
88 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
89 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
90 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
91 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
92 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
93 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
94 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
95 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 24
96 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
97 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
98 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
99 ;
100 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1:
101 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
102 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
103 ; LP64-LP64F-LP64D-FPELIM-NEXT: .cfi_def_cfa_offset 80
104 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
105 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
106 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
107 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
108 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
109 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
110 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
111 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 28
112 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
113 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 24(sp)
114 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
115 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
116 ;
117 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1:
118 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
119 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
120 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 96
121 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
122 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
123 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset ra, -72
124 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset s0, -80
125 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
126 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa s0, 64
127 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
128 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
129 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
130 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
131 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
132 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
133 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
134 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 12
135 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
136 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0)
137 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
138 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
139 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
140 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
141 %va = alloca i8*, align 4
142 %1 = bitcast i8** %va to i8*
143 call void @llvm.va_start(i8* %1)
144 %argp.cur = load i8*, i8** %va, align 4
145 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
146 store i8* %argp.next, i8** %va, align 4
147 %2 = bitcast i8* %argp.cur to i32*
148 %3 = load i32, i32* %2, align 4
149 call void @llvm.va_end(i8* %1)
150 ret i32 %3
151 }
153 define i32 @va1_va_arg(i8* %fmt, ...) nounwind {
154 ; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg:
155 ; ILP32-ILP32F-FPELIM: # %bb.0:
156 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
157 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1
158 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
159 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
160 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
161 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
162 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
163 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
164 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
165 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 24
166 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
167 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
168 ; ILP32-ILP32F-FPELIM-NEXT: ret
169 ;
170 ; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg:
171 ; ILP32-ILP32F-WITHFP: # %bb.0:
172 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
173 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
174 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
175 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
176 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
177 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
178 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
179 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
180 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
181 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
182 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
183 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
184 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
185 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
186 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
187 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
188 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
189 ; ILP32-ILP32F-WITHFP-NEXT: ret
190 ;
191 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg:
192 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
193 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
194 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
195 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
196 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
197 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
198 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
199 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
200 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
201 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
202 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 24
203 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
204 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
205 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
206 ;
207 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg:
208 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
209 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
210 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1
211 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
212 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
213 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
214 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
215 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
216 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
217 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
218 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 32
219 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
220 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
221 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
222 ;
223 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg:
224 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
225 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
226 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
227 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
228 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
229 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
230 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
231 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
232 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
233 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
234 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
235 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
236 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
237 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 16
238 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
239 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
240 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
241 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
242 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
243 %va = alloca i8*, align 4
244 %1 = bitcast i8** %va to i8*
245 call void @llvm.va_start(i8* %1)
246 %2 = va_arg i8** %va, i32
247 call void @llvm.va_end(i8* %1)
248 ret i32 %2
249 }
251 ; Ensure the adjustment when restoring the stack pointer using the frame
252 ; pointer is correct
253 define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
254 ; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg_alloca:
255 ; ILP32-ILP32F-FPELIM: # %bb.0:
256 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
257 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
258 ; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
259 ; ILP32-ILP32F-FPELIM-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
260 ; ILP32-ILP32F-FPELIM-NEXT: addi s0, sp, 16
261 ; ILP32-ILP32F-FPELIM-NEXT: mv s1, a1
262 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(s0)
263 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(s0)
264 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(s0)
265 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(s0)
266 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(s0)
267 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 8(s0)
268 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 4(s0)
269 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, s0, 8
270 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, -16(s0)
271 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a1, 15
272 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -16
273 ; ILP32-ILP32F-FPELIM-NEXT: sub a0, sp, a0
274 ; ILP32-ILP32F-FPELIM-NEXT: mv sp, a0
275 ; ILP32-ILP32F-FPELIM-NEXT: call notdead@plt
276 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, s1
277 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, s0, -16
278 ; ILP32-ILP32F-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
279 ; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
280 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
281 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
282 ; ILP32-ILP32F-FPELIM-NEXT: ret
283 ;
284 ; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg_alloca:
285 ; ILP32-ILP32F-WITHFP: # %bb.0:
286 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
287 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
288 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
289 ; ILP32-ILP32F-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
290 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
291 ; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1
292 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
293 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
294 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
295 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
296 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
297 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
298 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
299 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8
300 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0)
301 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a1, 15
302 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -16
303 ; ILP32-ILP32F-WITHFP-NEXT: sub a0, sp, a0
304 ; ILP32-ILP32F-WITHFP-NEXT: mv sp, a0
305 ; ILP32-ILP32F-WITHFP-NEXT: call notdead@plt
306 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, s1
307 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, s0, -16
308 ; ILP32-ILP32F-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
309 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
310 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
311 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
312 ; ILP32-ILP32F-WITHFP-NEXT: ret
313 ;
314 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg_alloca:
315 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
316 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
317 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
318 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
319 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
320 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi s0, sp, 16
321 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s1, a1
322 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(s0)
323 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 24(s0)
324 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(s0)
325 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 16(s0)
326 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 12(s0)
327 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 8(s0)
328 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 4(s0)
329 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, s0, 8
330 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, -16(s0)
331 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a1, 15
332 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -16
333 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub a0, sp, a0
334 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv sp, a0
335 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead@plt
336 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, s1
337 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, s0, -16
338 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
339 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
340 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
341 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
342 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
343 ;
344 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg_alloca:
345 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
346 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
347 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
348 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
349 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
350 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi s0, sp, 32
351 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv s1, a1
352 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(s0)
353 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(s0)
354 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(s0)
355 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(s0)
356 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(s0)
357 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(s0)
358 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(s0)
359 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, s0, 16
360 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, -32(s0)
361 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a1, 32
362 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a0, a0, 32
363 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 15
364 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -16
365 ; LP64-LP64F-LP64D-FPELIM-NEXT: sub a0, sp, a0
366 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv sp, a0
367 ; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead@plt
368 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, s1
369 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, s0, -32
370 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
371 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
372 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
373 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
374 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
375 ;
376 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg_alloca:
377 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
378 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
379 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
380 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
381 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
382 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
383 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1
384 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
385 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
386 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
387 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
388 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
389 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
390 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
391 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 16
392 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0)
393 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a1, 32
394 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a0, a0, 32
395 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 15
396 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -16
397 ; LP64-LP64F-LP64D-WITHFP-NEXT: sub a0, sp, a0
398 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv sp, a0
399 ; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead@plt
400 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s1
401 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, s0, -32
402 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
403 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
404 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
405 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
406 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
407 %va = alloca i8*, align 4
408 %1 = bitcast i8** %va to i8*
409 call void @llvm.va_start(i8* %1)
410 %2 = va_arg i8** %va, i32
411 %3 = alloca i8, i32 %2
412 call void @notdead(i8* %3)
413 call void @llvm.va_end(i8* %1)
414 ret i32 %2
415 }
417 define void @va1_caller() nounwind {
418 ; Pass a double, as a float would be promoted by a C/C++ frontend
419 ; ILP32-ILP32F-FPELIM-LABEL: va1_caller:
420 ; ILP32-ILP32F-FPELIM: # %bb.0:
421 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
422 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
423 ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888
424 ; ILP32-ILP32F-FPELIM-NEXT: addi a4, zero, 2
425 ; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
426 ; ILP32-ILP32F-FPELIM-NEXT: call va1@plt
427 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
428 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
429 ; ILP32-ILP32F-FPELIM-NEXT: ret
430 ;
431 ; ILP32-ILP32F-WITHFP-LABEL: va1_caller:
432 ; ILP32-ILP32F-WITHFP: # %bb.0:
433 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
434 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
435 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
436 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
437 ; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
438 ; ILP32-ILP32F-WITHFP-NEXT: addi a4, zero, 2
439 ; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
440 ; ILP32-ILP32F-WITHFP-NEXT: call va1@plt
441 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
442 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
443 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
444 ; ILP32-ILP32F-WITHFP-NEXT: ret
445 ;
446 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_caller:
447 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
448 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
449 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
450 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
451 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, zero, 2
452 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
453 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va1@plt
454 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
455 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
456 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
457 ;
458 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_caller:
459 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
460 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
461 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
462 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1023
463 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52
464 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, zero, 2
465 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va1@plt
466 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
467 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
468 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
469 ;
470 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_caller:
471 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
472 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
473 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
474 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
475 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
476 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1023
477 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
478 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, zero, 2
479 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va1@plt
480 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
481 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
482 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
483 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
484 %1 = call i32 (i8*, ...) @va1(i8* undef, double 1.0, i32 2)
485 ret void
486 }
488 ; Ensure that 2x xlen size+alignment varargs are accessed via an "aligned"
489 ; register pair (where the first register is even-numbered).
491 define i64 @va2(i8 *%fmt, ...) nounwind {
492 ; ILP32-ILP32F-FPELIM-LABEL: va2:
493 ; ILP32-ILP32F-FPELIM: # %bb.0:
494 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
495 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
496 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
497 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
498 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
499 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
500 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
501 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
502 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 27
503 ; ILP32-ILP32F-FPELIM-NEXT: andi a1, a0, -8
504 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 35
505 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 12(sp)
506 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a1)
507 ; ILP32-ILP32F-FPELIM-NEXT: ori a1, a1, 4
508 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a1)
509 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
510 ; ILP32-ILP32F-FPELIM-NEXT: ret
511 ;
512 ; ILP32-ILP32F-WITHFP-LABEL: va2:
513 ; ILP32-ILP32F-WITHFP: # %bb.0:
514 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
515 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
516 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
517 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
518 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
519 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
520 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
521 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
522 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
523 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
524 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
525 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
526 ; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8
527 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 19
528 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0)
529 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1)
530 ; ILP32-ILP32F-WITHFP-NEXT: ori a1, a1, 4
531 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a1)
532 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
533 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
534 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
535 ; ILP32-ILP32F-WITHFP-NEXT: ret
536 ;
537 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2:
538 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
539 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
540 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
541 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
542 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
543 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
544 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
545 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
546 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
547 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 27
548 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a1, a0, -8
549 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 35
550 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 12(sp)
551 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a1)
552 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ori a1, a1, 4
553 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 0(a1)
554 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
555 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
556 ;
557 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2:
558 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
559 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
560 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
561 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
562 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
563 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
564 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
565 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
566 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
567 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 24
568 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
569 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp)
570 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 7
571 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 32
572 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a1, a1, 32
573 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8
574 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
575 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1
576 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a1, 32
577 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, -8
578 ; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a1
579 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
580 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
581 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
582 ;
583 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2:
584 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
585 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
586 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
587 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
588 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
589 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
590 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
591 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
592 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
593 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
594 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
595 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
596 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8
597 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
598 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0)
599 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 7
600 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 32
601 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a1, a1, 32
602 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
603 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
604 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1
605 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a1, 32
606 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -8
607 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1
608 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
609 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
610 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
611 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
612 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
613 %va = alloca i8*, align 4
614 %1 = bitcast i8** %va to i8*
615 call void @llvm.va_start(i8* %1)
616 %2 = bitcast i8** %va to i32*
617 %argp.cur = load i32, i32* %2, align 4
618 %3 = add i32 %argp.cur, 7
619 %4 = and i32 %3, -8
620 %argp.cur.aligned = inttoptr i32 %3 to i8*
621 %argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 8
622 store i8* %argp.next, i8** %va, align 4
623 %5 = inttoptr i32 %4 to double*
624 %6 = load double, double* %5, align 8
625 %7 = bitcast double %6 to i64
626 call void @llvm.va_end(i8* %1)
627 ret i64 %7
628 }
630 define i64 @va2_va_arg(i8 *%fmt, ...) nounwind {
631 ; ILP32-ILP32F-FPELIM-LABEL: va2_va_arg:
632 ; ILP32-ILP32F-FPELIM: # %bb.0:
633 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
634 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
635 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
636 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
637 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
638 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
639 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
640 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
641 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 27
642 ; ILP32-ILP32F-FPELIM-NEXT: andi a1, a0, -8
643 ; ILP32-ILP32F-FPELIM-NEXT: ori a2, a1, 4
644 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 12(sp)
645 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a1)
646 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 8
647 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
648 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a2)
649 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
650 ; ILP32-ILP32F-FPELIM-NEXT: ret
651 ;
652 ; ILP32-ILP32F-WITHFP-LABEL: va2_va_arg:
653 ; ILP32-ILP32F-WITHFP: # %bb.0:
654 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
655 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
656 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
657 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
658 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
659 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
660 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
661 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
662 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
663 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
664 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
665 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
666 ; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8
667 ; ILP32-ILP32F-WITHFP-NEXT: ori a2, a1, 4
668 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, -12(s0)
669 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1)
670 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, 8
671 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
672 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a2)
673 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
674 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
675 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
676 ; ILP32-ILP32F-WITHFP-NEXT: ret
677 ;
678 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_va_arg:
679 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
680 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
681 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
682 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
683 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
684 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
685 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
686 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
687 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
688 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 27
689 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
690 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a0, 8
691 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
692 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fld ft0, 0(a0)
693 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fsd ft0, 0(sp)
694 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(sp)
695 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 4(sp)
696 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
697 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
698 ;
699 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2_va_arg:
700 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
701 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
702 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1
703 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
704 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
705 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
706 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
707 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
708 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
709 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
710 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 32
711 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
712 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
713 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
714 ;
715 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2_va_arg:
716 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
717 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
718 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
719 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
720 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
721 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
722 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
723 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
724 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
725 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
726 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
727 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
728 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
729 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 16
730 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
731 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
732 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
733 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
734 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
735 %va = alloca i8*, align 4
736 %1 = bitcast i8** %va to i8*
737 call void @llvm.va_start(i8* %1)
738 %2 = va_arg i8** %va, double
739 call void @llvm.va_end(i8* %1)
740 %3 = bitcast double %2 to i64
741 ret i64 %3
742 }
744 define void @va2_caller() nounwind {
745 ; ILP32-ILP32F-FPELIM-LABEL: va2_caller:
746 ; ILP32-ILP32F-FPELIM: # %bb.0:
747 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
748 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
749 ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888
750 ; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
751 ; ILP32-ILP32F-FPELIM-NEXT: call va2@plt
752 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
753 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
754 ; ILP32-ILP32F-FPELIM-NEXT: ret
755 ;
756 ; ILP32-ILP32F-WITHFP-LABEL: va2_caller:
757 ; ILP32-ILP32F-WITHFP: # %bb.0:
758 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
759 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
760 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
761 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
762 ; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
763 ; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
764 ; ILP32-ILP32F-WITHFP-NEXT: call va2@plt
765 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
766 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
767 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
768 ; ILP32-ILP32F-WITHFP-NEXT: ret
769 ;
770 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_caller:
771 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
772 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
773 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
774 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
775 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
776 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va2@plt
777 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
778 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
779 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
780 ;
781 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2_caller:
782 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
783 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
784 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
785 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1023
786 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52
787 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va2@plt
788 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
789 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
790 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
791 ;
792 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2_caller:
793 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
794 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
795 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
796 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
797 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
798 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1023
799 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
800 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va2@plt
801 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
802 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
803 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
804 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
805 %1 = call i64 (i8*, ...) @va2(i8* undef, double 1.000000e+00)
806 ret void
807 }
809 ; On RV32, Ensure a named 2*xlen argument is passed in a1 and a2, while the
810 ; vararg double is passed in a4 and a5 (rather than a3 and a4)
812 define i64 @va3(i32 %a, i64 %b, ...) nounwind {
813 ; ILP32-ILP32F-FPELIM-LABEL: va3:
814 ; ILP32-ILP32F-FPELIM: # %bb.0:
815 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -32
816 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(sp)
817 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(sp)
818 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(sp)
819 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(sp)
820 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(sp)
821 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 19
822 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8
823 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, sp, 27
824 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
825 ; ILP32-ILP32F-FPELIM-NEXT: lw a3, 0(a0)
826 ; ILP32-ILP32F-FPELIM-NEXT: ori a0, a0, 4
827 ; ILP32-ILP32F-FPELIM-NEXT: lw a4, 0(a0)
828 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a3
829 ; ILP32-ILP32F-FPELIM-NEXT: sltu a1, a0, a1
830 ; ILP32-ILP32F-FPELIM-NEXT: add a2, a2, a4
831 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a2, a1
832 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 32
833 ; ILP32-ILP32F-FPELIM-NEXT: ret
834 ;
835 ; ILP32-ILP32F-WITHFP-LABEL: va3:
836 ; ILP32-ILP32F-WITHFP: # %bb.0:
837 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
838 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp) # 4-byte Folded Spill
839 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp) # 4-byte Folded Spill
840 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24
841 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0)
842 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0)
843 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 8(s0)
844 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 4(s0)
845 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0)
846 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
847 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8
848 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, s0, 19
849 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0)
850 ; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a0)
851 ; ILP32-ILP32F-WITHFP-NEXT: ori a0, a0, 4
852 ; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0)
853 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a3
854 ; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
855 ; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a4
856 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
857 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
858 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload
859 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
860 ; ILP32-ILP32F-WITHFP-NEXT: ret
861 ;
862 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3:
863 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
864 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -32
865 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(sp)
866 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(sp)
867 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 16(sp)
868 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 12(sp)
869 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 24(sp)
870 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 19
871 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
872 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, sp, 27
873 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp)
874 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a3, 0(a0)
875 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ori a0, a0, 4
876 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a4, 0(a0)
877 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a3
878 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sltu a1, a0, a1
879 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, a2, a4
880 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a2, a1
881 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 32
882 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
883 ;
884 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3:
885 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
886 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -64
887 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(sp)
888 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(sp)
889 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(sp)
890 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(sp)
891 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(sp)
892 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 16
893 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
894 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp)
895 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(sp)
896 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 7
897 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 32
898 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a2, a2, 32
899 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a2, 8
900 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 8(sp)
901 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, zero, 1
902 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a2, 32
903 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a2, -8
904 ; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a2
905 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
906 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, a1, a0
907 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 64
908 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
909 ;
910 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3:
911 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
912 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80
913 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
914 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
915 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
916 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0)
917 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
918 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0)
919 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0)
920 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0)
921 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s0
922 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
923 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0)
924 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0)
925 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 7
926 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 32
927 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a2, a2, 32
928 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, 8
929 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -24(s0)
930 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, zero, 1
931 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a2, 32
932 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, -8
933 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a2
934 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
935 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a0
936 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
937 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
938 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
939 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
940 %va = alloca i8*, align 4
941 %1 = bitcast i8** %va to i8*
942 call void @llvm.va_start(i8* %1)
943 %2 = bitcast i8** %va to i32*
944 %argp.cur = load i32, i32* %2, align 4
945 %3 = add i32 %argp.cur, 7
946 %4 = and i32 %3, -8
947 %argp.cur.aligned = inttoptr i32 %3 to i8*
948 %argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 8
949 store i8* %argp.next, i8** %va, align 4
950 %5 = inttoptr i32 %4 to double*
951 %6 = load double, double* %5, align 8
952 call void @llvm.va_end(i8* %1)
953 %7 = bitcast double %6 to i64
954 %8 = add i64 %b, %7
955 ret i64 %8
956 }
958 define i64 @va3_va_arg(i32 %a, i64 %b, ...) nounwind {
959 ; ILP32-ILP32F-FPELIM-LABEL: va3_va_arg:
960 ; ILP32-ILP32F-FPELIM: # %bb.0:
961 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -32
962 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(sp)
963 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(sp)
964 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(sp)
965 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(sp)
966 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(sp)
967 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 19
968 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8
969 ; ILP32-ILP32F-FPELIM-NEXT: ori a3, a0, 4
970 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
971 ; ILP32-ILP32F-FPELIM-NEXT: lw a4, 0(a0)
972 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 8
973 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 4(sp)
974 ; ILP32-ILP32F-FPELIM-NEXT: lw a3, 0(a3)
975 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a4
976 ; ILP32-ILP32F-FPELIM-NEXT: sltu a1, a0, a1
977 ; ILP32-ILP32F-FPELIM-NEXT: add a2, a2, a3
978 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a2, a1
979 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 32
980 ; ILP32-ILP32F-FPELIM-NEXT: ret
981 ;
982 ; ILP32-ILP32F-WITHFP-LABEL: va3_va_arg:
983 ; ILP32-ILP32F-WITHFP: # %bb.0:
984 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
985 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp) # 4-byte Folded Spill
986 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp) # 4-byte Folded Spill
987 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24
988 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0)
989 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0)
990 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0)
991 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 8(s0)
992 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 4(s0)
993 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
994 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8
995 ; ILP32-ILP32F-WITHFP-NEXT: ori a3, a0, 4
996 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0)
997 ; ILP32-ILP32F-WITHFP-NEXT: lw a4, 0(a0)
998 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 8
999 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0)
1000 ; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a3)
1001 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a4
1002 ; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
1003 ; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a3
1004 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
1005 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
1006 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload
1007 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
1008 ; ILP32-ILP32F-WITHFP-NEXT: ret
1009 ;
1010 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_va_arg:
1011 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1012 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1013 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1014 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1015 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1016 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1017 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1018 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 35
1019 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
1020 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 8
1021 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 20(sp)
1022 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fld ft0, 0(a0)
1023 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fsd ft0, 8(sp)
1024 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 12(sp)
1025 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a3, 8(sp)
1026 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, a2, a0
1027 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a3
1028 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sltu a1, a0, a1
1029 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a2, a1
1030 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1031 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1032 ;
1033 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3_va_arg:
1034 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1035 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -64
1036 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(sp)
1037 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(sp)
1038 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(sp)
1039 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(sp)
1040 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(sp)
1041 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(sp)
1042 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, sp, 24
1043 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, a1, a2
1044 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp)
1045 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 64
1046 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1047 ;
1048 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3_va_arg:
1049 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1050 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80
1051 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1052 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
1053 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
1054 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0)
1055 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
1056 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0)
1057 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0)
1058 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0)
1059 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0)
1060 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, s0, 8
1061 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a2
1062 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -24(s0)
1063 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
1064 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1065 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
1066 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1067 %va = alloca i8*, align 4
1068 %1 = bitcast i8** %va to i8*
1069 call void @llvm.va_start(i8* %1)
1070 %2 = va_arg i8** %va, double
1071 call void @llvm.va_end(i8* %1)
1072 %3 = bitcast double %2 to i64
1073 %4 = add i64 %b, %3
1074 ret i64 %4
1075 }
1077 define void @va3_caller() nounwind {
1078 ; ILP32-ILP32F-FPELIM-LABEL: va3_caller:
1079 ; ILP32-ILP32F-FPELIM: # %bb.0:
1080 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
1081 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1082 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 2
1083 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, zero, 1111
1084 ; ILP32-ILP32F-FPELIM-NEXT: lui a5, 262144
1085 ; ILP32-ILP32F-FPELIM-NEXT: mv a2, zero
1086 ; ILP32-ILP32F-FPELIM-NEXT: mv a4, zero
1087 ; ILP32-ILP32F-FPELIM-NEXT: call va3@plt
1088 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1089 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
1090 ; ILP32-ILP32F-FPELIM-NEXT: ret
1091 ;
1092 ; ILP32-ILP32F-WITHFP-LABEL: va3_caller:
1093 ; ILP32-ILP32F-WITHFP: # %bb.0:
1094 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
1095 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1096 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
1097 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
1098 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 2
1099 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, zero, 1111
1100 ; ILP32-ILP32F-WITHFP-NEXT: lui a5, 262144
1101 ; ILP32-ILP32F-WITHFP-NEXT: mv a2, zero
1102 ; ILP32-ILP32F-WITHFP-NEXT: mv a4, zero
1103 ; ILP32-ILP32F-WITHFP-NEXT: call va3@plt
1104 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
1105 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1106 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
1107 ; ILP32-ILP32F-WITHFP-NEXT: ret
1108 ;
1109 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_caller:
1110 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1111 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
1112 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1113 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 2
1114 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, zero, 1111
1115 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 262144
1116 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a2, zero
1117 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a4, zero
1118 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va3@plt
1119 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1120 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
1121 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1122 ;
1123 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3_caller:
1124 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1125 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
1126 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
1127 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1
1128 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 62
1129 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 2
1130 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 1111
1131 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va3@plt
1132 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
1133 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
1134 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1135 ;
1136 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3_caller:
1137 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1138 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
1139 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
1140 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
1141 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
1142 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1
1143 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 62
1144 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 2
1145 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 1111
1146 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va3@plt
1147 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
1148 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
1149 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
1150 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1151 %1 = call i64 (i32, i64, ...) @va3(i32 2, i64 1111, double 2.000000e+00)
1152 ret void
1153 }
1155 declare void @llvm.va_copy(i8*, i8*)
1157 define i32 @va4_va_copy(i32 %argno, ...) nounwind {
1158 ; ILP32-ILP32F-FPELIM-LABEL: va4_va_copy:
1159 ; ILP32-ILP32F-FPELIM: # %bb.0:
1160 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
1161 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1162 ; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
1163 ; ILP32-ILP32F-FPELIM-NEXT: mv s0, a1
1164 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
1165 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
1166 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
1167 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
1168 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
1169 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
1170 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
1171 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 24
1172 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 4(sp)
1173 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp)
1174 ; ILP32-ILP32F-FPELIM-NEXT: call notdead@plt
1175 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 4(sp)
1176 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 3
1177 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1178 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a0, 4
1179 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 4(sp)
1180 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a0)
1181 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7
1182 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1183 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, a0, 4
1184 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 4(sp)
1185 ; ILP32-ILP32F-FPELIM-NEXT: lw a2, 0(a0)
1186 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7
1187 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1188 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, a0, 4
1189 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
1190 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0)
1191 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, s0
1192 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, a2
1193 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0
1194 ; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
1195 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1196 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
1197 ; ILP32-ILP32F-FPELIM-NEXT: ret
1198 ;
1199 ; ILP32-ILP32F-WITHFP-LABEL: va4_va_copy:
1200 ; ILP32-ILP32F-WITHFP: # %bb.0:
1201 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
1202 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
1203 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
1204 ; ILP32-ILP32F-WITHFP-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
1205 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 32
1206 ; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1
1207 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
1208 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
1209 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
1210 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
1211 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
1212 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
1213 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
1214 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8
1215 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0)
1216 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0)
1217 ; ILP32-ILP32F-WITHFP-NEXT: call notdead@plt
1218 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, -16(s0)
1219 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 3
1220 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1221 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a0, 4
1222 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -16(s0)
1223 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a0)
1224 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7
1225 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1226 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, a0, 4
1227 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, -16(s0)
1228 ; ILP32-ILP32F-WITHFP-NEXT: lw a2, 0(a0)
1229 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7
1230 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1231 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, a0, 4
1232 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -16(s0)
1233 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0)
1234 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, s1
1235 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, a2
1236 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0
1237 ; ILP32-ILP32F-WITHFP-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
1238 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
1239 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
1240 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
1241 ; ILP32-ILP32F-WITHFP-NEXT: ret
1242 ;
1243 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va4_va_copy:
1244 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1245 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1246 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1247 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
1248 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s0, a1
1249 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1250 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1251 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1252 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1253 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1254 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
1255 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
1256 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 24
1257 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 4(sp)
1258 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp)
1259 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead@plt
1260 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 4(sp)
1261 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 3
1262 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1263 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a0, 4
1264 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 4(sp)
1265 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 0(a0)
1266 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7
1267 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1268 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, a0, 4
1269 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 4(sp)
1270 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a2, 0(a0)
1271 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7
1272 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1273 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 4
1274 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp)
1275 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a0)
1276 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, s0
1277 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, a2
1278 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a0
1279 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
1280 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1281 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1282 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1283 ;
1284 ; LP64-LP64F-LP64D-FPELIM-LABEL: va4_va_copy:
1285 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1286 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
1287 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1288 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
1289 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv s0, a1
1290 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 88(sp)
1291 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 80(sp)
1292 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 72(sp)
1293 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 64(sp)
1294 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 56(sp)
1295 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 48(sp)
1296 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 40(sp)
1297 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 48
1298 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
1299 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 0(sp)
1300 ; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead@plt
1301 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 8(sp)
1302 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 3
1303 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1304 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a0, 8
1305 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
1306 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a1, 0(a0)
1307 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11
1308 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1309 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a0, 8
1310 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 8(sp)
1311 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a2, 0(a0)
1312 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11
1313 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1314 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, 8
1315 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp)
1316 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
1317 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a1, a1, s0
1318 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a1, a1, a2
1319 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a0, a1, a0
1320 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
1321 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1322 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
1323 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1324 ;
1325 ; LP64-LP64F-LP64D-WITHFP-LABEL: va4_va_copy:
1326 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1327 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -112
1328 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
1329 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
1330 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
1331 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48
1332 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1
1333 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
1334 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
1335 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
1336 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
1337 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
1338 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
1339 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
1340 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 16
1341 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0)
1342 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -40(s0)
1343 ; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead@plt
1344 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, -32(s0)
1345 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 3
1346 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1347 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a0, 8
1348 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -32(s0)
1349 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a1, 0(a0)
1350 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11
1351 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1352 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a0, 8
1353 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -32(s0)
1354 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a2, 0(a0)
1355 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11
1356 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1357 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, 8
1358 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -32(s0)
1359 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
1360 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a1, a1, s1
1361 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a1, a1, a2
1362 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a0, a1, a0
1363 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
1364 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
1365 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
1366 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 112
1367 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1368 %vargs = alloca i8*, align 4
1369 %wargs = alloca i8*, align 4
1370 %1 = bitcast i8** %vargs to i8*
1371 %2 = bitcast i8** %wargs to i8*
1372 call void @llvm.va_start(i8* %1)
1373 %3 = va_arg i8** %vargs, i32
1374 call void @llvm.va_copy(i8* %2, i8* %1)
1375 %4 = load i8*, i8** %wargs, align 4
1376 call void @notdead(i8* %4)
1377 %5 = va_arg i8** %vargs, i32
1378 %6 = va_arg i8** %vargs, i32
1379 %7 = va_arg i8** %vargs, i32
1380 call void @llvm.va_end(i8* %1)
1381 call void @llvm.va_end(i8* %2)
1382 %add1 = add i32 %5, %3
1383 %add2 = add i32 %add1, %6
1384 %add3 = add i32 %add2, %7
1385 ret i32 %add3
1386 }
1388 ; Check 2x*xlen values are aligned appropriately when passed on the stack in a vararg call
1390 declare i32 @va5_aligned_stack_callee(i32, ...)
1392 define void @va5_aligned_stack_caller() nounwind {
1393 ; The double should be 8-byte aligned on the stack, but the two-element array
1394 ; should only be 4-byte aligned
1395 ; ILP32-ILP32F-FPELIM-LABEL: va5_aligned_stack_caller:
1396 ; ILP32-ILP32F-FPELIM: # %bb.0:
1397 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -64
1398 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
1399 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 17
1400 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 24(sp)
1401 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 16
1402 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 20(sp)
1403 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 15
1404 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 16(sp)
1405 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 262236
1406 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 655
1407 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 12(sp)
1408 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 377487
1409 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 1475
1410 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 8(sp)
1411 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 14
1412 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp)
1413 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 262153
1414 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 491
1415 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 44(sp)
1416 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 545260
1417 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, -1967
1418 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 40(sp)
1419 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 964690
1420 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, -328
1421 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 36(sp)
1422 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 335544
1423 ; ILP32-ILP32F-FPELIM-NEXT: addi a5, a0, 1311
1424 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 688509
1425 ; ILP32-ILP32F-FPELIM-NEXT: addi a6, a0, -2048
1426 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, zero, 1
1427 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, zero, 11
1428 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, sp, 32
1429 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, zero, 12
1430 ; ILP32-ILP32F-FPELIM-NEXT: addi a4, zero, 13
1431 ; ILP32-ILP32F-FPELIM-NEXT: addi a7, zero, 4
1432 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 32(sp)
1433 ; ILP32-ILP32F-FPELIM-NEXT: call va5_aligned_stack_callee@plt
1434 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
1435 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 64
1436 ; ILP32-ILP32F-FPELIM-NEXT: ret
1437 ;
1438 ; ILP32-ILP32F-WITHFP-LABEL: va5_aligned_stack_caller:
1439 ; ILP32-ILP32F-WITHFP: # %bb.0:
1440 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
1441 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
1442 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
1443 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 64
1444 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 17
1445 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 24(sp)
1446 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 16
1447 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 20(sp)
1448 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 15
1449 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 16(sp)
1450 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 262236
1451 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 655
1452 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 12(sp)
1453 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 377487
1454 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 1475
1455 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 8(sp)
1456 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 14
1457 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(sp)
1458 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 262153
1459 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 491
1460 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0)
1461 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 545260
1462 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -1967
1463 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -24(s0)
1464 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 964690
1465 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -328
1466 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -28(s0)
1467 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 335544
1468 ; ILP32-ILP32F-WITHFP-NEXT: addi a5, a0, 1311
1469 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 688509
1470 ; ILP32-ILP32F-WITHFP-NEXT: addi a6, a0, -2048
1471 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, zero, 1
1472 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, zero, 11
1473 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, s0, -32
1474 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, zero, 12
1475 ; ILP32-ILP32F-WITHFP-NEXT: addi a4, zero, 13
1476 ; ILP32-ILP32F-WITHFP-NEXT: addi a7, zero, 4
1477 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, -32(s0)
1478 ; ILP32-ILP32F-WITHFP-NEXT: call va5_aligned_stack_callee@plt
1479 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
1480 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
1481 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
1482 ; ILP32-ILP32F-WITHFP-NEXT: ret
1483 ;
1484 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va5_aligned_stack_caller:
1485 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1486 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -64
1487 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
1488 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262236
1489 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 655
1490 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 12(sp)
1491 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 377487
1492 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 1475
1493 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 8(sp)
1494 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 17
1495 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 24(sp)
1496 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 16
1497 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 20(sp)
1498 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 15
1499 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 16(sp)
1500 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 14
1501 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp)
1502 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262153
1503 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 491
1504 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 44(sp)
1505 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 545260
1506 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, -1967
1507 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 40(sp)
1508 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 964690
1509 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, -328
1510 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 36(sp)
1511 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 335544
1512 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a5, a0, 1311
1513 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 688509
1514 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a6, a0, -2048
1515 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, zero, 1
1516 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, zero, 11
1517 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, sp, 32
1518 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, zero, 12
1519 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, zero, 13
1520 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a7, zero, 4
1521 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 32(sp)
1522 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va5_aligned_stack_callee@plt
1523 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
1524 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 64
1525 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1526 ;
1527 ; LP64-LP64F-LP64D-FPELIM-LABEL: va5_aligned_stack_caller:
1528 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1529 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -48
1530 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
1531 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 17
1532 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 24(sp)
1533 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 16
1534 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 16(sp)
1535 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 15
1536 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
1537 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 2049
1538 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, -1147
1539 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 13
1540 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 983
1541 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 14
1542 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 655
1543 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12
1544 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi t0, a0, 1475
1545 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 1192
1546 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 381
1547 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12
1548 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a6, a0, -2048
1549 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 1048248
1550 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 1311
1551 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12
1552 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, -1147
1553 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 13
1554 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 983
1555 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 15
1556 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a0, 1311
1557 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 512
1558 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 73
1559 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 15
1560 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, -1311
1561 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 12
1562 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 1147
1563 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a0, 14
1564 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, -1967
1565 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, zero, 1
1566 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, zero, 11
1567 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a4, zero, 12
1568 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a5, zero, 13
1569 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a7, zero, 14
1570 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd t0, 0(sp)
1571 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va5_aligned_stack_callee@plt
1572 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
1573 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 48
1574 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1575 ;
1576 ; LP64-LP64F-LP64D-WITHFP-LABEL: va5_aligned_stack_caller:
1577 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1578 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -48
1579 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
1580 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
1581 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48
1582 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 17
1583 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 24(sp)
1584 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 16
1585 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 16(sp)
1586 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 15
1587 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 8(sp)
1588 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 2049
1589 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, -1147
1590 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 13
1591 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 983
1592 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 14
1593 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 655
1594 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12
1595 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi t0, a0, 1475
1596 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 1192
1597 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 381
1598 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12
1599 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a6, a0, -2048
1600 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 1048248
1601 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 1311
1602 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12
1603 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, -1147
1604 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 13
1605 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 983
1606 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 15
1607 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a0, 1311
1608 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 512
1609 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 73
1610 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 15
1611 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, -1311
1612 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 12
1613 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 1147
1614 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a0, 14
1615 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, -1967
1616 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, zero, 1
1617 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, zero, 11
1618 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a4, zero, 12
1619 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a5, zero, 13
1620 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a7, zero, 14
1621 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd t0, 0(sp)
1622 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va5_aligned_stack_callee@plt
1623 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
1624 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
1625 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 48
1626 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1627 %1 = call i32 (i32, ...) @va5_aligned_stack_callee(i32 1, i32 11,
1628 fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13, i64 20000000000,
1629 i32 14, double 2.720000e+00, i32 15, [2 x i32] [i32 16, i32 17])
1630 ret void
1631 }
1633 ; A function with no fixed arguments is not valid C, but can be
1634 ; specified in LLVM IR. We must ensure the vararg save area is
1635 ; still set up correctly.
1637 define i32 @va6_no_fixed_args(...) nounwind {
1638 ; ILP32-ILP32F-FPELIM-LABEL: va6_no_fixed_args:
1639 ; ILP32-ILP32F-FPELIM: # %bb.0:
1640 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
1641 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
1642 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
1643 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
1644 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
1645 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
1646 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
1647 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
1648 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 16(sp)
1649 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 20
1650 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
1651 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
1652 ; ILP32-ILP32F-FPELIM-NEXT: ret
1653 ;
1654 ; ILP32-ILP32F-WITHFP-LABEL: va6_no_fixed_args:
1655 ; ILP32-ILP32F-WITHFP: # %bb.0:
1656 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
1657 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1658 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
1659 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
1660 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
1661 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
1662 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
1663 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
1664 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
1665 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
1666 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
1667 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(s0)
1668 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 4
1669 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
1670 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
1671 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1672 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
1673 ; ILP32-ILP32F-WITHFP-NEXT: ret
1674 ;
1675 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va6_no_fixed_args:
1676 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1677 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1678 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1679 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1680 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1681 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1682 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1683 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
1684 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
1685 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 16(sp)
1686 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 20
1687 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
1688 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1689 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1690 ;
1691 ; LP64-LP64F-LP64D-FPELIM-LABEL: va6_no_fixed_args:
1692 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1693 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
1694 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
1695 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
1696 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
1697 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
1698 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
1699 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
1700 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
1701 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 16(sp)
1702 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 24
1703 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
1704 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
1705 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1706 ;
1707 ; LP64-LP64F-LP64D-WITHFP-LABEL: va6_no_fixed_args:
1708 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1709 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
1710 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1711 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
1712 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
1713 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
1714 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
1715 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
1716 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
1717 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
1718 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
1719 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
1720 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(s0)
1721 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8
1722 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
1723 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
1724 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1725 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
1726 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1727 %va = alloca i8*, align 4
1728 %1 = bitcast i8** %va to i8*
1729 call void @llvm.va_start(i8* %1)
1730 %2 = va_arg i8** %va, i32
1731 call void @llvm.va_end(i8* %1)
1732 ret i32 %2
1733 }
1735 ; TODO: improve constant materialization of stack addresses
1737 define i32 @va_large_stack(i8* %fmt, ...) {
1738 ; ILP32-ILP32F-FPELIM-LABEL: va_large_stack:
1739 ; ILP32-ILP32F-FPELIM: # %bb.0:
1740 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 24414
1741 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 304
1742 ; ILP32-ILP32F-FPELIM-NEXT: sub sp, sp, a0
1743 ; ILP32-ILP32F-FPELIM-NEXT: .cfi_def_cfa_offset 100000048
1744 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1
1745 ; ILP32-ILP32F-FPELIM-NEXT: lui t0, 24414
1746 ; ILP32-ILP32F-FPELIM-NEXT: addi t0, t0, 300
1747 ; ILP32-ILP32F-FPELIM-NEXT: add t0, sp, t0
1748 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 0(t0)
1749 ; ILP32-ILP32F-FPELIM-NEXT: lui a7, 24414
1750 ; ILP32-ILP32F-FPELIM-NEXT: addi a7, a7, 296
1751 ; ILP32-ILP32F-FPELIM-NEXT: add a7, sp, a7
1752 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 0(a7)
1753 ; ILP32-ILP32F-FPELIM-NEXT: lui a6, 24414
1754 ; ILP32-ILP32F-FPELIM-NEXT: addi a6, a6, 292
1755 ; ILP32-ILP32F-FPELIM-NEXT: add a6, sp, a6
1756 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 0(a6)
1757 ; ILP32-ILP32F-FPELIM-NEXT: lui a5, 24414
1758 ; ILP32-ILP32F-FPELIM-NEXT: addi a5, a5, 288
1759 ; ILP32-ILP32F-FPELIM-NEXT: add a5, sp, a5
1760 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 0(a5)
1761 ; ILP32-ILP32F-FPELIM-NEXT: lui a4, 24414
1762 ; ILP32-ILP32F-FPELIM-NEXT: addi a4, a4, 284
1763 ; ILP32-ILP32F-FPELIM-NEXT: add a4, sp, a4
1764 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 0(a4)
1765 ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 24414
1766 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, a3, 280
1767 ; ILP32-ILP32F-FPELIM-NEXT: add a3, sp, a3
1768 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 0(a3)
1769 ; ILP32-ILP32F-FPELIM-NEXT: lui a2, 24414
1770 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, a2, 276
1771 ; ILP32-ILP32F-FPELIM-NEXT: add a2, sp, a2
1772 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 0(a2)
1773 ; ILP32-ILP32F-FPELIM-NEXT: lui a1, 24414
1774 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 280
1775 ; ILP32-ILP32F-FPELIM-NEXT: add a1, sp, a1
1776 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
1777 ; ILP32-ILP32F-FPELIM-NEXT: lui a1, 24414
1778 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 304
1779 ; ILP32-ILP32F-FPELIM-NEXT: add sp, sp, a1
1780 ; ILP32-ILP32F-FPELIM-NEXT: ret
1781 ;
1782 ; ILP32-ILP32F-WITHFP-LABEL: va_large_stack:
1783 ; ILP32-ILP32F-WITHFP: # %bb.0:
1784 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -2032
1785 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 2032
1786 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 1996(sp) # 4-byte Folded Spill
1787 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 1992(sp) # 4-byte Folded Spill
1788 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset ra, -36
1789 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset s0, -40
1790 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 2000
1791 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa s0, 32
1792 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 24414
1793 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -1728
1794 ; ILP32-ILP32F-WITHFP-NEXT: sub sp, sp, a0
1795 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
1796 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
1797 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
1798 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
1799 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
1800 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
1801 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
1802 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
1803 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
1804 ; ILP32-ILP32F-WITHFP-NEXT: lui a2, 1024162
1805 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, a2, -272
1806 ; ILP32-ILP32F-WITHFP-NEXT: add a2, s0, a2
1807 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 0(a2)
1808 ; ILP32-ILP32F-WITHFP-NEXT: lui a1, 24414
1809 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, -1728
1810 ; ILP32-ILP32F-WITHFP-NEXT: add sp, sp, a1
1811 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 1992(sp) # 4-byte Folded Reload
1812 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 1996(sp) # 4-byte Folded Reload
1813 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 2032
1814 ; ILP32-ILP32F-WITHFP-NEXT: ret
1815 ;
1816 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va_large_stack:
1817 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1818 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 24414
1819 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 304
1820 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub sp, sp, a0
1821 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 100000048
1822 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
1823 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui t0, 24414
1824 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi t0, t0, 300
1825 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add t0, sp, t0
1826 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 0(t0)
1827 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a7, 24414
1828 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a7, a7, 296
1829 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a7, sp, a7
1830 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 0(a7)
1831 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a6, 24414
1832 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a6, a6, 292
1833 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a6, sp, a6
1834 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 0(a6)
1835 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 24414
1836 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a5, a5, 288
1837 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a5, sp, a5
1838 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 0(a5)
1839 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a4, 24414
1840 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, a4, 284
1841 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a4, sp, a4
1842 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 0(a4)
1843 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 24414
1844 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a3, 280
1845 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a3, sp, a3
1846 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 0(a3)
1847 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a2, 24414
1848 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, a2, 276
1849 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, sp, a2
1850 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 0(a2)
1851 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a1, 24414
1852 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a1, 280
1853 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, sp, a1
1854 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
1855 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a1, 24414
1856 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a1, 304
1857 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add sp, sp, a1
1858 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1859 ;
1860 ; LP64-LP64F-LP64D-FPELIM-LABEL: va_large_stack:
1861 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1862 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1863 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 336
1864 ; LP64-LP64F-LP64D-FPELIM-NEXT: sub sp, sp, a0
1865 ; LP64-LP64F-LP64D-FPELIM-NEXT: .cfi_def_cfa_offset 100000080
1866 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1867 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280
1868 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1869 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 0(a0)
1870 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1871 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 328
1872 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1873 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 0(a0)
1874 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1875 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 320
1876 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1877 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 0(a0)
1878 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1879 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 312
1880 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1881 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 0(a0)
1882 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1883 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 304
1884 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1885 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 0(a0)
1886 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1887 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 296
1888 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1889 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 0(a0)
1890 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1891 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 288
1892 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1893 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 0(a0)
1894 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1895 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 284
1896 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1897 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
1898 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1899 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280
1900 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1901 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 0(a0)
1902 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a1, 24414
1903 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a1, a1, 336
1904 ; LP64-LP64F-LP64D-FPELIM-NEXT: add sp, sp, a1
1905 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1906 ;
1907 ; LP64-LP64F-LP64D-WITHFP-LABEL: va_large_stack:
1908 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1909 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -2032
1910 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 2032
1911 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 1960(sp) # 8-byte Folded Spill
1912 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 1952(sp) # 8-byte Folded Spill
1913 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset ra, -72
1914 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset s0, -80
1915 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 1968
1916 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa s0, 64
1917 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 24414
1918 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, -1680
1919 ; LP64-LP64F-LP64D-WITHFP-NEXT: sub sp, sp, a0
1920 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
1921 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
1922 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
1923 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
1924 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
1925 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
1926 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
1927 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 12
1928 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 1024162
1929 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -288
1930 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, s0, a1
1931 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(a1)
1932 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0)
1933 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414
1934 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -1680
1935 ; LP64-LP64F-LP64D-WITHFP-NEXT: add sp, sp, a1
1936 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 1952(sp) # 8-byte Folded Reload
1937 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 1960(sp) # 8-byte Folded Reload
1938 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 2032
1939 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1940 %large = alloca [ 100000000 x i8 ]
1941 %va = alloca i8*, align 4
1942 %1 = bitcast i8** %va to i8*
1943 call void @llvm.va_start(i8* %1)
1944 %argp.cur = load i8*, i8** %va, align 4
1945 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
1946 store i8* %argp.next, i8** %va, align 4
1947 %2 = bitcast i8* %argp.cur to i32*
1948 %3 = load i32, i32* %2, align 4
1949 call void @llvm.va_end(i8* %1)
1950 ret i32 %3
1951 }