1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
3 ; Test lowering of @llvm.frameaddress with packed-stack.
6 attributes #0 = { nounwind "packed-stack" "backchain" "use-soft-float"="true" }
10 ; CHECK: la %r2, 152(%r15)
12 %0 = tail call i8* @llvm.frameaddress(i32 0)
16 define i8* @fp0f() #0 {
19 ; CHECK: lgr %r1, %r15
20 ; CHECK-NEXT: aghi %r15, -16
21 ; CHECK-NEXT: stg %r1, 152(%r15)
22 ; CHECK-NEXT: la %r2, 168(%r15)
23 ; CHECK-NEXT: aghi %r15, 16
25 %0 = alloca i64, align 8
26 %1 = tail call i8* @llvm.frameaddress(i32 0)
32 attributes #1 = { nounwind "packed-stack" }
33 define i8* @fp1() #1 {
36 ; CHECK: la %r2, 152(%r15)
38 %0 = tail call i8* @llvm.frameaddress(i32 0)
42 ; No saved registers: returning address of unused slot where backcahin would
44 define i8* @fp1f() #1 {
47 ; CHECK: aghi %r15, -16
48 ; CHECK-NEXT: la %r2, 168(%r15)
49 ; CHECK-NEXT: aghi %r15, 16
51 %0 = alloca i64, align 8
52 %1 = tail call i8* @llvm.frameaddress(i32 0)
56 ; Saved registers: returning address for first saved GPR.
57 declare void @foo(i8* %Arg)
58 define i8* @fp2() #1 {
61 ; CHECK: stmg %r14, %r15, 144(%r15)
62 ; CHECK-NEXT: aghi %r15, -16
63 ; CHECK-NEXT: la %r2, 168(%r15)
64 ; CHECK-NEXT: brasl %r14, foo@PLT
65 ; CHECK-NEXT: la %r2, 168(%r15)
66 ; CHECK-NEXT: lmg %r14, %r15, 160(%r15)
68 %0 = tail call i8* @llvm.frameaddress(i32 0)
69 call void @foo(i8* %0);
73 declare i8* @llvm.frameaddress(i32) nounwind readnone