1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs -enable-ipra | FileCheck -check-prefix=IPRA %s
5 @buf = dso_local global [3072 x i8] zeroinitializer, align 64
7 define internal void @foo() {
9 ; CHECK: # %bb.0: # %entry
13 ; IPRA: # %bb.0: # %entry
19 define dso_local void @test_api(i16 signext %0, i16 signext %1) nounwind {
20 ; CHECK-LABEL: test_api:
22 ; CHECK-NEXT: pushq %rbp
23 ; CHECK-NEXT: pushq %r15
24 ; CHECK-NEXT: pushq %r14
25 ; CHECK-NEXT: pushq %rbx
26 ; CHECK-NEXT: subq $2120, %rsp # imm = 0x848
27 ; CHECK-NEXT: movl %esi, %ebx
28 ; CHECK-NEXT: movl %edi, %ebp
29 ; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
30 ; CHECK-NEXT: vmovdqu64 %zmm0, (%rsp)
31 ; CHECK-NEXT: movb $1, (%rsp)
32 ; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
33 ; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
34 ; CHECK-NEXT: movw %bx, {{[0-9]+}}(%rsp)
35 ; CHECK-NEXT: movb %bpl, {{[0-9]+}}(%rsp)
36 ; CHECK-NEXT: movw %bx, {{[0-9]+}}(%rsp)
37 ; CHECK-NEXT: movb %bpl, {{[0-9]+}}(%rsp)
38 ; CHECK-NEXT: ldtilecfg (%rsp)
39 ; CHECK-NEXT: movl $buf, %eax
40 ; CHECK-NEXT: movl $32, %r14d
41 ; CHECK-NEXT: movw $8, %r15w
42 ; CHECK-NEXT: tileloadd (%rax,%r14), %tmm1
43 ; CHECK-NEXT: movabsq $64, %rax
44 ; CHECK-NEXT: tilestored %tmm1, 1088(%rsp,%rax) # 1024-byte Folded Spill
45 ; CHECK-NEXT: movl $buf+1024, %eax
46 ; CHECK-NEXT: tileloadd (%rax,%r14), %tmm2
47 ; CHECK-NEXT: movabsq $64, %rax
48 ; CHECK-NEXT: tilestored %tmm2, 64(%rsp,%rax) # 1024-byte Folded Spill
49 ; CHECK-NEXT: vzeroupper
50 ; CHECK-NEXT: callq foo
51 ; CHECK-NEXT: ldtilecfg (%rsp)
52 ; CHECK-NEXT: movl $buf+2048, %eax
53 ; CHECK-NEXT: tileloadd (%rax,%r14), %tmm0
54 ; CHECK-NEXT: movabsq $64, %rcx
55 ; CHECK-NEXT: tileloadd 1088(%rsp,%rcx), %tmm1 # 1024-byte Folded Reload
56 ; CHECK-NEXT: movabsq $64, %rcx
57 ; CHECK-NEXT: tileloadd 64(%rsp,%rcx), %tmm2 # 1024-byte Folded Reload
58 ; CHECK-NEXT: tdpbssd %tmm2, %tmm1, %tmm0
59 ; CHECK-NEXT: tilestored %tmm0, (%rax,%r14)
60 ; CHECK-NEXT: addq $2120, %rsp # imm = 0x848
61 ; CHECK-NEXT: popq %rbx
62 ; CHECK-NEXT: popq %r14
63 ; CHECK-NEXT: popq %r15
64 ; CHECK-NEXT: popq %rbp
65 ; CHECK-NEXT: tilerelease
68 ; IPRA-LABEL: test_api:
70 ; IPRA-NEXT: subq $72, %rsp
71 ; IPRA-NEXT: vpxord %zmm0, %zmm0, %zmm0
72 ; IPRA-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
73 ; IPRA-NEXT: movb $1, {{[0-9]+}}(%rsp)
74 ; IPRA-NEXT: movw $8, {{[0-9]+}}(%rsp)
75 ; IPRA-NEXT: movb $8, {{[0-9]+}}(%rsp)
76 ; IPRA-NEXT: movw %si, {{[0-9]+}}(%rsp)
77 ; IPRA-NEXT: movb %dil, {{[0-9]+}}(%rsp)
78 ; IPRA-NEXT: movw %si, {{[0-9]+}}(%rsp)
79 ; IPRA-NEXT: movb %dil, {{[0-9]+}}(%rsp)
80 ; IPRA-NEXT: ldtilecfg {{[0-9]+}}(%rsp)
81 ; IPRA-NEXT: movl $buf, %eax
82 ; IPRA-NEXT: movl $32, %ecx
83 ; IPRA-NEXT: movw $8, %dx
84 ; IPRA-NEXT: tileloadd (%rax,%rcx), %tmm0
85 ; IPRA-NEXT: movl $buf+1024, %eax
86 ; IPRA-NEXT: tileloadd (%rax,%rcx), %tmm1
87 ; IPRA-NEXT: callq foo
88 ; IPRA-NEXT: movl $buf+2048, %eax
89 ; IPRA-NEXT: tileloadd (%rax,%rcx), %tmm2
90 ; IPRA-NEXT: tdpbssd %tmm1, %tmm0, %tmm2
91 ; IPRA-NEXT: tilestored %tmm2, (%rax,%rcx)
92 ; IPRA-NEXT: addq $72, %rsp
93 ; IPRA-NEXT: tilerelease
94 ; IPRA-NEXT: vzeroupper
96 %3 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 0), i64 32)
97 %4 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 1024), i64 32)
99 %5 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32)
100 %6 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %0, i16 %1, i16 8, x86_amx %5, x86_amx %3, x86_amx %4)
101 tail call void @llvm.x86.tilestored64.internal(i16 %0, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32, x86_amx %6)
105 define dso_local i32 @test_loop(i32 %0) nounwind {
106 ; CHECK-LABEL: test_loop:
108 ; CHECK-NEXT: pushq %rbp
109 ; CHECK-NEXT: pushq %r15
110 ; CHECK-NEXT: pushq %r14
111 ; CHECK-NEXT: pushq %r13
112 ; CHECK-NEXT: pushq %r12
113 ; CHECK-NEXT: pushq %rbx
114 ; CHECK-NEXT: subq $1096, %rsp # imm = 0x448
115 ; CHECK-NEXT: movl %edi, %r14d
116 ; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
117 ; CHECK-NEXT: vmovdqu64 %zmm0, (%rsp)
118 ; CHECK-NEXT: movb $1, (%rsp)
119 ; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
120 ; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
121 ; CHECK-NEXT: vzeroupper
122 ; CHECK-NEXT: callq foo
123 ; CHECK-NEXT: ldtilecfg (%rsp)
124 ; CHECK-NEXT: testl %r14d, %r14d
125 ; CHECK-NEXT: jg .LBB2_4
126 ; CHECK-NEXT: # %bb.1: # %.preheader
127 ; CHECK-NEXT: movl $7, %ebp
128 ; CHECK-NEXT: movl $buf, %r15d
129 ; CHECK-NEXT: movl $32, %r12d
130 ; CHECK-NEXT: movw $8, %bx
131 ; CHECK-NEXT: movl $buf+2048, %r13d
132 ; CHECK-NEXT: .p2align 4, 0x90
133 ; CHECK-NEXT: .LBB2_2: # =>This Inner Loop Header: Depth=1
134 ; CHECK-NEXT: tileloadd (%r15,%r12), %tmm0
135 ; CHECK-NEXT: movabsq $64, %rax
136 ; CHECK-NEXT: tilestored %tmm0, 64(%rsp,%rax) # 1024-byte Folded Spill
137 ; CHECK-NEXT: callq foo
138 ; CHECK-NEXT: ldtilecfg (%rsp)
139 ; CHECK-NEXT: movabsq $64, %rax
140 ; CHECK-NEXT: tileloadd 64(%rsp,%rax), %tmm0 # 1024-byte Folded Reload
141 ; CHECK-NEXT: tilestored %tmm0, (%r13,%r12)
142 ; CHECK-NEXT: callq foo
143 ; CHECK-NEXT: ldtilecfg (%rsp)
144 ; CHECK-NEXT: decl %ebp
145 ; CHECK-NEXT: cmpl $7, %ebp
146 ; CHECK-NEXT: jne .LBB2_2
147 ; CHECK-NEXT: # %bb.3:
148 ; CHECK-NEXT: cmpl $3, %r14d
149 ; CHECK-NEXT: jne .LBB2_4
150 ; CHECK-NEXT: # %bb.6:
151 ; CHECK-NEXT: testl %ebp, %ebp
152 ; CHECK-NEXT: jne .LBB2_5
153 ; CHECK-NEXT: # %bb.7:
154 ; CHECK-NEXT: incl %r14d
155 ; CHECK-NEXT: jmp .LBB2_8
156 ; CHECK-NEXT: .LBB2_4:
157 ; CHECK-NEXT: callq foo
158 ; CHECK-NEXT: ldtilecfg (%rsp)
159 ; CHECK-NEXT: movl $32, %eax
160 ; CHECK-NEXT: movl $buf+1024, %ecx
161 ; CHECK-NEXT: movw $8, %dx
162 ; CHECK-NEXT: tileloadd (%rcx,%rax), %tmm0
163 ; CHECK-NEXT: tilestored %tmm0, (%rcx,%rax)
164 ; CHECK-NEXT: .LBB2_5:
165 ; CHECK-NEXT: decl %r14d
166 ; CHECK-NEXT: .LBB2_8:
167 ; CHECK-NEXT: movl %r14d, %eax
168 ; CHECK-NEXT: addq $1096, %rsp # imm = 0x448
169 ; CHECK-NEXT: popq %rbx
170 ; CHECK-NEXT: popq %r12
171 ; CHECK-NEXT: popq %r13
172 ; CHECK-NEXT: popq %r14
173 ; CHECK-NEXT: popq %r15
174 ; CHECK-NEXT: popq %rbp
175 ; CHECK-NEXT: tilerelease
178 ; IPRA-LABEL: test_loop:
180 ; IPRA-NEXT: subq $72, %rsp
181 ; IPRA-NEXT: movl %edi, %eax
182 ; IPRA-NEXT: vpxord %zmm0, %zmm0, %zmm0
183 ; IPRA-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
184 ; IPRA-NEXT: movb $1, {{[0-9]+}}(%rsp)
185 ; IPRA-NEXT: movb $8, {{[0-9]+}}(%rsp)
186 ; IPRA-NEXT: movw $8, {{[0-9]+}}(%rsp)
187 ; IPRA-NEXT: ldtilecfg {{[0-9]+}}(%rsp)
188 ; IPRA-NEXT: callq foo
189 ; IPRA-NEXT: testl %edi, %edi
190 ; IPRA-NEXT: jg .LBB2_4
191 ; IPRA-NEXT: # %bb.1: # %.preheader
192 ; IPRA-NEXT: movl $7, %ecx
193 ; IPRA-NEXT: movl $buf, %r8d
194 ; IPRA-NEXT: movl $32, %esi
195 ; IPRA-NEXT: movw $8, %di
196 ; IPRA-NEXT: movl $buf+2048, %edx
197 ; IPRA-NEXT: .p2align 4, 0x90
198 ; IPRA-NEXT: .LBB2_2: # =>This Inner Loop Header: Depth=1
199 ; IPRA-NEXT: tileloadd (%r8,%rsi), %tmm0
200 ; IPRA-NEXT: callq foo
201 ; IPRA-NEXT: tilestored %tmm0, (%rdx,%rsi)
202 ; IPRA-NEXT: callq foo
203 ; IPRA-NEXT: decl %ecx
204 ; IPRA-NEXT: cmpl $7, %ecx
205 ; IPRA-NEXT: jne .LBB2_2
206 ; IPRA-NEXT: # %bb.3:
207 ; IPRA-NEXT: cmpl $3, %eax
208 ; IPRA-NEXT: jne .LBB2_4
209 ; IPRA-NEXT: # %bb.6:
210 ; IPRA-NEXT: testl %ecx, %ecx
211 ; IPRA-NEXT: jne .LBB2_5
212 ; IPRA-NEXT: # %bb.7:
213 ; IPRA-NEXT: incl %eax
214 ; IPRA-NEXT: jmp .LBB2_8
215 ; IPRA-NEXT: .LBB2_4:
216 ; IPRA-NEXT: callq foo
217 ; IPRA-NEXT: movl $32, %ecx
218 ; IPRA-NEXT: movl $buf+1024, %edx
219 ; IPRA-NEXT: movw $8, %si
220 ; IPRA-NEXT: tileloadd (%rdx,%rcx), %tmm0
221 ; IPRA-NEXT: tilestored %tmm0, (%rdx,%rcx)
222 ; IPRA-NEXT: .LBB2_5:
223 ; IPRA-NEXT: decl %eax
224 ; IPRA-NEXT: .LBB2_8:
225 ; IPRA-NEXT: addq $72, %rsp
226 ; IPRA-NEXT: tilerelease
227 ; IPRA-NEXT: vzeroupper
232 %3 = icmp sgt i32 %0, 0
233 br i1 %3, label %11, label %6
235 %5 = icmp eq i32 %0, 3
236 br i1 %5, label %13, label %11
238 %7 = phi i32 [ %9, %6 ], [ 0, %2 ]
239 %8 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 0), i64 32)
241 tail call void @llvm.x86.tilestored64.internal(i16 8, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32, x86_amx %8)
244 %10 = icmp eq i32 %9, 0
245 br i1 %10, label %4, label %6
248 %12 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 1024), i64 32)
249 tail call void @llvm.x86.tilestored64.internal(i16 8, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 1024), i64 32, x86_amx %12)
252 %14 = icmp eq i32 %9, 7
253 br i1 %14, label %15, label %17
261 %20 = phi i32 [ %16, %15 ], [ %18, %17 ]
265 define dso_local void @test_loop2(i32 %0) nounwind {
266 ; CHECK-LABEL: test_loop2:
268 ; CHECK-NEXT: pushq %rbp
269 ; CHECK-NEXT: pushq %r15
270 ; CHECK-NEXT: pushq %r14
271 ; CHECK-NEXT: pushq %r12
272 ; CHECK-NEXT: pushq %rbx
273 ; CHECK-NEXT: subq $1088, %rsp # imm = 0x440
274 ; CHECK-NEXT: movl %edi, %ebx
275 ; CHECK-NEXT: vpxord %zmm0, %zmm0, %zmm0
276 ; CHECK-NEXT: vmovdqu64 %zmm0, (%rsp)
277 ; CHECK-NEXT: movb $1, (%rsp)
278 ; CHECK-NEXT: movb $8, {{[0-9]+}}(%rsp)
279 ; CHECK-NEXT: movw $8, {{[0-9]+}}(%rsp)
280 ; CHECK-NEXT: movl $buf, %r14d
281 ; CHECK-NEXT: movl $32, %r15d
282 ; CHECK-NEXT: movw $8, %bp
283 ; CHECK-NEXT: movl $buf+2048, %r12d
284 ; CHECK-NEXT: .p2align 4, 0x90
285 ; CHECK-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
286 ; CHECK-NEXT: vzeroupper
287 ; CHECK-NEXT: callq foo
288 ; CHECK-NEXT: ldtilecfg (%rsp)
289 ; CHECK-NEXT: testl %ebx, %ebx
290 ; CHECK-NEXT: jle .LBB3_3
291 ; CHECK-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
292 ; CHECK-NEXT: tileloadd (%r14,%r15), %tmm0
293 ; CHECK-NEXT: movabsq $64, %rax
294 ; CHECK-NEXT: tilestored %tmm0, 64(%rsp,%rax) # 1024-byte Folded Spill
295 ; CHECK-NEXT: callq foo
296 ; CHECK-NEXT: ldtilecfg (%rsp)
297 ; CHECK-NEXT: movabsq $64, %rax
298 ; CHECK-NEXT: tileloadd 64(%rsp,%rax), %tmm0 # 1024-byte Folded Reload
299 ; CHECK-NEXT: tilestored %tmm0, (%r12,%r15)
300 ; CHECK-NEXT: callq foo
301 ; CHECK-NEXT: jmp .LBB3_1
302 ; CHECK-NEXT: .LBB3_3:
303 ; CHECK-NEXT: addq $1088, %rsp # imm = 0x440
304 ; CHECK-NEXT: popq %rbx
305 ; CHECK-NEXT: popq %r12
306 ; CHECK-NEXT: popq %r14
307 ; CHECK-NEXT: popq %r15
308 ; CHECK-NEXT: popq %rbp
309 ; CHECK-NEXT: tilerelease
312 ; IPRA-LABEL: test_loop2:
314 ; IPRA-NEXT: subq $72, %rsp
315 ; IPRA-NEXT: vpxord %zmm0, %zmm0, %zmm0
316 ; IPRA-NEXT: vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
317 ; IPRA-NEXT: movb $1, {{[0-9]+}}(%rsp)
318 ; IPRA-NEXT: movb $8, {{[0-9]+}}(%rsp)
319 ; IPRA-NEXT: movw $8, {{[0-9]+}}(%rsp)
320 ; IPRA-NEXT: ldtilecfg {{[0-9]+}}(%rsp)
321 ; IPRA-NEXT: movl $buf, %eax
322 ; IPRA-NEXT: movl $32, %ecx
323 ; IPRA-NEXT: movw $8, %dx
324 ; IPRA-NEXT: movl $buf+2048, %esi
325 ; IPRA-NEXT: .p2align 4, 0x90
326 ; IPRA-NEXT: .LBB3_1: # =>This Inner Loop Header: Depth=1
327 ; IPRA-NEXT: callq foo
328 ; IPRA-NEXT: testl %edi, %edi
329 ; IPRA-NEXT: jle .LBB3_3
330 ; IPRA-NEXT: # %bb.2: # in Loop: Header=BB3_1 Depth=1
331 ; IPRA-NEXT: tileloadd (%rax,%rcx), %tmm0
332 ; IPRA-NEXT: callq foo
333 ; IPRA-NEXT: tilestored %tmm0, (%rsi,%rcx)
334 ; IPRA-NEXT: callq foo
335 ; IPRA-NEXT: jmp .LBB3_1
336 ; IPRA-NEXT: .LBB3_3:
337 ; IPRA-NEXT: addq $72, %rsp
338 ; IPRA-NEXT: tilerelease
339 ; IPRA-NEXT: vzeroupper
343 %3 = phi i32 [ 0, %1 ], [ %7, %5 ]
345 %4 = icmp sgt i32 %0, 0
346 br i1 %4, label %5, label %8
348 %6 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 0), i64 32)
350 tail call void @llvm.x86.tilestored64.internal(i16 8, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32, x86_amx %6)
358 declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64)
359 declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
360 declare void @llvm.x86.tilestored64.internal(i16, i16, i8*, i64, x86_amx)