1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s --check-prefix=X86ASM
4 %struct.T = type { i32, i32 }
6 define i32 @freeze_int() {
7 ; X86ASM-LABEL: freeze_int:
9 ; X86ASM-NEXT: imull %eax, %eax
11 %y1 = freeze i32 undef
12 %t1 = mul i32 %y1, %y1
16 define i5 @freeze_int2() {
17 ; X86ASM-LABEL: freeze_int2:
19 ; X86ASM-NEXT: mulb %al
26 define float @freeze_float() {
27 ; X86ASM-LABEL: freeze_float:
29 ; X86ASM-NEXT: addss %xmm0, %xmm0
31 %y1 = freeze float undef
32 %t1 = fadd float %y1, %y1
36 define half @freeze_half() {
37 ; X86ASM-LABEL: freeze_half:
39 ; X86ASM-NEXT: pushq %rax
40 ; X86ASM-NEXT: .cfi_def_cfa_offset 16
41 ; X86ASM-NEXT: xorl %edi, %edi
42 ; X86ASM-NEXT: callq __gnu_h2f_ieee@PLT
43 ; X86ASM-NEXT: callq __gnu_f2h_ieee@PLT
44 ; X86ASM-NEXT: movzwl %ax, %edi
45 ; X86ASM-NEXT: callq __gnu_h2f_ieee@PLT
46 ; X86ASM-NEXT: addss %xmm0, %xmm0
47 ; X86ASM-NEXT: callq __gnu_f2h_ieee@PLT
48 ; X86ASM-NEXT: popq %rcx
49 ; X86ASM-NEXT: .cfi_def_cfa_offset 8
51 %y1 = freeze half undef
52 %t1 = fadd half %y1, %y1
56 define <2 x i32> @freeze_ivec() {
57 ; X86ASM-LABEL: freeze_ivec:
59 ; X86ASM-NEXT: paddd %xmm0, %xmm0
61 %y1 = freeze <2 x i32> undef
62 %t1 = add <2 x i32> %y1, %y1
66 define i8* @freeze_ptr() {
67 ; X86ASM-LABEL: freeze_ptr:
69 ; X86ASM-NEXT: addq $4, %rax
71 %y1 = freeze i8* undef
72 %t1 = getelementptr i8, i8* %y1, i64 4
76 define i32 @freeze_struct() {
77 ; X86ASM-LABEL: freeze_struct:
79 ; X86ASM-NEXT: addl %eax, %eax
81 %y1 = freeze %struct.T undef
82 %v1 = extractvalue %struct.T %y1, 0
83 %v2 = extractvalue %struct.T %y1, 1
84 %t1 = add i32 %v1, %v2
88 define i32 @freeze_anonstruct() {
89 ; X86ASM-LABEL: freeze_anonstruct:
91 ; X86ASM-NEXT: addl %eax, %eax
93 %y1 = freeze {i32, i32} undef
94 %v1 = extractvalue {i32, i32} %y1, 0
95 %v2 = extractvalue {i32, i32} %y1, 1
96 %t1 = add i32 %v1, %v2
100 define i32 @freeze_anonstruct2() {
101 ; X86ASM-LABEL: freeze_anonstruct2:
103 ; X86ASM-NEXT: movzwl %ax, %eax
104 ; X86ASM-NEXT: addl %eax, %eax
106 %y1 = freeze {i32, i16} undef
107 %v1 = extractvalue {i32, i16} %y1, 0
108 %v2 = extractvalue {i32, i16} %y1, 1
109 %z2 = zext i16 %v2 to i32
110 %t1 = add i32 %v1, %z2
114 define i64 @freeze_array() {
115 ; X86ASM-LABEL: freeze_array:
117 ; X86ASM-NEXT: addq %rax, %rax
119 %y1 = freeze [2 x i64] undef
120 %v1 = extractvalue [2 x i64] %y1, 0
121 %v2 = extractvalue [2 x i64] %y1, 1
122 %t1 = add i64 %v1, %v2
126 ; Make sure we emit a movl to zext the input before the imulq. This previously
127 ; failed because freeze was not listed in the instructions that don't zext their
128 ; result in the def32 pattern X86InstrCompiler.td.
129 define i32 @freeze_zext(i64 %a) nounwind {
130 ; X86ASM-LABEL: freeze_zext:
131 ; X86ASM: # %bb.0: # %entry
132 ; X86ASM-NEXT: movq %rdi, %rax
133 ; X86ASM-NEXT: movl %eax, %ecx
134 ; X86ASM-NEXT: movl $3435973837, %edx # imm = 0xCCCCCCCD
135 ; X86ASM-NEXT: imulq %rcx, %rdx
136 ; X86ASM-NEXT: shrq $35, %rdx
137 ; X86ASM-NEXT: addl %edx, %edx
138 ; X86ASM-NEXT: leal (%rdx,%rdx,4), %ecx
139 ; X86ASM-NEXT: subl %ecx, %eax
140 ; X86ASM-NEXT: # kill: def $eax killed $eax killed $rax
143 %x = trunc i64 %a to i32