1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin19.6.0 | FileCheck %s --check-prefix=SSE2
3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin19.6.0 -mattr=avx | FileCheck %s --check-prefix=AVX
4 ; RUN: llc < %s -mtriple=x86_64-apple-darwin19.6.0 -mattr=avx512f | FileCheck %s --check-prefix=AVX
6 define void @a(float* %arg, i32 %arg1) {
8 ; SSE2: ## %bb.0: ## %bb
9 ; SSE2-NEXT: testl %esi, %esi
10 ; SSE2-NEXT: jle LBB0_3
11 ; SSE2-NEXT: ## %bb.1: ## %bb2
12 ; SSE2-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) ## 4-byte Spill
13 ; SSE2-NEXT: movl %esi, %eax
14 ; SSE2-NEXT: .p2align 4, 0x90
15 ; SSE2-NEXT: LBB0_2: ## %bb6
16 ; SSE2-NEXT: ## =>This Inner Loop Header: Depth=1
17 ; SSE2-NEXT: ## InlineAsm Start
18 ; SSE2-NEXT: ## InlineAsm End
19 ; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
20 ; SSE2-NEXT: addss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 4-byte Folded Reload
21 ; SSE2-NEXT: movss %xmm0, (%rdi)
22 ; SSE2-NEXT: addq $4, %rdi
23 ; SSE2-NEXT: decq %rax
24 ; SSE2-NEXT: jne LBB0_2
25 ; SSE2-NEXT: LBB0_3: ## %bb5
29 ; AVX: ## %bb.0: ## %bb
30 ; AVX-NEXT: testl %esi, %esi
31 ; AVX-NEXT: jle LBB0_3
32 ; AVX-NEXT: ## %bb.1: ## %bb2
33 ; AVX-NEXT: movl %esi, {{[-0-9]+}}(%r{{[sb]}}p) ## 4-byte Spill
34 ; AVX-NEXT: movl %esi, %eax
35 ; AVX-NEXT: .p2align 4, 0x90
36 ; AVX-NEXT: LBB0_2: ## %bb6
37 ; AVX-NEXT: ## =>This Inner Loop Header: Depth=1
38 ; AVX-NEXT: ## InlineAsm Start
39 ; AVX-NEXT: ## InlineAsm End
40 ; AVX-NEXT: vmovss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 4-byte Reload
41 ; AVX-NEXT: ## xmm0 = mem[0],zero,zero,zero
42 ; AVX-NEXT: vaddss (%rdi), %xmm0, %xmm0
43 ; AVX-NEXT: vmovss %xmm0, (%rdi)
44 ; AVX-NEXT: addq $4, %rdi
46 ; AVX-NEXT: jne LBB0_2
47 ; AVX-NEXT: LBB0_3: ## %bb5
50 %i = icmp sgt i32 %arg1, 0
51 br i1 %i, label %bb2, label %bb5
54 %i3 = bitcast i32 %arg1 to float
55 %i4 = zext i32 %arg1 to i64
58 bb5: ; preds = %bb6, %bb
61 bb6: ; preds = %bb6, %bb2
62 %i7 = phi i64 [ 0, %bb2 ], [ %i11, %bb6 ]
63 tail call void asm sideeffect "", "~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{dirflag},~{fpsr},~{flags}"()
64 %i8 = getelementptr inbounds float, float* %arg, i64 %i7
65 %i9 = load float, float* %i8, align 4
66 %i10 = fadd float %i9, %i3
67 store float %i10, float* %i8, align 4
68 %i11 = add nuw nsw i64 %i7, 1
69 %i12 = icmp eq i64 %i11, %i4
70 br i1 %i12, label %bb5, label %bb6
73 define void @b(double* %arg, i64 %arg1) {
75 ; SSE2: ## %bb.0: ## %bb
76 ; SSE2-NEXT: testq %rsi, %rsi
77 ; SSE2-NEXT: jle LBB1_3
78 ; SSE2-NEXT: ## %bb.1: ## %bb2
79 ; SSE2-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
80 ; SSE2-NEXT: .p2align 4, 0x90
81 ; SSE2-NEXT: LBB1_2: ## %bb6
82 ; SSE2-NEXT: ## =>This Inner Loop Header: Depth=1
83 ; SSE2-NEXT: ## InlineAsm Start
84 ; SSE2-NEXT: ## InlineAsm End
85 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
86 ; SSE2-NEXT: addsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 8-byte Folded Reload
87 ; SSE2-NEXT: movsd %xmm0, (%rdi)
88 ; SSE2-NEXT: addq $8, %rdi
89 ; SSE2-NEXT: decq %rsi
90 ; SSE2-NEXT: jne LBB1_2
91 ; SSE2-NEXT: LBB1_3: ## %bb5
95 ; AVX: ## %bb.0: ## %bb
96 ; AVX-NEXT: testq %rsi, %rsi
97 ; AVX-NEXT: jle LBB1_3
98 ; AVX-NEXT: ## %bb.1: ## %bb2
99 ; AVX-NEXT: movq %rsi, {{[-0-9]+}}(%r{{[sb]}}p) ## 8-byte Spill
100 ; AVX-NEXT: .p2align 4, 0x90
101 ; AVX-NEXT: LBB1_2: ## %bb6
102 ; AVX-NEXT: ## =>This Inner Loop Header: Depth=1
103 ; AVX-NEXT: ## InlineAsm Start
104 ; AVX-NEXT: ## InlineAsm End
105 ; AVX-NEXT: vmovsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 8-byte Reload
106 ; AVX-NEXT: ## xmm0 = mem[0],zero
107 ; AVX-NEXT: vaddsd (%rdi), %xmm0, %xmm0
108 ; AVX-NEXT: vmovsd %xmm0, (%rdi)
109 ; AVX-NEXT: addq $8, %rdi
110 ; AVX-NEXT: decq %rsi
111 ; AVX-NEXT: jne LBB1_2
112 ; AVX-NEXT: LBB1_3: ## %bb5
115 %i = icmp sgt i64 %arg1, 0
116 br i1 %i, label %bb2, label %bb5
119 %i3 = bitcast i64 %arg1 to double
122 bb5: ; preds = %bb6, %bb
125 bb6: ; preds = %bb6, %bb2
126 %i7 = phi i64 [ 0, %bb2 ], [ %i11, %bb6 ]
127 tail call void asm sideeffect "", "~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{dirflag},~{fpsr},~{flags}"()
128 %i8 = getelementptr inbounds double, double* %arg, i64 %i7
129 %i9 = load double, double* %i8, align 4
130 %i10 = fadd double %i9, %i3
131 store double %i10, double* %i8, align 4
132 %i11 = add nuw nsw i64 %i7, 1
133 %i12 = icmp eq i64 %i11, %arg1
134 br i1 %i12, label %bb5, label %bb6
137 define void @c(<4 x float>* %arg, <4 x float>* %arg1, i32 %arg2) {
139 ; SSE2: ## %bb.0: ## %bb
140 ; SSE2-NEXT: testl %edx, %edx
141 ; SSE2-NEXT: jle LBB2_3
142 ; SSE2-NEXT: ## %bb.1: ## %bb4
143 ; SSE2-NEXT: movd %edx, %xmm0
144 ; SSE2-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
145 ; SSE2-NEXT: movl %edx, %eax
146 ; SSE2-NEXT: .p2align 4, 0x90
147 ; SSE2-NEXT: LBB2_2: ## %bb8
148 ; SSE2-NEXT: ## =>This Inner Loop Header: Depth=1
149 ; SSE2-NEXT: ## InlineAsm Start
150 ; SSE2-NEXT: ## InlineAsm End
151 ; SSE2-NEXT: movaps (%rdi), %xmm0
152 ; SSE2-NEXT: addss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
153 ; SSE2-NEXT: movaps %xmm0, (%rdi)
154 ; SSE2-NEXT: addq $16, %rdi
155 ; SSE2-NEXT: decq %rax
156 ; SSE2-NEXT: jne LBB2_2
157 ; SSE2-NEXT: LBB2_3: ## %bb7
161 ; AVX: ## %bb.0: ## %bb
162 ; AVX-NEXT: testl %edx, %edx
163 ; AVX-NEXT: jle LBB2_3
164 ; AVX-NEXT: ## %bb.1: ## %bb4
165 ; AVX-NEXT: vmovd %edx, %xmm0
166 ; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
167 ; AVX-NEXT: movl %edx, %eax
168 ; AVX-NEXT: .p2align 4, 0x90
169 ; AVX-NEXT: LBB2_2: ## %bb8
170 ; AVX-NEXT: ## =>This Inner Loop Header: Depth=1
171 ; AVX-NEXT: ## InlineAsm Start
172 ; AVX-NEXT: ## InlineAsm End
173 ; AVX-NEXT: vmovaps (%rdi), %xmm0
174 ; AVX-NEXT: vaddss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload
175 ; AVX-NEXT: vmovaps %xmm0, (%rdi)
176 ; AVX-NEXT: addq $16, %rdi
177 ; AVX-NEXT: decq %rax
178 ; AVX-NEXT: jne LBB2_2
179 ; AVX-NEXT: LBB2_3: ## %bb7
182 %i = icmp sgt i32 %arg2, 0
183 br i1 %i, label %bb4, label %bb7
186 %i5 = bitcast i32 %arg2 to float
187 %i6 = zext i32 %arg2 to i64
190 bb7: ; preds = %bb8, %bb
193 bb8: ; preds = %bb8, %bb4
194 %i9 = phi i64 [ 0, %bb4 ], [ %i15, %bb8 ]
195 tail call void asm sideeffect "", "~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{dirflag},~{fpsr},~{flags}"()
196 %i10 = getelementptr inbounds <4 x float>, <4 x float>* %arg, i64 %i9
197 %i11 = load <4 x float>, <4 x float>* %i10, align 16
198 %i12 = extractelement <4 x float> %i11, i32 0
199 %i13 = fadd float %i12, %i5
200 %i14 = insertelement <4 x float> %i11, float %i13, i32 0
201 store <4 x float> %i14, <4 x float>* %i10, align 16
202 %i15 = add nuw nsw i64 %i9, 1
203 %i16 = icmp eq i64 %i15, %i6
204 br i1 %i16, label %bb7, label %bb8
207 define void @d(<2 x double>* %arg, <2 x double>* %arg1, i64 %arg2) {
209 ; SSE2: ## %bb.0: ## %bb
210 ; SSE2-NEXT: testq %rdx, %rdx
211 ; SSE2-NEXT: jle LBB3_3
212 ; SSE2-NEXT: ## %bb.1: ## %bb3
213 ; SSE2-NEXT: movq %rdx, %xmm0
214 ; SSE2-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
215 ; SSE2-NEXT: .p2align 4, 0x90
216 ; SSE2-NEXT: LBB3_2: ## %bb6
217 ; SSE2-NEXT: ## =>This Inner Loop Header: Depth=1
218 ; SSE2-NEXT: ## InlineAsm Start
219 ; SSE2-NEXT: ## InlineAsm End
220 ; SSE2-NEXT: movapd (%rdi), %xmm0
221 ; SSE2-NEXT: addsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 ## 16-byte Folded Reload
222 ; SSE2-NEXT: movapd %xmm0, (%rdi)
223 ; SSE2-NEXT: addq $16, %rdi
224 ; SSE2-NEXT: decq %rdx
225 ; SSE2-NEXT: jne LBB3_2
226 ; SSE2-NEXT: LBB3_3: ## %bb5
230 ; AVX: ## %bb.0: ## %bb
231 ; AVX-NEXT: testq %rdx, %rdx
232 ; AVX-NEXT: jle LBB3_3
233 ; AVX-NEXT: ## %bb.1: ## %bb3
234 ; AVX-NEXT: vmovq %rdx, %xmm0
235 ; AVX-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) ## 16-byte Spill
236 ; AVX-NEXT: .p2align 4, 0x90
237 ; AVX-NEXT: LBB3_2: ## %bb6
238 ; AVX-NEXT: ## =>This Inner Loop Header: Depth=1
239 ; AVX-NEXT: ## InlineAsm Start
240 ; AVX-NEXT: ## InlineAsm End
241 ; AVX-NEXT: vmovapd (%rdi), %xmm0
242 ; AVX-NEXT: vaddsd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 ## 16-byte Folded Reload
243 ; AVX-NEXT: vmovapd %xmm0, (%rdi)
244 ; AVX-NEXT: addq $16, %rdi
245 ; AVX-NEXT: decq %rdx
246 ; AVX-NEXT: jne LBB3_2
247 ; AVX-NEXT: LBB3_3: ## %bb5
250 %i = icmp sgt i64 %arg2, 0
251 br i1 %i, label %bb3, label %bb5
254 %i4 = bitcast i64 %arg2 to double
257 bb5: ; preds = %bb6, %bb
260 bb6: ; preds = %bb6, %bb3
261 %i7 = phi i64 [ 0, %bb3 ], [ %i13, %bb6 ]
262 tail call void asm sideeffect "", "~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{xmm16},~{xmm17},~{xmm18},~{xmm19},~{xmm20},~{xmm21},~{xmm22},~{xmm23},~{xmm24},~{xmm25},~{xmm26},~{xmm27},~{xmm28},~{xmm29},~{xmm30},~{xmm31},~{dirflag},~{fpsr},~{flags}"()
263 %i8 = getelementptr inbounds <2 x double>, <2 x double>* %arg, i64 %i7
264 %i9 = load <2 x double>, <2 x double>* %i8, align 16
265 %i10 = extractelement <2 x double> %i9, i32 0
266 %i11 = fadd double %i10, %i4
267 %i12 = insertelement <2 x double> %i9, double %i11, i32 0
268 store <2 x double> %i12, <2 x double>* %i8, align 16
269 %i13 = add nuw nsw i64 %i7, 1
270 %i14 = icmp eq i64 %i13, %arg2
271 br i1 %i14, label %bb5, label %bb6