| blob | c1dee72e6d076c271178118c80eb7d6012352e1d |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi %s -o - | FileCheck %s
3 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-one-lfence-per-bb %s -o - | FileCheck %s --check-prefix=X86-ONE-LFENCE
4 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-omit-branch-lfences %s -o - | FileCheck %s --check-prefix=X86-OMIT-BR
5 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-only-lfence-non-const %s -o - | FileCheck %s --check-prefix=X86-NON-CONST
7 define dso_local void @_Z4buzzv() {
8 ; CHECK-LABEL: _Z4buzzv:
9 ; CHECK: # %bb.0: # %entry
10 ; CHECK-NEXT: lfence
11 ; CHECK-NEXT: movl $10, -{{[0-9]+}}(%rsp)
12 ; CHECK-NEXT: retq
13 ;
14 ; X86-ONE-LFENCE-LABEL: _Z4buzzv:
15 ; X86-ONE-LFENCE: # %bb.0: # %entry
16 ; X86-ONE-LFENCE-NEXT: lfence
17 ; X86-ONE-LFENCE-NEXT: movl $10, -{{[0-9]+}}(%rsp)
18 ; X86-ONE-LFENCE-NEXT: retq
19 ;
20 ; X86-OMIT-BR-LABEL: _Z4buzzv:
21 ; X86-OMIT-BR: # %bb.0: # %entry
22 ; X86-OMIT-BR-NEXT: lfence
23 ; X86-OMIT-BR-NEXT: movl $10, -{{[0-9]+}}(%rsp)
24 ; X86-OMIT-BR-NEXT: retq
25 ;
26 ; X86-NON-CONST-LABEL: _Z4buzzv:
27 ; X86-NON-CONST: # %bb.0: # %entry
28 ; X86-NON-CONST-NEXT: lfence
29 ; X86-NON-CONST-NEXT: movl $10, -{{[0-9]+}}(%rsp)
30 ; X86-NON-CONST-NEXT: retq
31 entry:
32 %a = alloca i32, align 4
33 store i32 10, i32* %a, align 4
34 ret void
35 }
37 define dso_local i32 @_Z3barPi(i32* %p) {
38 ; CHECK-LABEL: _Z3barPi:
39 ; CHECK: # %bb.0: # %entry
40 ; CHECK-NEXT: lfence
41 ; CHECK-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
42 ; CHECK-NEXT: lfence
43 ; CHECK-NEXT: movl $4, -{{[0-9]+}}(%rsp)
44 ; CHECK-NEXT: lfence
45 ; CHECK-NEXT: cmpl $3, (%rdi)
46 ; CHECK-NEXT: lfence
47 ; CHECK-NEXT: jg .LBB1_2
48 ; CHECK-NEXT: # %bb.1: # %if.then
49 ; CHECK-NEXT: lfence
50 ; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax
51 ; CHECK-NEXT: lfence
52 ; CHECK-NEXT: movslq (%rax), %rax
53 ; CHECK-NEXT: lfence
54 ; CHECK-NEXT: movl -24(%rsp,%rax,4), %eax
55 ; CHECK-NEXT: lfence
56 ; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
57 ; CHECK-NEXT: lfence
58 ; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
59 ; CHECK-NEXT: retq
60 ; CHECK-NEXT: .LBB1_2: # %if.else
61 ; CHECK-NEXT: lfence
62 ; CHECK-NEXT: movl $-1, -{{[0-9]+}}(%rsp)
63 ; CHECK-NEXT: lfence
64 ; CHECK-NEXT: movl -{{[0-9]+}}(%rsp), %eax
65 ; CHECK-NEXT: retq
66 ;
67 ; X86-ONE-LFENCE-LABEL: _Z3barPi:
68 ; X86-ONE-LFENCE: # %bb.0: # %entry
69 ; X86-ONE-LFENCE-NEXT: lfence
70 ; X86-ONE-LFENCE-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
71 ; X86-ONE-LFENCE-NEXT: movl $4, -{{[0-9]+}}(%rsp)
72 ; X86-ONE-LFENCE-NEXT: cmpl $3, (%rdi)
73 ; X86-ONE-LFENCE-NEXT: jg .LBB1_2
74 ; X86-ONE-LFENCE-NEXT: # %bb.1: # %if.then
75 ; X86-ONE-LFENCE-NEXT: lfence
76 ; X86-ONE-LFENCE-NEXT: movq -{{[0-9]+}}(%rsp), %rax
77 ; X86-ONE-LFENCE-NEXT: movslq (%rax), %rax
78 ; X86-ONE-LFENCE-NEXT: movl -24(%rsp,%rax,4), %eax
79 ; X86-ONE-LFENCE-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
80 ; X86-ONE-LFENCE-NEXT: movl -{{[0-9]+}}(%rsp), %eax
81 ; X86-ONE-LFENCE-NEXT: retq
82 ; X86-ONE-LFENCE-NEXT: .LBB1_2: # %if.else
83 ; X86-ONE-LFENCE-NEXT: lfence
84 ; X86-ONE-LFENCE-NEXT: movl $-1, -{{[0-9]+}}(%rsp)
85 ; X86-ONE-LFENCE-NEXT: movl -{{[0-9]+}}(%rsp), %eax
86 ; X86-ONE-LFENCE-NEXT: retq
87 ;
88 ; X86-OMIT-BR-LABEL: _Z3barPi:
89 ; X86-OMIT-BR: # %bb.0: # %entry
90 ; X86-OMIT-BR-NEXT: lfence
91 ; X86-OMIT-BR-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
92 ; X86-OMIT-BR-NEXT: lfence
93 ; X86-OMIT-BR-NEXT: movl $4, -{{[0-9]+}}(%rsp)
94 ; X86-OMIT-BR-NEXT: lfence
95 ; X86-OMIT-BR-NEXT: cmpl $3, (%rdi)
96 ; X86-OMIT-BR-NEXT: jg .LBB1_2
97 ; X86-OMIT-BR-NEXT: # %bb.1: # %if.then
98 ; X86-OMIT-BR-NEXT: lfence
99 ; X86-OMIT-BR-NEXT: movq -{{[0-9]+}}(%rsp), %rax
100 ; X86-OMIT-BR-NEXT: lfence
101 ; X86-OMIT-BR-NEXT: movslq (%rax), %rax
102 ; X86-OMIT-BR-NEXT: lfence
103 ; X86-OMIT-BR-NEXT: movl -24(%rsp,%rax,4), %eax
104 ; X86-OMIT-BR-NEXT: lfence
105 ; X86-OMIT-BR-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
106 ; X86-OMIT-BR-NEXT: lfence
107 ; X86-OMIT-BR-NEXT: movl -{{[0-9]+}}(%rsp), %eax
108 ; X86-OMIT-BR-NEXT: retq
109 ; X86-OMIT-BR-NEXT: .LBB1_2: # %if.else
110 ; X86-OMIT-BR-NEXT: lfence
111 ; X86-OMIT-BR-NEXT: movl $-1, -{{[0-9]+}}(%rsp)
112 ; X86-OMIT-BR-NEXT: lfence
113 ; X86-OMIT-BR-NEXT: movl -{{[0-9]+}}(%rsp), %eax
114 ; X86-OMIT-BR-NEXT: retq
115 ;
116 ; X86-NON-CONST-LABEL: _Z3barPi:
117 ; X86-NON-CONST: # %bb.0: # %entry
118 ; X86-NON-CONST-NEXT: lfence
119 ; X86-NON-CONST-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
120 ; X86-NON-CONST-NEXT: lfence
121 ; X86-NON-CONST-NEXT: movl $4, -{{[0-9]+}}(%rsp)
122 ; X86-NON-CONST-NEXT: lfence
123 ; X86-NON-CONST-NEXT: cmpl $3, (%rdi)
124 ; X86-NON-CONST-NEXT: lfence
125 ; X86-NON-CONST-NEXT: jg .LBB1_2
126 ; X86-NON-CONST-NEXT: # %bb.1: # %if.then
127 ; X86-NON-CONST-NEXT: lfence
128 ; X86-NON-CONST-NEXT: movq -{{[0-9]+}}(%rsp), %rax
129 ; X86-NON-CONST-NEXT: lfence
130 ; X86-NON-CONST-NEXT: movslq (%rax), %rax
131 ; X86-NON-CONST-NEXT: lfence
132 ; X86-NON-CONST-NEXT: movl -24(%rsp,%rax,4), %eax
133 ; X86-NON-CONST-NEXT: lfence
134 ; X86-NON-CONST-NEXT: movl %eax, -{{[0-9]+}}(%rsp)
135 ; X86-NON-CONST-NEXT: lfence
136 ; X86-NON-CONST-NEXT: movl -{{[0-9]+}}(%rsp), %eax
137 ; X86-NON-CONST-NEXT: retq
138 ; X86-NON-CONST-NEXT: .LBB1_2: # %if.else
139 ; X86-NON-CONST-NEXT: lfence
140 ; X86-NON-CONST-NEXT: movl $-1, -{{[0-9]+}}(%rsp)
141 ; X86-NON-CONST-NEXT: lfence
142 ; X86-NON-CONST-NEXT: movl -{{[0-9]+}}(%rsp), %eax
143 ; X86-NON-CONST-NEXT: retq
144 entry:
145 %retval = alloca i32, align 4
146 %p.addr = alloca i32*, align 8
147 %a = alloca [4 x i32], align 16
148 %len = alloca i32, align 4
149 store i32* %p, i32** %p.addr, align 8
150 %0 = bitcast [4 x i32]* %a to i8*
151 store i32 4, i32* %len, align 4
152 %1 = load i32*, i32** %p.addr, align 8
153 %2 = load i32, i32* %1, align 4
154 %3 = load i32, i32* %len, align 4
155 %cmp = icmp slt i32 %2, %3
156 br i1 %cmp, label %if.then, label %if.else
158 if.then: ; preds = %entry
159 %4 = load i32*, i32** %p.addr, align 8
160 %5 = load i32, i32* %4, align 4
161 %idxprom = sext i32 %5 to i64
162 %arrayidx = getelementptr inbounds [4 x i32], [4 x i32]* %a, i64 0, i64 %idxprom
163 %6 = load i32, i32* %arrayidx, align 4
164 store i32 %6, i32* %retval, align 4
165 br label %return
167 if.else: ; preds = %entry
168 store i32 -1, i32* %retval, align 4
169 br label %return
171 return: ; preds = %if.else, %if.then
172 %7 = load i32, i32* %retval, align 4
173 ret i32 %7
174 }
176 define dso_local i32 (i32*)* @_Z3bazv() {
177 ; CHECK-LABEL: _Z3bazv:
178 ; CHECK: # %bb.0: # %entry
179 ; CHECK-NEXT: lfence
180 ; CHECK-NEXT: movq $_Z3barPi, -{{[0-9]+}}(%rsp)
181 ; CHECK-NEXT: lfence
182 ; CHECK-NEXT: #APP
183 ; CHECK-NEXT: #NO_APP
184 ; CHECK-NEXT: lfence
185 ; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax
186 ; CHECK-NEXT: retq
187 ;
188 ; X86-ONE-LFENCE-LABEL: _Z3bazv:
189 ; X86-ONE-LFENCE: # %bb.0: # %entry
190 ; X86-ONE-LFENCE-NEXT: lfence
191 ; X86-ONE-LFENCE-NEXT: movq $_Z3barPi, -{{[0-9]+}}(%rsp)
192 ; X86-ONE-LFENCE-NEXT: #APP
193 ; X86-ONE-LFENCE-NEXT: #NO_APP
194 ; X86-ONE-LFENCE-NEXT: movq -{{[0-9]+}}(%rsp), %rax
195 ; X86-ONE-LFENCE-NEXT: retq
196 ;
197 ; X86-OMIT-BR-LABEL: _Z3bazv:
198 ; X86-OMIT-BR: # %bb.0: # %entry
199 ; X86-OMIT-BR-NEXT: lfence
200 ; X86-OMIT-BR-NEXT: movq $_Z3barPi, -{{[0-9]+}}(%rsp)
201 ; X86-OMIT-BR-NEXT: lfence
202 ; X86-OMIT-BR-NEXT: #APP
203 ; X86-OMIT-BR-NEXT: #NO_APP
204 ; X86-OMIT-BR-NEXT: lfence
205 ; X86-OMIT-BR-NEXT: movq -{{[0-9]+}}(%rsp), %rax
206 ; X86-OMIT-BR-NEXT: retq
207 ;
208 ; X86-NON-CONST-LABEL: _Z3bazv:
209 ; X86-NON-CONST: # %bb.0: # %entry
210 ; X86-NON-CONST-NEXT: lfence
211 ; X86-NON-CONST-NEXT: movq $_Z3barPi, -{{[0-9]+}}(%rsp)
212 ; X86-NON-CONST-NEXT: lfence
213 ; X86-NON-CONST-NEXT: #APP
214 ; X86-NON-CONST-NEXT: #NO_APP
215 ; X86-NON-CONST-NEXT: lfence
216 ; X86-NON-CONST-NEXT: movq -{{[0-9]+}}(%rsp), %rax
217 ; X86-NON-CONST-NEXT: retq
218 entry:
219 %p = alloca i32 (i32*)*, align 8
220 store i32 (i32*)* @_Z3barPi, i32 (i32*)** %p, align 8
221 call void asm sideeffect "", "=*m,*m,~{dirflag},~{fpsr},~{flags}"(i32 (i32*)** %p, i32 (i32*)** %p) #3, !srcloc !2
222 %0 = load i32 (i32*)*, i32 (i32*)** %p, align 8
223 ret i32 (i32*)* %0
224 }
226 define dso_local void @_Z3fooPi(i32* %p) {
227 ; CHECK-LABEL: _Z3fooPi:
228 ; CHECK: # %bb.0: # %entry
229 ; CHECK-NEXT: subq $24, %rsp
230 ; CHECK-NEXT: .cfi_def_cfa_offset 32
231 ; CHECK-NEXT: lfence
232 ; CHECK-NEXT: movq %rdi, {{[0-9]+}}(%rsp)
233 ; CHECK-NEXT: callq _Z3bazv
234 ; CHECK-NEXT: lfence
235 ; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp)
236 ; CHECK-NEXT: lfence
237 ; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rdi
238 ; CHECK-NEXT: callq *%rax
239 ; CHECK-NEXT: addq $24, %rsp
240 ; CHECK-NEXT: .cfi_def_cfa_offset 8
241 ; CHECK-NEXT: retq
242 ;
243 ; X86-ONE-LFENCE-LABEL: _Z3fooPi:
244 ; X86-ONE-LFENCE: # %bb.0: # %entry
245 ; X86-ONE-LFENCE-NEXT: subq $24, %rsp
246 ; X86-ONE-LFENCE-NEXT: .cfi_def_cfa_offset 32
247 ; X86-ONE-LFENCE-NEXT: lfence
248 ; X86-ONE-LFENCE-NEXT: movq %rdi, {{[0-9]+}}(%rsp)
249 ; X86-ONE-LFENCE-NEXT: callq _Z3bazv
250 ; X86-ONE-LFENCE-NEXT: movq %rax, {{[0-9]+}}(%rsp)
251 ; X86-ONE-LFENCE-NEXT: movq {{[0-9]+}}(%rsp), %rdi
252 ; X86-ONE-LFENCE-NEXT: callq *%rax
253 ; X86-ONE-LFENCE-NEXT: addq $24, %rsp
254 ; X86-ONE-LFENCE-NEXT: .cfi_def_cfa_offset 8
255 ; X86-ONE-LFENCE-NEXT: retq
256 ;
257 ; X86-OMIT-BR-LABEL: _Z3fooPi:
258 ; X86-OMIT-BR: # %bb.0: # %entry
259 ; X86-OMIT-BR-NEXT: subq $24, %rsp
260 ; X86-OMIT-BR-NEXT: .cfi_def_cfa_offset 32
261 ; X86-OMIT-BR-NEXT: lfence
262 ; X86-OMIT-BR-NEXT: movq %rdi, {{[0-9]+}}(%rsp)
263 ; X86-OMIT-BR-NEXT: callq _Z3bazv
264 ; X86-OMIT-BR-NEXT: lfence
265 ; X86-OMIT-BR-NEXT: movq %rax, {{[0-9]+}}(%rsp)
266 ; X86-OMIT-BR-NEXT: lfence
267 ; X86-OMIT-BR-NEXT: movq {{[0-9]+}}(%rsp), %rdi
268 ; X86-OMIT-BR-NEXT: callq *%rax
269 ; X86-OMIT-BR-NEXT: addq $24, %rsp
270 ; X86-OMIT-BR-NEXT: .cfi_def_cfa_offset 8
271 ; X86-OMIT-BR-NEXT: retq
272 ;
273 ; X86-NON-CONST-LABEL: _Z3fooPi:
274 ; X86-NON-CONST: # %bb.0: # %entry
275 ; X86-NON-CONST-NEXT: subq $24, %rsp
276 ; X86-NON-CONST-NEXT: .cfi_def_cfa_offset 32
277 ; X86-NON-CONST-NEXT: lfence
278 ; X86-NON-CONST-NEXT: movq %rdi, {{[0-9]+}}(%rsp)
279 ; X86-NON-CONST-NEXT: callq _Z3bazv
280 ; X86-NON-CONST-NEXT: lfence
281 ; X86-NON-CONST-NEXT: movq %rax, {{[0-9]+}}(%rsp)
282 ; X86-NON-CONST-NEXT: lfence
283 ; X86-NON-CONST-NEXT: movq {{[0-9]+}}(%rsp), %rdi
284 ; X86-NON-CONST-NEXT: callq *%rax
285 ; X86-NON-CONST-NEXT: addq $24, %rsp
286 ; X86-NON-CONST-NEXT: .cfi_def_cfa_offset 8
287 ; X86-NON-CONST-NEXT: retq
288 entry:
289 %p.addr = alloca i32*, align 8
290 %t = alloca i32 (i32*)*, align 8
291 store i32* %p, i32** %p.addr, align 8
292 %call = call i32 (i32*)* @_Z3bazv()
293 store i32 (i32*)* %call, i32 (i32*)** %t, align 8
294 %0 = load i32 (i32*)*, i32 (i32*)** %t, align 8
295 %1 = load i32*, i32** %p.addr, align 8
296 %call1 = call i32 %0(i32* %1)
297 ret void
298 }
300 !2 = !{i32 233}