| blob | 2fde440aa954292d7d1fe33dacc75728f26c5634 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512VL
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512BW
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512VLBW
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi2 | FileCheck %s --check-prefix=AVX512VBMI2
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefix=AVX512VLVBMI2
12 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
13 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
15 ; Just one 32-bit run to make sure we do reasonable things for i64 cases.
16 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
18 declare <2 x i32> @llvm.fshl.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)
20 ;
21 ; Variable Shifts
22 ;
24 define <2 x i32> @var_funnnel_v2i32(<2 x i32> %x, <2 x i32> %amt) nounwind {
25 ; SSE2-LABEL: var_funnnel_v2i32:
26 ; SSE2: # %bb.0:
27 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
28 ; SSE2-NEXT: pslld $23, %xmm1
29 ; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
30 ; SSE2-NEXT: cvttps2dq %xmm1, %xmm1
31 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
32 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
33 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
34 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
35 ; SSE2-NEXT: pmuludq %xmm2, %xmm1
36 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
37 ; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
38 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
39 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
40 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
41 ; SSE2-NEXT: por %xmm3, %xmm0
42 ; SSE2-NEXT: retq
43 ;
44 ; SSE41-LABEL: var_funnnel_v2i32:
45 ; SSE41: # %bb.0:
46 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
47 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
48 ; SSE41-NEXT: pslld $23, %xmm1
49 ; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
50 ; SSE41-NEXT: cvttps2dq %xmm1, %xmm1
51 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
52 ; SSE41-NEXT: pmuludq %xmm2, %xmm3
53 ; SSE41-NEXT: pmuludq %xmm1, %xmm0
54 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
55 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
56 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2]
57 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
58 ; SSE41-NEXT: por %xmm1, %xmm0
59 ; SSE41-NEXT: retq
60 ;
61 ; AVX1-LABEL: var_funnnel_v2i32:
62 ; AVX1: # %bb.0:
63 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
64 ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
65 ; AVX1-NEXT: vpslld $23, %xmm1, %xmm1
66 ; AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
67 ; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1
68 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
69 ; AVX1-NEXT: vpmuludq %xmm3, %xmm2, %xmm2
70 ; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
71 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
72 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
73 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2]
74 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
75 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
76 ; AVX1-NEXT: retq
77 ;
78 ; AVX2-LABEL: var_funnnel_v2i32:
79 ; AVX2: # %bb.0:
80 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31]
81 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
82 ; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm2
83 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32]
84 ; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1
85 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
86 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
87 ; AVX2-NEXT: retq
88 ;
89 ; AVX512F-LABEL: var_funnnel_v2i32:
90 ; AVX512F: # %bb.0:
91 ; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
92 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
93 ; AVX512F-NEXT: vprolvd %zmm1, %zmm0, %zmm0
94 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
95 ; AVX512F-NEXT: vzeroupper
96 ; AVX512F-NEXT: retq
97 ;
98 ; AVX512VL-LABEL: var_funnnel_v2i32:
99 ; AVX512VL: # %bb.0:
100 ; AVX512VL-NEXT: vprolvd %xmm1, %xmm0, %xmm0
101 ; AVX512VL-NEXT: retq
102 ;
103 ; AVX512BW-LABEL: var_funnnel_v2i32:
104 ; AVX512BW: # %bb.0:
105 ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
106 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
107 ; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
108 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
109 ; AVX512BW-NEXT: vzeroupper
110 ; AVX512BW-NEXT: retq
111 ;
112 ; AVX512VLBW-LABEL: var_funnnel_v2i32:
113 ; AVX512VLBW: # %bb.0:
114 ; AVX512VLBW-NEXT: vprolvd %xmm1, %xmm0, %xmm0
115 ; AVX512VLBW-NEXT: retq
116 ;
117 ; AVX512VBMI2-LABEL: var_funnnel_v2i32:
118 ; AVX512VBMI2: # %bb.0:
119 ; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
120 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
121 ; AVX512VBMI2-NEXT: vprolvd %zmm1, %zmm0, %zmm0
122 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
123 ; AVX512VBMI2-NEXT: vzeroupper
124 ; AVX512VBMI2-NEXT: retq
125 ;
126 ; AVX512VLVBMI2-LABEL: var_funnnel_v2i32:
127 ; AVX512VLVBMI2: # %bb.0:
128 ; AVX512VLVBMI2-NEXT: vprolvd %xmm1, %xmm0, %xmm0
129 ; AVX512VLVBMI2-NEXT: retq
130 ;
131 ; XOP-LABEL: var_funnnel_v2i32:
132 ; XOP: # %bb.0:
133 ; XOP-NEXT: vprotd %xmm1, %xmm0, %xmm0
134 ; XOP-NEXT: retq
135 ;
136 ; X86-SSE2-LABEL: var_funnnel_v2i32:
137 ; X86-SSE2: # %bb.0:
138 ; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
139 ; X86-SSE2-NEXT: pslld $23, %xmm1
140 ; X86-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
141 ; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
142 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
143 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm0
144 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
145 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
146 ; X86-SSE2-NEXT: pmuludq %xmm2, %xmm1
147 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
148 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
149 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
150 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
151 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
152 ; X86-SSE2-NEXT: por %xmm3, %xmm0
153 ; X86-SSE2-NEXT: retl
154 %res = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> %amt)
155 ret <2 x i32> %res
156 }
158 ;
159 ; Uniform Variable Shifts
160 ;
162 define <2 x i32> @splatvar_funnnel_v2i32(<2 x i32> %x, <2 x i32> %amt) nounwind {
163 ; SSE2-LABEL: splatvar_funnnel_v2i32:
164 ; SSE2: # %bb.0:
165 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
166 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
167 ; SSE2-NEXT: pslld $23, %xmm1
168 ; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
169 ; SSE2-NEXT: cvttps2dq %xmm1, %xmm1
170 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
171 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
172 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
173 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
174 ; SSE2-NEXT: pmuludq %xmm2, %xmm1
175 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
176 ; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
177 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
178 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
179 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
180 ; SSE2-NEXT: por %xmm3, %xmm0
181 ; SSE2-NEXT: retq
182 ;
183 ; SSE41-LABEL: splatvar_funnnel_v2i32:
184 ; SSE41: # %bb.0:
185 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
186 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
187 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
188 ; SSE41-NEXT: pslld $23, %xmm1
189 ; SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
190 ; SSE41-NEXT: cvttps2dq %xmm1, %xmm1
191 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
192 ; SSE41-NEXT: pmuludq %xmm2, %xmm3
193 ; SSE41-NEXT: pmuludq %xmm1, %xmm0
194 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
195 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
196 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2]
197 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
198 ; SSE41-NEXT: por %xmm1, %xmm0
199 ; SSE41-NEXT: retq
200 ;
201 ; AVX1-LABEL: splatvar_funnnel_v2i32:
202 ; AVX1: # %bb.0:
203 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
204 ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
205 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
206 ; AVX1-NEXT: vpslld $23, %xmm1, %xmm1
207 ; AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
208 ; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1
209 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[1,1,3,3]
210 ; AVX1-NEXT: vpmuludq %xmm3, %xmm2, %xmm2
211 ; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
212 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
213 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
214 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2]
215 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
216 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
217 ; AVX1-NEXT: retq
218 ;
219 ; AVX2-LABEL: splatvar_funnnel_v2i32:
220 ; AVX2: # %bb.0:
221 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31]
222 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
223 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero
224 ; AVX2-NEXT: vpslld %xmm2, %xmm0, %xmm2
225 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32]
226 ; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1
227 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
228 ; AVX2-NEXT: vpsrld %xmm1, %xmm0, %xmm0
229 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
230 ; AVX2-NEXT: retq
231 ;
232 ; AVX512F-LABEL: splatvar_funnnel_v2i32:
233 ; AVX512F: # %bb.0:
234 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
235 ; AVX512F-NEXT: vpbroadcastd %xmm1, %xmm1
236 ; AVX512F-NEXT: vprolvd %zmm1, %zmm0, %zmm0
237 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
238 ; AVX512F-NEXT: vzeroupper
239 ; AVX512F-NEXT: retq
240 ;
241 ; AVX512VL-LABEL: splatvar_funnnel_v2i32:
242 ; AVX512VL: # %bb.0:
243 ; AVX512VL-NEXT: vpbroadcastd %xmm1, %xmm1
244 ; AVX512VL-NEXT: vprolvd %xmm1, %xmm0, %xmm0
245 ; AVX512VL-NEXT: retq
246 ;
247 ; AVX512BW-LABEL: splatvar_funnnel_v2i32:
248 ; AVX512BW: # %bb.0:
249 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
250 ; AVX512BW-NEXT: vpbroadcastd %xmm1, %xmm1
251 ; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
252 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
253 ; AVX512BW-NEXT: vzeroupper
254 ; AVX512BW-NEXT: retq
255 ;
256 ; AVX512VLBW-LABEL: splatvar_funnnel_v2i32:
257 ; AVX512VLBW: # %bb.0:
258 ; AVX512VLBW-NEXT: vpbroadcastd %xmm1, %xmm1
259 ; AVX512VLBW-NEXT: vprolvd %xmm1, %xmm0, %xmm0
260 ; AVX512VLBW-NEXT: retq
261 ;
262 ; AVX512VBMI2-LABEL: splatvar_funnnel_v2i32:
263 ; AVX512VBMI2: # %bb.0:
264 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
265 ; AVX512VBMI2-NEXT: vpbroadcastd %xmm1, %xmm1
266 ; AVX512VBMI2-NEXT: vprolvd %zmm1, %zmm0, %zmm0
267 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
268 ; AVX512VBMI2-NEXT: vzeroupper
269 ; AVX512VBMI2-NEXT: retq
270 ;
271 ; AVX512VLVBMI2-LABEL: splatvar_funnnel_v2i32:
272 ; AVX512VLVBMI2: # %bb.0:
273 ; AVX512VLVBMI2-NEXT: vpbroadcastd %xmm1, %xmm1
274 ; AVX512VLVBMI2-NEXT: vprolvd %xmm1, %xmm0, %xmm0
275 ; AVX512VLVBMI2-NEXT: retq
276 ;
277 ; XOPAVX1-LABEL: splatvar_funnnel_v2i32:
278 ; XOPAVX1: # %bb.0:
279 ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
280 ; XOPAVX1-NEXT: vprotd %xmm1, %xmm0, %xmm0
281 ; XOPAVX1-NEXT: retq
282 ;
283 ; XOPAVX2-LABEL: splatvar_funnnel_v2i32:
284 ; XOPAVX2: # %bb.0:
285 ; XOPAVX2-NEXT: vpbroadcastd %xmm1, %xmm1
286 ; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0
287 ; XOPAVX2-NEXT: retq
288 ;
289 ; X86-SSE2-LABEL: splatvar_funnnel_v2i32:
290 ; X86-SSE2: # %bb.0:
291 ; X86-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
292 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
293 ; X86-SSE2-NEXT: pslld $23, %xmm1
294 ; X86-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm1
295 ; X86-SSE2-NEXT: cvttps2dq %xmm1, %xmm1
296 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
297 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm0
298 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
299 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
300 ; X86-SSE2-NEXT: pmuludq %xmm2, %xmm1
301 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
302 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
303 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
304 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
305 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
306 ; X86-SSE2-NEXT: por %xmm3, %xmm0
307 ; X86-SSE2-NEXT: retl
308 %splat = shufflevector <2 x i32> %amt, <2 x i32> undef, <2 x i32> zeroinitializer
309 %res = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> %splat)
310 ret <2 x i32> %res
311 }
313 ;
314 ; Constant Shifts
315 ;
317 define <2 x i32> @constant_funnnel_v2i32(<2 x i32> %x) nounwind {
318 ; SSE2-LABEL: constant_funnnel_v2i32:
319 ; SSE2: # %bb.0:
320 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [16,32,1,1]
321 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
322 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
323 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
324 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
325 ; SSE2-NEXT: pmuludq %xmm2, %xmm1
326 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
327 ; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
328 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
329 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
330 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
331 ; SSE2-NEXT: por %xmm3, %xmm0
332 ; SSE2-NEXT: retq
333 ;
334 ; SSE41-LABEL: constant_funnnel_v2i32:
335 ; SSE41: # %bb.0:
336 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [16,32,1,1]
337 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
338 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
339 ; SSE41-NEXT: pmuludq %xmm2, %xmm3
340 ; SSE41-NEXT: pmuludq %xmm1, %xmm0
341 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
342 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
343 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2]
344 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
345 ; SSE41-NEXT: por %xmm1, %xmm0
346 ; SSE41-NEXT: retq
347 ;
348 ; AVX1-LABEL: constant_funnnel_v2i32:
349 ; AVX1: # %bb.0:
350 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [16,32,1,1]
351 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
352 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
353 ; AVX1-NEXT: vpmuludq %xmm2, %xmm3, %xmm2
354 ; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
355 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
356 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
357 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2]
358 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
359 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
360 ; AVX1-NEXT: retq
361 ;
362 ; AVX2-LABEL: constant_funnnel_v2i32:
363 ; AVX2: # %bb.0:
364 ; AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
365 ; AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
366 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
367 ; AVX2-NEXT: retq
368 ;
369 ; AVX512F-LABEL: constant_funnnel_v2i32:
370 ; AVX512F: # %bb.0:
371 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
372 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = <4,5,u,u>
373 ; AVX512F-NEXT: vprolvd %zmm1, %zmm0, %zmm0
374 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
375 ; AVX512F-NEXT: vzeroupper
376 ; AVX512F-NEXT: retq
377 ;
378 ; AVX512VL-LABEL: constant_funnnel_v2i32:
379 ; AVX512VL: # %bb.0:
380 ; AVX512VL-NEXT: vprolvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
381 ; AVX512VL-NEXT: retq
382 ;
383 ; AVX512BW-LABEL: constant_funnnel_v2i32:
384 ; AVX512BW: # %bb.0:
385 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
386 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = <4,5,u,u>
387 ; AVX512BW-NEXT: vprolvd %zmm1, %zmm0, %zmm0
388 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
389 ; AVX512BW-NEXT: vzeroupper
390 ; AVX512BW-NEXT: retq
391 ;
392 ; AVX512VLBW-LABEL: constant_funnnel_v2i32:
393 ; AVX512VLBW: # %bb.0:
394 ; AVX512VLBW-NEXT: vprolvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
395 ; AVX512VLBW-NEXT: retq
396 ;
397 ; AVX512VBMI2-LABEL: constant_funnnel_v2i32:
398 ; AVX512VBMI2: # %bb.0:
399 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
400 ; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} xmm1 = <4,5,u,u>
401 ; AVX512VBMI2-NEXT: vprolvd %zmm1, %zmm0, %zmm0
402 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
403 ; AVX512VBMI2-NEXT: vzeroupper
404 ; AVX512VBMI2-NEXT: retq
405 ;
406 ; AVX512VLVBMI2-LABEL: constant_funnnel_v2i32:
407 ; AVX512VLVBMI2: # %bb.0:
408 ; AVX512VLVBMI2-NEXT: vprolvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
409 ; AVX512VLVBMI2-NEXT: retq
410 ;
411 ; XOP-LABEL: constant_funnnel_v2i32:
412 ; XOP: # %bb.0:
413 ; XOP-NEXT: vprotd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
414 ; XOP-NEXT: retq
415 ;
416 ; X86-SSE2-LABEL: constant_funnnel_v2i32:
417 ; X86-SSE2: # %bb.0:
418 ; X86-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [16,32,1,1]
419 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
420 ; X86-SSE2-NEXT: pmuludq %xmm1, %xmm0
421 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
422 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
423 ; X86-SSE2-NEXT: pmuludq %xmm2, %xmm1
424 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
425 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
426 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
427 ; X86-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
428 ; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
429 ; X86-SSE2-NEXT: por %xmm3, %xmm0
430 ; X86-SSE2-NEXT: retl
431 %res = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> <i32 4, i32 5>)
432 ret <2 x i32> %res
433 }
435 ;
436 ; Uniform Constant Shifts
437 ;
439 define <2 x i32> @splatconstant_funnnel_v2i32(<2 x i32> %x) nounwind {
440 ; SSE2-LABEL: splatconstant_funnnel_v2i32:
441 ; SSE2: # %bb.0:
442 ; SSE2-NEXT: movdqa %xmm0, %xmm2
443 ; SSE2-NEXT: psrld $28, %xmm2
444 ; SSE2-NEXT: movdqa %xmm0, %xmm1
445 ; SSE2-NEXT: pslld $4, %xmm1
446 ; SSE2-NEXT: por %xmm2, %xmm1
447 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3]
448 ; SSE2-NEXT: movaps %xmm1, %xmm0
449 ; SSE2-NEXT: retq
450 ;
451 ; SSE41-LABEL: splatconstant_funnnel_v2i32:
452 ; SSE41: # %bb.0:
453 ; SSE41-NEXT: movdqa %xmm0, %xmm2
454 ; SSE41-NEXT: psrld $28, %xmm2
455 ; SSE41-NEXT: movdqa %xmm0, %xmm1
456 ; SSE41-NEXT: pslld $4, %xmm1
457 ; SSE41-NEXT: por %xmm2, %xmm1
458 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm0[4,5,6,7]
459 ; SSE41-NEXT: movdqa %xmm1, %xmm0
460 ; SSE41-NEXT: retq
461 ;
462 ; AVX1-LABEL: splatconstant_funnnel_v2i32:
463 ; AVX1: # %bb.0:
464 ; AVX1-NEXT: vpsrld $28, %xmm0, %xmm1
465 ; AVX1-NEXT: vpslld $4, %xmm0, %xmm2
466 ; AVX1-NEXT: vpor %xmm1, %xmm2, %xmm1
467 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
468 ; AVX1-NEXT: retq
469 ;
470 ; AVX2-LABEL: splatconstant_funnnel_v2i32:
471 ; AVX2: # %bb.0:
472 ; AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
473 ; AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
474 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
475 ; AVX2-NEXT: retq
476 ;
477 ; AVX512F-LABEL: splatconstant_funnnel_v2i32:
478 ; AVX512F: # %bb.0:
479 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
480 ; AVX512F-NEXT: vprold $4, %zmm0, %zmm0
481 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
482 ; AVX512F-NEXT: vzeroupper
483 ; AVX512F-NEXT: retq
484 ;
485 ; AVX512VL-LABEL: splatconstant_funnnel_v2i32:
486 ; AVX512VL: # %bb.0:
487 ; AVX512VL-NEXT: vprold $4, %xmm0, %xmm0
488 ; AVX512VL-NEXT: retq
489 ;
490 ; AVX512BW-LABEL: splatconstant_funnnel_v2i32:
491 ; AVX512BW: # %bb.0:
492 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
493 ; AVX512BW-NEXT: vprold $4, %zmm0, %zmm0
494 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
495 ; AVX512BW-NEXT: vzeroupper
496 ; AVX512BW-NEXT: retq
497 ;
498 ; AVX512VLBW-LABEL: splatconstant_funnnel_v2i32:
499 ; AVX512VLBW: # %bb.0:
500 ; AVX512VLBW-NEXT: vprold $4, %xmm0, %xmm0
501 ; AVX512VLBW-NEXT: retq
502 ;
503 ; AVX512VBMI2-LABEL: splatconstant_funnnel_v2i32:
504 ; AVX512VBMI2: # %bb.0:
505 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
506 ; AVX512VBMI2-NEXT: vprold $4, %zmm0, %zmm0
507 ; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
508 ; AVX512VBMI2-NEXT: vzeroupper
509 ; AVX512VBMI2-NEXT: retq
510 ;
511 ; AVX512VLVBMI2-LABEL: splatconstant_funnnel_v2i32:
512 ; AVX512VLVBMI2: # %bb.0:
513 ; AVX512VLVBMI2-NEXT: vprold $4, %xmm0, %xmm0
514 ; AVX512VLVBMI2-NEXT: retq
515 ;
516 ; XOP-LABEL: splatconstant_funnnel_v2i32:
517 ; XOP: # %bb.0:
518 ; XOP-NEXT: vprotd $4, %xmm0, %xmm0
519 ; XOP-NEXT: retq
520 ;
521 ; X86-SSE2-LABEL: splatconstant_funnnel_v2i32:
522 ; X86-SSE2: # %bb.0:
523 ; X86-SSE2-NEXT: movdqa %xmm0, %xmm2
524 ; X86-SSE2-NEXT: psrld $28, %xmm2
525 ; X86-SSE2-NEXT: movdqa %xmm0, %xmm1
526 ; X86-SSE2-NEXT: pslld $4, %xmm1
527 ; X86-SSE2-NEXT: por %xmm2, %xmm1
528 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3]
529 ; X86-SSE2-NEXT: movaps %xmm1, %xmm0
530 ; X86-SSE2-NEXT: retl
531 %res = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %x, <2 x i32> <i32 4, i32 4>)
532 ret <2 x i32> %res
533 }