| blob | ac5f158f6f6be9376d42392aa802259f0b09fa6b |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512DQVL
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
12 ;
13 ; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
14 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
16 ;
17 ; Variable Shifts
18 ;
20 define <2 x i32> @var_shift_v2i32(<2 x i32> %a, <2 x i32> %b) nounwind {
21 ; SSE2-LABEL: var_shift_v2i32:
22 ; SSE2: # %bb.0:
23 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
24 ; SSE2-NEXT: movdqa %xmm0, %xmm3
25 ; SSE2-NEXT: psrld %xmm2, %xmm3
26 ; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm1[0,1,1,1,4,5,6,7]
27 ; SSE2-NEXT: movdqa %xmm0, %xmm2
28 ; SSE2-NEXT: psrld %xmm4, %xmm2
29 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
30 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
31 ; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm1[2,3,3,3,4,5,6,7]
32 ; SSE2-NEXT: movdqa %xmm0, %xmm4
33 ; SSE2-NEXT: psrld %xmm3, %xmm4
34 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
35 ; SSE2-NEXT: psrld %xmm1, %xmm0
36 ; SSE2-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm4[1]
37 ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,3],xmm0[0,3]
38 ; SSE2-NEXT: movaps %xmm2, %xmm0
39 ; SSE2-NEXT: retq
40 ;
41 ; SSE41-LABEL: var_shift_v2i32:
42 ; SSE41: # %bb.0:
43 ; SSE41-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
44 ; SSE41-NEXT: movdqa %xmm0, %xmm3
45 ; SSE41-NEXT: psrld %xmm2, %xmm3
46 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
47 ; SSE41-NEXT: pshuflw {{.*#+}} xmm4 = xmm2[2,3,3,3,4,5,6,7]
48 ; SSE41-NEXT: movdqa %xmm0, %xmm5
49 ; SSE41-NEXT: psrld %xmm4, %xmm5
50 ; SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm3[0,1,2,3],xmm5[4,5,6,7]
51 ; SSE41-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
52 ; SSE41-NEXT: movdqa %xmm0, %xmm3
53 ; SSE41-NEXT: psrld %xmm1, %xmm3
54 ; SSE41-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,1,1,1,4,5,6,7]
55 ; SSE41-NEXT: psrld %xmm1, %xmm0
56 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm0[4,5,6,7]
57 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm5[2,3],xmm0[4,5],xmm5[6,7]
58 ; SSE41-NEXT: retq
59 ;
60 ; AVX1-LABEL: var_shift_v2i32:
61 ; AVX1: # %bb.0:
62 ; AVX1-NEXT: vpsrldq {{.*#+}} xmm2 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
63 ; AVX1-NEXT: vpsrld %xmm2, %xmm0, %xmm2
64 ; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm3
65 ; AVX1-NEXT: vpsrld %xmm3, %xmm0, %xmm3
66 ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
67 ; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3
68 ; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm1[2],xmm3[2],xmm1[3],xmm3[3]
69 ; AVX1-NEXT: vpsrld %xmm3, %xmm0, %xmm3
70 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
71 ; AVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0
72 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm3[4,5,6,7]
73 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
74 ; AVX1-NEXT: retq
75 ;
76 ; AVX2-LABEL: var_shift_v2i32:
77 ; AVX2: # %bb.0:
78 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
79 ; AVX2-NEXT: retq
80 ;
81 ; XOPAVX1-LABEL: var_shift_v2i32:
82 ; XOPAVX1: # %bb.0:
83 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
84 ; XOPAVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1
85 ; XOPAVX1-NEXT: vpshld %xmm1, %xmm0, %xmm0
86 ; XOPAVX1-NEXT: retq
87 ;
88 ; XOPAVX2-LABEL: var_shift_v2i32:
89 ; XOPAVX2: # %bb.0:
90 ; XOPAVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
91 ; XOPAVX2-NEXT: retq
92 ;
93 ; AVX512-LABEL: var_shift_v2i32:
94 ; AVX512: # %bb.0:
95 ; AVX512-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
96 ; AVX512-NEXT: retq
97 ;
98 ; AVX512VL-LABEL: var_shift_v2i32:
99 ; AVX512VL: # %bb.0:
100 ; AVX512VL-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
101 ; AVX512VL-NEXT: retq
102 ;
103 ; X86-SSE-LABEL: var_shift_v2i32:
104 ; X86-SSE: # %bb.0:
105 ; X86-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7]
106 ; X86-SSE-NEXT: movdqa %xmm0, %xmm3
107 ; X86-SSE-NEXT: psrld %xmm2, %xmm3
108 ; X86-SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm1[0,1,1,1,4,5,6,7]
109 ; X86-SSE-NEXT: movdqa %xmm0, %xmm2
110 ; X86-SSE-NEXT: psrld %xmm4, %xmm2
111 ; X86-SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
112 ; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
113 ; X86-SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm1[2,3,3,3,4,5,6,7]
114 ; X86-SSE-NEXT: movdqa %xmm0, %xmm4
115 ; X86-SSE-NEXT: psrld %xmm3, %xmm4
116 ; X86-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,1,1,4,5,6,7]
117 ; X86-SSE-NEXT: psrld %xmm1, %xmm0
118 ; X86-SSE-NEXT: punpckhqdq {{.*#+}} xmm0 = xmm0[1],xmm4[1]
119 ; X86-SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,3],xmm0[0,3]
120 ; X86-SSE-NEXT: movaps %xmm2, %xmm0
121 ; X86-SSE-NEXT: retl
122 %shift = lshr <2 x i32> %a, %b
123 ret <2 x i32> %shift
124 }
126 define <4 x i16> @var_shift_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind {
127 ; SSE2-LABEL: var_shift_v4i16:
128 ; SSE2: # %bb.0:
129 ; SSE2-NEXT: psllw $12, %xmm1
130 ; SSE2-NEXT: movdqa %xmm1, %xmm2
131 ; SSE2-NEXT: psraw $15, %xmm2
132 ; SSE2-NEXT: movdqa %xmm2, %xmm3
133 ; SSE2-NEXT: pandn %xmm0, %xmm3
134 ; SSE2-NEXT: psrlw $8, %xmm0
135 ; SSE2-NEXT: pand %xmm2, %xmm0
136 ; SSE2-NEXT: por %xmm3, %xmm0
137 ; SSE2-NEXT: paddw %xmm1, %xmm1
138 ; SSE2-NEXT: movdqa %xmm1, %xmm2
139 ; SSE2-NEXT: psraw $15, %xmm2
140 ; SSE2-NEXT: movdqa %xmm2, %xmm3
141 ; SSE2-NEXT: pandn %xmm0, %xmm3
142 ; SSE2-NEXT: psrlw $4, %xmm0
143 ; SSE2-NEXT: pand %xmm2, %xmm0
144 ; SSE2-NEXT: por %xmm3, %xmm0
145 ; SSE2-NEXT: paddw %xmm1, %xmm1
146 ; SSE2-NEXT: movdqa %xmm1, %xmm2
147 ; SSE2-NEXT: psraw $15, %xmm2
148 ; SSE2-NEXT: movdqa %xmm2, %xmm3
149 ; SSE2-NEXT: pandn %xmm0, %xmm3
150 ; SSE2-NEXT: psrlw $2, %xmm0
151 ; SSE2-NEXT: pand %xmm2, %xmm0
152 ; SSE2-NEXT: por %xmm3, %xmm0
153 ; SSE2-NEXT: paddw %xmm1, %xmm1
154 ; SSE2-NEXT: psraw $15, %xmm1
155 ; SSE2-NEXT: movdqa %xmm1, %xmm2
156 ; SSE2-NEXT: pandn %xmm0, %xmm2
157 ; SSE2-NEXT: psrlw $1, %xmm0
158 ; SSE2-NEXT: pand %xmm1, %xmm0
159 ; SSE2-NEXT: por %xmm2, %xmm0
160 ; SSE2-NEXT: retq
161 ;
162 ; SSE41-LABEL: var_shift_v4i16:
163 ; SSE41: # %bb.0:
164 ; SSE41-NEXT: movdqa %xmm1, %xmm2
165 ; SSE41-NEXT: movdqa %xmm0, %xmm1
166 ; SSE41-NEXT: movdqa %xmm2, %xmm0
167 ; SSE41-NEXT: psllw $12, %xmm0
168 ; SSE41-NEXT: psllw $4, %xmm2
169 ; SSE41-NEXT: por %xmm0, %xmm2
170 ; SSE41-NEXT: movdqa %xmm2, %xmm3
171 ; SSE41-NEXT: paddw %xmm2, %xmm3
172 ; SSE41-NEXT: movdqa %xmm1, %xmm4
173 ; SSE41-NEXT: psrlw $8, %xmm4
174 ; SSE41-NEXT: movdqa %xmm2, %xmm0
175 ; SSE41-NEXT: pblendvb %xmm0, %xmm4, %xmm1
176 ; SSE41-NEXT: movdqa %xmm1, %xmm2
177 ; SSE41-NEXT: psrlw $4, %xmm2
178 ; SSE41-NEXT: movdqa %xmm3, %xmm0
179 ; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
180 ; SSE41-NEXT: movdqa %xmm1, %xmm2
181 ; SSE41-NEXT: psrlw $2, %xmm2
182 ; SSE41-NEXT: paddw %xmm3, %xmm3
183 ; SSE41-NEXT: movdqa %xmm3, %xmm0
184 ; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
185 ; SSE41-NEXT: movdqa %xmm1, %xmm2
186 ; SSE41-NEXT: psrlw $1, %xmm2
187 ; SSE41-NEXT: paddw %xmm3, %xmm3
188 ; SSE41-NEXT: movdqa %xmm3, %xmm0
189 ; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
190 ; SSE41-NEXT: movdqa %xmm1, %xmm0
191 ; SSE41-NEXT: retq
192 ;
193 ; AVX1-LABEL: var_shift_v4i16:
194 ; AVX1: # %bb.0:
195 ; AVX1-NEXT: vpsllw $12, %xmm1, %xmm2
196 ; AVX1-NEXT: vpsllw $4, %xmm1, %xmm1
197 ; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1
198 ; AVX1-NEXT: vpaddw %xmm1, %xmm1, %xmm2
199 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm3
200 ; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0
201 ; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm1
202 ; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
203 ; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm1
204 ; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2
205 ; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
206 ; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm1
207 ; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2
208 ; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
209 ; AVX1-NEXT: retq
210 ;
211 ; AVX2-LABEL: var_shift_v4i16:
212 ; AVX2: # %bb.0:
213 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
214 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
215 ; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
216 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
217 ; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
218 ; AVX2-NEXT: vzeroupper
219 ; AVX2-NEXT: retq
220 ;
221 ; XOP-LABEL: var_shift_v4i16:
222 ; XOP: # %bb.0:
223 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
224 ; XOP-NEXT: vpsubw %xmm1, %xmm2, %xmm1
225 ; XOP-NEXT: vpshlw %xmm1, %xmm0, %xmm0
226 ; XOP-NEXT: retq
227 ;
228 ; AVX512DQ-LABEL: var_shift_v4i16:
229 ; AVX512DQ: # %bb.0:
230 ; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
231 ; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
232 ; AVX512DQ-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
233 ; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0
234 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
235 ; AVX512DQ-NEXT: vzeroupper
236 ; AVX512DQ-NEXT: retq
237 ;
238 ; AVX512BW-LABEL: var_shift_v4i16:
239 ; AVX512BW: # %bb.0:
240 ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
241 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
242 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
243 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
244 ; AVX512BW-NEXT: vzeroupper
245 ; AVX512BW-NEXT: retq
246 ;
247 ; AVX512DQVL-LABEL: var_shift_v4i16:
248 ; AVX512DQVL: # %bb.0:
249 ; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
250 ; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
251 ; AVX512DQVL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
252 ; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm0
253 ; AVX512DQVL-NEXT: vzeroupper
254 ; AVX512DQVL-NEXT: retq
255 ;
256 ; AVX512BWVL-LABEL: var_shift_v4i16:
257 ; AVX512BWVL: # %bb.0:
258 ; AVX512BWVL-NEXT: vpsrlvw %xmm1, %xmm0, %xmm0
259 ; AVX512BWVL-NEXT: retq
260 ;
261 ; X86-SSE-LABEL: var_shift_v4i16:
262 ; X86-SSE: # %bb.0:
263 ; X86-SSE-NEXT: psllw $12, %xmm1
264 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
265 ; X86-SSE-NEXT: psraw $15, %xmm2
266 ; X86-SSE-NEXT: movdqa %xmm2, %xmm3
267 ; X86-SSE-NEXT: pandn %xmm0, %xmm3
268 ; X86-SSE-NEXT: psrlw $8, %xmm0
269 ; X86-SSE-NEXT: pand %xmm2, %xmm0
270 ; X86-SSE-NEXT: por %xmm3, %xmm0
271 ; X86-SSE-NEXT: paddw %xmm1, %xmm1
272 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
273 ; X86-SSE-NEXT: psraw $15, %xmm2
274 ; X86-SSE-NEXT: movdqa %xmm2, %xmm3
275 ; X86-SSE-NEXT: pandn %xmm0, %xmm3
276 ; X86-SSE-NEXT: psrlw $4, %xmm0
277 ; X86-SSE-NEXT: pand %xmm2, %xmm0
278 ; X86-SSE-NEXT: por %xmm3, %xmm0
279 ; X86-SSE-NEXT: paddw %xmm1, %xmm1
280 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
281 ; X86-SSE-NEXT: psraw $15, %xmm2
282 ; X86-SSE-NEXT: movdqa %xmm2, %xmm3
283 ; X86-SSE-NEXT: pandn %xmm0, %xmm3
284 ; X86-SSE-NEXT: psrlw $2, %xmm0
285 ; X86-SSE-NEXT: pand %xmm2, %xmm0
286 ; X86-SSE-NEXT: por %xmm3, %xmm0
287 ; X86-SSE-NEXT: paddw %xmm1, %xmm1
288 ; X86-SSE-NEXT: psraw $15, %xmm1
289 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
290 ; X86-SSE-NEXT: pandn %xmm0, %xmm2
291 ; X86-SSE-NEXT: psrlw $1, %xmm0
292 ; X86-SSE-NEXT: pand %xmm1, %xmm0
293 ; X86-SSE-NEXT: por %xmm2, %xmm0
294 ; X86-SSE-NEXT: retl
295 %shift = lshr <4 x i16> %a, %b
296 ret <4 x i16> %shift
297 }
299 define <2 x i16> @var_shift_v2i16(<2 x i16> %a, <2 x i16> %b) nounwind {
300 ; SSE2-LABEL: var_shift_v2i16:
301 ; SSE2: # %bb.0:
302 ; SSE2-NEXT: psllw $12, %xmm1
303 ; SSE2-NEXT: movdqa %xmm1, %xmm2
304 ; SSE2-NEXT: psraw $15, %xmm2
305 ; SSE2-NEXT: movdqa %xmm2, %xmm3
306 ; SSE2-NEXT: pandn %xmm0, %xmm3
307 ; SSE2-NEXT: psrlw $8, %xmm0
308 ; SSE2-NEXT: pand %xmm2, %xmm0
309 ; SSE2-NEXT: por %xmm3, %xmm0
310 ; SSE2-NEXT: paddw %xmm1, %xmm1
311 ; SSE2-NEXT: movdqa %xmm1, %xmm2
312 ; SSE2-NEXT: psraw $15, %xmm2
313 ; SSE2-NEXT: movdqa %xmm2, %xmm3
314 ; SSE2-NEXT: pandn %xmm0, %xmm3
315 ; SSE2-NEXT: psrlw $4, %xmm0
316 ; SSE2-NEXT: pand %xmm2, %xmm0
317 ; SSE2-NEXT: por %xmm3, %xmm0
318 ; SSE2-NEXT: paddw %xmm1, %xmm1
319 ; SSE2-NEXT: movdqa %xmm1, %xmm2
320 ; SSE2-NEXT: psraw $15, %xmm2
321 ; SSE2-NEXT: movdqa %xmm2, %xmm3
322 ; SSE2-NEXT: pandn %xmm0, %xmm3
323 ; SSE2-NEXT: psrlw $2, %xmm0
324 ; SSE2-NEXT: pand %xmm2, %xmm0
325 ; SSE2-NEXT: por %xmm3, %xmm0
326 ; SSE2-NEXT: paddw %xmm1, %xmm1
327 ; SSE2-NEXT: psraw $15, %xmm1
328 ; SSE2-NEXT: movdqa %xmm1, %xmm2
329 ; SSE2-NEXT: pandn %xmm0, %xmm2
330 ; SSE2-NEXT: psrlw $1, %xmm0
331 ; SSE2-NEXT: pand %xmm1, %xmm0
332 ; SSE2-NEXT: por %xmm2, %xmm0
333 ; SSE2-NEXT: retq
334 ;
335 ; SSE41-LABEL: var_shift_v2i16:
336 ; SSE41: # %bb.0:
337 ; SSE41-NEXT: movdqa %xmm1, %xmm2
338 ; SSE41-NEXT: movdqa %xmm0, %xmm1
339 ; SSE41-NEXT: movdqa %xmm2, %xmm0
340 ; SSE41-NEXT: psllw $12, %xmm0
341 ; SSE41-NEXT: psllw $4, %xmm2
342 ; SSE41-NEXT: por %xmm0, %xmm2
343 ; SSE41-NEXT: movdqa %xmm2, %xmm3
344 ; SSE41-NEXT: paddw %xmm2, %xmm3
345 ; SSE41-NEXT: movdqa %xmm1, %xmm4
346 ; SSE41-NEXT: psrlw $8, %xmm4
347 ; SSE41-NEXT: movdqa %xmm2, %xmm0
348 ; SSE41-NEXT: pblendvb %xmm0, %xmm4, %xmm1
349 ; SSE41-NEXT: movdqa %xmm1, %xmm2
350 ; SSE41-NEXT: psrlw $4, %xmm2
351 ; SSE41-NEXT: movdqa %xmm3, %xmm0
352 ; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
353 ; SSE41-NEXT: movdqa %xmm1, %xmm2
354 ; SSE41-NEXT: psrlw $2, %xmm2
355 ; SSE41-NEXT: paddw %xmm3, %xmm3
356 ; SSE41-NEXT: movdqa %xmm3, %xmm0
357 ; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
358 ; SSE41-NEXT: movdqa %xmm1, %xmm2
359 ; SSE41-NEXT: psrlw $1, %xmm2
360 ; SSE41-NEXT: paddw %xmm3, %xmm3
361 ; SSE41-NEXT: movdqa %xmm3, %xmm0
362 ; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1
363 ; SSE41-NEXT: movdqa %xmm1, %xmm0
364 ; SSE41-NEXT: retq
365 ;
366 ; AVX1-LABEL: var_shift_v2i16:
367 ; AVX1: # %bb.0:
368 ; AVX1-NEXT: vpsllw $12, %xmm1, %xmm2
369 ; AVX1-NEXT: vpsllw $4, %xmm1, %xmm1
370 ; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1
371 ; AVX1-NEXT: vpaddw %xmm1, %xmm1, %xmm2
372 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm3
373 ; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0
374 ; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm1
375 ; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
376 ; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm1
377 ; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2
378 ; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
379 ; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm1
380 ; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2
381 ; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
382 ; AVX1-NEXT: retq
383 ;
384 ; AVX2-LABEL: var_shift_v2i16:
385 ; AVX2: # %bb.0:
386 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
387 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
388 ; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
389 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
390 ; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
391 ; AVX2-NEXT: vzeroupper
392 ; AVX2-NEXT: retq
393 ;
394 ; XOP-LABEL: var_shift_v2i16:
395 ; XOP: # %bb.0:
396 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
397 ; XOP-NEXT: vpsubw %xmm1, %xmm2, %xmm1
398 ; XOP-NEXT: vpshlw %xmm1, %xmm0, %xmm0
399 ; XOP-NEXT: retq
400 ;
401 ; AVX512DQ-LABEL: var_shift_v2i16:
402 ; AVX512DQ: # %bb.0:
403 ; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
404 ; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
405 ; AVX512DQ-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
406 ; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0
407 ; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
408 ; AVX512DQ-NEXT: vzeroupper
409 ; AVX512DQ-NEXT: retq
410 ;
411 ; AVX512BW-LABEL: var_shift_v2i16:
412 ; AVX512BW: # %bb.0:
413 ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
414 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
415 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
416 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
417 ; AVX512BW-NEXT: vzeroupper
418 ; AVX512BW-NEXT: retq
419 ;
420 ; AVX512DQVL-LABEL: var_shift_v2i16:
421 ; AVX512DQVL: # %bb.0:
422 ; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
423 ; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
424 ; AVX512DQVL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
425 ; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm0
426 ; AVX512DQVL-NEXT: vzeroupper
427 ; AVX512DQVL-NEXT: retq
428 ;
429 ; AVX512BWVL-LABEL: var_shift_v2i16:
430 ; AVX512BWVL: # %bb.0:
431 ; AVX512BWVL-NEXT: vpsrlvw %xmm1, %xmm0, %xmm0
432 ; AVX512BWVL-NEXT: retq
433 ;
434 ; X86-SSE-LABEL: var_shift_v2i16:
435 ; X86-SSE: # %bb.0:
436 ; X86-SSE-NEXT: psllw $12, %xmm1
437 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
438 ; X86-SSE-NEXT: psraw $15, %xmm2
439 ; X86-SSE-NEXT: movdqa %xmm2, %xmm3
440 ; X86-SSE-NEXT: pandn %xmm0, %xmm3
441 ; X86-SSE-NEXT: psrlw $8, %xmm0
442 ; X86-SSE-NEXT: pand %xmm2, %xmm0
443 ; X86-SSE-NEXT: por %xmm3, %xmm0
444 ; X86-SSE-NEXT: paddw %xmm1, %xmm1
445 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
446 ; X86-SSE-NEXT: psraw $15, %xmm2
447 ; X86-SSE-NEXT: movdqa %xmm2, %xmm3
448 ; X86-SSE-NEXT: pandn %xmm0, %xmm3
449 ; X86-SSE-NEXT: psrlw $4, %xmm0
450 ; X86-SSE-NEXT: pand %xmm2, %xmm0
451 ; X86-SSE-NEXT: por %xmm3, %xmm0
452 ; X86-SSE-NEXT: paddw %xmm1, %xmm1
453 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
454 ; X86-SSE-NEXT: psraw $15, %xmm2
455 ; X86-SSE-NEXT: movdqa %xmm2, %xmm3
456 ; X86-SSE-NEXT: pandn %xmm0, %xmm3
457 ; X86-SSE-NEXT: psrlw $2, %xmm0
458 ; X86-SSE-NEXT: pand %xmm2, %xmm0
459 ; X86-SSE-NEXT: por %xmm3, %xmm0
460 ; X86-SSE-NEXT: paddw %xmm1, %xmm1
461 ; X86-SSE-NEXT: psraw $15, %xmm1
462 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
463 ; X86-SSE-NEXT: pandn %xmm0, %xmm2
464 ; X86-SSE-NEXT: psrlw $1, %xmm0
465 ; X86-SSE-NEXT: pand %xmm1, %xmm0
466 ; X86-SSE-NEXT: por %xmm2, %xmm0
467 ; X86-SSE-NEXT: retl
468 %shift = lshr <2 x i16> %a, %b
469 ret <2 x i16> %shift
470 }
472 define <8 x i8> @var_shift_v8i8(<8 x i8> %a, <8 x i8> %b) nounwind {
473 ; SSE2-LABEL: var_shift_v8i8:
474 ; SSE2: # %bb.0:
475 ; SSE2-NEXT: psllw $5, %xmm1
476 ; SSE2-NEXT: pxor %xmm2, %xmm2
477 ; SSE2-NEXT: pxor %xmm3, %xmm3
478 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
479 ; SSE2-NEXT: movdqa %xmm3, %xmm4
480 ; SSE2-NEXT: pandn %xmm0, %xmm4
481 ; SSE2-NEXT: psrlw $4, %xmm0
482 ; SSE2-NEXT: pand %xmm3, %xmm0
483 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
484 ; SSE2-NEXT: por %xmm4, %xmm0
485 ; SSE2-NEXT: paddb %xmm1, %xmm1
486 ; SSE2-NEXT: pxor %xmm3, %xmm3
487 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
488 ; SSE2-NEXT: movdqa %xmm3, %xmm4
489 ; SSE2-NEXT: pandn %xmm0, %xmm4
490 ; SSE2-NEXT: psrlw $2, %xmm0
491 ; SSE2-NEXT: pand %xmm3, %xmm0
492 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
493 ; SSE2-NEXT: por %xmm4, %xmm0
494 ; SSE2-NEXT: paddb %xmm1, %xmm1
495 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm2
496 ; SSE2-NEXT: movdqa %xmm2, %xmm1
497 ; SSE2-NEXT: pandn %xmm0, %xmm1
498 ; SSE2-NEXT: psrlw $1, %xmm0
499 ; SSE2-NEXT: pand %xmm2, %xmm0
500 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
501 ; SSE2-NEXT: por %xmm1, %xmm0
502 ; SSE2-NEXT: retq
503 ;
504 ; SSE41-LABEL: var_shift_v8i8:
505 ; SSE41: # %bb.0:
506 ; SSE41-NEXT: movdqa %xmm0, %xmm2
507 ; SSE41-NEXT: psllw $5, %xmm1
508 ; SSE41-NEXT: movdqa %xmm0, %xmm3
509 ; SSE41-NEXT: psrlw $4, %xmm3
510 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
511 ; SSE41-NEXT: movdqa %xmm1, %xmm0
512 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
513 ; SSE41-NEXT: movdqa %xmm2, %xmm3
514 ; SSE41-NEXT: psrlw $2, %xmm3
515 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
516 ; SSE41-NEXT: paddb %xmm1, %xmm1
517 ; SSE41-NEXT: movdqa %xmm1, %xmm0
518 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
519 ; SSE41-NEXT: movdqa %xmm2, %xmm3
520 ; SSE41-NEXT: psrlw $1, %xmm3
521 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
522 ; SSE41-NEXT: paddb %xmm1, %xmm1
523 ; SSE41-NEXT: movdqa %xmm1, %xmm0
524 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
525 ; SSE41-NEXT: movdqa %xmm2, %xmm0
526 ; SSE41-NEXT: retq
527 ;
528 ; AVX-LABEL: var_shift_v8i8:
529 ; AVX: # %bb.0:
530 ; AVX-NEXT: vpsllw $5, %xmm1, %xmm1
531 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm2
532 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
533 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
534 ; AVX-NEXT: vpsrlw $2, %xmm0, %xmm2
535 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
536 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
537 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
538 ; AVX-NEXT: vpsrlw $1, %xmm0, %xmm2
539 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
540 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
541 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
542 ; AVX-NEXT: retq
543 ;
544 ; XOP-LABEL: var_shift_v8i8:
545 ; XOP: # %bb.0:
546 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
547 ; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1
548 ; XOP-NEXT: vpshlb %xmm1, %xmm0, %xmm0
549 ; XOP-NEXT: retq
550 ;
551 ; AVX512DQ-LABEL: var_shift_v8i8:
552 ; AVX512DQ: # %bb.0:
553 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
554 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
555 ; AVX512DQ-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
556 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
557 ; AVX512DQ-NEXT: vzeroupper
558 ; AVX512DQ-NEXT: retq
559 ;
560 ; AVX512BW-LABEL: var_shift_v8i8:
561 ; AVX512BW: # %bb.0:
562 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
563 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
564 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
565 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
566 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
567 ; AVX512BW-NEXT: vzeroupper
568 ; AVX512BW-NEXT: retq
569 ;
570 ; AVX512DQVL-LABEL: var_shift_v8i8:
571 ; AVX512DQVL: # %bb.0:
572 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
573 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
574 ; AVX512DQVL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
575 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
576 ; AVX512DQVL-NEXT: vzeroupper
577 ; AVX512DQVL-NEXT: retq
578 ;
579 ; AVX512BWVL-LABEL: var_shift_v8i8:
580 ; AVX512BWVL: # %bb.0:
581 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
582 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
583 ; AVX512BWVL-NEXT: vpsrlvw %ymm1, %ymm0, %ymm0
584 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
585 ; AVX512BWVL-NEXT: vzeroupper
586 ; AVX512BWVL-NEXT: retq
587 ;
588 ; X86-SSE-LABEL: var_shift_v8i8:
589 ; X86-SSE: # %bb.0:
590 ; X86-SSE-NEXT: psllw $5, %xmm1
591 ; X86-SSE-NEXT: pxor %xmm2, %xmm2
592 ; X86-SSE-NEXT: pxor %xmm3, %xmm3
593 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm3
594 ; X86-SSE-NEXT: movdqa %xmm3, %xmm4
595 ; X86-SSE-NEXT: pandn %xmm0, %xmm4
596 ; X86-SSE-NEXT: psrlw $4, %xmm0
597 ; X86-SSE-NEXT: pand %xmm3, %xmm0
598 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
599 ; X86-SSE-NEXT: por %xmm4, %xmm0
600 ; X86-SSE-NEXT: paddb %xmm1, %xmm1
601 ; X86-SSE-NEXT: pxor %xmm3, %xmm3
602 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm3
603 ; X86-SSE-NEXT: movdqa %xmm3, %xmm4
604 ; X86-SSE-NEXT: pandn %xmm0, %xmm4
605 ; X86-SSE-NEXT: psrlw $2, %xmm0
606 ; X86-SSE-NEXT: pand %xmm3, %xmm0
607 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
608 ; X86-SSE-NEXT: por %xmm4, %xmm0
609 ; X86-SSE-NEXT: paddb %xmm1, %xmm1
610 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm2
611 ; X86-SSE-NEXT: movdqa %xmm2, %xmm1
612 ; X86-SSE-NEXT: pandn %xmm0, %xmm1
613 ; X86-SSE-NEXT: psrlw $1, %xmm0
614 ; X86-SSE-NEXT: pand %xmm2, %xmm0
615 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
616 ; X86-SSE-NEXT: por %xmm1, %xmm0
617 ; X86-SSE-NEXT: retl
618 %shift = lshr <8 x i8> %a, %b
619 ret <8 x i8> %shift
620 }
622 define <4 x i8> @var_shift_v4i8(<4 x i8> %a, <4 x i8> %b) nounwind {
623 ; SSE2-LABEL: var_shift_v4i8:
624 ; SSE2: # %bb.0:
625 ; SSE2-NEXT: psllw $5, %xmm1
626 ; SSE2-NEXT: pxor %xmm2, %xmm2
627 ; SSE2-NEXT: pxor %xmm3, %xmm3
628 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
629 ; SSE2-NEXT: movdqa %xmm3, %xmm4
630 ; SSE2-NEXT: pandn %xmm0, %xmm4
631 ; SSE2-NEXT: psrlw $4, %xmm0
632 ; SSE2-NEXT: pand %xmm3, %xmm0
633 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
634 ; SSE2-NEXT: por %xmm4, %xmm0
635 ; SSE2-NEXT: paddb %xmm1, %xmm1
636 ; SSE2-NEXT: pxor %xmm3, %xmm3
637 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
638 ; SSE2-NEXT: movdqa %xmm3, %xmm4
639 ; SSE2-NEXT: pandn %xmm0, %xmm4
640 ; SSE2-NEXT: psrlw $2, %xmm0
641 ; SSE2-NEXT: pand %xmm3, %xmm0
642 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
643 ; SSE2-NEXT: por %xmm4, %xmm0
644 ; SSE2-NEXT: paddb %xmm1, %xmm1
645 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm2
646 ; SSE2-NEXT: movdqa %xmm2, %xmm1
647 ; SSE2-NEXT: pandn %xmm0, %xmm1
648 ; SSE2-NEXT: psrlw $1, %xmm0
649 ; SSE2-NEXT: pand %xmm2, %xmm0
650 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
651 ; SSE2-NEXT: por %xmm1, %xmm0
652 ; SSE2-NEXT: retq
653 ;
654 ; SSE41-LABEL: var_shift_v4i8:
655 ; SSE41: # %bb.0:
656 ; SSE41-NEXT: movdqa %xmm0, %xmm2
657 ; SSE41-NEXT: psllw $5, %xmm1
658 ; SSE41-NEXT: movdqa %xmm0, %xmm3
659 ; SSE41-NEXT: psrlw $4, %xmm3
660 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
661 ; SSE41-NEXT: movdqa %xmm1, %xmm0
662 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
663 ; SSE41-NEXT: movdqa %xmm2, %xmm3
664 ; SSE41-NEXT: psrlw $2, %xmm3
665 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
666 ; SSE41-NEXT: paddb %xmm1, %xmm1
667 ; SSE41-NEXT: movdqa %xmm1, %xmm0
668 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
669 ; SSE41-NEXT: movdqa %xmm2, %xmm3
670 ; SSE41-NEXT: psrlw $1, %xmm3
671 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
672 ; SSE41-NEXT: paddb %xmm1, %xmm1
673 ; SSE41-NEXT: movdqa %xmm1, %xmm0
674 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
675 ; SSE41-NEXT: movdqa %xmm2, %xmm0
676 ; SSE41-NEXT: retq
677 ;
678 ; AVX-LABEL: var_shift_v4i8:
679 ; AVX: # %bb.0:
680 ; AVX-NEXT: vpsllw $5, %xmm1, %xmm1
681 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm2
682 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
683 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
684 ; AVX-NEXT: vpsrlw $2, %xmm0, %xmm2
685 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
686 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
687 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
688 ; AVX-NEXT: vpsrlw $1, %xmm0, %xmm2
689 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
690 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
691 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
692 ; AVX-NEXT: retq
693 ;
694 ; XOP-LABEL: var_shift_v4i8:
695 ; XOP: # %bb.0:
696 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
697 ; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1
698 ; XOP-NEXT: vpshlb %xmm1, %xmm0, %xmm0
699 ; XOP-NEXT: retq
700 ;
701 ; AVX512DQ-LABEL: var_shift_v4i8:
702 ; AVX512DQ: # %bb.0:
703 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
704 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
705 ; AVX512DQ-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
706 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
707 ; AVX512DQ-NEXT: vzeroupper
708 ; AVX512DQ-NEXT: retq
709 ;
710 ; AVX512BW-LABEL: var_shift_v4i8:
711 ; AVX512BW: # %bb.0:
712 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
713 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
714 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
715 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
716 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
717 ; AVX512BW-NEXT: vzeroupper
718 ; AVX512BW-NEXT: retq
719 ;
720 ; AVX512DQVL-LABEL: var_shift_v4i8:
721 ; AVX512DQVL: # %bb.0:
722 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
723 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
724 ; AVX512DQVL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
725 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
726 ; AVX512DQVL-NEXT: vzeroupper
727 ; AVX512DQVL-NEXT: retq
728 ;
729 ; AVX512BWVL-LABEL: var_shift_v4i8:
730 ; AVX512BWVL: # %bb.0:
731 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
732 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
733 ; AVX512BWVL-NEXT: vpsrlvw %ymm1, %ymm0, %ymm0
734 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
735 ; AVX512BWVL-NEXT: vzeroupper
736 ; AVX512BWVL-NEXT: retq
737 ;
738 ; X86-SSE-LABEL: var_shift_v4i8:
739 ; X86-SSE: # %bb.0:
740 ; X86-SSE-NEXT: psllw $5, %xmm1
741 ; X86-SSE-NEXT: pxor %xmm2, %xmm2
742 ; X86-SSE-NEXT: pxor %xmm3, %xmm3
743 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm3
744 ; X86-SSE-NEXT: movdqa %xmm3, %xmm4
745 ; X86-SSE-NEXT: pandn %xmm0, %xmm4
746 ; X86-SSE-NEXT: psrlw $4, %xmm0
747 ; X86-SSE-NEXT: pand %xmm3, %xmm0
748 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
749 ; X86-SSE-NEXT: por %xmm4, %xmm0
750 ; X86-SSE-NEXT: paddb %xmm1, %xmm1
751 ; X86-SSE-NEXT: pxor %xmm3, %xmm3
752 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm3
753 ; X86-SSE-NEXT: movdqa %xmm3, %xmm4
754 ; X86-SSE-NEXT: pandn %xmm0, %xmm4
755 ; X86-SSE-NEXT: psrlw $2, %xmm0
756 ; X86-SSE-NEXT: pand %xmm3, %xmm0
757 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
758 ; X86-SSE-NEXT: por %xmm4, %xmm0
759 ; X86-SSE-NEXT: paddb %xmm1, %xmm1
760 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm2
761 ; X86-SSE-NEXT: movdqa %xmm2, %xmm1
762 ; X86-SSE-NEXT: pandn %xmm0, %xmm1
763 ; X86-SSE-NEXT: psrlw $1, %xmm0
764 ; X86-SSE-NEXT: pand %xmm2, %xmm0
765 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
766 ; X86-SSE-NEXT: por %xmm1, %xmm0
767 ; X86-SSE-NEXT: retl
768 %shift = lshr <4 x i8> %a, %b
769 ret <4 x i8> %shift
770 }
772 define <2 x i8> @var_shift_v2i8(<2 x i8> %a, <2 x i8> %b) nounwind {
773 ; SSE2-LABEL: var_shift_v2i8:
774 ; SSE2: # %bb.0:
775 ; SSE2-NEXT: psllw $5, %xmm1
776 ; SSE2-NEXT: pxor %xmm2, %xmm2
777 ; SSE2-NEXT: pxor %xmm3, %xmm3
778 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
779 ; SSE2-NEXT: movdqa %xmm3, %xmm4
780 ; SSE2-NEXT: pandn %xmm0, %xmm4
781 ; SSE2-NEXT: psrlw $4, %xmm0
782 ; SSE2-NEXT: pand %xmm3, %xmm0
783 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
784 ; SSE2-NEXT: por %xmm4, %xmm0
785 ; SSE2-NEXT: paddb %xmm1, %xmm1
786 ; SSE2-NEXT: pxor %xmm3, %xmm3
787 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm3
788 ; SSE2-NEXT: movdqa %xmm3, %xmm4
789 ; SSE2-NEXT: pandn %xmm0, %xmm4
790 ; SSE2-NEXT: psrlw $2, %xmm0
791 ; SSE2-NEXT: pand %xmm3, %xmm0
792 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
793 ; SSE2-NEXT: por %xmm4, %xmm0
794 ; SSE2-NEXT: paddb %xmm1, %xmm1
795 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm2
796 ; SSE2-NEXT: movdqa %xmm2, %xmm1
797 ; SSE2-NEXT: pandn %xmm0, %xmm1
798 ; SSE2-NEXT: psrlw $1, %xmm0
799 ; SSE2-NEXT: pand %xmm2, %xmm0
800 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
801 ; SSE2-NEXT: por %xmm1, %xmm0
802 ; SSE2-NEXT: retq
803 ;
804 ; SSE41-LABEL: var_shift_v2i8:
805 ; SSE41: # %bb.0:
806 ; SSE41-NEXT: movdqa %xmm0, %xmm2
807 ; SSE41-NEXT: psllw $5, %xmm1
808 ; SSE41-NEXT: movdqa %xmm0, %xmm3
809 ; SSE41-NEXT: psrlw $4, %xmm3
810 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
811 ; SSE41-NEXT: movdqa %xmm1, %xmm0
812 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
813 ; SSE41-NEXT: movdqa %xmm2, %xmm3
814 ; SSE41-NEXT: psrlw $2, %xmm3
815 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
816 ; SSE41-NEXT: paddb %xmm1, %xmm1
817 ; SSE41-NEXT: movdqa %xmm1, %xmm0
818 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
819 ; SSE41-NEXT: movdqa %xmm2, %xmm3
820 ; SSE41-NEXT: psrlw $1, %xmm3
821 ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
822 ; SSE41-NEXT: paddb %xmm1, %xmm1
823 ; SSE41-NEXT: movdqa %xmm1, %xmm0
824 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
825 ; SSE41-NEXT: movdqa %xmm2, %xmm0
826 ; SSE41-NEXT: retq
827 ;
828 ; AVX-LABEL: var_shift_v2i8:
829 ; AVX: # %bb.0:
830 ; AVX-NEXT: vpsllw $5, %xmm1, %xmm1
831 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm2
832 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
833 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
834 ; AVX-NEXT: vpsrlw $2, %xmm0, %xmm2
835 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
836 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
837 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
838 ; AVX-NEXT: vpsrlw $1, %xmm0, %xmm2
839 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
840 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
841 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
842 ; AVX-NEXT: retq
843 ;
844 ; XOP-LABEL: var_shift_v2i8:
845 ; XOP: # %bb.0:
846 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
847 ; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1
848 ; XOP-NEXT: vpshlb %xmm1, %xmm0, %xmm0
849 ; XOP-NEXT: retq
850 ;
851 ; AVX512DQ-LABEL: var_shift_v2i8:
852 ; AVX512DQ: # %bb.0:
853 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
854 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
855 ; AVX512DQ-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
856 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
857 ; AVX512DQ-NEXT: vzeroupper
858 ; AVX512DQ-NEXT: retq
859 ;
860 ; AVX512BW-LABEL: var_shift_v2i8:
861 ; AVX512BW: # %bb.0:
862 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
863 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
864 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
865 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
866 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
867 ; AVX512BW-NEXT: vzeroupper
868 ; AVX512BW-NEXT: retq
869 ;
870 ; AVX512DQVL-LABEL: var_shift_v2i8:
871 ; AVX512DQVL: # %bb.0:
872 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
873 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
874 ; AVX512DQVL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0
875 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
876 ; AVX512DQVL-NEXT: vzeroupper
877 ; AVX512DQVL-NEXT: retq
878 ;
879 ; AVX512BWVL-LABEL: var_shift_v2i8:
880 ; AVX512BWVL: # %bb.0:
881 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
882 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
883 ; AVX512BWVL-NEXT: vpsrlvw %ymm1, %ymm0, %ymm0
884 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
885 ; AVX512BWVL-NEXT: vzeroupper
886 ; AVX512BWVL-NEXT: retq
887 ;
888 ; X86-SSE-LABEL: var_shift_v2i8:
889 ; X86-SSE: # %bb.0:
890 ; X86-SSE-NEXT: psllw $5, %xmm1
891 ; X86-SSE-NEXT: pxor %xmm2, %xmm2
892 ; X86-SSE-NEXT: pxor %xmm3, %xmm3
893 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm3
894 ; X86-SSE-NEXT: movdqa %xmm3, %xmm4
895 ; X86-SSE-NEXT: pandn %xmm0, %xmm4
896 ; X86-SSE-NEXT: psrlw $4, %xmm0
897 ; X86-SSE-NEXT: pand %xmm3, %xmm0
898 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
899 ; X86-SSE-NEXT: por %xmm4, %xmm0
900 ; X86-SSE-NEXT: paddb %xmm1, %xmm1
901 ; X86-SSE-NEXT: pxor %xmm3, %xmm3
902 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm3
903 ; X86-SSE-NEXT: movdqa %xmm3, %xmm4
904 ; X86-SSE-NEXT: pandn %xmm0, %xmm4
905 ; X86-SSE-NEXT: psrlw $2, %xmm0
906 ; X86-SSE-NEXT: pand %xmm3, %xmm0
907 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
908 ; X86-SSE-NEXT: por %xmm4, %xmm0
909 ; X86-SSE-NEXT: paddb %xmm1, %xmm1
910 ; X86-SSE-NEXT: pcmpgtb %xmm1, %xmm2
911 ; X86-SSE-NEXT: movdqa %xmm2, %xmm1
912 ; X86-SSE-NEXT: pandn %xmm0, %xmm1
913 ; X86-SSE-NEXT: psrlw $1, %xmm0
914 ; X86-SSE-NEXT: pand %xmm2, %xmm0
915 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
916 ; X86-SSE-NEXT: por %xmm1, %xmm0
917 ; X86-SSE-NEXT: retl
918 %shift = lshr <2 x i8> %a, %b
919 ret <2 x i8> %shift
920 }
922 ;
923 ; Uniform Variable Shifts
924 ;
926 define <2 x i32> @splatvar_shift_v2i32(<2 x i32> %a, <2 x i32> %b) nounwind {
927 ; SSE2-LABEL: splatvar_shift_v2i32:
928 ; SSE2: # %bb.0:
929 ; SSE2-NEXT: xorps %xmm2, %xmm2
930 ; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
931 ; SSE2-NEXT: psrld %xmm2, %xmm0
932 ; SSE2-NEXT: retq
933 ;
934 ; SSE41-LABEL: splatvar_shift_v2i32:
935 ; SSE41: # %bb.0:
936 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
937 ; SSE41-NEXT: psrld %xmm1, %xmm0
938 ; SSE41-NEXT: retq
939 ;
940 ; AVX-LABEL: splatvar_shift_v2i32:
941 ; AVX: # %bb.0:
942 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
943 ; AVX-NEXT: vpsrld %xmm1, %xmm0, %xmm0
944 ; AVX-NEXT: retq
945 ;
946 ; XOP-LABEL: splatvar_shift_v2i32:
947 ; XOP: # %bb.0:
948 ; XOP-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
949 ; XOP-NEXT: vpsrld %xmm1, %xmm0, %xmm0
950 ; XOP-NEXT: retq
951 ;
952 ; AVX512-LABEL: splatvar_shift_v2i32:
953 ; AVX512: # %bb.0:
954 ; AVX512-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
955 ; AVX512-NEXT: vpsrld %xmm1, %xmm0, %xmm0
956 ; AVX512-NEXT: retq
957 ;
958 ; AVX512VL-LABEL: splatvar_shift_v2i32:
959 ; AVX512VL: # %bb.0:
960 ; AVX512VL-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
961 ; AVX512VL-NEXT: vpsrld %xmm1, %xmm0, %xmm0
962 ; AVX512VL-NEXT: retq
963 ;
964 ; X86-SSE-LABEL: splatvar_shift_v2i32:
965 ; X86-SSE: # %bb.0:
966 ; X86-SSE-NEXT: xorps %xmm2, %xmm2
967 ; X86-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
968 ; X86-SSE-NEXT: psrld %xmm2, %xmm0
969 ; X86-SSE-NEXT: retl
970 %splat = shufflevector <2 x i32> %b, <2 x i32> undef, <2 x i32> zeroinitializer
971 %shift = lshr <2 x i32> %a, %splat
972 ret <2 x i32> %shift
973 }
975 define <4 x i16> @splatvar_shift_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind {
976 ; SSE2-LABEL: splatvar_shift_v4i16:
977 ; SSE2: # %bb.0:
978 ; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
979 ; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
980 ; SSE2-NEXT: psrlw %xmm1, %xmm0
981 ; SSE2-NEXT: retq
982 ;
983 ; SSE41-LABEL: splatvar_shift_v4i16:
984 ; SSE41: # %bb.0:
985 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
986 ; SSE41-NEXT: psrlw %xmm1, %xmm0
987 ; SSE41-NEXT: retq
988 ;
989 ; AVX-LABEL: splatvar_shift_v4i16:
990 ; AVX: # %bb.0:
991 ; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
992 ; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
993 ; AVX-NEXT: retq
994 ;
995 ; XOP-LABEL: splatvar_shift_v4i16:
996 ; XOP: # %bb.0:
997 ; XOP-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
998 ; XOP-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
999 ; XOP-NEXT: retq
1000 ;
1001 ; AVX512-LABEL: splatvar_shift_v4i16:
1002 ; AVX512: # %bb.0:
1003 ; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1004 ; AVX512-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1005 ; AVX512-NEXT: retq
1006 ;
1007 ; AVX512VL-LABEL: splatvar_shift_v4i16:
1008 ; AVX512VL: # %bb.0:
1009 ; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1010 ; AVX512VL-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1011 ; AVX512VL-NEXT: retq
1012 ;
1013 ; X86-SSE-LABEL: splatvar_shift_v4i16:
1014 ; X86-SSE: # %bb.0:
1015 ; X86-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
1016 ; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1017 ; X86-SSE-NEXT: psrlw %xmm1, %xmm0
1018 ; X86-SSE-NEXT: retl
1019 %splat = shufflevector <4 x i16> %b, <4 x i16> undef, <4 x i32> zeroinitializer
1020 %shift = lshr <4 x i16> %a, %splat
1021 ret <4 x i16> %shift
1022 }
1024 define <2 x i16> @splatvar_shift_v2i16(<2 x i16> %a, <2 x i16> %b) nounwind {
1025 ; SSE2-LABEL: splatvar_shift_v2i16:
1026 ; SSE2: # %bb.0:
1027 ; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
1028 ; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1029 ; SSE2-NEXT: psrlw %xmm1, %xmm0
1030 ; SSE2-NEXT: retq
1031 ;
1032 ; SSE41-LABEL: splatvar_shift_v2i16:
1033 ; SSE41: # %bb.0:
1034 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1035 ; SSE41-NEXT: psrlw %xmm1, %xmm0
1036 ; SSE41-NEXT: retq
1037 ;
1038 ; AVX-LABEL: splatvar_shift_v2i16:
1039 ; AVX: # %bb.0:
1040 ; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1041 ; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1042 ; AVX-NEXT: retq
1043 ;
1044 ; XOP-LABEL: splatvar_shift_v2i16:
1045 ; XOP: # %bb.0:
1046 ; XOP-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1047 ; XOP-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1048 ; XOP-NEXT: retq
1049 ;
1050 ; AVX512-LABEL: splatvar_shift_v2i16:
1051 ; AVX512: # %bb.0:
1052 ; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1053 ; AVX512-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1054 ; AVX512-NEXT: retq
1055 ;
1056 ; AVX512VL-LABEL: splatvar_shift_v2i16:
1057 ; AVX512VL: # %bb.0:
1058 ; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1059 ; AVX512VL-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1060 ; AVX512VL-NEXT: retq
1061 ;
1062 ; X86-SSE-LABEL: splatvar_shift_v2i16:
1063 ; X86-SSE: # %bb.0:
1064 ; X86-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
1065 ; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1066 ; X86-SSE-NEXT: psrlw %xmm1, %xmm0
1067 ; X86-SSE-NEXT: retl
1068 %splat = shufflevector <2 x i16> %b, <2 x i16> undef, <2 x i32> zeroinitializer
1069 %shift = lshr <2 x i16> %a, %splat
1070 ret <2 x i16> %shift
1071 }
1073 define <8 x i8> @splatvar_shift_v8i8(<8 x i8> %a, <8 x i8> %b) nounwind {
1074 ; SSE2-LABEL: splatvar_shift_v8i8:
1075 ; SSE2: # %bb.0:
1076 ; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0]
1077 ; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1078 ; SSE2-NEXT: psrlw %xmm1, %xmm0
1079 ; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
1080 ; SSE2-NEXT: psrlw %xmm1, %xmm2
1081 ; SSE2-NEXT: psrlw $8, %xmm2
1082 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1083 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,0,0,0,4,5,6,7]
1084 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1085 ; SSE2-NEXT: pand %xmm1, %xmm0
1086 ; SSE2-NEXT: retq
1087 ;
1088 ; SSE41-LABEL: splatvar_shift_v8i8:
1089 ; SSE41: # %bb.0:
1090 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1091 ; SSE41-NEXT: psrlw %xmm1, %xmm0
1092 ; SSE41-NEXT: pcmpeqd %xmm2, %xmm2
1093 ; SSE41-NEXT: psrlw %xmm1, %xmm2
1094 ; SSE41-NEXT: pshufb {{.*#+}} xmm2 = xmm2[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1095 ; SSE41-NEXT: pand %xmm2, %xmm0
1096 ; SSE41-NEXT: retq
1097 ;
1098 ; AVX1-LABEL: splatvar_shift_v8i8:
1099 ; AVX1: # %bb.0:
1100 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1101 ; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1102 ; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
1103 ; AVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
1104 ; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1105 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
1106 ; AVX1-NEXT: retq
1107 ;
1108 ; AVX2-LABEL: splatvar_shift_v8i8:
1109 ; AVX2: # %bb.0:
1110 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1111 ; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1112 ; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
1113 ; AVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
1114 ; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1
1115 ; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1116 ; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
1117 ; AVX2-NEXT: retq
1118 ;
1119 ; XOPAVX1-LABEL: splatvar_shift_v8i8:
1120 ; XOPAVX1: # %bb.0:
1121 ; XOPAVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1122 ; XOPAVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
1123 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1124 ; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1125 ; XOPAVX1-NEXT: vpshlb %xmm1, %xmm0, %xmm0
1126 ; XOPAVX1-NEXT: retq
1127 ;
1128 ; XOPAVX2-LABEL: splatvar_shift_v8i8:
1129 ; XOPAVX2: # %bb.0:
1130 ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1131 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1132 ; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1133 ; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0
1134 ; XOPAVX2-NEXT: retq
1135 ;
1136 ; AVX512DQ-LABEL: splatvar_shift_v8i8:
1137 ; AVX512DQ: # %bb.0:
1138 ; AVX512DQ-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1139 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1140 ; AVX512DQ-NEXT: vpsrld %xmm1, %zmm0, %zmm0
1141 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
1142 ; AVX512DQ-NEXT: vzeroupper
1143 ; AVX512DQ-NEXT: retq
1144 ;
1145 ; AVX512BW-LABEL: splatvar_shift_v8i8:
1146 ; AVX512BW: # %bb.0:
1147 ; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1148 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1149 ; AVX512BW-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
1150 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1151 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1152 ; AVX512BW-NEXT: vzeroupper
1153 ; AVX512BW-NEXT: retq
1154 ;
1155 ; AVX512DQVL-LABEL: splatvar_shift_v8i8:
1156 ; AVX512DQVL: # %bb.0:
1157 ; AVX512DQVL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1158 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1159 ; AVX512DQVL-NEXT: vpsrld %xmm1, %zmm0, %zmm0
1160 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
1161 ; AVX512DQVL-NEXT: vzeroupper
1162 ; AVX512DQVL-NEXT: retq
1163 ;
1164 ; AVX512BWVL-LABEL: splatvar_shift_v8i8:
1165 ; AVX512BWVL: # %bb.0:
1166 ; AVX512BWVL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1167 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1168 ; AVX512BWVL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
1169 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
1170 ; AVX512BWVL-NEXT: vzeroupper
1171 ; AVX512BWVL-NEXT: retq
1172 ;
1173 ; X86-SSE-LABEL: splatvar_shift_v8i8:
1174 ; X86-SSE: # %bb.0:
1175 ; X86-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0]
1176 ; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1177 ; X86-SSE-NEXT: psrlw %xmm1, %xmm0
1178 ; X86-SSE-NEXT: pcmpeqd %xmm2, %xmm2
1179 ; X86-SSE-NEXT: psrlw %xmm1, %xmm2
1180 ; X86-SSE-NEXT: psrlw $8, %xmm2
1181 ; X86-SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1182 ; X86-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,0,0,0,4,5,6,7]
1183 ; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1184 ; X86-SSE-NEXT: pand %xmm1, %xmm0
1185 ; X86-SSE-NEXT: retl
1186 %splat = shufflevector <8 x i8> %b, <8 x i8> undef, <8 x i32> zeroinitializer
1187 %shift = lshr <8 x i8> %a, %splat
1188 ret <8 x i8> %shift
1189 }
1191 define <4 x i8> @splatvar_shift_v4i8(<4 x i8> %a, <4 x i8> %b) nounwind {
1192 ; SSE2-LABEL: splatvar_shift_v4i8:
1193 ; SSE2: # %bb.0:
1194 ; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0]
1195 ; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1196 ; SSE2-NEXT: psrlw %xmm1, %xmm0
1197 ; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
1198 ; SSE2-NEXT: psrlw %xmm1, %xmm2
1199 ; SSE2-NEXT: psrlw $8, %xmm2
1200 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1201 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,0,0,0,4,5,6,7]
1202 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1203 ; SSE2-NEXT: pand %xmm1, %xmm0
1204 ; SSE2-NEXT: retq
1205 ;
1206 ; SSE41-LABEL: splatvar_shift_v4i8:
1207 ; SSE41: # %bb.0:
1208 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1209 ; SSE41-NEXT: psrlw %xmm1, %xmm0
1210 ; SSE41-NEXT: pcmpeqd %xmm2, %xmm2
1211 ; SSE41-NEXT: psrlw %xmm1, %xmm2
1212 ; SSE41-NEXT: pshufb {{.*#+}} xmm2 = xmm2[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1213 ; SSE41-NEXT: pand %xmm2, %xmm0
1214 ; SSE41-NEXT: retq
1215 ;
1216 ; AVX1-LABEL: splatvar_shift_v4i8:
1217 ; AVX1: # %bb.0:
1218 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1219 ; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1220 ; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
1221 ; AVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
1222 ; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1223 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
1224 ; AVX1-NEXT: retq
1225 ;
1226 ; AVX2-LABEL: splatvar_shift_v4i8:
1227 ; AVX2: # %bb.0:
1228 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1229 ; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1230 ; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
1231 ; AVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
1232 ; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1
1233 ; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1234 ; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
1235 ; AVX2-NEXT: retq
1236 ;
1237 ; XOPAVX1-LABEL: splatvar_shift_v4i8:
1238 ; XOPAVX1: # %bb.0:
1239 ; XOPAVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1240 ; XOPAVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
1241 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1242 ; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1243 ; XOPAVX1-NEXT: vpshlb %xmm1, %xmm0, %xmm0
1244 ; XOPAVX1-NEXT: retq
1245 ;
1246 ; XOPAVX2-LABEL: splatvar_shift_v4i8:
1247 ; XOPAVX2: # %bb.0:
1248 ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1249 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1250 ; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1251 ; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0
1252 ; XOPAVX2-NEXT: retq
1253 ;
1254 ; AVX512DQ-LABEL: splatvar_shift_v4i8:
1255 ; AVX512DQ: # %bb.0:
1256 ; AVX512DQ-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1257 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1258 ; AVX512DQ-NEXT: vpsrld %xmm1, %zmm0, %zmm0
1259 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
1260 ; AVX512DQ-NEXT: vzeroupper
1261 ; AVX512DQ-NEXT: retq
1262 ;
1263 ; AVX512BW-LABEL: splatvar_shift_v4i8:
1264 ; AVX512BW: # %bb.0:
1265 ; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1266 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1267 ; AVX512BW-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
1268 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1269 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1270 ; AVX512BW-NEXT: vzeroupper
1271 ; AVX512BW-NEXT: retq
1272 ;
1273 ; AVX512DQVL-LABEL: splatvar_shift_v4i8:
1274 ; AVX512DQVL: # %bb.0:
1275 ; AVX512DQVL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1276 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1277 ; AVX512DQVL-NEXT: vpsrld %xmm1, %zmm0, %zmm0
1278 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
1279 ; AVX512DQVL-NEXT: vzeroupper
1280 ; AVX512DQVL-NEXT: retq
1281 ;
1282 ; AVX512BWVL-LABEL: splatvar_shift_v4i8:
1283 ; AVX512BWVL: # %bb.0:
1284 ; AVX512BWVL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1285 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1286 ; AVX512BWVL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
1287 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
1288 ; AVX512BWVL-NEXT: vzeroupper
1289 ; AVX512BWVL-NEXT: retq
1290 ;
1291 ; X86-SSE-LABEL: splatvar_shift_v4i8:
1292 ; X86-SSE: # %bb.0:
1293 ; X86-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0]
1294 ; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1295 ; X86-SSE-NEXT: psrlw %xmm1, %xmm0
1296 ; X86-SSE-NEXT: pcmpeqd %xmm2, %xmm2
1297 ; X86-SSE-NEXT: psrlw %xmm1, %xmm2
1298 ; X86-SSE-NEXT: psrlw $8, %xmm2
1299 ; X86-SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1300 ; X86-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,0,0,0,4,5,6,7]
1301 ; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1302 ; X86-SSE-NEXT: pand %xmm1, %xmm0
1303 ; X86-SSE-NEXT: retl
1304 %splat = shufflevector <4 x i8> %b, <4 x i8> undef, <4 x i32> zeroinitializer
1305 %shift = lshr <4 x i8> %a, %splat
1306 ret <4 x i8> %shift
1307 }
1309 define <2 x i8> @splatvar_shift_v2i8(<2 x i8> %a, <2 x i8> %b) nounwind {
1310 ; SSE2-LABEL: splatvar_shift_v2i8:
1311 ; SSE2: # %bb.0:
1312 ; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0]
1313 ; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1314 ; SSE2-NEXT: psrlw %xmm1, %xmm0
1315 ; SSE2-NEXT: pcmpeqd %xmm2, %xmm2
1316 ; SSE2-NEXT: psrlw %xmm1, %xmm2
1317 ; SSE2-NEXT: psrlw $8, %xmm2
1318 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1319 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,0,0,0,4,5,6,7]
1320 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1321 ; SSE2-NEXT: pand %xmm1, %xmm0
1322 ; SSE2-NEXT: retq
1323 ;
1324 ; SSE41-LABEL: splatvar_shift_v2i8:
1325 ; SSE41: # %bb.0:
1326 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1327 ; SSE41-NEXT: psrlw %xmm1, %xmm0
1328 ; SSE41-NEXT: pcmpeqd %xmm2, %xmm2
1329 ; SSE41-NEXT: psrlw %xmm1, %xmm2
1330 ; SSE41-NEXT: pshufb {{.*#+}} xmm2 = xmm2[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1331 ; SSE41-NEXT: pand %xmm2, %xmm0
1332 ; SSE41-NEXT: retq
1333 ;
1334 ; AVX1-LABEL: splatvar_shift_v2i8:
1335 ; AVX1: # %bb.0:
1336 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1337 ; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1338 ; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
1339 ; AVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
1340 ; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1341 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
1342 ; AVX1-NEXT: retq
1343 ;
1344 ; AVX2-LABEL: splatvar_shift_v2i8:
1345 ; AVX2: # %bb.0:
1346 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1347 ; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1348 ; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
1349 ; AVX2-NEXT: vpsrlw %xmm1, %xmm2, %xmm1
1350 ; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1
1351 ; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1352 ; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
1353 ; AVX2-NEXT: retq
1354 ;
1355 ; XOP-LABEL: splatvar_shift_v2i8:
1356 ; XOP: # %bb.0:
1357 ; XOP-NEXT: insertq {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7,u,u,u,u,u,u,u,u]
1358 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
1359 ; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1360 ; XOP-NEXT: vpshlb %xmm1, %xmm0, %xmm0
1361 ; XOP-NEXT: retq
1362 ;
1363 ; AVX512DQ-LABEL: splatvar_shift_v2i8:
1364 ; AVX512DQ: # %bb.0:
1365 ; AVX512DQ-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1366 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1367 ; AVX512DQ-NEXT: vpsrld %xmm1, %zmm0, %zmm0
1368 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
1369 ; AVX512DQ-NEXT: vzeroupper
1370 ; AVX512DQ-NEXT: retq
1371 ;
1372 ; AVX512BW-LABEL: splatvar_shift_v2i8:
1373 ; AVX512BW: # %bb.0:
1374 ; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1375 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1376 ; AVX512BW-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
1377 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1378 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1379 ; AVX512BW-NEXT: vzeroupper
1380 ; AVX512BW-NEXT: retq
1381 ;
1382 ; AVX512DQVL-LABEL: splatvar_shift_v2i8:
1383 ; AVX512DQVL: # %bb.0:
1384 ; AVX512DQVL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1385 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1386 ; AVX512DQVL-NEXT: vpsrld %xmm1, %zmm0, %zmm0
1387 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
1388 ; AVX512DQVL-NEXT: vzeroupper
1389 ; AVX512DQVL-NEXT: retq
1390 ;
1391 ; AVX512BWVL-LABEL: splatvar_shift_v2i8:
1392 ; AVX512BWVL: # %bb.0:
1393 ; AVX512BWVL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1394 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1395 ; AVX512BWVL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0
1396 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
1397 ; AVX512BWVL-NEXT: vzeroupper
1398 ; AVX512BWVL-NEXT: retq
1399 ;
1400 ; X86-SSE-LABEL: splatvar_shift_v2i8:
1401 ; X86-SSE: # %bb.0:
1402 ; X86-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0]
1403 ; X86-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1404 ; X86-SSE-NEXT: psrlw %xmm1, %xmm0
1405 ; X86-SSE-NEXT: pcmpeqd %xmm2, %xmm2
1406 ; X86-SSE-NEXT: psrlw %xmm1, %xmm2
1407 ; X86-SSE-NEXT: psrlw $8, %xmm2
1408 ; X86-SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1409 ; X86-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,0,0,0,4,5,6,7]
1410 ; X86-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1411 ; X86-SSE-NEXT: pand %xmm1, %xmm0
1412 ; X86-SSE-NEXT: retl
1413 %splat = shufflevector <2 x i8> %b, <2 x i8> undef, <2 x i32> zeroinitializer
1414 %shift = lshr <2 x i8> %a, %splat
1415 ret <2 x i8> %shift
1416 }
1418 ;
1419 ; Constant Shifts
1420 ;
1422 define <2 x i32> @constant_shift_v2i32(<2 x i32> %a) nounwind {
1423 ; SSE2-LABEL: constant_shift_v2i32:
1424 ; SSE2: # %bb.0:
1425 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1426 ; SSE2-NEXT: psrld $4, %xmm1
1427 ; SSE2-NEXT: psrld $5, %xmm0
1428 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
1429 ; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1430 ; SSE2-NEXT: movdqa %xmm1, %xmm0
1431 ; SSE2-NEXT: retq
1432 ;
1433 ; SSE41-LABEL: constant_shift_v2i32:
1434 ; SSE41: # %bb.0:
1435 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1436 ; SSE41-NEXT: psrld $5, %xmm1
1437 ; SSE41-NEXT: psrld $4, %xmm0
1438 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1439 ; SSE41-NEXT: retq
1440 ;
1441 ; AVX1-LABEL: constant_shift_v2i32:
1442 ; AVX1: # %bb.0:
1443 ; AVX1-NEXT: vpsrld $5, %xmm0, %xmm1
1444 ; AVX1-NEXT: vpsrld $4, %xmm0, %xmm0
1445 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1446 ; AVX1-NEXT: retq
1447 ;
1448 ; AVX2-LABEL: constant_shift_v2i32:
1449 ; AVX2: # %bb.0:
1450 ; AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1451 ; AVX2-NEXT: retq
1452 ;
1453 ; XOPAVX1-LABEL: constant_shift_v2i32:
1454 ; XOPAVX1: # %bb.0:
1455 ; XOPAVX1-NEXT: vpshld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1456 ; XOPAVX1-NEXT: retq
1457 ;
1458 ; XOPAVX2-LABEL: constant_shift_v2i32:
1459 ; XOPAVX2: # %bb.0:
1460 ; XOPAVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1461 ; XOPAVX2-NEXT: retq
1462 ;
1463 ; AVX512-LABEL: constant_shift_v2i32:
1464 ; AVX512: # %bb.0:
1465 ; AVX512-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1466 ; AVX512-NEXT: retq
1467 ;
1468 ; AVX512VL-LABEL: constant_shift_v2i32:
1469 ; AVX512VL: # %bb.0:
1470 ; AVX512VL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1471 ; AVX512VL-NEXT: retq
1472 ;
1473 ; X86-SSE-LABEL: constant_shift_v2i32:
1474 ; X86-SSE: # %bb.0:
1475 ; X86-SSE-NEXT: movdqa %xmm0, %xmm1
1476 ; X86-SSE-NEXT: psrld $4, %xmm1
1477 ; X86-SSE-NEXT: psrld $5, %xmm0
1478 ; X86-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
1479 ; X86-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1480 ; X86-SSE-NEXT: movdqa %xmm1, %xmm0
1481 ; X86-SSE-NEXT: retl
1482 %shift = lshr <2 x i32> %a, <i32 4, i32 5>
1483 ret <2 x i32> %shift
1484 }
1486 define <4 x i16> @constant_shift_v4i16(<4 x i16> %a) nounwind {
1487 ; SSE2-LABEL: constant_shift_v4i16:
1488 ; SSE2: # %bb.0:
1489 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [0,65535,65535,65535,65535,65535,65535,65535]
1490 ; SSE2-NEXT: movdqa %xmm1, %xmm2
1491 ; SSE2-NEXT: pandn %xmm0, %xmm2
1492 ; SSE2-NEXT: pmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1493 ; SSE2-NEXT: pand %xmm1, %xmm0
1494 ; SSE2-NEXT: por %xmm2, %xmm0
1495 ; SSE2-NEXT: retq
1496 ;
1497 ; SSE41-LABEL: constant_shift_v4i16:
1498 ; SSE41: # %bb.0:
1499 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = <u,32768,16384,8192,u,u,u,u>
1500 ; SSE41-NEXT: pmulhuw %xmm0, %xmm1
1501 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
1502 ; SSE41-NEXT: retq
1503 ;
1504 ; AVX-LABEL: constant_shift_v4i16:
1505 ; AVX: # %bb.0:
1506 ; AVX-NEXT: vpmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1507 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
1508 ; AVX-NEXT: retq
1509 ;
1510 ; XOP-LABEL: constant_shift_v4i16:
1511 ; XOP: # %bb.0:
1512 ; XOP-NEXT: vpshlw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1513 ; XOP-NEXT: retq
1514 ;
1515 ; AVX512DQ-LABEL: constant_shift_v4i16:
1516 ; AVX512DQ: # %bb.0:
1517 ; AVX512DQ-NEXT: vpmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1518 ; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
1519 ; AVX512DQ-NEXT: retq
1520 ;
1521 ; AVX512BW-LABEL: constant_shift_v4i16:
1522 ; AVX512BW: # %bb.0:
1523 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1524 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = <0,1,2,3,u,u,u,u>
1525 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
1526 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1527 ; AVX512BW-NEXT: vzeroupper
1528 ; AVX512BW-NEXT: retq
1529 ;
1530 ; AVX512DQVL-LABEL: constant_shift_v4i16:
1531 ; AVX512DQVL: # %bb.0:
1532 ; AVX512DQVL-NEXT: vpmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1533 ; AVX512DQVL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7]
1534 ; AVX512DQVL-NEXT: retq
1535 ;
1536 ; AVX512BWVL-LABEL: constant_shift_v4i16:
1537 ; AVX512BWVL: # %bb.0:
1538 ; AVX512BWVL-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1539 ; AVX512BWVL-NEXT: retq
1540 ;
1541 ; X86-SSE-LABEL: constant_shift_v4i16:
1542 ; X86-SSE: # %bb.0:
1543 ; X86-SSE-NEXT: movdqa {{.*#+}} xmm1 = [0,65535,65535,65535,65535,65535,65535,65535]
1544 ; X86-SSE-NEXT: movdqa %xmm1, %xmm2
1545 ; X86-SSE-NEXT: pandn %xmm0, %xmm2
1546 ; X86-SSE-NEXT: pmulhuw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
1547 ; X86-SSE-NEXT: pand %xmm1, %xmm0
1548 ; X86-SSE-NEXT: por %xmm2, %xmm0
1549 ; X86-SSE-NEXT: retl
1550 %shift = lshr <4 x i16> %a, <i16 0, i16 1, i16 2, i16 3>
1551 ret <4 x i16> %shift
1552 }
1554 define <2 x i16> @constant_shift_v2i16(<2 x i16> %a) nounwind {
1555 ; SSE2-LABEL: constant_shift_v2i16:
1556 ; SSE2: # %bb.0:
1557 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1558 ; SSE2-NEXT: psrlw $3, %xmm1
1559 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [65535,0,65535,65535,65535,65535,65535,65535]
1560 ; SSE2-NEXT: psrlw $2, %xmm0
1561 ; SSE2-NEXT: pand %xmm2, %xmm0
1562 ; SSE2-NEXT: pandn %xmm1, %xmm2
1563 ; SSE2-NEXT: por %xmm2, %xmm0
1564 ; SSE2-NEXT: retq
1565 ;
1566 ; SSE41-LABEL: constant_shift_v2i16:
1567 ; SSE41: # %bb.0:
1568 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1569 ; SSE41-NEXT: psrlw $3, %xmm1
1570 ; SSE41-NEXT: psrlw $2, %xmm0
1571 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3,4,5,6,7]
1572 ; SSE41-NEXT: retq
1573 ;
1574 ; AVX-LABEL: constant_shift_v2i16:
1575 ; AVX: # %bb.0:
1576 ; AVX-NEXT: vpsrlw $3, %xmm0, %xmm1
1577 ; AVX-NEXT: vpsrlw $2, %xmm0, %xmm0
1578 ; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3,4,5,6,7]
1579 ; AVX-NEXT: retq
1580 ;
1581 ; XOP-LABEL: constant_shift_v2i16:
1582 ; XOP: # %bb.0:
1583 ; XOP-NEXT: vpshlw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1584 ; XOP-NEXT: retq
1585 ;
1586 ; AVX512DQ-LABEL: constant_shift_v2i16:
1587 ; AVX512DQ: # %bb.0:
1588 ; AVX512DQ-NEXT: vpsrlw $3, %xmm0, %xmm1
1589 ; AVX512DQ-NEXT: vpsrlw $2, %xmm0, %xmm0
1590 ; AVX512DQ-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3,4,5,6,7]
1591 ; AVX512DQ-NEXT: retq
1592 ;
1593 ; AVX512BW-LABEL: constant_shift_v2i16:
1594 ; AVX512BW: # %bb.0:
1595 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1596 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = <2,3,u,u,u,u,u,u>
1597 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
1598 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1599 ; AVX512BW-NEXT: vzeroupper
1600 ; AVX512BW-NEXT: retq
1601 ;
1602 ; AVX512DQVL-LABEL: constant_shift_v2i16:
1603 ; AVX512DQVL: # %bb.0:
1604 ; AVX512DQVL-NEXT: vpsrlw $3, %xmm0, %xmm1
1605 ; AVX512DQVL-NEXT: vpsrlw $2, %xmm0, %xmm0
1606 ; AVX512DQVL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3,4,5,6,7]
1607 ; AVX512DQVL-NEXT: retq
1608 ;
1609 ; AVX512BWVL-LABEL: constant_shift_v2i16:
1610 ; AVX512BWVL: # %bb.0:
1611 ; AVX512BWVL-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1612 ; AVX512BWVL-NEXT: retq
1613 ;
1614 ; X86-SSE-LABEL: constant_shift_v2i16:
1615 ; X86-SSE: # %bb.0:
1616 ; X86-SSE-NEXT: movdqa %xmm0, %xmm1
1617 ; X86-SSE-NEXT: psrlw $3, %xmm1
1618 ; X86-SSE-NEXT: movdqa {{.*#+}} xmm2 = [65535,0,65535,65535,65535,65535,65535,65535]
1619 ; X86-SSE-NEXT: psrlw $2, %xmm0
1620 ; X86-SSE-NEXT: pand %xmm2, %xmm0
1621 ; X86-SSE-NEXT: pandn %xmm1, %xmm2
1622 ; X86-SSE-NEXT: por %xmm2, %xmm0
1623 ; X86-SSE-NEXT: retl
1624 %shift = lshr <2 x i16> %a, <i16 2, i16 3>
1625 ret <2 x i16> %shift
1626 }
1628 define <8 x i8> @constant_shift_v8i8(<8 x i8> %a) nounwind {
1629 ; SSE2-LABEL: constant_shift_v8i8:
1630 ; SSE2: # %bb.0:
1631 ; SSE2-NEXT: pxor %xmm1, %xmm1
1632 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1633 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1634 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1635 ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1636 ; SSE2-NEXT: psrlw $8, %xmm0
1637 ; SSE2-NEXT: packuswb %xmm2, %xmm0
1638 ; SSE2-NEXT: retq
1639 ;
1640 ; SSE41-LABEL: constant_shift_v8i8:
1641 ; SSE41: # %bb.0:
1642 ; SSE41-NEXT: pxor %xmm2, %xmm2
1643 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1644 ; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
1645 ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1646 ; SSE41-NEXT: psrlw $8, %xmm1
1647 ; SSE41-NEXT: packuswb %xmm0, %xmm1
1648 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1649 ; SSE41-NEXT: retq
1650 ;
1651 ; AVX1-LABEL: constant_shift_v8i8:
1652 ; AVX1: # %bb.0:
1653 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1654 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
1655 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1656 ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1657 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
1658 ; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
1659 ; AVX1-NEXT: retq
1660 ;
1661 ; AVX2-LABEL: constant_shift_v8i8:
1662 ; AVX2: # %bb.0:
1663 ; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1664 ; AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
1665 ; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
1666 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1667 ; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
1668 ; AVX2-NEXT: vzeroupper
1669 ; AVX2-NEXT: retq
1670 ;
1671 ; XOP-LABEL: constant_shift_v8i8:
1672 ; XOP: # %bb.0:
1673 ; XOP-NEXT: vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1674 ; XOP-NEXT: retq
1675 ;
1676 ; AVX512DQ-LABEL: constant_shift_v8i8:
1677 ; AVX512DQ: # %bb.0:
1678 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1679 ; AVX512DQ-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
1680 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
1681 ; AVX512DQ-NEXT: vzeroupper
1682 ; AVX512DQ-NEXT: retq
1683 ;
1684 ; AVX512BW-LABEL: constant_shift_v8i8:
1685 ; AVX512BW: # %bb.0:
1686 ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,0,0,0,0,0,0,0]
1687 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1688 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
1689 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1690 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1691 ; AVX512BW-NEXT: vzeroupper
1692 ; AVX512BW-NEXT: retq
1693 ;
1694 ; AVX512DQVL-LABEL: constant_shift_v8i8:
1695 ; AVX512DQVL: # %bb.0:
1696 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1697 ; AVX512DQVL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
1698 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
1699 ; AVX512DQVL-NEXT: vzeroupper
1700 ; AVX512DQVL-NEXT: retq
1701 ;
1702 ; AVX512BWVL-LABEL: constant_shift_v8i8:
1703 ; AVX512BWVL: # %bb.0:
1704 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1705 ; AVX512BWVL-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
1706 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
1707 ; AVX512BWVL-NEXT: vzeroupper
1708 ; AVX512BWVL-NEXT: retq
1709 ;
1710 ; X86-SSE-LABEL: constant_shift_v8i8:
1711 ; X86-SSE: # %bb.0:
1712 ; X86-SSE-NEXT: pxor %xmm1, %xmm1
1713 ; X86-SSE-NEXT: movdqa %xmm0, %xmm2
1714 ; X86-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1715 ; X86-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1716 ; X86-SSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
1717 ; X86-SSE-NEXT: psrlw $8, %xmm0
1718 ; X86-SSE-NEXT: packuswb %xmm2, %xmm0
1719 ; X86-SSE-NEXT: retl
1720 %shift = lshr <8 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>
1721 ret <8 x i8> %shift
1722 }
1724 define <4 x i8> @constant_shift_v4i8(<4 x i8> %a) nounwind {
1725 ; SSE2-LABEL: constant_shift_v4i8:
1726 ; SSE2: # %bb.0:
1727 ; SSE2-NEXT: pxor %xmm1, %xmm1
1728 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1729 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1730 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1731 ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1732 ; SSE2-NEXT: psrlw $8, %xmm0
1733 ; SSE2-NEXT: packuswb %xmm2, %xmm0
1734 ; SSE2-NEXT: retq
1735 ;
1736 ; SSE41-LABEL: constant_shift_v4i8:
1737 ; SSE41: # %bb.0:
1738 ; SSE41-NEXT: pxor %xmm2, %xmm2
1739 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1740 ; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
1741 ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1742 ; SSE41-NEXT: psrlw $8, %xmm1
1743 ; SSE41-NEXT: packuswb %xmm0, %xmm1
1744 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1745 ; SSE41-NEXT: retq
1746 ;
1747 ; AVX1-LABEL: constant_shift_v4i8:
1748 ; AVX1: # %bb.0:
1749 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1750 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
1751 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1752 ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1753 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
1754 ; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
1755 ; AVX1-NEXT: retq
1756 ;
1757 ; AVX2-LABEL: constant_shift_v4i8:
1758 ; AVX2: # %bb.0:
1759 ; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1760 ; AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
1761 ; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
1762 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1763 ; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
1764 ; AVX2-NEXT: vzeroupper
1765 ; AVX2-NEXT: retq
1766 ;
1767 ; XOP-LABEL: constant_shift_v4i8:
1768 ; XOP: # %bb.0:
1769 ; XOP-NEXT: vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1770 ; XOP-NEXT: retq
1771 ;
1772 ; AVX512DQ-LABEL: constant_shift_v4i8:
1773 ; AVX512DQ: # %bb.0:
1774 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1775 ; AVX512DQ-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
1776 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
1777 ; AVX512DQ-NEXT: vzeroupper
1778 ; AVX512DQ-NEXT: retq
1779 ;
1780 ; AVX512BW-LABEL: constant_shift_v4i8:
1781 ; AVX512BW: # %bb.0:
1782 ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,0,0,0,0,0,0,0,0,0,0,0,0]
1783 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1784 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
1785 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1786 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1787 ; AVX512BW-NEXT: vzeroupper
1788 ; AVX512BW-NEXT: retq
1789 ;
1790 ; AVX512DQVL-LABEL: constant_shift_v4i8:
1791 ; AVX512DQVL: # %bb.0:
1792 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1793 ; AVX512DQVL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
1794 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
1795 ; AVX512DQVL-NEXT: vzeroupper
1796 ; AVX512DQVL-NEXT: retq
1797 ;
1798 ; AVX512BWVL-LABEL: constant_shift_v4i8:
1799 ; AVX512BWVL: # %bb.0:
1800 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1801 ; AVX512BWVL-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
1802 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
1803 ; AVX512BWVL-NEXT: vzeroupper
1804 ; AVX512BWVL-NEXT: retq
1805 ;
1806 ; X86-SSE-LABEL: constant_shift_v4i8:
1807 ; X86-SSE: # %bb.0:
1808 ; X86-SSE-NEXT: pxor %xmm1, %xmm1
1809 ; X86-SSE-NEXT: movdqa %xmm0, %xmm2
1810 ; X86-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1811 ; X86-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1812 ; X86-SSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
1813 ; X86-SSE-NEXT: psrlw $8, %xmm0
1814 ; X86-SSE-NEXT: packuswb %xmm2, %xmm0
1815 ; X86-SSE-NEXT: retl
1816 %shift = lshr <4 x i8> %a, <i8 0, i8 1, i8 2, i8 3>
1817 ret <4 x i8> %shift
1818 }
1820 define <2 x i8> @constant_shift_v2i8(<2 x i8> %a) nounwind {
1821 ; SSE2-LABEL: constant_shift_v2i8:
1822 ; SSE2: # %bb.0:
1823 ; SSE2-NEXT: pxor %xmm1, %xmm1
1824 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1825 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1826 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1827 ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1828 ; SSE2-NEXT: psrlw $8, %xmm0
1829 ; SSE2-NEXT: packuswb %xmm2, %xmm0
1830 ; SSE2-NEXT: retq
1831 ;
1832 ; SSE41-LABEL: constant_shift_v2i8:
1833 ; SSE41: # %bb.0:
1834 ; SSE41-NEXT: pxor %xmm2, %xmm2
1835 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1836 ; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
1837 ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1838 ; SSE41-NEXT: psrlw $8, %xmm1
1839 ; SSE41-NEXT: packuswb %xmm0, %xmm1
1840 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1841 ; SSE41-NEXT: retq
1842 ;
1843 ; AVX1-LABEL: constant_shift_v2i8:
1844 ; AVX1: # %bb.0:
1845 ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1846 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
1847 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1848 ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1849 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
1850 ; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
1851 ; AVX1-NEXT: retq
1852 ;
1853 ; AVX2-LABEL: constant_shift_v2i8:
1854 ; AVX2: # %bb.0:
1855 ; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1856 ; AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
1857 ; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
1858 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1859 ; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
1860 ; AVX2-NEXT: vzeroupper
1861 ; AVX2-NEXT: retq
1862 ;
1863 ; XOP-LABEL: constant_shift_v2i8:
1864 ; XOP: # %bb.0:
1865 ; XOP-NEXT: vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1866 ; XOP-NEXT: retq
1867 ;
1868 ; AVX512DQ-LABEL: constant_shift_v2i8:
1869 ; AVX512DQ: # %bb.0:
1870 ; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1871 ; AVX512DQ-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
1872 ; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0
1873 ; AVX512DQ-NEXT: vzeroupper
1874 ; AVX512DQ-NEXT: retq
1875 ;
1876 ; AVX512BW-LABEL: constant_shift_v2i8:
1877 ; AVX512BW: # %bb.0:
1878 ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [2,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
1879 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1880 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
1881 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1882 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1883 ; AVX512BW-NEXT: vzeroupper
1884 ; AVX512BW-NEXT: retq
1885 ;
1886 ; AVX512DQVL-LABEL: constant_shift_v2i8:
1887 ; AVX512DQVL: # %bb.0:
1888 ; AVX512DQVL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1889 ; AVX512DQVL-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %zmm0, %zmm0
1890 ; AVX512DQVL-NEXT: vpmovdb %zmm0, %xmm0
1891 ; AVX512DQVL-NEXT: vzeroupper
1892 ; AVX512DQVL-NEXT: retq
1893 ;
1894 ; AVX512BWVL-LABEL: constant_shift_v2i8:
1895 ; AVX512BWVL: # %bb.0:
1896 ; AVX512BWVL-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1897 ; AVX512BWVL-NEXT: vpsrlvw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
1898 ; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0
1899 ; AVX512BWVL-NEXT: vzeroupper
1900 ; AVX512BWVL-NEXT: retq
1901 ;
1902 ; X86-SSE-LABEL: constant_shift_v2i8:
1903 ; X86-SSE: # %bb.0:
1904 ; X86-SSE-NEXT: pxor %xmm1, %xmm1
1905 ; X86-SSE-NEXT: movdqa %xmm0, %xmm2
1906 ; X86-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1907 ; X86-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1908 ; X86-SSE-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
1909 ; X86-SSE-NEXT: psrlw $8, %xmm0
1910 ; X86-SSE-NEXT: packuswb %xmm2, %xmm0
1911 ; X86-SSE-NEXT: retl
1912 %shift = lshr <2 x i8> %a, <i8 2, i8 3>
1913 ret <2 x i8> %shift
1914 }
1916 ;
1917 ; Uniform Constant Shifts
1918 ;
1920 define <2 x i32> @splatconstant_shift_v2i32(<2 x i32> %a) nounwind {
1921 ; SSE-LABEL: splatconstant_shift_v2i32:
1922 ; SSE: # %bb.0:
1923 ; SSE-NEXT: psrld $5, %xmm0
1924 ; SSE-NEXT: retq
1925 ;
1926 ; AVX-LABEL: splatconstant_shift_v2i32:
1927 ; AVX: # %bb.0:
1928 ; AVX-NEXT: vpsrld $5, %xmm0, %xmm0
1929 ; AVX-NEXT: retq
1930 ;
1931 ; XOP-LABEL: splatconstant_shift_v2i32:
1932 ; XOP: # %bb.0:
1933 ; XOP-NEXT: vpsrld $5, %xmm0, %xmm0
1934 ; XOP-NEXT: retq
1935 ;
1936 ; AVX512-LABEL: splatconstant_shift_v2i32:
1937 ; AVX512: # %bb.0:
1938 ; AVX512-NEXT: vpsrld $5, %xmm0, %xmm0
1939 ; AVX512-NEXT: retq
1940 ;
1941 ; AVX512VL-LABEL: splatconstant_shift_v2i32:
1942 ; AVX512VL: # %bb.0:
1943 ; AVX512VL-NEXT: vpsrld $5, %xmm0, %xmm0
1944 ; AVX512VL-NEXT: retq
1945 ;
1946 ; X86-SSE-LABEL: splatconstant_shift_v2i32:
1947 ; X86-SSE: # %bb.0:
1948 ; X86-SSE-NEXT: psrld $5, %xmm0
1949 ; X86-SSE-NEXT: retl
1950 %shift = lshr <2 x i32> %a, <i32 5, i32 5>
1951 ret <2 x i32> %shift
1952 }
1954 define <4 x i16> @splatconstant_shift_v4i16(<4 x i16> %a) nounwind {
1955 ; SSE-LABEL: splatconstant_shift_v4i16:
1956 ; SSE: # %bb.0:
1957 ; SSE-NEXT: psrlw $3, %xmm0
1958 ; SSE-NEXT: retq
1959 ;
1960 ; AVX-LABEL: splatconstant_shift_v4i16:
1961 ; AVX: # %bb.0:
1962 ; AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
1963 ; AVX-NEXT: retq
1964 ;
1965 ; XOP-LABEL: splatconstant_shift_v4i16:
1966 ; XOP: # %bb.0:
1967 ; XOP-NEXT: vpsrlw $3, %xmm0, %xmm0
1968 ; XOP-NEXT: retq
1969 ;
1970 ; AVX512-LABEL: splatconstant_shift_v4i16:
1971 ; AVX512: # %bb.0:
1972 ; AVX512-NEXT: vpsrlw $3, %xmm0, %xmm0
1973 ; AVX512-NEXT: retq
1974 ;
1975 ; AVX512VL-LABEL: splatconstant_shift_v4i16:
1976 ; AVX512VL: # %bb.0:
1977 ; AVX512VL-NEXT: vpsrlw $3, %xmm0, %xmm0
1978 ; AVX512VL-NEXT: retq
1979 ;
1980 ; X86-SSE-LABEL: splatconstant_shift_v4i16:
1981 ; X86-SSE: # %bb.0:
1982 ; X86-SSE-NEXT: psrlw $3, %xmm0
1983 ; X86-SSE-NEXT: retl
1984 %shift = lshr <4 x i16> %a, <i16 3, i16 3, i16 3, i16 3>
1985 ret <4 x i16> %shift
1986 }
1988 define <2 x i16> @splatconstant_shift_v2i16(<2 x i16> %a) nounwind {
1989 ; SSE-LABEL: splatconstant_shift_v2i16:
1990 ; SSE: # %bb.0:
1991 ; SSE-NEXT: psrlw $3, %xmm0
1992 ; SSE-NEXT: retq
1993 ;
1994 ; AVX-LABEL: splatconstant_shift_v2i16:
1995 ; AVX: # %bb.0:
1996 ; AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
1997 ; AVX-NEXT: retq
1998 ;
1999 ; XOP-LABEL: splatconstant_shift_v2i16:
2000 ; XOP: # %bb.0:
2001 ; XOP-NEXT: vpsrlw $3, %xmm0, %xmm0
2002 ; XOP-NEXT: retq
2003 ;
2004 ; AVX512-LABEL: splatconstant_shift_v2i16:
2005 ; AVX512: # %bb.0:
2006 ; AVX512-NEXT: vpsrlw $3, %xmm0, %xmm0
2007 ; AVX512-NEXT: retq
2008 ;
2009 ; AVX512VL-LABEL: splatconstant_shift_v2i16:
2010 ; AVX512VL: # %bb.0:
2011 ; AVX512VL-NEXT: vpsrlw $3, %xmm0, %xmm0
2012 ; AVX512VL-NEXT: retq
2013 ;
2014 ; X86-SSE-LABEL: splatconstant_shift_v2i16:
2015 ; X86-SSE: # %bb.0:
2016 ; X86-SSE-NEXT: psrlw $3, %xmm0
2017 ; X86-SSE-NEXT: retl
2018 %shift = lshr <2 x i16> %a, <i16 3, i16 3>
2019 ret <2 x i16> %shift
2020 }
2022 define <8 x i8> @splatconstant_shift_v8i8(<8 x i8> %a) nounwind {
2023 ; SSE-LABEL: splatconstant_shift_v8i8:
2024 ; SSE: # %bb.0:
2025 ; SSE-NEXT: psrlw $3, %xmm0
2026 ; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2027 ; SSE-NEXT: retq
2028 ;
2029 ; AVX-LABEL: splatconstant_shift_v8i8:
2030 ; AVX: # %bb.0:
2031 ; AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
2032 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2033 ; AVX-NEXT: retq
2034 ;
2035 ; XOP-LABEL: splatconstant_shift_v8i8:
2036 ; XOP: # %bb.0:
2037 ; XOP-NEXT: vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2038 ; XOP-NEXT: retq
2039 ;
2040 ; AVX512-LABEL: splatconstant_shift_v8i8:
2041 ; AVX512: # %bb.0:
2042 ; AVX512-NEXT: vpsrlw $3, %xmm0, %xmm0
2043 ; AVX512-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2044 ; AVX512-NEXT: retq
2045 ;
2046 ; AVX512VL-LABEL: splatconstant_shift_v8i8:
2047 ; AVX512VL: # %bb.0:
2048 ; AVX512VL-NEXT: vpsrlw $3, %xmm0, %xmm0
2049 ; AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2050 ; AVX512VL-NEXT: retq
2051 ;
2052 ; X86-SSE-LABEL: splatconstant_shift_v8i8:
2053 ; X86-SSE: # %bb.0:
2054 ; X86-SSE-NEXT: psrlw $3, %xmm0
2055 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
2056 ; X86-SSE-NEXT: retl
2057 %shift = lshr <8 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
2058 ret <8 x i8> %shift
2059 }
2061 define <4 x i8> @splatconstant_shift_v4i8(<4 x i8> %a) nounwind {
2062 ; SSE-LABEL: splatconstant_shift_v4i8:
2063 ; SSE: # %bb.0:
2064 ; SSE-NEXT: psrlw $3, %xmm0
2065 ; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2066 ; SSE-NEXT: retq
2067 ;
2068 ; AVX-LABEL: splatconstant_shift_v4i8:
2069 ; AVX: # %bb.0:
2070 ; AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
2071 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2072 ; AVX-NEXT: retq
2073 ;
2074 ; XOP-LABEL: splatconstant_shift_v4i8:
2075 ; XOP: # %bb.0:
2076 ; XOP-NEXT: vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2077 ; XOP-NEXT: retq
2078 ;
2079 ; AVX512-LABEL: splatconstant_shift_v4i8:
2080 ; AVX512: # %bb.0:
2081 ; AVX512-NEXT: vpsrlw $3, %xmm0, %xmm0
2082 ; AVX512-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2083 ; AVX512-NEXT: retq
2084 ;
2085 ; AVX512VL-LABEL: splatconstant_shift_v4i8:
2086 ; AVX512VL: # %bb.0:
2087 ; AVX512VL-NEXT: vpsrlw $3, %xmm0, %xmm0
2088 ; AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2089 ; AVX512VL-NEXT: retq
2090 ;
2091 ; X86-SSE-LABEL: splatconstant_shift_v4i8:
2092 ; X86-SSE: # %bb.0:
2093 ; X86-SSE-NEXT: psrlw $3, %xmm0
2094 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
2095 ; X86-SSE-NEXT: retl
2096 %shift = lshr <4 x i8> %a, <i8 3, i8 3, i8 3, i8 3>
2097 ret <4 x i8> %shift
2098 }
2100 define <2 x i8> @splatconstant_shift_v2i8(<2 x i8> %a) nounwind {
2101 ; SSE-LABEL: splatconstant_shift_v2i8:
2102 ; SSE: # %bb.0:
2103 ; SSE-NEXT: psrlw $3, %xmm0
2104 ; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2105 ; SSE-NEXT: retq
2106 ;
2107 ; AVX-LABEL: splatconstant_shift_v2i8:
2108 ; AVX: # %bb.0:
2109 ; AVX-NEXT: vpsrlw $3, %xmm0, %xmm0
2110 ; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2111 ; AVX-NEXT: retq
2112 ;
2113 ; XOP-LABEL: splatconstant_shift_v2i8:
2114 ; XOP: # %bb.0:
2115 ; XOP-NEXT: vpshlb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2116 ; XOP-NEXT: retq
2117 ;
2118 ; AVX512-LABEL: splatconstant_shift_v2i8:
2119 ; AVX512: # %bb.0:
2120 ; AVX512-NEXT: vpsrlw $3, %xmm0, %xmm0
2121 ; AVX512-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2122 ; AVX512-NEXT: retq
2123 ;
2124 ; AVX512VL-LABEL: splatconstant_shift_v2i8:
2125 ; AVX512VL: # %bb.0:
2126 ; AVX512VL-NEXT: vpsrlw $3, %xmm0, %xmm0
2127 ; AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2128 ; AVX512VL-NEXT: retq
2129 ;
2130 ; X86-SSE-LABEL: splatconstant_shift_v2i8:
2131 ; X86-SSE: # %bb.0:
2132 ; X86-SSE-NEXT: psrlw $3, %xmm0
2133 ; X86-SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
2134 ; X86-SSE-NEXT: retl
2135 %shift = lshr <2 x i8> %a, <i8 3, i8 3>
2136 ret <2 x i8> %shift
2137 }