| blob | f8863eedb1764d11b167f428f17f940818a6d9fa |
1 # RUN: llc -mtriple=x86_64-- -run-pass livedebugvalues -o - %s | FileCheck %s --implicit-check-not=DBG_VALUE_LIST\r
2 #\r
3 # Test a series of joins, where:\r
4 # * The locations agree, although registers have changed,\r
5 # * A register down one of the predecessors has been def'd,\r
6 # * The register operands to DBG_VALUE_LIST have been swapped,\r
7 # * A spurious additional operand has been added to one path,\r
8 # * The expressions are not the same (plus -> minus).\r
9 #\r
10 # Each join block below checks for one DBG_VALUE_LIST: either we re-state the var\r
11 # location in a block for the next test, or it's created as a live-in and we\r
12 # use that for the next test. Two DBG_VALUE_LISTs in a block would represent\r
13 # a live-in that we didn't expect, and a test failure.\r
14 #\r
15 # Each conditional block should have at least one, possibly two.\r
16 #\r
17 # CHECK: ![[VAR:[0-9]+]] = !DILocalVariable(name: "c"\r
18 # \r
19 # CHECK-LABEL: bb.0.entry:\r
20 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
21 # CHECK-LABEL: bb.1:\r
22 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
23 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
24 # CHECK-LABEL: bb.2:\r
25 # CHECK: DBG_VALUE_LIST ![[VAR]], !DIExpression(DW_OP_LLVM_arg, 0,\r
26 # CHECK-SAME: DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $rsi\r
27 # CHECK-LABEL: bb.3:\r
28 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
29 # CHECK-LABEL: bb.4:\r
30 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
31 # CHECK-SAME: $rdi, $rsi\r
32 # CHECK-LABEL: bb.5:\r
33 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
34 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
35 # CHECK-SAME: $rsi, $rdi\r
36 # CHECK-LABEL: bb.6:\r
37 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
38 # CHECK-LABEL: bb.7:\r
39 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
40 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
41 # CHECK-SAME: $rdi, $rsi, $rax\r
42 # CHECK-LABEL: bb.8:\r
43 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
44 # CHECK-LABEL: bb.9:\r
45 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
46 # CHECK: DBG_VALUE_LIST ![[VAR]],\r
47 # CHECK-SAME: DW_OP_minus\r
48 # CHECK-LABEL: bb.10:\r
49 --- |\r
50 ; ModuleID = 'test.cpp'\r
51 source_filename = "test.cpp"\r
52 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"\r
53 target triple = "x86_64-unknown-linux-gnu"\r
54 \r
55 ; Function Attrs: norecurse nounwind readnone uwtable\r
56 define dso_local i32 @_Z3fooii(i32 %a, i32 %b) local_unnamed_addr !dbg !7 {\r
57 entry:\r
58 ret i32 0, !dbg !17\r
59 }\r
60 \r
61 ; Function Attrs: nounwind readnone speculatable willreturn\r
62 declare void @llvm.dbg.value(metadata, metadata, metadata)\r
63 \r
64 !llvm.dbg.cu = !{!0}\r
65 !llvm.module.flags = !{!3, !4, !5}\r
66 !llvm.ident = !{!6}\r
67 \r
68 !0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: !1, producer: "clang version 11.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, splitDebugInlining: false, nameTableKind: None)\r
69 !1 = !DIFile(filename: "test.cpp", directory: "/")\r
70 !2 = !{}\r
71 !3 = !{i32 7, !"Dwarf Version", i32 4}\r
72 !4 = !{i32 2, !"Debug Info Version", i32 3}\r
73 !5 = !{i32 1, !"wchar_size", i32 4}\r
74 !6 = !{!"clang version 11.0.0"}\r
75 !7 = distinct !DISubprogram(name: "foo", linkageName: "_Z3fooii", scope: !1, file: !1, line: 2, type: !8, scopeLine: 2, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !11)\r
76 !8 = !DISubroutineType(types: !9)\r
77 !9 = !{!10, !10, !10}\r
78 !10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)\r
79 !11 = !{!12, !13, !14}\r
80 !12 = !DILocalVariable(name: "a", arg: 1, scope: !7, file: !1, line: 2, type: !10)\r
81 !13 = !DILocalVariable(name: "b", arg: 2, scope: !7, file: !1, line: 2, type: !10)\r
82 !14 = !DILocalVariable(name: "c", scope: !7, file: !1, line: 3, type: !10)\r
83 !15 = !DILocation(line: 0, scope: !7)\r
84 !16 = !DILocation(line: 4, column: 12, scope: !7)\r
85 !17 = !DILocation(line: 4, column: 3, scope: !7)\r
86 \r
87 ...\r
88 ---\r
89 name: _Z3fooii\r
90 body: |\r
91 bb.0.entry:\r
92 liveins: $rdi, $rsi\r
93 \r
94 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $rsi, debug-location !15\r
95 CMP64ri8 $rdi, 0, implicit-def $eflags\r
96 JCC_1 %bb.2, 4, implicit $eflags\r
97 \r
98 bb.1:\r
99 liveins: $rdi, $rsi\r
100 $rdi = MOV64ri 0\r
101 $rsi = MOV64ri 0\r
102 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $rsi, debug-location !15\r
103 \r
104 bb.2:\r
105 liveins: $rdi, $rsi\r
106 ; Should be a live-in loc here,\r
107 CMP64ri8 $rdi, 0, implicit-def $eflags\r
108 JCC_1 %bb.4, 4, implicit $eflags\r
109 \r
110 bb.3:\r
111 liveins: $rdi, $rsi\r
112 $rsi = MOV64ri 0\r
113 \r
114 bb.4:\r
115 liveins: $rdi, $rsi\r
116 ; Should _not_ be a live-in loc here.\r
117 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $rsi, debug-location !15\r
118 CMP64ri8 $rdi, 0, implicit-def $eflags\r
119 JCC_1 %bb.6, 4, implicit $eflags\r
120 \r
121 bb.5:\r
122 liveins: $rdi, $rsi\r
123 ; Flip some args,\r
124 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rsi, $rdi, debug-location !15\r
125 \r
126 bb.6:\r
127 liveins: $rdi, $rsi\r
128 ; Should _not_ be a live-in loc here.\r
129 $rax = MOV64ri 0\r
130 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $rsi, debug-location !15\r
131 CMP64ri8 $rdi, 0, implicit-def $eflags\r
132 JCC_1 %bb.8, 4, implicit $eflags\r
133 \r
134 bb.7:\r
135 liveins: $rdi, $rsi\r
136 ; Add an extra, spurious, unused argument\r
137 $rax = MOV64ri 1\r
138 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $rsi, $rax, debug-location !15\r
139 \r
140 bb.8:\r
141 liveins: $rdi, $rsi\r
142 ; Should _not_ be a live-in loc here.\r
143 $rax = MOV64ri 0\r
144 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rdi, $rsi, debug-location !15\r
145 CMP64ri8 $rdi, 0, implicit-def $eflags\r
146 JCC_1 %bb.10, 4, implicit $eflags\r
147 \r
148 bb.9:\r
149 liveins: $rdi, $rsi\r
150 ; Replace add with sub in the expr\r
151 $rax = MOV64ri 1\r
152 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_minus), $rdi, $rsi, debug-location !15\r
153 \r
154 bb.10:\r
155 liveins: $rdi, $rsi\r
156 ; Should _not_ be a live-in loc here.\r
157 RETQ\r
158 \r
159 ...\r
160 \r