| blob | 82cc5b00e5309050362d75a59095e51978f33a66 |
1 # RUN: llc -start-after=phi-node-elimination -stop-after=virtregrewriter %s -mtriple=x86_64-unknown-unknown -o - | FileCheck %s\r
2 #\r
3 # Test that when a livedebugvars interval is split, DBG_VALUE_LISTs are created\r
4 # with the correct operands and exprs. Force values to be moved around between\r
5 # registers and stack through inline asm blocks that clobber things.\r
6 #\r
7 # CHECK-LABEL: bb.0.entry:\r
8 # CHECK: $rbx = COPY $rsi\r
9 # CHECK-NEXT: MOV64mr %stack.0, 1, $noreg, 0, $noreg, $rdi\r
10 # CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_LLVM_arg, 1, DW_OP_plus), %stack.0, $rbx,\r
11 # CHECK-NEXT: INLINEASM\r
12 # CHECK-NEXT: $rax = MOV64rm %stack.0,\r
13 # CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rax, $rbx,\r
14 # CHECK-NEXT: CALL64pcrel32 @foo\r
15 # CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_LLVM_arg, 1, DW_OP_plus), %stack.0, $rbx,\r
16 # CHECK-NEXT: $rcx = COPY killed renamable $rbx\r
17 # CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_deref, DW_OP_LLVM_arg, 1, DW_OP_plus), %stack.0, $rcx,\r
18 # CHECK-NEXT: INLINEASM\r
19 # CHECK-NEXT: $rax = MOV64rm %stack.0\r
20 # CHECK-NEXT: DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), $rax, $rcx,\r
21 \r
22 --- |\r
23 ; ModuleID = 'tmp.ll'\r
24 source_filename = "tmp.ll"\r
25 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"\r
26 \r
27 %struct.a = type { i32 }\r
28 \r
29 ; Function Attrs: nounwind ssp\r
30 define i32 @bar(%struct.a* nocapture %b, i32 %shoes) !dbg !4 {\r
31 entry:\r
32 tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16\r
33 %tmp1 = getelementptr inbounds %struct.a, %struct.a* %b, i64 0, i32 0, !dbg !17\r
34 br label %bb3\r
35 \r
36 bb1: ; preds = %bb2\r
37 tail call void @llvm.dbg.value(metadata i32 %shoes, metadata !9, metadata !DIExpression()), !dbg !16\r
38 %add = add nsw i32 %tmp2, 1, !dbg !18\r
39 br label %exit\r
40 \r
41 bb2: ; preds = %bb3\r
42 tail call void @llvm.dbg.value(metadata i32 %tmp2, metadata !14, metadata !DIExpression()), !dbg !17\r
43 %call = tail call i32 (...) @foo(i32 %tmp2), !dbg !19\r
44 br label %bb1\r
45 \r
46 bb3: ; preds = %entry\r
47 %tmp2 = load i32, i32* %tmp1, align 4, !dbg !17\r
48 br label %bb2\r
49 \r
50 exit: ; preds = %bb1\r
51 ret i32 %shoes, !dbg !18\r
52 }\r
53 \r
54 declare i32 @foo(...)\r
55 \r
56 ; Function Attrs: nounwind readnone speculatable willreturn\r
57 declare void @llvm.dbg.value(metadata, metadata, metadata)\r
58 \r
59 !llvm.dbg.cu = !{!0}\r
60 !llvm.module.flags = !{!3}\r
61 \r
62 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 2.9 (trunk 122997)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !2)\r
63 !1 = !DIFile(filename: "bar.c", directory: "/private/tmp")\r
64 !2 = !{}\r
65 !3 = !{i32 1, !"Debug Info Version", i32 3}\r
66 !4 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 5, type: !5, virtualIndex: 6, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !8)\r
67 !5 = !DISubroutineType(types: !6)\r
68 !6 = !{!7}\r
69 !7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)\r
70 !8 = !{!9, !14}\r
71 !9 = !DILocalVariable(name: "b", arg: 1, scope: !4, file: !1, line: 5, type: !10)\r
72 !10 = !DIDerivedType(tag: DW_TAG_pointer_type, scope: !0, baseType: !11, size: 64, align: 64)\r
73 !11 = !DICompositeType(tag: DW_TAG_structure_type, name: "a", scope: !0, file: !1, line: 1, size: 32, align: 32, elements: !12)\r
74 !12 = !{!13}\r
75 !13 = !DIDerivedType(tag: DW_TAG_member, name: "c", scope: !1, file: !1, line: 2, baseType: !7, size: 32, align: 32)\r
76 !14 = !DILocalVariable(name: "x", scope: !15, file: !1, line: 6, type: !7)\r
77 !15 = distinct !DILexicalBlock(scope: !4, file: !1, line: 5, column: 22)\r
78 !16 = !DILocation(line: 5, column: 19, scope: !4)\r
79 !17 = !DILocation(line: 6, column: 14, scope: !15)\r
80 !18 = !DILocation(line: 8, column: 2, scope: !15)\r
81 !19 = !DILocation(line: 7, column: 2, scope: !15)\r
82 \r
83 ...\r
84 ---\r
85 name: bar\r
86 tracksRegLiveness: true\r
87 body: |\r
88 bb.0.entry:\r
89 liveins: $rdi, $rsi\r
90 \r
91 %4:gr64= COPY $rsi\r
92 %2:gr64 = COPY $rdi\r
93 DBG_VALUE_LIST !14, !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus), %2, %4, debug-location !17\r
94 %3:gr64 = COPY killed %2\r
95 %5:gr64 = COPY killed %4\r
96 \r
97 ; Force allocation into $rax and $rbx\r
98 INLINEASM &"", 1, 12, implicit-def dead $rcx, 12, implicit-def dead $rdx, 12, implicit-def dead $rsi, 12, implicit-def dead $rdi, 12, implicit-def $rbp, 12, implicit-def dead $r8, 12, implicit-def dead $r9, 12, implicit-def dead $r10, 12, implicit-def dead $r11, 12, implicit-def dead $r12, 12, implicit-def dead $r13, 12, implicit-def dead $r14, 12, implicit-def dead $r15, 12, !18, debug-location !17\r
99 \r
100 ; Force a use of these two registers.\r
101 CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5\r
102 \r
103 ; Now make the register allocator move them to rcx and rdx!\r
104 INLINEASM &"", 1, 12, implicit-def dead $rax, 12, implicit-def dead $rbx, 12, implicit-def dead $rsi, 12, implicit-def dead $rdi, 12, implicit-def $rbp, 12, implicit-def dead $r8, 12, implicit-def dead $r9, 12, implicit-def dead $r10, 12, implicit-def dead $r11, 12, implicit-def dead $r12, 12, implicit-def dead $r13, 12, implicit-def dead $r14, 12, implicit-def dead $r15, 12, !18, debug-location !17\r
105 \r
106 CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit %3, implicit %5\r
107 \r
108 RETQ\r
109 ...\r