| blob | fea7913f93aeb61df888b67e7ec8c3e74149651d |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -loop-vectorize -S -o - | FileCheck %s
4 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
5 target triple = "x86_64-unknown-linux-gnu"
7 ; This test checks that the given loop still beneficial for vecotization
8 ; even if it contains scalarized load (gather on AVX2)
10 ; Function Attrs: norecurse nounwind readonly uwtable
11 define i32 @matrix_row_col([100 x i32]* nocapture readonly %data, i32 %i, i32 %j) local_unnamed_addr #0 {
12 ; CHECK-LABEL: @matrix_row_col(
13 ; CHECK-NEXT: entry:
14 ; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[I:%.*]] to i64
15 ; CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[J:%.*]] to i64
16 ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
17 ; CHECK: vector.ph:
18 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
19 ; CHECK: vector.body:
20 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
21 ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <8 x i32> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP37:%.*]], [[VECTOR_BODY]] ]
22 ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
23 ; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1
24 ; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2
25 ; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3
26 ; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 4
27 ; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 5
28 ; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 6
29 ; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 7
30 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA:%.*]], i64 [[IDXPROM]], i64 [[TMP0]]
31 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP8]], i32 0
32 ; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32* [[TMP9]] to <8 x i32>*
33 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x i32>, <8 x i32>* [[TMP10]], align 4, [[TBAA1:!tbaa !.*]]
34 ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[TMP0]], i64 [[IDXPROM5]]
35 ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[TMP1]], i64 [[IDXPROM5]]
36 ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[TMP2]], i64 [[IDXPROM5]]
37 ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[TMP3]], i64 [[IDXPROM5]]
38 ; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[TMP4]], i64 [[IDXPROM5]]
39 ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[TMP5]], i64 [[IDXPROM5]]
40 ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[TMP6]], i64 [[IDXPROM5]]
41 ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[TMP7]], i64 [[IDXPROM5]]
42 ; CHECK-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP11]], align 4, [[TBAA1]]
43 ; CHECK-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP12]], align 4, [[TBAA1]]
44 ; CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP13]], align 4, [[TBAA1]]
45 ; CHECK-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP14]], align 4, [[TBAA1]]
46 ; CHECK-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP15]], align 4, [[TBAA1]]
47 ; CHECK-NEXT: [[TMP24:%.*]] = load i32, i32* [[TMP16]], align 4, [[TBAA1]]
48 ; CHECK-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP17]], align 4, [[TBAA1]]
49 ; CHECK-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP18]], align 4, [[TBAA1]]
50 ; CHECK-NEXT: [[TMP27:%.*]] = insertelement <8 x i32> poison, i32 [[TMP19]], i32 0
51 ; CHECK-NEXT: [[TMP28:%.*]] = insertelement <8 x i32> [[TMP27]], i32 [[TMP20]], i32 1
52 ; CHECK-NEXT: [[TMP29:%.*]] = insertelement <8 x i32> [[TMP28]], i32 [[TMP21]], i32 2
53 ; CHECK-NEXT: [[TMP30:%.*]] = insertelement <8 x i32> [[TMP29]], i32 [[TMP22]], i32 3
54 ; CHECK-NEXT: [[TMP31:%.*]] = insertelement <8 x i32> [[TMP30]], i32 [[TMP23]], i32 4
55 ; CHECK-NEXT: [[TMP32:%.*]] = insertelement <8 x i32> [[TMP31]], i32 [[TMP24]], i32 5
56 ; CHECK-NEXT: [[TMP33:%.*]] = insertelement <8 x i32> [[TMP32]], i32 [[TMP25]], i32 6
57 ; CHECK-NEXT: [[TMP34:%.*]] = insertelement <8 x i32> [[TMP33]], i32 [[TMP26]], i32 7
58 ; CHECK-NEXT: [[TMP35:%.*]] = mul nsw <8 x i32> [[TMP34]], [[WIDE_LOAD]]
59 ; CHECK-NEXT: [[TMP36:%.*]] = add <8 x i32> [[VEC_PHI]], <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
60 ; CHECK-NEXT: [[TMP37]] = add <8 x i32> [[TMP36]], [[TMP35]]
61 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
62 ; CHECK-NEXT: [[TMP38:%.*]] = icmp eq i64 [[INDEX_NEXT]], 96
63 ; CHECK-NEXT: br i1 [[TMP38]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP5:!llvm.loop !.*]]
64 ; CHECK: middle.block:
65 ; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> [[TMP37]])
66 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 100, 96
67 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
68 ; CHECK: scalar.ph:
69 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 96, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
70 ; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP39]], [[MIDDLE_BLOCK]] ]
71 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
72 ; CHECK: for.cond.cleanup:
73 ; CHECK-NEXT: [[ADD7_LCSSA:%.*]] = phi i32 [ [[ADD7:%.*]], [[FOR_BODY]] ], [ [[TMP39]], [[MIDDLE_BLOCK]] ]
74 ; CHECK-NEXT: ret i32 [[ADD7_LCSSA]]
75 ; CHECK: for.body:
76 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
77 ; CHECK-NEXT: [[SUM_015:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[ADD7]], [[FOR_BODY]] ]
78 ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[IDXPROM]], i64 [[INDVARS_IV]]
79 ; CHECK-NEXT: [[TMP40:%.*]] = load i32, i32* [[ARRAYIDX2]], align 4, [[TBAA1]]
80 ; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[DATA]], i64 [[INDVARS_IV]], i64 [[IDXPROM5]]
81 ; CHECK-NEXT: [[TMP41:%.*]] = load i32, i32* [[ARRAYIDX6]], align 4, [[TBAA1]]
82 ; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP41]], [[TMP40]]
83 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUM_015]], 4
84 ; CHECK-NEXT: [[ADD7]] = add i32 [[ADD]], [[MUL]]
85 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
86 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 100
87 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], [[LOOP7:!llvm.loop !.*]]
88 ;
89 entry:
90 %idxprom = sext i32 %i to i64
91 %idxprom5 = sext i32 %j to i64
92 br label %for.body
94 for.cond.cleanup: ; preds = %for.body
95 ret i32 %add7
97 for.body: ; preds = %for.body, %entry
98 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
99 %sum.015 = phi i32 [ 0, %entry ], [ %add7, %for.body ]
100 ; first consecutive load as vector load
101 %arrayidx2 = getelementptr inbounds [100 x i32], [100 x i32]* %data, i64 %idxprom, i64 %indvars.iv
102 %0 = load i32, i32* %arrayidx2, align 4, !tbaa !1
103 ; second strided load scalarized
104 %arrayidx6 = getelementptr inbounds [100 x i32], [100 x i32]* %data, i64 %indvars.iv, i64 %idxprom5
105 %1 = load i32, i32* %arrayidx6, align 4, !tbaa !1
106 %mul = mul nsw i32 %1, %0
107 %add = add i32 %sum.015, 4
108 %add7 = add i32 %add, %mul
109 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
110 %exitcond = icmp eq i64 %indvars.iv.next, 100
111 br i1 %exitcond, label %for.cond.cleanup, label %for.body
112 }
114 attributes #0 = { "target-cpu"="core-avx2" "target-features"="+avx,+avx2,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" }
116 !llvm.ident = !{!0}
118 !0 = !{!"clang version 4.0.0 (cfe/trunk 284570)"}
119 !1 = !{!2, !2, i64 0}
120 !2 = !{!"int", !3, i64 0}
121 !3 = !{!"omnipotent char", !4, i64 0}
122 !4 = !{!"Simple C/C++ TBAA"}