1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S -mtriple=x86_64-pc-linux-gnu -mcpu=generic -mattr=sse2 -slp-vectorizer -pass-remarks-output=%t < %s -slp-threshold=-2 | FileCheck %s
3 ; RUN: FileCheck --input-file=%t --check-prefix=YAML %s
5 define void @fextr(i16* %ptr) {
8 ; CHECK-NEXT: [[LD:%.*]] = load <8 x i16>, <8 x i16>* undef, align 16
9 ; CHECK-NEXT: [[V0:%.*]] = extractelement <8 x i16> [[LD]], i32 0
10 ; CHECK-NEXT: br label [[T:%.*]]
12 ; CHECK-NEXT: [[V1:%.*]] = extractelement <8 x i16> [[LD]], i32 1
13 ; CHECK-NEXT: [[V2:%.*]] = extractelement <8 x i16> [[LD]], i32 2
14 ; CHECK-NEXT: [[V3:%.*]] = extractelement <8 x i16> [[LD]], i32 3
15 ; CHECK-NEXT: [[V4:%.*]] = extractelement <8 x i16> [[LD]], i32 4
16 ; CHECK-NEXT: [[V5:%.*]] = extractelement <8 x i16> [[LD]], i32 5
17 ; CHECK-NEXT: [[V6:%.*]] = extractelement <8 x i16> [[LD]], i32 6
18 ; CHECK-NEXT: [[V7:%.*]] = extractelement <8 x i16> [[LD]], i32 7
19 ; CHECK-NEXT: [[P0:%.*]] = getelementptr inbounds i16, i16* [[PTR:%.*]], i64 0
20 ; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i16, i16* [[PTR]], i64 1
21 ; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i16, i16* [[PTR]], i64 2
22 ; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds i16, i16* [[PTR]], i64 3
23 ; CHECK-NEXT: [[P4:%.*]] = getelementptr inbounds i16, i16* [[PTR]], i64 4
24 ; CHECK-NEXT: [[P5:%.*]] = getelementptr inbounds i16, i16* [[PTR]], i64 5
25 ; CHECK-NEXT: [[P6:%.*]] = getelementptr inbounds i16, i16* [[PTR]], i64 6
26 ; CHECK-NEXT: [[P7:%.*]] = getelementptr inbounds i16, i16* [[PTR]], i64 7
27 ; CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> poison, i16 [[V0]], i32 0
28 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[V1]], i32 1
29 ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[V2]], i32 2
30 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[V3]], i32 3
31 ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[V4]], i32 4
32 ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[V5]], i32 5
33 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[V6]], i32 6
34 ; CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[V7]], i32 7
35 ; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x i16> [[TMP0]], <8 x i16> poison, <8 x i32> <i32 0, i32 undef, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
36 ; CHECK-NEXT: [[TMP8:%.*]] = add <8 x i16> [[TMP7]], [[SHUFFLE]]
37 ; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16* [[P0]] to <8 x i16>*
38 ; CHECK-NEXT: store <8 x i16> [[TMP8]], <8 x i16>* [[TMP9]], align 2
39 ; CHECK-NEXT: ret void
41 ; YAML: Pass: slp-vectorizer
42 ; YAML-NEXT: Name: StoresVectorized
43 ; YAML-NEXT: Function: fextr
45 ; YAML-NEXT: - String: 'Stores SLP vectorized with cost '
46 ; YAML-NEXT: - Cost: '-4'
47 ; YAML-NEXT: - String: ' and with tree size '
48 ; YAML-NEXT: - TreeSize: '4'
51 %LD = load <8 x i16>, <8 x i16>* undef
52 %V0 = extractelement <8 x i16> %LD, i32 0
56 %V1 = extractelement <8 x i16> %LD, i32 1
57 %V2 = extractelement <8 x i16> %LD, i32 2
58 %V3 = extractelement <8 x i16> %LD, i32 3
59 %V4 = extractelement <8 x i16> %LD, i32 4
60 %V5 = extractelement <8 x i16> %LD, i32 5
61 %V6 = extractelement <8 x i16> %LD, i32 6
62 %V7 = extractelement <8 x i16> %LD, i32 7
63 %P0 = getelementptr inbounds i16, i16* %ptr, i64 0
64 %P1 = getelementptr inbounds i16, i16* %ptr, i64 1
65 %P2 = getelementptr inbounds i16, i16* %ptr, i64 2
66 %P3 = getelementptr inbounds i16, i16* %ptr, i64 3
67 %P4 = getelementptr inbounds i16, i16* %ptr, i64 4
68 %P5 = getelementptr inbounds i16, i16* %ptr, i64 5
69 %P6 = getelementptr inbounds i16, i16* %ptr, i64 6
70 %P7 = getelementptr inbounds i16, i16* %ptr, i64 7
71 %A0 = add i16 %V0, %V0
72 %A1 = add i16 %V1, undef
73 %A2 = add i16 %V2, %V0
74 %A3 = add i16 %V3, %V0
75 %A4 = add i16 %V4, %V0
76 %A5 = add i16 %V5, %V0
77 %A6 = add i16 %V6, %V0
78 %A7 = add i16 %V7, %V0
79 store i16 %A0, i16* %P0, align 2
80 store i16 %A1, i16* %P1, align 2
81 store i16 %A2, i16* %P2, align 2
82 store i16 %A3, i16* %P3, align 2
83 store i16 %A4, i16* %P4, align 2
84 store i16 %A5, i16* %P5, align 2
85 store i16 %A6, i16* %P6, align 2
86 store i16 %A7, i16* %P7, align 2