[ORC] Add std::tuple support to SimplePackedSerialization.
[llvm-project.git] / llvm / test / tools / llvm-mca / JSON / X86 / views-custom-parameters.s
blob1301c4acda8321fee3ce1e32ae8a5101f7dae83f
1 # NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
2 # Verify that we create proper JSON for the MCA views TimelineView, ResourcePressureview,
3 # InstructionInfoView and SummaryView.
5 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -lqueue=12 -squeue=12 --json --timeline-max-iterations=1 --timeline --all-stats --all-views < %s | FileCheck %s
6 # RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -lqueue=12 -squeue=12 --json --timeline-max-iterations=1 --timeline --all-stats --all-views -o %t.json < %s
7 # RUN: cat %t.json \
8 # RUN: | %python -c 'import json, sys; json.dump(json.loads(sys.stdin.read()), sys.stdout, sort_keys=True, indent=2)' \
9 # RUN: | FileCheck %s
11 add %eax, %eax
12 add %ebx, %ebx
13 add %ecx, %ecx
14 add %edx, %edx
16 # CHECK: {
17 # CHECK-NEXT: "CodeRegions": [
18 # CHECK-NEXT: {
19 # CHECK-NEXT: "DispatchStatistics": {
20 # CHECK-NEXT: "GROUP": 0,
21 # CHECK-NEXT: "LQ": 0,
22 # CHECK-NEXT: "RAT": 0,
23 # CHECK-NEXT: "RCU": 0,
24 # CHECK-NEXT: "SCHEDQ": 0,
25 # CHECK-NEXT: "SQ": 0,
26 # CHECK-NEXT: "USH": 0
27 # CHECK-NEXT: },
28 # CHECK-NEXT: "InstructionInfoView": {
29 # CHECK-NEXT: "InstructionList": [
30 # CHECK-NEXT: {
31 # CHECK-NEXT: "Instruction": 0,
32 # CHECK-NEXT: "Latency": 1,
33 # CHECK-NEXT: "NumMicroOpcodes": 1,
34 # CHECK-NEXT: "RThroughput": 0.25,
35 # CHECK-NEXT: "hasUnmodeledSideEffects": false,
36 # CHECK-NEXT: "mayLoad": false,
37 # CHECK-NEXT: "mayStore": false
38 # CHECK-NEXT: },
39 # CHECK-NEXT: {
40 # CHECK-NEXT: "Instruction": 1,
41 # CHECK-NEXT: "Latency": 1,
42 # CHECK-NEXT: "NumMicroOpcodes": 1,
43 # CHECK-NEXT: "RThroughput": 0.25,
44 # CHECK-NEXT: "hasUnmodeledSideEffects": false,
45 # CHECK-NEXT: "mayLoad": false,
46 # CHECK-NEXT: "mayStore": false
47 # CHECK-NEXT: },
48 # CHECK-NEXT: {
49 # CHECK-NEXT: "Instruction": 2,
50 # CHECK-NEXT: "Latency": 1,
51 # CHECK-NEXT: "NumMicroOpcodes": 1,
52 # CHECK-NEXT: "RThroughput": 0.25,
53 # CHECK-NEXT: "hasUnmodeledSideEffects": false,
54 # CHECK-NEXT: "mayLoad": false,
55 # CHECK-NEXT: "mayStore": false
56 # CHECK-NEXT: },
57 # CHECK-NEXT: {
58 # CHECK-NEXT: "Instruction": 3,
59 # CHECK-NEXT: "Latency": 1,
60 # CHECK-NEXT: "NumMicroOpcodes": 1,
61 # CHECK-NEXT: "RThroughput": 0.25,
62 # CHECK-NEXT: "hasUnmodeledSideEffects": false,
63 # CHECK-NEXT: "mayLoad": false,
64 # CHECK-NEXT: "mayStore": false
65 # CHECK-NEXT: }
66 # CHECK-NEXT: ]
67 # CHECK-NEXT: },
68 # CHECK-NEXT: "Instructions": [
69 # CHECK-NEXT: "addl\t%eax, %eax",
70 # CHECK-NEXT: "addl\t%ebx, %ebx",
71 # CHECK-NEXT: "addl\t%ecx, %ecx",
72 # CHECK-NEXT: "addl\t%edx, %edx"
73 # CHECK-NEXT: ],
74 # CHECK-NEXT: "Name": "",
75 # CHECK-NEXT: "ResourcePressureView": {
76 # CHECK-NEXT: "ResourcePressureInfo": [
77 # CHECK-NEXT: {
78 # CHECK-NEXT: "InstructionIndex": 0,
79 # CHECK-NEXT: "ResourceIndex": 8,
80 # CHECK-NEXT: "ResourceUsage": 1
81 # CHECK-NEXT: },
82 # CHECK-NEXT: {
83 # CHECK-NEXT: "InstructionIndex": 1,
84 # CHECK-NEXT: "ResourceIndex": 7,
85 # CHECK-NEXT: "ResourceUsage": 1
86 # CHECK-NEXT: },
87 # CHECK-NEXT: {
88 # CHECK-NEXT: "InstructionIndex": 2,
89 # CHECK-NEXT: "ResourceIndex": 3,
90 # CHECK-NEXT: "ResourceUsage": 1
91 # CHECK-NEXT: },
92 # CHECK-NEXT: {
93 # CHECK-NEXT: "InstructionIndex": 3,
94 # CHECK-NEXT: "ResourceIndex": 2,
95 # CHECK-NEXT: "ResourceUsage": 1
96 # CHECK-NEXT: },
97 # CHECK-NEXT: {
98 # CHECK-NEXT: "InstructionIndex": 4,
99 # CHECK-NEXT: "ResourceIndex": 2,
100 # CHECK-NEXT: "ResourceUsage": 1
101 # CHECK-NEXT: },
102 # CHECK-NEXT: {
103 # CHECK-NEXT: "InstructionIndex": 4,
104 # CHECK-NEXT: "ResourceIndex": 3,
105 # CHECK-NEXT: "ResourceUsage": 1
106 # CHECK-NEXT: },
107 # CHECK-NEXT: {
108 # CHECK-NEXT: "InstructionIndex": 4,
109 # CHECK-NEXT: "ResourceIndex": 7,
110 # CHECK-NEXT: "ResourceUsage": 1
111 # CHECK-NEXT: },
112 # CHECK-NEXT: {
113 # CHECK-NEXT: "InstructionIndex": 4,
114 # CHECK-NEXT: "ResourceIndex": 8,
115 # CHECK-NEXT: "ResourceUsage": 1
116 # CHECK-NEXT: }
117 # CHECK-NEXT: ]
118 # CHECK-NEXT: },
119 # CHECK-NEXT: "SummaryView": {
120 # CHECK-NEXT: "BlockRThroughput": 1,
121 # CHECK-NEXT: "DispatchWidth": 4,
122 # CHECK-NEXT: "IPC": 3.883495145631068,
123 # CHECK-NEXT: "Instructions": 400,
124 # CHECK-NEXT: "Iterations": 100,
125 # CHECK-NEXT: "TotalCycles": 103,
126 # CHECK-NEXT: "TotaluOps": 400,
127 # CHECK-NEXT: "uOpsPerCycle": 3.883495145631068
128 # CHECK-NEXT: },
129 # CHECK-NEXT: "TimelineView": {
130 # CHECK-NEXT: "TimelineInfo": [
131 # CHECK-NEXT: {
132 # CHECK-NEXT: "CycleDispatched": 0,
133 # CHECK-NEXT: "CycleExecuted": 2,
134 # CHECK-NEXT: "CycleIssued": 1,
135 # CHECK-NEXT: "CycleReady": 0,
136 # CHECK-NEXT: "CycleRetired": 3
137 # CHECK-NEXT: },
138 # CHECK-NEXT: {
139 # CHECK-NEXT: "CycleDispatched": 0,
140 # CHECK-NEXT: "CycleExecuted": 2,
141 # CHECK-NEXT: "CycleIssued": 1,
142 # CHECK-NEXT: "CycleReady": 0,
143 # CHECK-NEXT: "CycleRetired": 3
144 # CHECK-NEXT: },
145 # CHECK-NEXT: {
146 # CHECK-NEXT: "CycleDispatched": 0,
147 # CHECK-NEXT: "CycleExecuted": 2,
148 # CHECK-NEXT: "CycleIssued": 1,
149 # CHECK-NEXT: "CycleReady": 0,
150 # CHECK-NEXT: "CycleRetired": 3
151 # CHECK-NEXT: },
152 # CHECK-NEXT: {
153 # CHECK-NEXT: "CycleDispatched": 0,
154 # CHECK-NEXT: "CycleExecuted": 2,
155 # CHECK-NEXT: "CycleIssued": 1,
156 # CHECK-NEXT: "CycleReady": 0,
157 # CHECK-NEXT: "CycleRetired": 3
158 # CHECK-NEXT: }
159 # CHECK-NEXT: ]
160 # CHECK-NEXT: }
161 # CHECK-NEXT: }
162 # CHECK-NEXT: ],
163 # CHECK-NEXT: "SimulationParameters": {
164 # CHECK-NEXT: "-lqueue": 12,
165 # CHECK-NEXT: "-march": "x86_64",
166 # CHECK-NEXT: "-mcpu": "haswell",
167 # CHECK-NEXT: "-mtriple": "x86_64-unknown-unknown",
168 # CHECK-NEXT: "-squeue": 12
169 # CHECK-NEXT: },
170 # CHECK-NEXT: "TargetInfo": {
171 # CHECK-NEXT: "CPUName": "haswell",
172 # CHECK-NEXT: "Resources": [
173 # CHECK-NEXT: "HWDivider",
174 # CHECK-NEXT: "HWFPDivider",
175 # CHECK-NEXT: "HWPort0",
176 # CHECK-NEXT: "HWPort1",
177 # CHECK-NEXT: "HWPort2",
178 # CHECK-NEXT: "HWPort3",
179 # CHECK-NEXT: "HWPort4",
180 # CHECK-NEXT: "HWPort5",
181 # CHECK-NEXT: "HWPort6",
182 # CHECK-NEXT: "HWPort7"
183 # CHECK-NEXT: ]
184 # CHECK-NEXT: }
185 # CHECK-NEXT: }