llvm/utils/TableGen/TableGen.cpp

   1 //===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file contains the main function for LLVM's TableGen.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "TableGenBackends.h" // Declares all backends.
  14 #include "llvm/Support/CommandLine.h"
  15 #include "llvm/Support/InitLLVM.h"
  16 #include "llvm/TableGen/Main.h"
  17 #include "llvm/TableGen/Record.h"
  18 #include "llvm/TableGen/SetTheory.h"
  19
  20 using namespace llvm;
  21
  22 enum ActionType {
  23   PrintRecords,
  24   PrintDetailedRecords,
  25   NullBackend,
  26   DumpJSON,
  27   GenEmitter,
  28   GenCodeBeads,
  29   GenRegisterInfo,
  30   GenInstrInfo,
  31   GenInstrDocs,
  32   GenAsmWriter,
  33   GenAsmMatcher,
  34   GenDisassembler,
  35   GenPseudoLowering,
  36   GenCompressInst,
  37   GenCallingConv,
  38   GenDAGISel,
  39   GenDFAPacketizer,
  40   GenFastISel,
  41   GenSubtarget,
  42   GenIntrinsicEnums,
  43   GenIntrinsicImpl,
  44   PrintEnums,
  45   PrintSets,
  46   GenOptParserDefs,
  47   GenOptRST,
  48   GenCTags,
  49   GenAttributes,
  50   GenSearchableTables,
  51   GenGlobalISel,
  52   GenGICombiner,
  53   GenX86EVEX2VEXTables,
  54   GenX86FoldTables,
  55   GenRegisterBank,
  56   GenExegesis,
  57   GenAutomata,
  58   GenDirectivesEnumDecl,
  59   GenDirectivesEnumImpl,
  60 };
  61
  62 namespace llvm {
  63 cl::opt<bool> EmitLongStrLiterals(
  64     "long-string-literals",
  65     cl::desc("when emitting large string tables, prefer string literals over "
  66              "comma-separated char literals. This can be a readability and "
  67              "compile-time performance win, but upsets some compilers"),
  68     cl::Hidden, cl::init(true));
  69 } // end namespace llvm
  70
  71 namespace {
  72 cl::opt<ActionType> Action(
  73     cl::desc("Action to perform:"),
  74     cl::values(
  75         clEnumValN(PrintRecords, "print-records",
  76                    "Print all records to stdout (default)"),
  77         clEnumValN(PrintDetailedRecords, "print-detailed-records",
  78                    "Print full details of all records to stdout"),
  79         clEnumValN(NullBackend, "null-backend",
  80                    "Do nothing after parsing (useful for timing)"),
  81         clEnumValN(DumpJSON, "dump-json",
  82                    "Dump all records as machine-readable JSON"),
  83         clEnumValN(GenEmitter, "gen-emitter", "Generate machine code emitter"),
  84         clEnumValN(GenCodeBeads, "gen-code-beads",
  85                    "Generate machine code beads"),
  86         clEnumValN(GenRegisterInfo, "gen-register-info",
  87                    "Generate registers and register classes info"),
  88         clEnumValN(GenInstrInfo, "gen-instr-info",
  89                    "Generate instruction descriptions"),
  90         clEnumValN(GenInstrDocs, "gen-instr-docs",
  91                    "Generate instruction documentation"),
  92         clEnumValN(GenCallingConv, "gen-callingconv",
  93                    "Generate calling convention descriptions"),
  94         clEnumValN(GenAsmWriter, "gen-asm-writer", "Generate assembly writer"),
  95         clEnumValN(GenDisassembler, "gen-disassembler",
  96                    "Generate disassembler"),
  97         clEnumValN(GenPseudoLowering, "gen-pseudo-lowering",
  98                    "Generate pseudo instruction lowering"),
  99         clEnumValN(GenCompressInst, "gen-compress-inst-emitter",
 100                    "Generate RISCV compressed instructions."),
 101         clEnumValN(GenAsmMatcher, "gen-asm-matcher",
 102                    "Generate assembly instruction matcher"),
 103         clEnumValN(GenDAGISel, "gen-dag-isel",
 104                    "Generate a DAG instruction selector"),
 105         clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer",
 106                    "Generate DFA Packetizer for VLIW targets"),
 107         clEnumValN(GenFastISel, "gen-fast-isel",
 108                    "Generate a \"fast\" instruction selector"),
 109         clEnumValN(GenSubtarget, "gen-subtarget",
 110                    "Generate subtarget enumerations"),
 111         clEnumValN(GenIntrinsicEnums, "gen-intrinsic-enums",
 112                    "Generate intrinsic enums"),
 113         clEnumValN(GenIntrinsicImpl, "gen-intrinsic-impl",
 114                    "Generate intrinsic information"),
 115         clEnumValN(PrintEnums, "print-enums", "Print enum values for a class"),
 116         clEnumValN(PrintSets, "print-sets",
 117                    "Print expanded sets for testing DAG exprs"),
 118         clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
 119                    "Generate option definitions"),
 120         clEnumValN(GenOptRST, "gen-opt-rst", "Generate option RST"),
 121         clEnumValN(GenCTags, "gen-ctags", "Generate ctags-compatible index"),
 122         clEnumValN(GenAttributes, "gen-attrs", "Generate attributes"),
 123         clEnumValN(GenSearchableTables, "gen-searchable-tables",
 124                    "Generate generic binary-searchable table"),
 125         clEnumValN(GenGlobalISel, "gen-global-isel",
 126                    "Generate GlobalISel selector"),
 127         clEnumValN(GenGICombiner, "gen-global-isel-combiner",
 128                    "Generate GlobalISel combiner"),
 129         clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables",
 130                    "Generate X86 EVEX to VEX compress tables"),
 131         clEnumValN(GenX86FoldTables, "gen-x86-fold-tables",
 132                    "Generate X86 fold tables"),
 133         clEnumValN(GenRegisterBank, "gen-register-bank",
 134                    "Generate registers bank descriptions"),
 135         clEnumValN(GenExegesis, "gen-exegesis",
 136                    "Generate llvm-exegesis tables"),
 137         clEnumValN(GenAutomata, "gen-automata", "Generate generic automata"),
 138         clEnumValN(GenDirectivesEnumDecl, "gen-directive-decl",
 139                    "Generate directive related declaration code (header file)"),
 140         clEnumValN(GenDirectivesEnumImpl, "gen-directive-impl",
 141                    "Generate directive related implementation code")));
 142
 143 cl::OptionCategory PrintEnumsCat("Options for -print-enums");
 144 cl::opt<std::string> Class("class", cl::desc("Print Enum list for this class"),
 145                            cl::value_desc("class name"),
 146                            cl::cat(PrintEnumsCat));
 147
 148 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
 149   switch (Action) {
 150   case PrintRecords:
 151     OS << Records;              // No argument, dump all contents
 152     break;
 153   case PrintDetailedRecords:
 154     EmitDetailedRecords(Records, OS);
 155     break;
 156   case NullBackend:             // No backend at all.
 157     break;
 158   case DumpJSON:
 159     EmitJSON(Records, OS);
 160     break;
 161   case GenEmitter:
 162     EmitCodeEmitter(Records, OS);
 163     break;
 164   case GenCodeBeads:
 165     EmitCodeBeads(Records, OS);
 166     break;
 167   case GenRegisterInfo:
 168     EmitRegisterInfo(Records, OS);
 169     break;
 170   case GenInstrInfo:
 171     EmitInstrInfo(Records, OS);
 172     break;
 173   case GenInstrDocs:
 174     EmitInstrDocs(Records, OS);
 175     break;
 176   case GenCallingConv:
 177     EmitCallingConv(Records, OS);
 178     break;
 179   case GenAsmWriter:
 180     EmitAsmWriter(Records, OS);
 181     break;
 182   case GenAsmMatcher:
 183     EmitAsmMatcher(Records, OS);
 184     break;
 185   case GenDisassembler:
 186     EmitDisassembler(Records, OS);
 187     break;
 188   case GenPseudoLowering:
 189     EmitPseudoLowering(Records, OS);
 190     break;
 191   case GenCompressInst:
 192     EmitCompressInst(Records, OS);
 193     break;
 194   case GenDAGISel:
 195     EmitDAGISel(Records, OS);
 196     break;
 197   case GenDFAPacketizer:
 198     EmitDFAPacketizer(Records, OS);
 199     break;
 200   case GenFastISel:
 201     EmitFastISel(Records, OS);
 202     break;
 203   case GenSubtarget:
 204     EmitSubtarget(Records, OS);
 205     break;
 206   case GenIntrinsicEnums:
 207     EmitIntrinsicEnums(Records, OS);
 208     break;
 209   case GenIntrinsicImpl:
 210     EmitIntrinsicImpl(Records, OS);
 211     break;
 212   case GenOptParserDefs:
 213     EmitOptParser(Records, OS);
 214     break;
 215   case GenOptRST:
 216     EmitOptRST(Records, OS);
 217     break;
 218   case PrintEnums:
 219   {
 220     for (Record *Rec : Records.getAllDerivedDefinitions(Class))
 221       OS << Rec->getName() << ", ";
 222     OS << "\n";
 223     break;
 224   }
 225   case PrintSets:
 226   {
 227     SetTheory Sets;
 228     Sets.addFieldExpander("Set", "Elements");
 229     for (Record *Rec : Records.getAllDerivedDefinitions("Set")) {
 230       OS << Rec->getName() << " = [";
 231       const std::vector<Record*> *Elts = Sets.expand(Rec);
 232       assert(Elts && "Couldn't expand Set instance");
 233       for (Record *Elt : *Elts)
 234         OS << ' ' << Elt->getName();
 235       OS << " ]\n";
 236     }
 237     break;
 238   }
 239   case GenCTags:
 240     EmitCTags(Records, OS);
 241     break;
 242   case GenAttributes:
 243     EmitAttributes(Records, OS);
 244     break;
 245   case GenSearchableTables:
 246     EmitSearchableTables(Records, OS);
 247     break;
 248   case GenGlobalISel:
 249     EmitGlobalISel(Records, OS);
 250     break;
 251   case GenGICombiner:
 252     EmitGICombiner(Records, OS);
 253     break;
 254   case GenRegisterBank:
 255     EmitRegisterBank(Records, OS);
 256     break;
 257   case GenX86EVEX2VEXTables:
 258     EmitX86EVEX2VEXTables(Records, OS);
 259     break;
 260   case GenX86FoldTables:
 261     EmitX86FoldTables(Records, OS);
 262     break;
 263   case GenExegesis:
 264     EmitExegesis(Records, OS);
 265     break;
 266   case GenAutomata:
 267     EmitAutomata(Records, OS);
 268     break;
 269   case GenDirectivesEnumDecl:
 270     EmitDirectivesDecl(Records, OS);
 271     break;
 272   case GenDirectivesEnumImpl:
 273     EmitDirectivesImpl(Records, OS);
 274     break;
 275   }
 276
 277   return false;
 278 }
 279 }
 280
 281 int main(int argc, char **argv) {
 282   InitLLVM X(argc, argv);
 283   cl::ParseCommandLineOptions(argc, argv);
 284
 285   return TableGenMain(argv[0], &LLVMTableGenMain);
 286 }
 287
 288 #ifndef __has_feature
 289 #define __has_feature(x) 0
 290 #endif
 291
 292 #if __has_feature(address_sanitizer) || defined(__SANITIZE_ADDRESS__) ||       \
 293     __has_feature(leak_sanitizer)
 294
 295 #include <sanitizer/lsan_interface.h>
 296 // Disable LeakSanitizer for this binary as it has too many leaks that are not
 297 // very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h .
 298 LLVM_ATTRIBUTE_USED int __lsan_is_turned_off() { return 1; }
 299
 300 #endif