[InstCombine] Preserve NSW flags for `lshr (mul nuw X, C1), C2 -> mul nuw nsw X,...
[llvm-project.git] / clang / test / CodeGenCXX / vla-lambda-capturing.cpp
blob2ba0bbe7b971a6f9c8ca11303f4fb7b431bf1f3f
1 // RUN: %clang_cc1 %s -std=c++11 -emit-llvm -o - | FileCheck %s
2 // RUN: %clang_cc1 %s -std=c++11 -emit-pch -o %t
3 // RUN: %clang_cc1 %s -std=c++11 -include-pch %t -emit-llvm -o - | FileCheck %s
5 #ifndef HEADER
6 #define HEADER
8 typedef __INTPTR_TYPE__ intptr_t;
10 // CHECK-DAG: [[CAP_TYPE1:%.+]] = type { [[INTPTR_T:i.+]], ptr, ptr }
11 // CHECK-DAG: [[CAP_TYPE2:%.+]] = type { [[INTPTR_T]], ptr }
12 // CHECK-DAG: [[CAP_TYPE3:%.+]] = type { ptr, [[INTPTR_T]], [[INTPTR_T]], ptr, ptr }
13 // CHECK-DAG: [[CAP_TYPE4:%.+]] = type { ptr, [[INTPTR_T]], ptr, [[INTPTR_T]], ptr }
15 // CHECK: define {{.*}}void [[G:@.+]](
16 // CHECK: [[N_ADDR:%.+]] = alloca [[INTPTR_T]]
17 // CHECK: store [[INTPTR_T]] %{{.+}}, ptr [[N_ADDR]]
18 // CHECK: [[N_VAL:%.+]] = load [[INTPTR_T]], ptr [[N_ADDR]]
19 // CHECK: [[CAP_EXPR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE1]], ptr [[CAP_ARG:%.+]], i{{.+}} 0, i{{.+}} 0
20 // CHECK: store [[INTPTR_T]] [[N_VAL]], ptr [[CAP_EXPR_REF]]
21 // CHECK: [[CAP_BUFFER_ADDR:%.+]] = getelementptr inbounds [[CAP_TYPE1]], ptr [[CAP_ARG]], i{{.+}} 0, i{{.+}} 1
22 // CHECK: store ptr %{{.+}}, ptr [[CAP_BUFFER_ADDR]]
23 // CHECK: [[CAP_N_REF:%.+]] = getelementptr inbounds [[CAP_TYPE1]], ptr [[CAP_ARG:%.+]], i{{.+}} 0, i{{.+}} 2
24 // CHECK: store ptr [[N_ADDR]], ptr [[CAP_N_REF]]
25 // CHECK: call{{.*}} void [[G_LAMBDA:@.+]](ptr {{[^,]*}} [[CAP_ARG]])
26 // CHECK: ret void
27 void g(intptr_t n) {
28 intptr_t buffer[n];
29 [&buffer, &n]() {
30 __typeof(buffer) x;
31 }();
34 // CHECK: void [[G_LAMBDA]](ptr
35 // CHECK: [[THIS:%.+]] = load ptr, ptr
36 // CHECK: [[N_ADDR:%.+]] = getelementptr inbounds [[CAP_TYPE1]], ptr [[THIS]], i{{.+}} 0, i{{.+}} 0
37 // CHECK: [[N:%.+]] = load [[INTPTR_T]], ptr [[N_ADDR]]
38 // CHECK: [[BUFFER_ADDR:%.+]] = getelementptr inbounds [[CAP_TYPE1]], ptr [[THIS]], i{{.+}} 0, i{{.+}} 1
39 // CHECK: [[BUFFER:%.+]] = load ptr, ptr [[BUFFER_ADDR]]
40 // CHECK: call ptr @llvm.stacksave.p0()
41 // CHECK: alloca [[INTPTR_T]], [[INTPTR_T]] [[N]]
42 // CHECK: call void @llvm.stackrestore.p0(
43 // CHECK: ret void
45 template <typename T>
46 void f(T n, T m) {
47 intptr_t buffer[n + m];
48 [&buffer]() {
49 __typeof(buffer) x;
50 }();
53 template <typename T>
54 intptr_t getSize(T);
56 template <typename T>
57 void b(intptr_t n, T arg) {
58 typedef intptr_t ArrTy[getSize(arg)];
59 ArrTy buffer2;
60 ArrTy buffer1[n + arg];
61 intptr_t a;
62 [&]() {
63 n = sizeof(buffer1[n]);
64 [&](){
65 n = sizeof(buffer2);
66 n = sizeof(buffer1);
67 }();
68 }();
71 // CHECK-LABEL: @main
72 int main() {
73 // CHECK: call {{.*}}void [[G]]([[INTPTR_T]] noundef [[INTPTR_T_ATTR:(signext )?]]1)
74 g((intptr_t)1);
75 // CHECK: call {{.*}}void [[F_INT:@.+]]([[INTPTR_T]] noundef [[INTPTR_T_ATTR]]1, [[INTPTR_T]] noundef [[INTPTR_T_ATTR]]2)
76 f((intptr_t)1, (intptr_t)2);
77 // CHECK: call {{.*}}void [[B_INT:@.+]]([[INTPTR_T]] noundef [[INTPTR_T_ATTR]]12, [[INTPTR_T]] noundef [[INTPTR_T_ATTR]]13)
78 b((intptr_t)12, (intptr_t)13);
79 // CHECK: ret i32 0
80 return 0;
83 // CHECK: define linkonce_odr {{.*}}void [[F_INT]]([[INTPTR_T]]
84 // CHECK: [[SIZE:%.+]] = add
85 // CHECK: call ptr @llvm.stacksave.p0()
86 // CHECK: [[BUFFER_ADDR:%.+]] = alloca [[INTPTR_T]], [[INTPTR_T]] [[SIZE]]
87 // CHECK: [[CAP_SIZE_REF:%.+]] = getelementptr inbounds [[CAP_TYPE2]], ptr [[CAP_ARG:%.+]], i{{.+}} 0, i{{.+}} 0
88 // CHECK: store [[INTPTR_T]] [[SIZE]], ptr [[CAP_SIZE_REF]]
89 // CHECK: [[CAP_BUFFER_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE2]], ptr [[CAP_ARG]], i{{.+}} 0, i{{.+}} 1
90 // CHECK: store ptr [[BUFFER_ADDR]], ptr [[CAP_BUFFER_ADDR_REF]]
91 // CHECK: call{{.*}} void [[F_INT_LAMBDA:@.+]](ptr {{[^,]*}} [[CAP_ARG]])
92 // CHECK: call void @llvm.stackrestore.p0(
93 // CHECK: ret void
94 // CHECK: void [[B_INT]]([[INTPTR_T]]
95 // CHECK: [[SIZE1:%.+]] = call {{.*}}[[INTPTR_T]]
96 // CHECK: call ptr @llvm.stacksave.p0()
97 // CHECK: [[BUFFER2_ADDR:%.+]] = alloca [[INTPTR_T]], [[INTPTR_T]] [[SIZE1]]
98 // CHECK: [[SIZE2:%.+]] = add
99 // CHECK: [[BUFFER1_ADDR:%.+]] = alloca [[INTPTR_T]], [[INTPTR_T]]
100 // CHECK: [[CAP_N_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[CAP_ARG:%.+]], i{{.+}} 0, i{{.+}} 0
101 // CHECK: store ptr {{%.+}}, ptr [[CAP_N_ADDR_REF]]
102 // CHECK: [[CAP_SIZE2_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[CAP_ARG]], i{{.+}} 0, i{{.+}} 1
103 // CHECK: store i{{[0-9]+}} [[SIZE2]], ptr [[CAP_SIZE2_REF]]
104 // CHECK: [[CAP_SIZE1_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[CAP_ARG]], i{{.+}} 0, i{{.+}} 2
105 // CHECK: store i{{[0-9]+}} [[SIZE1]], ptr [[CAP_SIZE1_REF]]
106 // CHECK: [[CAP_BUFFER1_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[CAP_ARG]], i{{.+}} 0, i{{.+}} 3
107 // CHECK: store ptr [[BUFFER1_ADDR]], ptr [[CAP_BUFFER1_ADDR_REF]]
108 // CHECK: [[CAP_BUFFER2_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[CAP_ARG]], i{{.+}} 0, i{{.+}} 4
109 // CHECK: store ptr [[BUFFER2_ADDR]], ptr [[CAP_BUFFER2_ADDR_REF]]
110 // CHECK: call{{.*}} void [[B_INT_LAMBDA:@.+]](ptr {{[^,]*}} [[CAP_ARG]])
111 // CHECK: call void @llvm.stackrestore.p0(
112 // CHECK: ret void
114 // CHECK: define linkonce_odr{{.*}} void [[F_INT_LAMBDA]](ptr
115 // CHECK: [[THIS:%.+]] = load ptr, ptr
116 // CHECK: [[SIZE_REF:%.+]] = getelementptr inbounds [[CAP_TYPE2]], ptr [[THIS]], i{{.+}} 0, i{{.+}} 0
117 // CHECK: [[SIZE:%.+]] = load [[INTPTR_T]], ptr [[SIZE_REF]]
118 // CHECK: call ptr @llvm.stacksave.p0()
119 // CHECK: alloca [[INTPTR_T]], [[INTPTR_T]] [[SIZE]]
120 // CHECK: call void @llvm.stackrestore.p0(
121 // CHECK: ret void
123 // CHECK: define linkonce_odr{{.*}} void [[B_INT_LAMBDA]](ptr
124 // CHECK: [[SIZE2_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[THIS:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1
125 // CHECK: [[SIZE2:%.+]] = load i{{[0-9]+}}, ptr [[SIZE2_REF]]
126 // CHECK: [[SIZE1_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
127 // CHECK: [[SIZE1:%.+]] = load i{{[0-9]+}}, ptr [[SIZE1_REF]]
128 // CHECK: [[BUFFER1_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 3
129 // CHECK: [[BUFFER1_ADDR:%.+]] = load ptr, ptr [[BUFFER1_ADDR_REF]]
130 // CHECK: [[N_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
131 // CHECK: [[N_ADDR:%.+]] = load ptr, ptr [[N_ADDR_REF]]
132 // CHECK: [[N:%.+]] = load [[INTPTR_T]], ptr [[N_ADDR]]
133 // CHECK: [[ELEM_OFFSET:%.+]] = mul {{.*}} i{{[0-9]+}} [[N]], [[SIZE1]]
134 // CHECK: [[ELEM_ADDR:%.+]] = getelementptr inbounds [[INTPTR_T]], ptr [[BUFFER1_ADDR]], i{{[0-9]+}} [[ELEM_OFFSET]]
135 // CHECK: [[SIZEOF:%.+]] = mul {{.*}} i{{[0-9]+}} {{[0-9]+}}, [[SIZE1]]
136 // CHECK: [[N_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
137 // CHECK: [[N_ADDR:%.+]] = load ptr, ptr [[N_ADDR_REF]]
138 // CHECK: store [[INTPTR_T]] {{%.+}}, ptr [[N_ADDR]]
139 // CHECK: [[N_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[CAP:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
140 // CHECK: [[N_ADDR_REF_ORIG:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 0
141 // CHECK: [[N_ADDR_ORIG:%.+]] = load ptr, ptr [[N_ADDR_REF_ORIG]]
142 // CHECK: store ptr [[N_ADDR_ORIG]], ptr [[N_ADDR_REF]]
143 // CHECK: [[SIZE1_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[CAP]], i{{[0-9]+}} 0, i{{[0-9]+}} 1
144 // CHECK: store i{{[0-9]+}} [[SIZE1]], ptr [[SIZE1_REF]]
145 // CHECK: [[BUFFER2_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[CAP]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
146 // CHECK: [[BUFFER2_ADDR_REF_ORIG:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 4
147 // CHECK: [[BUFFER2_ADDR_ORIG:%.+]] = load ptr, ptr [[BUFFER2_ADDR_REF_ORIG]]
148 // CHECK: store ptr [[BUFFER2_ADDR_ORIG]], ptr [[BUFFER2_ADDR_REF]]
149 // CHECK: [[SIZE2_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[CAP]], i{{[0-9]+}} 0, i{{[0-9]+}} 3
150 // CHECK: store i{{[0-9]+}} [[SIZE2]], ptr [[SIZE2_REF]]
151 // CHECK: [[BUFFER1_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[CAP]], i{{[0-9]+}} 0, i{{[0-9]+}} 4
152 // CHECK: [[BUFFER1_ADDR_REF_ORIG:%.+]] = getelementptr inbounds [[CAP_TYPE3]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 3
153 // CHECK: [[BUFFER1_ADDR_ORIG:%.+]] = load ptr, ptr [[BUFFER1_ADDR_REF_ORIG]]
154 // CHECK: store ptr [[BUFFER1_ADDR_ORIG]], ptr [[BUFFER1_ADDR_REF]]
155 // CHECK: call{{.*}} void [[B_INT_LAMBDA_LAMBDA:@.+]](ptr {{[^,]*}} [[CAP]])
156 // CHECK: ret void
158 // CHECK: define linkonce_odr{{.*}} void [[B_INT_LAMBDA_LAMBDA]](ptr
159 // CHECK: [[SIZE1_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[THIS:%.+]], i{{[0-9]+}} 0, i{{[0-9]+}} 1
160 // CHECK: [[SIZE1:%.+]] = load i{{[0-9]+}}, ptr [[SIZE1_REF]]
161 // CHECK: [[SIZE2_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 3
162 // CHECK: [[SIZE2:%.+]] = load i{{[0-9]+}}, ptr [[SIZE2_REF]]
163 // CHECK: [[BUFFER2_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 2
164 // CHECK: [[BUFFER2_ADDR:%.+]] = load ptr, ptr [[BUFFER2_ADDR_REF]]
165 // CHECK: [[SIZEOF_BUFFER2:%.+]] = mul {{.*}} i{{[0-9]+}} {{[0-9]+}}, [[SIZE1]]
166 // CHECK: [[BUFFER1_ADDR_REF:%.+]] = getelementptr inbounds [[CAP_TYPE4]], ptr [[THIS]], i{{[0-9]+}} 0, i{{[0-9]+}} 4
167 // CHECK: [[BUFFER1_ADDR:%.+]] = load ptr, ptr [[BUFFER1_ADDR_REF]]
168 // CHECK: [[MUL:%.+]] = mul {{.*}} i{{[0-9]+}} [[SIZE2]], [[SIZE1]]
169 // CHECK: mul {{.*}} i{{[0-9]+}} {{[0-9]+}}, [[MUL]]
170 // CHECK: ret void
171 #endif