1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S < %s | FileCheck %s
4 define <16 x i8> @test_laneselect(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
5 ; CHECK-LABEL: @test_laneselect(
6 ; CHECK-NEXT: [[RES:%.*]] = call <16 x i8> @llvm.wasm.relaxed.laneselect.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])
7 ; CHECK-NEXT: ret <16 x i8> [[RES]]
9 %res = call <16 x i8> @llvm.wasm.laneselect.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
13 define <8 x i16> @test_dot(<16 x i8> %a, <16 x i8> %b) {
14 ; CHECK-LABEL: @test_dot(
15 ; CHECK-NEXT: [[RES:%.*]] = call <8 x i16> @llvm.wasm.relaxed.dot.i8x16.i7x16.signed(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]])
16 ; CHECK-NEXT: ret <8 x i16> [[RES]]
18 %res = call <8 x i16> @llvm.wasm.dot.i8x16.i7x16.signed(<16 x i8> %a, <16 x i8> %b)
22 define <4 x i32> @test_dot_add(<16 x i8> %a, <16 x i8> %b, <4 x i32> %c) {
23 ; CHECK-LABEL: @test_dot_add(
24 ; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.wasm.relaxed.dot.i8x16.i7x16.add.signed(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <4 x i32> [[C:%.*]])
25 ; CHECK-NEXT: ret <4 x i32> [[RES]]
27 %res = call <4 x i32> @llvm.wasm.dot.i8x16.i7x16.add.signed(<16 x i8> %a, <16 x i8> %b, <4 x i32> %c)
31 define <4 x float> @test_fma(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
32 ; CHECK-LABEL: @test_fma(
33 ; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.wasm.relaxed.madd.v4f32(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
34 ; CHECK-NEXT: ret <4 x float> [[RES]]
36 %res = call <4 x float> @llvm.wasm.fma.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c)
40 define <4 x float> @test_fms(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
41 ; CHECK-LABEL: @test_fms(
42 ; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.wasm.relaxed.nmadd.v4f32(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
43 ; CHECK-NEXT: ret <4 x float> [[RES]]
45 %res = call <4 x float> @llvm.wasm.fms.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c)
49 declare <16 x i8> @llvm.wasm.laneselect.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
50 declare <8 x i16> @llvm.wasm.dot.i8x16.i7x16.signed(<16 x i8>, <16 x i8>)
51 declare <4 x i32> @llvm.wasm.dot.i8x16.i7x16.add.signed(<16 x i8>, <16 x i8>, <4 x i32>)
52 declare <4 x float> @llvm.wasm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>)
53 declare <4 x float> @llvm.wasm.fms.v4f32(<4 x float>, <4 x float>, <4 x float>)