[Clang][SME2] Enable multi-vector loads & stores for SME2 (#75821)
[llvm-project.git] / compiler-rt / lib / builtins / divsi3.c
blobf514407477f333e00e2c00b6b1f1524679525fbe
1 //===-- divsi3.c - Implement __divsi3 -------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements __divsi3 for the compiler_rt library.
11 //===----------------------------------------------------------------------===//
13 #include "int_lib.h"
15 // Returns: a / b
17 #define fixint_t si_int
18 #define fixuint_t su_int
19 // On CPUs without unsigned hardware division support,
20 // this calls __udivsi3 (notice the cast to su_int).
21 // On CPUs with unsigned hardware division support,
22 // this uses the unsigned division instruction.
23 #define COMPUTE_UDIV(a, b) ((su_int)(a) / (su_int)(b))
24 #include "int_div_impl.inc"
26 COMPILER_RT_ABI si_int __divsi3(si_int a, si_int b) { return __divXi3(a, b); }
28 #if defined(__ARM_EABI__)
29 COMPILER_RT_ALIAS(__divsi3, __aeabi_idiv)
30 #endif