[Clang][SME2] Enable multi-vector loads & stores for SME2 (#75821)
[llvm-project.git] / compiler-rt / lib / builtins / floatunsisf.c
blobec062b5943e98cb0c2b6588d5b7c728ae7a4d5e3
1 //===-- lib/floatunsisf.c - uint -> single-precision conversion ---*- C -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements unsigned integer to single-precision conversion for the
10 // compiler-rt library in the IEEE-754 default round-to-nearest, ties-to-even
11 // mode.
13 //===----------------------------------------------------------------------===//
15 #define SINGLE_PRECISION
16 #include "fp_lib.h"
18 #include "int_lib.h"
20 COMPILER_RT_ABI fp_t __floatunsisf(su_int a) {
22 const int aWidth = sizeof a * CHAR_BIT;
24 // Handle zero as a special case to protect clz
25 if (a == 0)
26 return fromRep(0);
28 // Exponent of (fp_t)a is the width of abs(a).
29 const int exponent = (aWidth - 1) - clzsi(a);
30 rep_t result;
32 // Shift a into the significand field, rounding if it is a right-shift
33 if (exponent <= significandBits) {
34 const int shift = significandBits - exponent;
35 result = (rep_t)a << shift ^ implicitBit;
36 } else {
37 const int shift = exponent - significandBits;
38 result = (rep_t)a >> shift ^ implicitBit;
39 rep_t round = (rep_t)a << (typeWidth - shift);
40 if (round > signBit)
41 result++;
42 if (round == signBit)
43 result += result & 1;
46 // Insert the exponent
47 result += (rep_t)(exponent + exponentBias) << significandBits;
48 return fromRep(result);
51 #if defined(__ARM_EABI__)
52 #if defined(COMPILER_RT_ARMHF_TARGET)
53 AEABI_RTABI fp_t __aeabi_ui2f(unsigned int a) { return __floatunsisf(a); }
54 #else
55 COMPILER_RT_ALIAS(__floatunsisf, __aeabi_ui2f)
56 #endif
57 #endif