1 ; RUN: llc -mtriple=spirv-unknown-vulkan-compute -O0 %s -o - --asm-verbose=0 | FileCheck %s
2 ; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - -filetype=obj | spirv-val %}
4 target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"
5 target triple = "spirv-unknown-vulkan1.3-compute"
7 define internal spir_func void @main() #3 {
8 ; CHECK-DAG: OpName %[[#switch_0:]] "reg1"
9 ; CHECK-DAG: OpName %[[#switch_1:]] "reg"
11 ; CHECK-DAG: %[[#int_0:]] = OpConstant %[[#]] 0
12 ; CHECK-DAG: %[[#int_1:]] = OpConstant %[[#]] 1
14 ; CHECK: %[[#entry:]] = OpLabel
15 ; CHECK-DAG: %[[#switch_0]] = OpVariable %[[#]] Function
16 ; CHECK-DAG: %[[#switch_1]] = OpVariable %[[#]] Function
17 ; CHECK: OpSelectionMerge %[[#merge:]] None
18 ; CHECK: OpBranchConditional %[[#]] %[[#new_header:]] %[[#unreachable:]]
20 ; CHECK: %[[#new_header]] = OpLabel
21 ; CHECK: OpSelectionMerge %[[#new_merge:]] None
22 ; CHECK: OpBranchConditional %[[#]] %[[#taint_true_merge:]] %[[#br_false:]]
24 ; CHECK: %[[#unreachable]] = OpLabel
25 ; CHECK-NEXT: OpUnreachable
27 ; CHECK: %[[#taint_true_merge]] = OpLabel
28 ; CHECK: OpStore %[[#switch_0]] %[[#int_1]]
29 ; CHECK: OpBranch %[[#new_merge]]
31 ; CHECK: %[[#br_false]] = OpLabel
32 ; CHECK-DAG: OpStore %[[#switch_1]] %[[#int_0]]
33 ; CHECK: OpSelectionMerge %[[#taint_merge:]] None
34 ; CHECK: OpBranchConditional %[[#]] %[[#taint_merge]] %[[#taint_false:]]
36 ; CHECK: %[[#taint_false]] = OpLabel
37 ; CHECK: OpStore %[[#switch_1]] %[[#int_1]]
38 ; CHECK: OpBranch %[[#taint_merge]]
40 ; CHECK: %[[#taint_merge]] = OpLabel
41 ; CHECK: OpStore %[[#switch_0]] %[[#int_0]]
42 ; CHECK: %[[#tmp:]] = OpLoad %[[#]] %[[#switch_1]]
43 ; CHECK: %[[#cond:]] = OpIEqual %[[#]] %[[#int_0]] %[[#tmp]]
44 ; CHECK: OpBranchConditional %[[#cond]] %[[#taint_false_true:]] %[[#new_merge]]
46 ; CHECK: %[[#taint_false_true]] = OpLabel
47 ; CHECK: OpStore %[[#switch_0]] %[[#int_1]]
48 ; CHECK: OpBranch %[[#new_merge]]
50 ; CHECK: %[[#new_merge]] = OpLabel
51 ; CHECK: %[[#tmp:]] = OpLoad %[[#]] %[[#switch_0]]
52 ; CHECK: %[[#cond:]] = OpIEqual %[[#]] %[[#int_0]] %[[#tmp]]
53 ; CHECK: OpBranchConditional %[[#cond]] %[[#merge]] %[[#br_true:]]
55 ; CHECK: %[[#br_true]] = OpLabel
56 ; CHECK: OpBranch %[[#merge]]
58 ; CHECK: %[[#merge]] = OpLabel
62 %0 = call token @llvm.experimental.convergence.entry()
63 %var = alloca i32, align 4
64 br i1 true, label %br_true, label %br_false
67 store i32 0, ptr %var, align 4
68 br i1 true, label %br_true, label %merge
71 store i32 0, ptr %var, align 4
78 declare token @llvm.experimental.convergence.entry() #2
80 attributes #0 = { convergent noinline nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
81 attributes #2 = { convergent nocallback nofree nosync nounwind willreturn memory(none) }
82 attributes #3 = { convergent noinline norecurse nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
84 !llvm.module.flags = !{!0, !1, !2}
86 !0 = !{i32 1, !"wchar_size", i32 4}
87 !1 = !{i32 4, !"dx.disable_optimizations", i32 1}
88 !2 = !{i32 7, !"frame-pointer", i32 2}