| blob | c1ef500d9d3dea3e05c989bd04e944bd22cbd6fe |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
5 declare i16 @llvm.x86.avx512.kunpck.bw(i16, i16) nounwind readnone
7 define i16 @unpckbw_test(i16 %a0, i16 %a1) {
8 ; X86-LABEL: unpckbw_test:
9 ; X86: ## %bb.0:
10 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k0 ## encoding: [0xc5,0xf8,0x90,0x44,0x24,0x04]
11 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
12 ; X86-NEXT: kunpckbw %k1, %k0, %k0 ## encoding: [0xc5,0xfd,0x4b,0xc1]
13 ; X86-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
14 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
15 ; X86-NEXT: retl ## encoding: [0xc3]
16 ;
17 ; X64-LABEL: unpckbw_test:
18 ; X64: ## %bb.0:
19 ; X64-NEXT: kmovw %edi, %k0 ## encoding: [0xc5,0xf8,0x92,0xc7]
20 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
21 ; X64-NEXT: kunpckbw %k1, %k0, %k0 ## encoding: [0xc5,0xfd,0x4b,0xc1]
22 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
23 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
24 ; X64-NEXT: retq ## encoding: [0xc3]
25 %res = call i16 @llvm.x86.avx512.kunpck.bw(i16 %a0, i16 %a1)
26 ret i16 %res
27 }
29 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_pbroadcastd_gpr_512(i32 %x0, <16 x i32> %x1, i16 %mask) {
30 ; X86-LABEL: test_int_x86_avx512_mask_pbroadcastd_gpr_512:
31 ; X86: ## %bb.0:
32 ; X86-NEXT: vpbroadcastd {{[0-9]+}}(%esp), %zmm3 ## encoding: [0x62,0xf2,0x7d,0x48,0x58,0x5c,0x24,0x01]
33 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
34 ; X86-NEXT: vpblendmd %zmm3, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x64,0xcb]
35 ; X86-NEXT: vmovdqa32 %zmm3, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x6f,0xd3]
36 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
37 ; X86-NEXT: retl ## encoding: [0xc3]
38 ;
39 ; X64-LABEL: test_int_x86_avx512_mask_pbroadcastd_gpr_512:
40 ; X64: ## %bb.0:
41 ; X64-NEXT: vmovdqa64 %zmm0, %zmm1 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc8]
42 ; X64-NEXT: vpbroadcastd %edi, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x7c,0xc7]
43 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
44 ; X64-NEXT: vpbroadcastd %edi, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x7c,0xcf]
45 ; X64-NEXT: vpbroadcastd %edi, %zmm2 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x7c,0xd7]
46 ; X64-NEXT: retq ## encoding: [0xc3]
47 %res0 = call <16 x i32> @llvm.x86.avx512.mask.pbroadcast.d.gpr.512(i32 %x0, <16 x i32> %x1, i16 -1)
48 %res1 = call <16 x i32> @llvm.x86.avx512.mask.pbroadcast.d.gpr.512(i32 %x0, <16 x i32> %x1, i16 %mask)
49 %res2 = call <16 x i32> @llvm.x86.avx512.mask.pbroadcast.d.gpr.512(i32 %x0, <16 x i32> zeroinitializer, i16 %mask)
50 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
51 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 1
52 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 2
53 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
54 }
55 declare <16 x i32> @llvm.x86.avx512.mask.pbroadcast.d.gpr.512(i32, <16 x i32>, i16)
58 define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_pbroadcastq_gpr_512(i64 %x0, <8 x i64> %x1, i8 %mask) {
59 ; X86-LABEL: test_int_x86_avx512_mask_pbroadcastq_gpr_512:
60 ; X86: ## %bb.0:
61 ; X86-NEXT: vpbroadcastq {{[0-9]+}}(%esp), %zmm3 ## encoding: [0x62,0xf2,0xfd,0x48,0x59,0x9c,0x24,0x04,0x00,0x00,0x00]
62 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
63 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
64 ; X86-NEXT: vpblendmq %zmm3, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x64,0xcb]
65 ; X86-NEXT: vmovdqa64 %zmm3, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x6f,0xd3]
66 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
67 ; X86-NEXT: retl ## encoding: [0xc3]
68 ;
69 ; X64-LABEL: test_int_x86_avx512_mask_pbroadcastq_gpr_512:
70 ; X64: ## %bb.0:
71 ; X64-NEXT: vmovdqa64 %zmm0, %zmm1 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc8]
72 ; X64-NEXT: vpbroadcastq %rdi, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x7c,0xc7]
73 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
74 ; X64-NEXT: vpbroadcastq %rdi, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x7c,0xcf]
75 ; X64-NEXT: vpbroadcastq %rdi, %zmm2 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x7c,0xd7]
76 ; X64-NEXT: retq ## encoding: [0xc3]
77 %res0 = call <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.gpr.512(i64 %x0, <8 x i64> %x1,i8 -1)
78 %res1 = call <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.gpr.512(i64 %x0, <8 x i64> %x1,i8 %mask)
79 %res2 = call <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.gpr.512(i64 %x0, <8 x i64> zeroinitializer,i8 %mask)
80 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
81 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
82 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 2
83 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5
84 }
85 declare <8 x i64> @llvm.x86.avx512.mask.pbroadcast.q.gpr.512(i64, <8 x i64>, i8)
88 declare <16 x float> @llvm.x86.avx512.mask.broadcast.ss.ps.512(<4 x float>, <16 x float>, i16) nounwind readonly
90 define <16 x float> @test_x86_vbroadcast_ss_ps_512(<4 x float> %a0, <16 x float> %a1) {
91 ; CHECK-LABEL: test_x86_vbroadcast_ss_ps_512:
92 ; CHECK: ## %bb.0:
93 ; CHECK-NEXT: vbroadcastss %xmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x18,0xc0]
94 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
96 %res = call <16 x float> @llvm.x86.avx512.mask.broadcast.ss.ps.512(<4 x float> %a0, <16 x float> undef, i16 -1)
97 ret <16 x float> %res
98 }
100 define <16 x float> @test_x86_mask_vbroadcast_ss_ps_512(<4 x float> %a0, <16 x float> %a1, i16 %mask ) {
101 ; X86-LABEL: test_x86_mask_vbroadcast_ss_ps_512:
102 ; X86: ## %bb.0:
103 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
104 ; X86-NEXT: vbroadcastss %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x18,0xc8]
105 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
106 ; X86-NEXT: retl ## encoding: [0xc3]
107 ;
108 ; X64-LABEL: test_x86_mask_vbroadcast_ss_ps_512:
109 ; X64: ## %bb.0:
110 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
111 ; X64-NEXT: vbroadcastss %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x18,0xc8]
112 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
113 ; X64-NEXT: retq ## encoding: [0xc3]
115 %res = call <16 x float> @llvm.x86.avx512.mask.broadcast.ss.ps.512(<4 x float> %a0, <16 x float> %a1, i16 %mask)
116 ret <16 x float> %res
117 }
119 define <16 x float> @test_x86_maskz_vbroadcast_ss_ps_512(<4 x float> %a0, i16 %mask ) {
120 ; X86-LABEL: test_x86_maskz_vbroadcast_ss_ps_512:
121 ; X86: ## %bb.0:
122 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
123 ; X86-NEXT: vbroadcastss %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x18,0xc0]
124 ; X86-NEXT: retl ## encoding: [0xc3]
125 ;
126 ; X64-LABEL: test_x86_maskz_vbroadcast_ss_ps_512:
127 ; X64: ## %bb.0:
128 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
129 ; X64-NEXT: vbroadcastss %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x18,0xc0]
130 ; X64-NEXT: retq ## encoding: [0xc3]
132 %res = call <16 x float> @llvm.x86.avx512.mask.broadcast.ss.ps.512(<4 x float> %a0, <16 x float> zeroinitializer, i16 %mask)
133 ret <16 x float> %res
134 }
136 declare <8 x double> @llvm.x86.avx512.mask.broadcast.sd.pd.512(<2 x double>, <8 x double>, i8) nounwind readonly
138 define <8 x double> @test_x86_vbroadcast_sd_pd_512(<2 x double> %a0, <8 x double> %a1) {
139 ; CHECK-LABEL: test_x86_vbroadcast_sd_pd_512:
140 ; CHECK: ## %bb.0:
141 ; CHECK-NEXT: vbroadcastsd %xmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x19,0xc0]
142 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
144 %res = call <8 x double> @llvm.x86.avx512.mask.broadcast.sd.pd.512(<2 x double> %a0, <8 x double> undef, i8 -1)
145 ret <8 x double> %res
146 }
148 define <8 x double> @test_x86_mask_vbroadcast_sd_pd_512(<2 x double> %a0, <8 x double> %a1, i8 %mask ) {
149 ; X86-LABEL: test_x86_mask_vbroadcast_sd_pd_512:
150 ; X86: ## %bb.0:
151 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
152 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
153 ; X86-NEXT: vbroadcastsd %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x19,0xc8]
154 ; X86-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
155 ; X86-NEXT: retl ## encoding: [0xc3]
156 ;
157 ; X64-LABEL: test_x86_mask_vbroadcast_sd_pd_512:
158 ; X64: ## %bb.0:
159 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
160 ; X64-NEXT: vbroadcastsd %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x19,0xc8]
161 ; X64-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
162 ; X64-NEXT: retq ## encoding: [0xc3]
164 %res = call <8 x double> @llvm.x86.avx512.mask.broadcast.sd.pd.512(<2 x double> %a0, <8 x double> %a1, i8 %mask)
165 ret <8 x double> %res
166 }
168 define <8 x double> @test_x86_maskz_vbroadcast_sd_pd_512(<2 x double> %a0, i8 %mask ) {
169 ; X86-LABEL: test_x86_maskz_vbroadcast_sd_pd_512:
170 ; X86: ## %bb.0:
171 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
172 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
173 ; X86-NEXT: vbroadcastsd %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x19,0xc0]
174 ; X86-NEXT: retl ## encoding: [0xc3]
175 ;
176 ; X64-LABEL: test_x86_maskz_vbroadcast_sd_pd_512:
177 ; X64: ## %bb.0:
178 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
179 ; X64-NEXT: vbroadcastsd %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x19,0xc0]
180 ; X64-NEXT: retq ## encoding: [0xc3]
182 %res = call <8 x double> @llvm.x86.avx512.mask.broadcast.sd.pd.512(<2 x double> %a0, <8 x double> zeroinitializer, i8 %mask)
183 ret <8 x double> %res
184 }
186 declare <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32>, <16 x i32>, i16)
188 define <16 x i32>@test_int_x86_avx512_pbroadcastd_512(<4 x i32> %x0, <16 x i32> %x1) {
189 ; CHECK-LABEL: test_int_x86_avx512_pbroadcastd_512:
190 ; CHECK: ## %bb.0:
191 ; CHECK-NEXT: vbroadcastss %xmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x18,0xc0]
192 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
193 %res = call <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32> %x0, <16 x i32> %x1, i16 -1)
194 ret <16 x i32> %res
195 }
197 define <16 x i32>@test_int_x86_avx512_mask_pbroadcastd_512(<4 x i32> %x0, <16 x i32> %x1, i16 %mask) {
198 ; X86-LABEL: test_int_x86_avx512_mask_pbroadcastd_512:
199 ; X86: ## %bb.0:
200 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
201 ; X86-NEXT: vpbroadcastd %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x58,0xc8]
202 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
203 ; X86-NEXT: retl ## encoding: [0xc3]
204 ;
205 ; X64-LABEL: test_int_x86_avx512_mask_pbroadcastd_512:
206 ; X64: ## %bb.0:
207 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
208 ; X64-NEXT: vpbroadcastd %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x58,0xc8]
209 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
210 ; X64-NEXT: retq ## encoding: [0xc3]
211 %res = call <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32> %x0, <16 x i32> %x1, i16 %mask)
212 ret <16 x i32> %res
213 }
215 define <16 x i32>@test_int_x86_avx512_maskz_pbroadcastd_512(<4 x i32> %x0, i16 %mask) {
216 ; X86-LABEL: test_int_x86_avx512_maskz_pbroadcastd_512:
217 ; X86: ## %bb.0:
218 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
219 ; X86-NEXT: vpbroadcastd %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x58,0xc0]
220 ; X86-NEXT: retl ## encoding: [0xc3]
221 ;
222 ; X64-LABEL: test_int_x86_avx512_maskz_pbroadcastd_512:
223 ; X64: ## %bb.0:
224 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
225 ; X64-NEXT: vpbroadcastd %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x58,0xc0]
226 ; X64-NEXT: retq ## encoding: [0xc3]
227 %res = call <16 x i32> @llvm.x86.avx512.pbroadcastd.512(<4 x i32> %x0, <16 x i32> zeroinitializer, i16 %mask)
228 ret <16 x i32> %res
229 }
231 declare <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64>, <8 x i64>, i8)
233 define <8 x i64>@test_int_x86_avx512_pbroadcastq_512(<2 x i64> %x0, <8 x i64> %x1) {
234 ; CHECK-LABEL: test_int_x86_avx512_pbroadcastq_512:
235 ; CHECK: ## %bb.0:
236 ; CHECK-NEXT: vbroadcastsd %xmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x19,0xc0]
237 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
238 %res = call <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64> %x0, <8 x i64> %x1,i8 -1)
239 ret <8 x i64> %res
240 }
242 define <8 x i64>@test_int_x86_avx512_mask_pbroadcastq_512(<2 x i64> %x0, <8 x i64> %x1, i8 %mask) {
243 ; X86-LABEL: test_int_x86_avx512_mask_pbroadcastq_512:
244 ; X86: ## %bb.0:
245 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
246 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
247 ; X86-NEXT: vpbroadcastq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x59,0xc8]
248 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
249 ; X86-NEXT: retl ## encoding: [0xc3]
250 ;
251 ; X64-LABEL: test_int_x86_avx512_mask_pbroadcastq_512:
252 ; X64: ## %bb.0:
253 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
254 ; X64-NEXT: vpbroadcastq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x59,0xc8]
255 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
256 ; X64-NEXT: retq ## encoding: [0xc3]
257 %res = call <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64> %x0, <8 x i64> %x1,i8 %mask)
258 ret <8 x i64> %res
259 }
261 define <8 x i64>@test_int_x86_avx512_maskz_pbroadcastq_512(<2 x i64> %x0, i8 %mask) {
262 ; X86-LABEL: test_int_x86_avx512_maskz_pbroadcastq_512:
263 ; X86: ## %bb.0:
264 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
265 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
266 ; X86-NEXT: vpbroadcastq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x59,0xc0]
267 ; X86-NEXT: retl ## encoding: [0xc3]
268 ;
269 ; X64-LABEL: test_int_x86_avx512_maskz_pbroadcastq_512:
270 ; X64: ## %bb.0:
271 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
272 ; X64-NEXT: vpbroadcastq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x59,0xc0]
273 ; X64-NEXT: retq ## encoding: [0xc3]
274 %res = call <8 x i64> @llvm.x86.avx512.pbroadcastq.512(<2 x i64> %x0, <8 x i64> zeroinitializer,i8 %mask)
275 ret <8 x i64> %res
276 }
278 declare <16 x float> @llvm.x86.avx512.mask.movsldup.512(<16 x float>, <16 x float>, i16)
280 define <16 x float>@test_int_x86_avx512_movsldup_512(<16 x float> %x0, <16 x float> %x1) {
281 ; CHECK-LABEL: test_int_x86_avx512_movsldup_512:
282 ; CHECK: ## %bb.0:
283 ; CHECK-NEXT: vmovsldup %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7e,0x48,0x12,0xc0]
284 ; CHECK-NEXT: ## zmm0 = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
285 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
286 %res = call <16 x float> @llvm.x86.avx512.mask.movsldup.512(<16 x float> %x0, <16 x float> %x1, i16 -1)
287 ret <16 x float> %res
288 }
290 define <16 x float>@test_int_x86_avx512_mask_movsldup_512(<16 x float> %x0, <16 x float> %x1, i16 %x2) {
291 ; X86-LABEL: test_int_x86_avx512_mask_movsldup_512:
292 ; X86: ## %bb.0:
293 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
294 ; X86-NEXT: vmovsldup %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x12,0xc8]
295 ; X86-NEXT: ## zmm1 {%k1} = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
296 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
297 ; X86-NEXT: retl ## encoding: [0xc3]
298 ;
299 ; X64-LABEL: test_int_x86_avx512_mask_movsldup_512:
300 ; X64: ## %bb.0:
301 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
302 ; X64-NEXT: vmovsldup %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x12,0xc8]
303 ; X64-NEXT: ## zmm1 {%k1} = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
304 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
305 ; X64-NEXT: retq ## encoding: [0xc3]
306 %res = call <16 x float> @llvm.x86.avx512.mask.movsldup.512(<16 x float> %x0, <16 x float> %x1, i16 %x2)
307 ret <16 x float> %res
308 }
310 define <16 x float>@test_int_x86_avx512_maskz_movsldup_512(<16 x float> %x0, i16 %x2) {
311 ; X86-LABEL: test_int_x86_avx512_maskz_movsldup_512:
312 ; X86: ## %bb.0:
313 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
314 ; X86-NEXT: vmovsldup %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0xc9,0x12,0xc0]
315 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
316 ; X86-NEXT: retl ## encoding: [0xc3]
317 ;
318 ; X64-LABEL: test_int_x86_avx512_maskz_movsldup_512:
319 ; X64: ## %bb.0:
320 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
321 ; X64-NEXT: vmovsldup %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0xc9,0x12,0xc0]
322 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6,8,8,10,10,12,12,14,14]
323 ; X64-NEXT: retq ## encoding: [0xc3]
324 %res = call <16 x float> @llvm.x86.avx512.mask.movsldup.512(<16 x float> %x0, <16 x float> zeroinitializer, i16 %x2)
325 ret <16 x float> %res
326 }
328 declare <16 x float> @llvm.x86.avx512.mask.movshdup.512(<16 x float>, <16 x float>, i16)
330 define <16 x float>@test_int_x86_avx512_movshdup_512(<16 x float> %x0, <16 x float> %x1) {
331 ; CHECK-LABEL: test_int_x86_avx512_movshdup_512:
332 ; CHECK: ## %bb.0:
333 ; CHECK-NEXT: vmovshdup %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7e,0x48,0x16,0xc0]
334 ; CHECK-NEXT: ## zmm0 = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
335 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
336 %res = call <16 x float> @llvm.x86.avx512.mask.movshdup.512(<16 x float> %x0, <16 x float> %x1, i16 -1)
337 ret <16 x float> %res
338 }
340 define <16 x float>@test_int_x86_avx512_mask_movshdup_512(<16 x float> %x0, <16 x float> %x1, i16 %x2) {
341 ; X86-LABEL: test_int_x86_avx512_mask_movshdup_512:
342 ; X86: ## %bb.0:
343 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
344 ; X86-NEXT: vmovshdup %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x16,0xc8]
345 ; X86-NEXT: ## zmm1 {%k1} = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
346 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
347 ; X86-NEXT: retl ## encoding: [0xc3]
348 ;
349 ; X64-LABEL: test_int_x86_avx512_mask_movshdup_512:
350 ; X64: ## %bb.0:
351 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
352 ; X64-NEXT: vmovshdup %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x16,0xc8]
353 ; X64-NEXT: ## zmm1 {%k1} = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
354 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
355 ; X64-NEXT: retq ## encoding: [0xc3]
356 %res = call <16 x float> @llvm.x86.avx512.mask.movshdup.512(<16 x float> %x0, <16 x float> %x1, i16 %x2)
357 ret <16 x float> %res
358 }
360 define <16 x float>@test_int_x86_avx512_maskz_movshdup_512(<16 x float> %x0, i16 %x2) {
361 ; X86-LABEL: test_int_x86_avx512_maskz_movshdup_512:
362 ; X86: ## %bb.0:
363 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
364 ; X86-NEXT: vmovshdup %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0xc9,0x16,0xc0]
365 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
366 ; X86-NEXT: retl ## encoding: [0xc3]
367 ;
368 ; X64-LABEL: test_int_x86_avx512_maskz_movshdup_512:
369 ; X64: ## %bb.0:
370 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
371 ; X64-NEXT: vmovshdup %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0xc9,0x16,0xc0]
372 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[1,1,3,3,5,5,7,7,9,9,11,11,13,13,15,15]
373 ; X64-NEXT: retq ## encoding: [0xc3]
374 %res = call <16 x float> @llvm.x86.avx512.mask.movshdup.512(<16 x float> %x0, <16 x float> zeroinitializer, i16 %x2)
375 ret <16 x float> %res
376 }
378 declare <8 x double> @llvm.x86.avx512.mask.movddup.512(<8 x double>, <8 x double>, i8)
380 define <8 x double>@test_int_x86_avx512_movddup_512(<8 x double> %x0, <8 x double> %x1) {
381 ; CHECK-LABEL: test_int_x86_avx512_movddup_512:
382 ; CHECK: ## %bb.0:
383 ; CHECK-NEXT: vmovddup %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xff,0x48,0x12,0xc0]
384 ; CHECK-NEXT: ## zmm0 = zmm0[0,0,2,2,4,4,6,6]
385 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
386 %res = call <8 x double> @llvm.x86.avx512.mask.movddup.512(<8 x double> %x0, <8 x double> %x1, i8 -1)
387 ret <8 x double> %res
388 }
390 define <8 x double>@test_int_x86_avx512_mask_movddup_512(<8 x double> %x0, <8 x double> %x1, i8 %x2) {
391 ; X86-LABEL: test_int_x86_avx512_mask_movddup_512:
392 ; X86: ## %bb.0:
393 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
394 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
395 ; X86-NEXT: vmovddup %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xff,0x49,0x12,0xc8]
396 ; X86-NEXT: ## zmm1 {%k1} = zmm0[0,0,2,2,4,4,6,6]
397 ; X86-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
398 ; X86-NEXT: retl ## encoding: [0xc3]
399 ;
400 ; X64-LABEL: test_int_x86_avx512_mask_movddup_512:
401 ; X64: ## %bb.0:
402 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
403 ; X64-NEXT: vmovddup %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xff,0x49,0x12,0xc8]
404 ; X64-NEXT: ## zmm1 {%k1} = zmm0[0,0,2,2,4,4,6,6]
405 ; X64-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
406 ; X64-NEXT: retq ## encoding: [0xc3]
407 %res = call <8 x double> @llvm.x86.avx512.mask.movddup.512(<8 x double> %x0, <8 x double> %x1, i8 %x2)
408 ret <8 x double> %res
409 }
411 define <8 x double>@test_int_x86_avx512_maskz_movddup_512(<8 x double> %x0, i8 %x2) {
412 ; X86-LABEL: test_int_x86_avx512_maskz_movddup_512:
413 ; X86: ## %bb.0:
414 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
415 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
416 ; X86-NEXT: vmovddup %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0xc9,0x12,0xc0]
417 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6]
418 ; X86-NEXT: retl ## encoding: [0xc3]
419 ;
420 ; X64-LABEL: test_int_x86_avx512_maskz_movddup_512:
421 ; X64: ## %bb.0:
422 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
423 ; X64-NEXT: vmovddup %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0xc9,0x12,0xc0]
424 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[0,0,2,2,4,4,6,6]
425 ; X64-NEXT: retq ## encoding: [0xc3]
426 %res = call <8 x double> @llvm.x86.avx512.mask.movddup.512(<8 x double> %x0, <8 x double> zeroinitializer, i8 %x2)
427 ret <8 x double> %res
428 }
430 declare <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double>, i32, <8 x double>, i8)
432 define <8 x double>@test_int_x86_avx512_perm_df_512(<8 x double> %x0, <8 x double> %x2) {
433 ; CHECK-LABEL: test_int_x86_avx512_perm_df_512:
434 ; CHECK: ## %bb.0:
435 ; CHECK-NEXT: vpermpd $3, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x01,0xc0,0x03]
436 ; CHECK-NEXT: ## zmm0 = zmm0[3,0,0,0,7,4,4,4]
437 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
438 %res = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i32 3, <8 x double> %x2, i8 -1)
439 ret <8 x double> %res
440 }
442 define <8 x double>@test_int_x86_avx512_mask_perm_df_512(<8 x double> %x0, <8 x double> %x2, i8 %x3) {
443 ; X86-LABEL: test_int_x86_avx512_mask_perm_df_512:
444 ; X86: ## %bb.0:
445 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
446 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
447 ; X86-NEXT: vpermpd $3, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x01,0xc8,0x03]
448 ; X86-NEXT: ## zmm1 {%k1} = zmm0[3,0,0,0,7,4,4,4]
449 ; X86-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
450 ; X86-NEXT: retl ## encoding: [0xc3]
451 ;
452 ; X64-LABEL: test_int_x86_avx512_mask_perm_df_512:
453 ; X64: ## %bb.0:
454 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
455 ; X64-NEXT: vpermpd $3, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x01,0xc8,0x03]
456 ; X64-NEXT: ## zmm1 {%k1} = zmm0[3,0,0,0,7,4,4,4]
457 ; X64-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
458 ; X64-NEXT: retq ## encoding: [0xc3]
459 %res = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i32 3, <8 x double> %x2, i8 %x3)
460 ret <8 x double> %res
461 }
463 define <8 x double>@test_int_x86_avx512_maskz_perm_df_512(<8 x double> %x0, i8 %x3) {
464 ; X86-LABEL: test_int_x86_avx512_maskz_perm_df_512:
465 ; X86: ## %bb.0:
466 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
467 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
468 ; X86-NEXT: vpermpd $3, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x01,0xc0,0x03]
469 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[3,0,0,0,7,4,4,4]
470 ; X86-NEXT: retl ## encoding: [0xc3]
471 ;
472 ; X64-LABEL: test_int_x86_avx512_maskz_perm_df_512:
473 ; X64: ## %bb.0:
474 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
475 ; X64-NEXT: vpermpd $3, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x01,0xc0,0x03]
476 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[3,0,0,0,7,4,4,4]
477 ; X64-NEXT: retq ## encoding: [0xc3]
478 %res = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i32 3, <8 x double> zeroinitializer, i8 %x3)
479 ret <8 x double> %res
480 }
482 declare <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64>, i32, <8 x i64>, i8)
484 define <8 x i64>@test_int_x86_avx512_perm_di_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2) {
485 ; CHECK-LABEL: test_int_x86_avx512_perm_di_512:
486 ; CHECK: ## %bb.0:
487 ; CHECK-NEXT: vpermpd $3, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x01,0xc0,0x03]
488 ; CHECK-NEXT: ## zmm0 = zmm0[3,0,0,0,7,4,4,4]
489 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
490 %res = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 -1)
491 ret <8 x i64> %res
492 }
494 define <8 x i64>@test_int_x86_avx512_mask_perm_di_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) {
495 ; X86-LABEL: test_int_x86_avx512_mask_perm_di_512:
496 ; X86: ## %bb.0:
497 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
498 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
499 ; X86-NEXT: vpermq $3, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x00,0xc8,0x03]
500 ; X86-NEXT: ## zmm1 {%k1} = zmm0[3,0,0,0,7,4,4,4]
501 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
502 ; X86-NEXT: retl ## encoding: [0xc3]
503 ;
504 ; X64-LABEL: test_int_x86_avx512_mask_perm_di_512:
505 ; X64: ## %bb.0:
506 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
507 ; X64-NEXT: vpermq $3, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x00,0xc8,0x03]
508 ; X64-NEXT: ## zmm1 {%k1} = zmm0[3,0,0,0,7,4,4,4]
509 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
510 ; X64-NEXT: retq ## encoding: [0xc3]
511 %res = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 %x3)
512 ret <8 x i64> %res
513 }
515 define <8 x i64>@test_int_x86_avx512_maskz_perm_di_512(<8 x i64> %x0, i32 %x1, i8 %x3) {
516 ; X86-LABEL: test_int_x86_avx512_maskz_perm_di_512:
517 ; X86: ## %bb.0:
518 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
519 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
520 ; X86-NEXT: vpermq $3, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x00,0xc0,0x03]
521 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[3,0,0,0,7,4,4,4]
522 ; X86-NEXT: retl ## encoding: [0xc3]
523 ;
524 ; X64-LABEL: test_int_x86_avx512_maskz_perm_di_512:
525 ; X64: ## %bb.0:
526 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
527 ; X64-NEXT: vpermq $3, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x00,0xc0,0x03]
528 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[3,0,0,0,7,4,4,4]
529 ; X64-NEXT: retq ## encoding: [0xc3]
530 %res = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i32 3, <8 x i64> zeroinitializer, i8 %x3)
531 ret <8 x i64> %res
532 }
534 define void @test_store1(<16 x float> %data, ptr %ptr, ptr %ptr2, i16 %mask) {
535 ; X86-LABEL: test_store1:
536 ; X86: ## %bb.0:
537 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
538 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
539 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x0c]
540 ; X86-NEXT: vmovups %zmm0, (%ecx) {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x11,0x01]
541 ; X86-NEXT: vmovups %zmm0, (%eax) ## encoding: [0x62,0xf1,0x7c,0x48,0x11,0x00]
542 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
543 ; X86-NEXT: retl ## encoding: [0xc3]
544 ;
545 ; X64-LABEL: test_store1:
546 ; X64: ## %bb.0:
547 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
548 ; X64-NEXT: vmovups %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x11,0x07]
549 ; X64-NEXT: vmovups %zmm0, (%rsi) ## encoding: [0x62,0xf1,0x7c,0x48,0x11,0x06]
550 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
551 ; X64-NEXT: retq ## encoding: [0xc3]
552 call void @llvm.x86.avx512.mask.storeu.ps.512(ptr %ptr, <16 x float> %data, i16 %mask)
553 call void @llvm.x86.avx512.mask.storeu.ps.512(ptr %ptr2, <16 x float> %data, i16 -1)
554 ret void
555 }
557 declare void @llvm.x86.avx512.mask.storeu.ps.512(ptr, <16 x float>, i16 )
559 define void @test_store2(<8 x double> %data, ptr %ptr, ptr %ptr2, i8 %mask) {
560 ; X86-LABEL: test_store2:
561 ; X86: ## %bb.0:
562 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
563 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
564 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx ## encoding: [0x0f,0xb6,0x54,0x24,0x0c]
565 ; X86-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
566 ; X86-NEXT: vmovupd %zmm0, (%ecx) {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x11,0x01]
567 ; X86-NEXT: vmovupd %zmm0, (%eax) ## encoding: [0x62,0xf1,0xfd,0x48,0x11,0x00]
568 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
569 ; X86-NEXT: retl ## encoding: [0xc3]
570 ;
571 ; X64-LABEL: test_store2:
572 ; X64: ## %bb.0:
573 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
574 ; X64-NEXT: vmovupd %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x11,0x07]
575 ; X64-NEXT: vmovupd %zmm0, (%rsi) ## encoding: [0x62,0xf1,0xfd,0x48,0x11,0x06]
576 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
577 ; X64-NEXT: retq ## encoding: [0xc3]
578 call void @llvm.x86.avx512.mask.storeu.pd.512(ptr %ptr, <8 x double> %data, i8 %mask)
579 call void @llvm.x86.avx512.mask.storeu.pd.512(ptr %ptr2, <8 x double> %data, i8 -1)
580 ret void
581 }
583 declare void @llvm.x86.avx512.mask.storeu.pd.512(ptr, <8 x double>, i8)
585 define void @test_mask_store_aligned_ps(<16 x float> %data, ptr %ptr, ptr %ptr2, i16 %mask) {
586 ; X86-LABEL: test_mask_store_aligned_ps:
587 ; X86: ## %bb.0:
588 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
589 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
590 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x0c]
591 ; X86-NEXT: vmovaps %zmm0, (%ecx) {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x29,0x01]
592 ; X86-NEXT: vmovaps %zmm0, (%eax) ## encoding: [0x62,0xf1,0x7c,0x48,0x29,0x00]
593 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
594 ; X86-NEXT: retl ## encoding: [0xc3]
595 ;
596 ; X64-LABEL: test_mask_store_aligned_ps:
597 ; X64: ## %bb.0:
598 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
599 ; X64-NEXT: vmovaps %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x29,0x07]
600 ; X64-NEXT: vmovaps %zmm0, (%rsi) ## encoding: [0x62,0xf1,0x7c,0x48,0x29,0x06]
601 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
602 ; X64-NEXT: retq ## encoding: [0xc3]
603 call void @llvm.x86.avx512.mask.store.ps.512(ptr %ptr, <16 x float> %data, i16 %mask)
604 call void @llvm.x86.avx512.mask.store.ps.512(ptr %ptr2, <16 x float> %data, i16 -1)
605 ret void
606 }
608 declare void @llvm.x86.avx512.mask.store.ps.512(ptr, <16 x float>, i16 )
610 define void @test_mask_store_aligned_pd(<8 x double> %data, ptr %ptr, ptr %ptr2, i8 %mask) {
611 ; X86-LABEL: test_mask_store_aligned_pd:
612 ; X86: ## %bb.0:
613 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
614 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
615 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx ## encoding: [0x0f,0xb6,0x54,0x24,0x0c]
616 ; X86-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
617 ; X86-NEXT: vmovapd %zmm0, (%ecx) {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x29,0x01]
618 ; X86-NEXT: vmovapd %zmm0, (%eax) ## encoding: [0x62,0xf1,0xfd,0x48,0x29,0x00]
619 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
620 ; X86-NEXT: retl ## encoding: [0xc3]
621 ;
622 ; X64-LABEL: test_mask_store_aligned_pd:
623 ; X64: ## %bb.0:
624 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
625 ; X64-NEXT: vmovapd %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x29,0x07]
626 ; X64-NEXT: vmovapd %zmm0, (%rsi) ## encoding: [0x62,0xf1,0xfd,0x48,0x29,0x06]
627 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
628 ; X64-NEXT: retq ## encoding: [0xc3]
629 call void @llvm.x86.avx512.mask.store.pd.512(ptr %ptr, <8 x double> %data, i8 %mask)
630 call void @llvm.x86.avx512.mask.store.pd.512(ptr %ptr2, <8 x double> %data, i8 -1)
631 ret void
632 }
634 declare void @llvm.x86.avx512.mask.store.pd.512(ptr, <8 x double>, i8)
636 define void@test_int_x86_avx512_mask_storeu_q_512(ptr %ptr1, ptr %ptr2, <8 x i64> %x1, i8 %x2) {
637 ; X86-LABEL: test_int_x86_avx512_mask_storeu_q_512:
638 ; X86: ## %bb.0:
639 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
640 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
641 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx ## encoding: [0x0f,0xb6,0x54,0x24,0x0c]
642 ; X86-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
643 ; X86-NEXT: vmovdqu64 %zmm0, (%ecx) {%k1} ## encoding: [0x62,0xf1,0xfe,0x49,0x7f,0x01]
644 ; X86-NEXT: vmovdqu64 %zmm0, (%eax) ## encoding: [0x62,0xf1,0xfe,0x48,0x7f,0x00]
645 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
646 ; X86-NEXT: retl ## encoding: [0xc3]
647 ;
648 ; X64-LABEL: test_int_x86_avx512_mask_storeu_q_512:
649 ; X64: ## %bb.0:
650 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
651 ; X64-NEXT: vmovdqu64 %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0xfe,0x49,0x7f,0x07]
652 ; X64-NEXT: vmovdqu64 %zmm0, (%rsi) ## encoding: [0x62,0xf1,0xfe,0x48,0x7f,0x06]
653 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
654 ; X64-NEXT: retq ## encoding: [0xc3]
655 call void @llvm.x86.avx512.mask.storeu.q.512(ptr %ptr1, <8 x i64> %x1, i8 %x2)
656 call void @llvm.x86.avx512.mask.storeu.q.512(ptr %ptr2, <8 x i64> %x1, i8 -1)
657 ret void
658 }
660 declare void @llvm.x86.avx512.mask.storeu.q.512(ptr, <8 x i64>, i8)
662 define void@test_int_x86_avx512_mask_storeu_d_512(ptr %ptr1, ptr %ptr2, <16 x i32> %x1, i16 %x2) {
663 ; X86-LABEL: test_int_x86_avx512_mask_storeu_d_512:
664 ; X86: ## %bb.0:
665 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
666 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
667 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x0c]
668 ; X86-NEXT: vmovdqu32 %zmm0, (%ecx) {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x7f,0x01]
669 ; X86-NEXT: vmovdqu64 %zmm0, (%eax) ## encoding: [0x62,0xf1,0xfe,0x48,0x7f,0x00]
670 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
671 ; X86-NEXT: retl ## encoding: [0xc3]
672 ;
673 ; X64-LABEL: test_int_x86_avx512_mask_storeu_d_512:
674 ; X64: ## %bb.0:
675 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
676 ; X64-NEXT: vmovdqu32 %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x7f,0x07]
677 ; X64-NEXT: vmovdqu64 %zmm0, (%rsi) ## encoding: [0x62,0xf1,0xfe,0x48,0x7f,0x06]
678 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
679 ; X64-NEXT: retq ## encoding: [0xc3]
680 call void @llvm.x86.avx512.mask.storeu.d.512(ptr %ptr1, <16 x i32> %x1, i16 %x2)
681 call void @llvm.x86.avx512.mask.storeu.d.512(ptr %ptr2, <16 x i32> %x1, i16 -1)
682 ret void
683 }
685 declare void @llvm.x86.avx512.mask.storeu.d.512(ptr, <16 x i32>, i16)
687 define void@test_int_x86_avx512_mask_store_q_512(ptr %ptr1, ptr %ptr2, <8 x i64> %x1, i8 %x2) {
688 ; X86-LABEL: test_int_x86_avx512_mask_store_q_512:
689 ; X86: ## %bb.0:
690 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
691 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
692 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx ## encoding: [0x0f,0xb6,0x54,0x24,0x0c]
693 ; X86-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
694 ; X86-NEXT: vmovdqa64 %zmm0, (%ecx) {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x7f,0x01]
695 ; X86-NEXT: vmovdqa64 %zmm0, (%eax) ## encoding: [0x62,0xf1,0xfd,0x48,0x7f,0x00]
696 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
697 ; X86-NEXT: retl ## encoding: [0xc3]
698 ;
699 ; X64-LABEL: test_int_x86_avx512_mask_store_q_512:
700 ; X64: ## %bb.0:
701 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
702 ; X64-NEXT: vmovdqa64 %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x7f,0x07]
703 ; X64-NEXT: vmovdqa64 %zmm0, (%rsi) ## encoding: [0x62,0xf1,0xfd,0x48,0x7f,0x06]
704 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
705 ; X64-NEXT: retq ## encoding: [0xc3]
706 call void @llvm.x86.avx512.mask.store.q.512(ptr %ptr1, <8 x i64> %x1, i8 %x2)
707 call void @llvm.x86.avx512.mask.store.q.512(ptr %ptr2, <8 x i64> %x1, i8 -1)
708 ret void
709 }
711 declare void @llvm.x86.avx512.mask.store.q.512(ptr, <8 x i64>, i8)
713 define void@test_int_x86_avx512_mask_store_d_512(ptr %ptr1, ptr %ptr2, <16 x i32> %x1, i16 %x2) {
714 ; X86-LABEL: test_int_x86_avx512_mask_store_d_512:
715 ; X86: ## %bb.0:
716 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
717 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
718 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x0c]
719 ; X86-NEXT: vmovdqa32 %zmm0, (%ecx) {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x7f,0x01]
720 ; X86-NEXT: vmovdqa64 %zmm0, (%eax) ## encoding: [0x62,0xf1,0xfd,0x48,0x7f,0x00]
721 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
722 ; X86-NEXT: retl ## encoding: [0xc3]
723 ;
724 ; X64-LABEL: test_int_x86_avx512_mask_store_d_512:
725 ; X64: ## %bb.0:
726 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
727 ; X64-NEXT: vmovdqa32 %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x7f,0x07]
728 ; X64-NEXT: vmovdqa64 %zmm0, (%rsi) ## encoding: [0x62,0xf1,0xfd,0x48,0x7f,0x06]
729 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
730 ; X64-NEXT: retq ## encoding: [0xc3]
731 call void @llvm.x86.avx512.mask.store.d.512(ptr %ptr1, <16 x i32> %x1, i16 %x2)
732 call void @llvm.x86.avx512.mask.store.d.512(ptr %ptr2, <16 x i32> %x1, i16 -1)
733 ret void
734 }
736 declare void @llvm.x86.avx512.mask.store.d.512(ptr, <16 x i32>, i16)
738 define <16 x float> @test_mask_load_aligned_ps(<16 x float> %data, ptr %ptr, i16 %mask) {
739 ; X86-LABEL: test_mask_load_aligned_ps:
740 ; X86: ## %bb.0:
741 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
742 ; X86-NEXT: vmovaps (%eax), %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0x00]
743 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
744 ; X86-NEXT: vmovaps (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x28,0x00]
745 ; X86-NEXT: vmovaps (%eax), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x28,0x08]
746 ; X86-NEXT: vaddps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x74,0x48,0x58,0xc0]
747 ; X86-NEXT: retl ## encoding: [0xc3]
748 ;
749 ; X64-LABEL: test_mask_load_aligned_ps:
750 ; X64: ## %bb.0:
751 ; X64-NEXT: vmovaps (%rdi), %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0x07]
752 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
753 ; X64-NEXT: vmovaps (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x28,0x07]
754 ; X64-NEXT: vmovaps (%rdi), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x28,0x0f]
755 ; X64-NEXT: vaddps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x74,0x48,0x58,0xc0]
756 ; X64-NEXT: retq ## encoding: [0xc3]
757 %res = call <16 x float> @llvm.x86.avx512.mask.load.ps.512(ptr %ptr, <16 x float> zeroinitializer, i16 -1)
758 %res1 = call <16 x float> @llvm.x86.avx512.mask.load.ps.512(ptr %ptr, <16 x float> %res, i16 %mask)
759 %res2 = call <16 x float> @llvm.x86.avx512.mask.load.ps.512(ptr %ptr, <16 x float> zeroinitializer, i16 %mask)
760 %res4 = fadd <16 x float> %res2, %res1
761 ret <16 x float> %res4
762 }
764 declare <16 x float> @llvm.x86.avx512.mask.load.ps.512(ptr, <16 x float>, i16)
766 define <16 x float> @test_mask_load_unaligned_ps(<16 x float> %data, ptr %ptr, i16 %mask) {
767 ; X86-LABEL: test_mask_load_unaligned_ps:
768 ; X86: ## %bb.0:
769 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
770 ; X86-NEXT: vmovups (%eax), %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x10,0x00]
771 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
772 ; X86-NEXT: vmovups (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x10,0x00]
773 ; X86-NEXT: vmovups (%eax), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x10,0x08]
774 ; X86-NEXT: vaddps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x74,0x48,0x58,0xc0]
775 ; X86-NEXT: retl ## encoding: [0xc3]
776 ;
777 ; X64-LABEL: test_mask_load_unaligned_ps:
778 ; X64: ## %bb.0:
779 ; X64-NEXT: vmovups (%rdi), %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x10,0x07]
780 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
781 ; X64-NEXT: vmovups (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x10,0x07]
782 ; X64-NEXT: vmovups (%rdi), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x10,0x0f]
783 ; X64-NEXT: vaddps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x74,0x48,0x58,0xc0]
784 ; X64-NEXT: retq ## encoding: [0xc3]
785 %res = call <16 x float> @llvm.x86.avx512.mask.loadu.ps.512(ptr %ptr, <16 x float> zeroinitializer, i16 -1)
786 %res1 = call <16 x float> @llvm.x86.avx512.mask.loadu.ps.512(ptr %ptr, <16 x float> %res, i16 %mask)
787 %res2 = call <16 x float> @llvm.x86.avx512.mask.loadu.ps.512(ptr %ptr, <16 x float> zeroinitializer, i16 %mask)
788 %res4 = fadd <16 x float> %res2, %res1
789 ret <16 x float> %res4
790 }
792 declare <16 x float> @llvm.x86.avx512.mask.loadu.ps.512(ptr, <16 x float>, i16)
794 define <8 x double> @test_mask_load_aligned_pd(<8 x double> %data, ptr %ptr, i8 %mask) {
795 ; X86-LABEL: test_mask_load_aligned_pd:
796 ; X86: ## %bb.0:
797 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
798 ; X86-NEXT: vmovapd (%eax), %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0x00]
799 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
800 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
801 ; X86-NEXT: vmovapd (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x28,0x00]
802 ; X86-NEXT: vmovapd (%eax), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x28,0x08]
803 ; X86-NEXT: vaddpd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xf5,0x48,0x58,0xc0]
804 ; X86-NEXT: retl ## encoding: [0xc3]
805 ;
806 ; X64-LABEL: test_mask_load_aligned_pd:
807 ; X64: ## %bb.0:
808 ; X64-NEXT: vmovapd (%rdi), %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0x07]
809 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
810 ; X64-NEXT: vmovapd (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x28,0x07]
811 ; X64-NEXT: vmovapd (%rdi), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x28,0x0f]
812 ; X64-NEXT: vaddpd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xf5,0x48,0x58,0xc0]
813 ; X64-NEXT: retq ## encoding: [0xc3]
814 %res = call <8 x double> @llvm.x86.avx512.mask.load.pd.512(ptr %ptr, <8 x double> zeroinitializer, i8 -1)
815 %res1 = call <8 x double> @llvm.x86.avx512.mask.load.pd.512(ptr %ptr, <8 x double> %res, i8 %mask)
816 %res2 = call <8 x double> @llvm.x86.avx512.mask.load.pd.512(ptr %ptr, <8 x double> zeroinitializer, i8 %mask)
817 %res4 = fadd <8 x double> %res2, %res1
818 ret <8 x double> %res4
819 }
821 declare <8 x double> @llvm.x86.avx512.mask.load.pd.512(ptr, <8 x double>, i8)
823 define <8 x double> @test_mask_load_unaligned_pd(<8 x double> %data, ptr %ptr, i8 %mask) {
824 ; X86-LABEL: test_mask_load_unaligned_pd:
825 ; X86: ## %bb.0:
826 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
827 ; X86-NEXT: vmovupd (%eax), %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x10,0x00]
828 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
829 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
830 ; X86-NEXT: vmovupd (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x10,0x00]
831 ; X86-NEXT: vmovupd (%eax), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x10,0x08]
832 ; X86-NEXT: vaddpd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xf5,0x48,0x58,0xc0]
833 ; X86-NEXT: retl ## encoding: [0xc3]
834 ;
835 ; X64-LABEL: test_mask_load_unaligned_pd:
836 ; X64: ## %bb.0:
837 ; X64-NEXT: vmovupd (%rdi), %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x10,0x07]
838 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
839 ; X64-NEXT: vmovupd (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x10,0x07]
840 ; X64-NEXT: vmovupd (%rdi), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x10,0x0f]
841 ; X64-NEXT: vaddpd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xf5,0x48,0x58,0xc0]
842 ; X64-NEXT: retq ## encoding: [0xc3]
843 %res = call <8 x double> @llvm.x86.avx512.mask.loadu.pd.512(ptr %ptr, <8 x double> zeroinitializer, i8 -1)
844 %res1 = call <8 x double> @llvm.x86.avx512.mask.loadu.pd.512(ptr %ptr, <8 x double> %res, i8 %mask)
845 %res2 = call <8 x double> @llvm.x86.avx512.mask.loadu.pd.512(ptr %ptr, <8 x double> zeroinitializer, i8 %mask)
846 %res4 = fadd <8 x double> %res2, %res1
847 ret <8 x double> %res4
848 }
850 declare <8 x double> @llvm.x86.avx512.mask.loadu.pd.512(ptr, <8 x double>, i8)
852 declare <16 x i32> @llvm.x86.avx512.mask.loadu.d.512(ptr, <16 x i32>, i16)
854 define <16 x i32> @test_mask_load_unaligned_d(ptr %ptr, ptr %ptr2, <16 x i32> %data, i16 %mask) {
855 ; X86-LABEL: test_mask_load_unaligned_d:
856 ; X86: ## %bb.0:
857 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
858 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
859 ; X86-NEXT: vmovdqu64 (%ecx), %zmm0 ## encoding: [0x62,0xf1,0xfe,0x48,0x6f,0x01]
860 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x0c]
861 ; X86-NEXT: vmovdqu32 (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x6f,0x00]
862 ; X86-NEXT: vmovdqu32 (%ecx), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0xc9,0x6f,0x09]
863 ; X86-NEXT: vpaddd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x75,0x48,0xfe,0xc0]
864 ; X86-NEXT: retl ## encoding: [0xc3]
865 ;
866 ; X64-LABEL: test_mask_load_unaligned_d:
867 ; X64: ## %bb.0:
868 ; X64-NEXT: vmovdqu64 (%rdi), %zmm0 ## encoding: [0x62,0xf1,0xfe,0x48,0x6f,0x07]
869 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
870 ; X64-NEXT: vmovdqu32 (%rsi), %zmm0 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x6f,0x06]
871 ; X64-NEXT: vmovdqu32 (%rdi), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0xc9,0x6f,0x0f]
872 ; X64-NEXT: vpaddd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x75,0x48,0xfe,0xc0]
873 ; X64-NEXT: retq ## encoding: [0xc3]
874 %res = call <16 x i32> @llvm.x86.avx512.mask.loadu.d.512(ptr %ptr, <16 x i32> zeroinitializer, i16 -1)
875 %res1 = call <16 x i32> @llvm.x86.avx512.mask.loadu.d.512(ptr %ptr2, <16 x i32> %res, i16 %mask)
876 %res2 = call <16 x i32> @llvm.x86.avx512.mask.loadu.d.512(ptr %ptr, <16 x i32> zeroinitializer, i16 %mask)
877 %res4 = add <16 x i32> %res2, %res1
878 ret <16 x i32> %res4
879 }
881 declare <8 x i64> @llvm.x86.avx512.mask.loadu.q.512(ptr, <8 x i64>, i8)
883 define <8 x i64> @test_mask_load_unaligned_q(ptr %ptr, ptr %ptr2, <8 x i64> %data, i8 %mask) {
884 ; X86-LABEL: test_mask_load_unaligned_q:
885 ; X86: ## %bb.0:
886 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
887 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x04]
888 ; X86-NEXT: vmovdqu64 (%ecx), %zmm0 ## encoding: [0x62,0xf1,0xfe,0x48,0x6f,0x01]
889 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %edx ## encoding: [0x0f,0xb6,0x54,0x24,0x0c]
890 ; X86-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
891 ; X86-NEXT: vmovdqu64 (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf1,0xfe,0x49,0x6f,0x00]
892 ; X86-NEXT: vmovdqu64 (%ecx), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xfe,0xc9,0x6f,0x09]
893 ; X86-NEXT: vpaddq %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xf5,0x48,0xd4,0xc0]
894 ; X86-NEXT: retl ## encoding: [0xc3]
895 ;
896 ; X64-LABEL: test_mask_load_unaligned_q:
897 ; X64: ## %bb.0:
898 ; X64-NEXT: vmovdqu64 (%rdi), %zmm0 ## encoding: [0x62,0xf1,0xfe,0x48,0x6f,0x07]
899 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
900 ; X64-NEXT: vmovdqu64 (%rsi), %zmm0 {%k1} ## encoding: [0x62,0xf1,0xfe,0x49,0x6f,0x06]
901 ; X64-NEXT: vmovdqu64 (%rdi), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xfe,0xc9,0x6f,0x0f]
902 ; X64-NEXT: vpaddq %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xf5,0x48,0xd4,0xc0]
903 ; X64-NEXT: retq ## encoding: [0xc3]
904 %res = call <8 x i64> @llvm.x86.avx512.mask.loadu.q.512(ptr %ptr, <8 x i64> zeroinitializer, i8 -1)
905 %res1 = call <8 x i64> @llvm.x86.avx512.mask.loadu.q.512(ptr %ptr2, <8 x i64> %res, i8 %mask)
906 %res2 = call <8 x i64> @llvm.x86.avx512.mask.loadu.q.512(ptr %ptr, <8 x i64> zeroinitializer, i8 %mask)
907 %res4 = add <8 x i64> %res2, %res1
908 ret <8 x i64> %res4
909 }
911 declare <16 x i32> @llvm.x86.avx512.mask.load.d.512(ptr, <16 x i32>, i16)
913 define <16 x i32> @test_mask_load_aligned_d(<16 x i32> %data, ptr %ptr, i16 %mask) {
914 ; X86-LABEL: test_mask_load_aligned_d:
915 ; X86: ## %bb.0:
916 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
917 ; X86-NEXT: vmovdqa64 (%eax), %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0x00]
918 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
919 ; X86-NEXT: vmovdqa32 (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x6f,0x00]
920 ; X86-NEXT: vmovdqa32 (%eax), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x6f,0x08]
921 ; X86-NEXT: vpaddd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x75,0x48,0xfe,0xc0]
922 ; X86-NEXT: retl ## encoding: [0xc3]
923 ;
924 ; X64-LABEL: test_mask_load_aligned_d:
925 ; X64: ## %bb.0:
926 ; X64-NEXT: vmovdqa64 (%rdi), %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0x07]
927 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
928 ; X64-NEXT: vmovdqa32 (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x6f,0x07]
929 ; X64-NEXT: vmovdqa32 (%rdi), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x6f,0x0f]
930 ; X64-NEXT: vpaddd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x75,0x48,0xfe,0xc0]
931 ; X64-NEXT: retq ## encoding: [0xc3]
932 %res = call <16 x i32> @llvm.x86.avx512.mask.load.d.512(ptr %ptr, <16 x i32> zeroinitializer, i16 -1)
933 %res1 = call <16 x i32> @llvm.x86.avx512.mask.load.d.512(ptr %ptr, <16 x i32> %res, i16 %mask)
934 %res2 = call <16 x i32> @llvm.x86.avx512.mask.load.d.512(ptr %ptr, <16 x i32> zeroinitializer, i16 %mask)
935 %res4 = add <16 x i32> %res2, %res1
936 ret <16 x i32> %res4
937 }
939 declare <8 x i64> @llvm.x86.avx512.mask.load.q.512(ptr, <8 x i64>, i8)
941 define <8 x i64> @test_mask_load_aligned_q(<8 x i64> %data, ptr %ptr, i8 %mask) {
942 ; X86-LABEL: test_mask_load_aligned_q:
943 ; X86: ## %bb.0:
944 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
945 ; X86-NEXT: vmovdqa64 (%eax), %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0x00]
946 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
947 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
948 ; X86-NEXT: vmovdqa64 (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x6f,0x00]
949 ; X86-NEXT: vmovdqa64 (%eax), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x6f,0x08]
950 ; X86-NEXT: vpaddq %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xf5,0x48,0xd4,0xc0]
951 ; X86-NEXT: retl ## encoding: [0xc3]
952 ;
953 ; X64-LABEL: test_mask_load_aligned_q:
954 ; X64: ## %bb.0:
955 ; X64-NEXT: vmovdqa64 (%rdi), %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0x07]
956 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
957 ; X64-NEXT: vmovdqa64 (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x6f,0x07]
958 ; X64-NEXT: vmovdqa64 (%rdi), %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x6f,0x0f]
959 ; X64-NEXT: vpaddq %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xf5,0x48,0xd4,0xc0]
960 ; X64-NEXT: retq ## encoding: [0xc3]
961 %res = call <8 x i64> @llvm.x86.avx512.mask.load.q.512(ptr %ptr, <8 x i64> zeroinitializer, i8 -1)
962 %res1 = call <8 x i64> @llvm.x86.avx512.mask.load.q.512(ptr %ptr, <8 x i64> %res, i8 %mask)
963 %res2 = call <8 x i64> @llvm.x86.avx512.mask.load.q.512(ptr %ptr, <8 x i64> zeroinitializer, i8 %mask)
964 %res4 = add <8 x i64> %res2, %res1
965 ret <8 x i64> %res4
966 }
968 declare <8 x double> @llvm.x86.avx512.mask.vpermil.pd.512(<8 x double>, i32, <8 x double>, i8)
970 define <8 x double>@test_int_x86_avx512_vpermil_pd_512(<8 x double> %x0, <8 x double> %x2) {
971 ; CHECK-LABEL: test_int_x86_avx512_vpermil_pd_512:
972 ; CHECK: ## %bb.0:
973 ; CHECK-NEXT: vshufpd $22, %zmm0, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xc6,0xc0,0x16]
974 ; CHECK-NEXT: ## zmm0 = zmm0[0,1,3,2,5,4,6,6]
975 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
976 %res = call <8 x double> @llvm.x86.avx512.mask.vpermil.pd.512(<8 x double> %x0, i32 22, <8 x double> %x2, i8 -1)
977 ret <8 x double> %res
978 }
980 define <8 x double>@test_int_x86_avx512_mask_vpermil_pd_512(<8 x double> %x0, <8 x double> %x2, i8 %x3) {
981 ; X86-LABEL: test_int_x86_avx512_mask_vpermil_pd_512:
982 ; X86: ## %bb.0:
983 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
984 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
985 ; X86-NEXT: vshufpd $22, %zmm0, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xc6,0xc8,0x16]
986 ; X86-NEXT: ## zmm1 {%k1} = zmm0[0,1,3,2,5,4,6,6]
987 ; X86-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
988 ; X86-NEXT: retl ## encoding: [0xc3]
989 ;
990 ; X64-LABEL: test_int_x86_avx512_mask_vpermil_pd_512:
991 ; X64: ## %bb.0:
992 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
993 ; X64-NEXT: vshufpd $22, %zmm0, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xc6,0xc8,0x16]
994 ; X64-NEXT: ## zmm1 {%k1} = zmm0[0,1,3,2,5,4,6,6]
995 ; X64-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
996 ; X64-NEXT: retq ## encoding: [0xc3]
997 %res = call <8 x double> @llvm.x86.avx512.mask.vpermil.pd.512(<8 x double> %x0, i32 22, <8 x double> %x2, i8 %x3)
998 ret <8 x double> %res
999 }
1001 define <8 x double>@test_int_x86_avx512_maskz_vpermil_pd_512(<8 x double> %x0, i8 %x3) {
1002 ; X86-LABEL: test_int_x86_avx512_maskz_vpermil_pd_512:
1003 ; X86: ## %bb.0:
1004 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1005 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1006 ; X86-NEXT: vshufpd $22, %zmm0, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xc6,0xc0,0x16]
1007 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[0,1,3,2,5,4,6,6]
1008 ; X86-NEXT: retl ## encoding: [0xc3]
1009 ;
1010 ; X64-LABEL: test_int_x86_avx512_maskz_vpermil_pd_512:
1011 ; X64: ## %bb.0:
1012 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1013 ; X64-NEXT: vshufpd $22, %zmm0, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xc6,0xc0,0x16]
1014 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[0,1,3,2,5,4,6,6]
1015 ; X64-NEXT: retq ## encoding: [0xc3]
1016 %res = call <8 x double> @llvm.x86.avx512.mask.vpermil.pd.512(<8 x double> %x0, i32 22, <8 x double> zeroinitializer, i8 %x3)
1017 ret <8 x double> %res
1018 }
1020 declare <16 x float> @llvm.x86.avx512.mask.vpermil.ps.512(<16 x float>, i32, <16 x float>, i16)
1022 define <16 x float>@test_int_x86_avx512_vpermil_ps_512(<16 x float> %x0, <16 x float> %x2) {
1023 ; CHECK-LABEL: test_int_x86_avx512_vpermil_ps_512:
1024 ; CHECK: ## %bb.0:
1025 ; CHECK-NEXT: vshufps $22, %zmm0, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0xc6,0xc0,0x16]
1026 ; CHECK-NEXT: ## zmm0 = zmm0[2,1,1,0,6,5,5,4,10,9,9,8,14,13,13,12]
1027 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1028 %res = call <16 x float> @llvm.x86.avx512.mask.vpermil.ps.512(<16 x float> %x0, i32 22, <16 x float> %x2, i16 -1)
1029 ret <16 x float> %res
1030 }
1032 define <16 x float>@test_int_x86_avx512_mask_vpermil_ps_512(<16 x float> %x0, <16 x float> %x2, i16 %x3) {
1033 ; X86-LABEL: test_int_x86_avx512_mask_vpermil_ps_512:
1034 ; X86: ## %bb.0:
1035 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1036 ; X86-NEXT: vshufps $22, %zmm0, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0xc6,0xc8,0x16]
1037 ; X86-NEXT: ## zmm1 {%k1} = zmm0[2,1,1,0,6,5,5,4,10,9,9,8,14,13,13,12]
1038 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
1039 ; X86-NEXT: retl ## encoding: [0xc3]
1040 ;
1041 ; X64-LABEL: test_int_x86_avx512_mask_vpermil_ps_512:
1042 ; X64: ## %bb.0:
1043 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1044 ; X64-NEXT: vshufps $22, %zmm0, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0xc6,0xc8,0x16]
1045 ; X64-NEXT: ## zmm1 {%k1} = zmm0[2,1,1,0,6,5,5,4,10,9,9,8,14,13,13,12]
1046 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
1047 ; X64-NEXT: retq ## encoding: [0xc3]
1048 %res = call <16 x float> @llvm.x86.avx512.mask.vpermil.ps.512(<16 x float> %x0, i32 22, <16 x float> %x2, i16 %x3)
1049 ret <16 x float> %res
1050 }
1052 define <16 x float>@test_int_x86_avx512_maskz_vpermil_ps_512(<16 x float> %x0, i16 %x3) {
1053 ; X86-LABEL: test_int_x86_avx512_maskz_vpermil_ps_512:
1054 ; X86: ## %bb.0:
1055 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1056 ; X86-NEXT: vshufps $22, %zmm0, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0xc6,0xc0,0x16]
1057 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[2,1,1,0,6,5,5,4,10,9,9,8,14,13,13,12]
1058 ; X86-NEXT: retl ## encoding: [0xc3]
1059 ;
1060 ; X64-LABEL: test_int_x86_avx512_maskz_vpermil_ps_512:
1061 ; X64: ## %bb.0:
1062 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1063 ; X64-NEXT: vshufps $22, %zmm0, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0xc6,0xc0,0x16]
1064 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[2,1,1,0,6,5,5,4,10,9,9,8,14,13,13,12]
1065 ; X64-NEXT: retq ## encoding: [0xc3]
1066 %res = call <16 x float> @llvm.x86.avx512.mask.vpermil.ps.512(<16 x float> %x0, i32 22, <16 x float> zeroinitializer, i16 %x3)
1067 ret <16 x float> %res
1068 }
1070 declare <16 x i32> @llvm.x86.avx512.mask.pshuf.d.512(<16 x i32>, i32, <16 x i32>, i16)
1072 define <16 x i32>@test_int_x86_avx512_pshuf_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2) {
1073 ; CHECK-LABEL: test_int_x86_avx512_pshuf_d_512:
1074 ; CHECK: ## %bb.0:
1075 ; CHECK-NEXT: vshufps $3, %zmm0, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0xc6,0xc0,0x03]
1076 ; CHECK-NEXT: ## zmm0 = zmm0[3,0,0,0,7,4,4,4,11,8,8,8,15,12,12,12]
1077 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1078 %res = call <16 x i32> @llvm.x86.avx512.mask.pshuf.d.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 -1)
1079 ret <16 x i32> %res
1080 }
1082 define <16 x i32>@test_int_x86_avx512_mask_pshuf_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) {
1083 ; X86-LABEL: test_int_x86_avx512_mask_pshuf_d_512:
1084 ; X86: ## %bb.0:
1085 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
1086 ; X86-NEXT: vpshufd $3, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x70,0xc8,0x03]
1087 ; X86-NEXT: ## zmm1 {%k1} = zmm0[3,0,0,0,7,4,4,4,11,8,8,8,15,12,12,12]
1088 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1089 ; X86-NEXT: retl ## encoding: [0xc3]
1090 ;
1091 ; X64-LABEL: test_int_x86_avx512_mask_pshuf_d_512:
1092 ; X64: ## %bb.0:
1093 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
1094 ; X64-NEXT: vpshufd $3, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x70,0xc8,0x03]
1095 ; X64-NEXT: ## zmm1 {%k1} = zmm0[3,0,0,0,7,4,4,4,11,8,8,8,15,12,12,12]
1096 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1097 ; X64-NEXT: retq ## encoding: [0xc3]
1098 %res = call <16 x i32> @llvm.x86.avx512.mask.pshuf.d.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 %x3)
1099 ret <16 x i32> %res
1100 }
1102 define <16 x i32>@test_int_x86_avx512_maskz_pshuf_d_512(<16 x i32> %x0, i32 %x1, i16 %x3) {
1103 ; X86-LABEL: test_int_x86_avx512_maskz_pshuf_d_512:
1104 ; X86: ## %bb.0:
1105 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
1106 ; X86-NEXT: vpshufd $3, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x70,0xc0,0x03]
1107 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[3,0,0,0,7,4,4,4,11,8,8,8,15,12,12,12]
1108 ; X86-NEXT: retl ## encoding: [0xc3]
1109 ;
1110 ; X64-LABEL: test_int_x86_avx512_maskz_pshuf_d_512:
1111 ; X64: ## %bb.0:
1112 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
1113 ; X64-NEXT: vpshufd $3, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x70,0xc0,0x03]
1114 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[3,0,0,0,7,4,4,4,11,8,8,8,15,12,12,12]
1115 ; X64-NEXT: retq ## encoding: [0xc3]
1116 %res = call <16 x i32> @llvm.x86.avx512.mask.pshuf.d.512(<16 x i32> %x0, i32 3, <16 x i32> zeroinitializer, i16 %x3)
1117 ret <16 x i32> %res
1118 }
1120 define i16 @test_pcmpeq_d(<16 x i32> %a, <16 x i32> %b) {
1121 ; CHECK-LABEL: test_pcmpeq_d:
1122 ; CHECK: ## %bb.0:
1123 ; CHECK-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7d,0x48,0x76,0xc1]
1124 ; CHECK-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1125 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
1126 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1127 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1128 %res = call i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32> %a, <16 x i32> %b, i16 -1)
1129 ret i16 %res
1130 }
1132 define i16 @test_mask_pcmpeq_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
1133 ; X86-LABEL: test_mask_pcmpeq_d:
1134 ; X86: ## %bb.0:
1135 ; X86-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7d,0x48,0x76,0xc1]
1136 ; X86-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1137 ; X86-NEXT: andw {{[0-9]+}}(%esp), %ax ## encoding: [0x66,0x23,0x44,0x24,0x04]
1138 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
1139 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1140 ; X86-NEXT: retl ## encoding: [0xc3]
1141 ;
1142 ; X64-LABEL: test_mask_pcmpeq_d:
1143 ; X64: ## %bb.0:
1144 ; X64-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7d,0x48,0x76,0xc1]
1145 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1146 ; X64-NEXT: andl %edi, %eax ## encoding: [0x21,0xf8]
1147 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
1148 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1149 ; X64-NEXT: retq ## encoding: [0xc3]
1150 %res = call i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)
1151 ret i16 %res
1152 }
1154 declare i16 @llvm.x86.avx512.mask.pcmpeq.d.512(<16 x i32>, <16 x i32>, i16)
1156 define i8 @test_pcmpeq_q(<8 x i64> %a, <8 x i64> %b) {
1157 ; CHECK-LABEL: test_pcmpeq_q:
1158 ; CHECK: ## %bb.0:
1159 ; CHECK-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x29,0xc1]
1160 ; CHECK-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1161 ; CHECK-NEXT: ## kill: def $al killed $al killed $eax
1162 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1163 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1164 %res = call i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64> %a, <8 x i64> %b, i8 -1)
1165 ret i8 %res
1166 }
1168 define i8 @test_mask_pcmpeq_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
1169 ; X86-LABEL: test_mask_pcmpeq_q:
1170 ; X86: ## %bb.0:
1171 ; X86-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x29,0xc1]
1172 ; X86-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1173 ; X86-NEXT: andb {{[0-9]+}}(%esp), %al ## encoding: [0x22,0x44,0x24,0x04]
1174 ; X86-NEXT: ## kill: def $al killed $al killed $eax
1175 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1176 ; X86-NEXT: retl ## encoding: [0xc3]
1177 ;
1178 ; X64-LABEL: test_mask_pcmpeq_q:
1179 ; X64: ## %bb.0:
1180 ; X64-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x29,0xc1]
1181 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1182 ; X64-NEXT: andb %dil, %al ## encoding: [0x40,0x20,0xf8]
1183 ; X64-NEXT: ## kill: def $al killed $al killed $eax
1184 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1185 ; X64-NEXT: retq ## encoding: [0xc3]
1186 %res = call i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
1187 ret i8 %res
1188 }
1190 declare i8 @llvm.x86.avx512.mask.pcmpeq.q.512(<8 x i64>, <8 x i64>, i8)
1192 define i16 @test_pcmpgt_d(<16 x i32> %a, <16 x i32> %b) {
1193 ; CHECK-LABEL: test_pcmpgt_d:
1194 ; CHECK: ## %bb.0:
1195 ; CHECK-NEXT: vpcmpgtd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7d,0x48,0x66,0xc1]
1196 ; CHECK-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1197 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
1198 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1199 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1200 %res = call i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32> %a, <16 x i32> %b, i16 -1)
1201 ret i16 %res
1202 }
1204 define i16 @test_mask_pcmpgt_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
1205 ; X86-LABEL: test_mask_pcmpgt_d:
1206 ; X86: ## %bb.0:
1207 ; X86-NEXT: vpcmpgtd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7d,0x48,0x66,0xc1]
1208 ; X86-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1209 ; X86-NEXT: andw {{[0-9]+}}(%esp), %ax ## encoding: [0x66,0x23,0x44,0x24,0x04]
1210 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
1211 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1212 ; X86-NEXT: retl ## encoding: [0xc3]
1213 ;
1214 ; X64-LABEL: test_mask_pcmpgt_d:
1215 ; X64: ## %bb.0:
1216 ; X64-NEXT: vpcmpgtd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7d,0x48,0x66,0xc1]
1217 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1218 ; X64-NEXT: andl %edi, %eax ## encoding: [0x21,0xf8]
1219 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
1220 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1221 ; X64-NEXT: retq ## encoding: [0xc3]
1222 %res = call i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32> %a, <16 x i32> %b, i16 %mask)
1223 ret i16 %res
1224 }
1226 declare i16 @llvm.x86.avx512.mask.pcmpgt.d.512(<16 x i32>, <16 x i32>, i16)
1228 define i8 @test_pcmpgt_q(<8 x i64> %a, <8 x i64> %b) {
1229 ; CHECK-LABEL: test_pcmpgt_q:
1230 ; CHECK: ## %bb.0:
1231 ; CHECK-NEXT: vpcmpgtq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x37,0xc1]
1232 ; CHECK-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1233 ; CHECK-NEXT: ## kill: def $al killed $al killed $eax
1234 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1235 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1236 %res = call i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64> %a, <8 x i64> %b, i8 -1)
1237 ret i8 %res
1238 }
1240 define i8 @test_mask_pcmpgt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
1241 ; X86-LABEL: test_mask_pcmpgt_q:
1242 ; X86: ## %bb.0:
1243 ; X86-NEXT: vpcmpgtq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x37,0xc1]
1244 ; X86-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1245 ; X86-NEXT: andb {{[0-9]+}}(%esp), %al ## encoding: [0x22,0x44,0x24,0x04]
1246 ; X86-NEXT: ## kill: def $al killed $al killed $eax
1247 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1248 ; X86-NEXT: retl ## encoding: [0xc3]
1249 ;
1250 ; X64-LABEL: test_mask_pcmpgt_q:
1251 ; X64: ## %bb.0:
1252 ; X64-NEXT: vpcmpgtq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x37,0xc1]
1253 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
1254 ; X64-NEXT: andb %dil, %al ## encoding: [0x40,0x20,0xf8]
1255 ; X64-NEXT: ## kill: def $al killed $al killed $eax
1256 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1257 ; X64-NEXT: retq ## encoding: [0xc3]
1258 %res = call i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64> %a, <8 x i64> %b, i8 %mask)
1259 ret i8 %res
1260 }
1262 declare i8 @llvm.x86.avx512.mask.pcmpgt.q.512(<8 x i64>, <8 x i64>, i8)
1264 declare <8 x double> @llvm.x86.avx512.mask.unpckh.pd.512(<8 x double>, <8 x double>, <8 x double>, i8)
1266 define <8 x double>@test_int_x86_avx512_unpckh_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2) {
1267 ; CHECK-LABEL: test_int_x86_avx512_unpckh_pd_512:
1268 ; CHECK: ## %bb.0:
1269 ; CHECK-NEXT: vunpckhpd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x15,0xc1]
1270 ; CHECK-NEXT: ## zmm0 = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
1271 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1272 %res = call <8 x double> @llvm.x86.avx512.mask.unpckh.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 -1)
1273 ret <8 x double> %res
1274 }
1276 define <8 x double>@test_int_x86_avx512_mask_unpckh_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3) {
1277 ; X86-LABEL: test_int_x86_avx512_mask_unpckh_pd_512:
1278 ; X86: ## %bb.0:
1279 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1280 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1281 ; X86-NEXT: vunpckhpd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x15,0xd1]
1282 ; X86-NEXT: ## zmm2 {%k1} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
1283 ; X86-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
1284 ; X86-NEXT: retl ## encoding: [0xc3]
1285 ;
1286 ; X64-LABEL: test_int_x86_avx512_mask_unpckh_pd_512:
1287 ; X64: ## %bb.0:
1288 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1289 ; X64-NEXT: vunpckhpd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x15,0xd1]
1290 ; X64-NEXT: ## zmm2 {%k1} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
1291 ; X64-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
1292 ; X64-NEXT: retq ## encoding: [0xc3]
1293 %res = call <8 x double> @llvm.x86.avx512.mask.unpckh.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3)
1294 ret <8 x double> %res
1295 }
1297 declare <16 x float> @llvm.x86.avx512.mask.unpckh.ps.512(<16 x float>, <16 x float>, <16 x float>, i16)
1299 define <16 x float>@test_int_x86_avx512_unpckh_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2) {
1300 ; CHECK-LABEL: test_int_x86_avx512_unpckh_ps_512:
1301 ; CHECK: ## %bb.0:
1302 ; CHECK-NEXT: vunpckhps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x15,0xc1]
1303 ; CHECK-NEXT: ## zmm0 = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]
1304 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1305 %res = call <16 x float> @llvm.x86.avx512.mask.unpckh.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 -1)
1306 ret <16 x float> %res
1307 }
1309 define <16 x float>@test_int_x86_avx512_mask_unpckh_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) {
1310 ; X86-LABEL: test_int_x86_avx512_mask_unpckh_ps_512:
1311 ; X86: ## %bb.0:
1312 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1313 ; X86-NEXT: vunpckhps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x15,0xd1]
1314 ; X86-NEXT: ## zmm2 {%k1} = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]
1315 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
1316 ; X86-NEXT: retl ## encoding: [0xc3]
1317 ;
1318 ; X64-LABEL: test_int_x86_avx512_mask_unpckh_ps_512:
1319 ; X64: ## %bb.0:
1320 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1321 ; X64-NEXT: vunpckhps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x15,0xd1]
1322 ; X64-NEXT: ## zmm2 {%k1} = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]
1323 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
1324 ; X64-NEXT: retq ## encoding: [0xc3]
1325 %res = call <16 x float> @llvm.x86.avx512.mask.unpckh.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3)
1326 ret <16 x float> %res
1327 }
1329 declare <8 x double> @llvm.x86.avx512.mask.unpckl.pd.512(<8 x double>, <8 x double>, <8 x double>, i8)
1331 define <8 x double>@test_int_x86_avx512_unpckl_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2) {
1332 ; CHECK-LABEL: test_int_x86_avx512_unpckl_pd_512:
1333 ; CHECK: ## %bb.0:
1334 ; CHECK-NEXT: vunpcklpd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x14,0xc1]
1335 ; CHECK-NEXT: ## zmm0 = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
1336 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1337 %res = call <8 x double> @llvm.x86.avx512.mask.unpckl.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 -1)
1338 ret <8 x double> %res
1339 }
1341 define <8 x double>@test_int_x86_avx512_mask_unpckl_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3) {
1342 ; X86-LABEL: test_int_x86_avx512_mask_unpckl_pd_512:
1343 ; X86: ## %bb.0:
1344 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1345 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1346 ; X86-NEXT: vunpcklpd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x14,0xd1]
1347 ; X86-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
1348 ; X86-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
1349 ; X86-NEXT: retl ## encoding: [0xc3]
1350 ;
1351 ; X64-LABEL: test_int_x86_avx512_mask_unpckl_pd_512:
1352 ; X64: ## %bb.0:
1353 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1354 ; X64-NEXT: vunpcklpd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x14,0xd1]
1355 ; X64-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
1356 ; X64-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
1357 ; X64-NEXT: retq ## encoding: [0xc3]
1358 %res = call <8 x double> @llvm.x86.avx512.mask.unpckl.pd.512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3)
1359 ret <8 x double> %res
1360 }
1362 declare <16 x float> @llvm.x86.avx512.mask.unpckl.ps.512(<16 x float>, <16 x float>, <16 x float>, i16)
1364 define <16 x float>@test_int_x86_avx512_unpckl_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2) {
1365 ; CHECK-LABEL: test_int_x86_avx512_unpckl_ps_512:
1366 ; CHECK: ## %bb.0:
1367 ; CHECK-NEXT: vunpcklps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x14,0xc1]
1368 ; CHECK-NEXT: ## zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
1369 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1370 %res = call <16 x float> @llvm.x86.avx512.mask.unpckl.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 -1)
1371 ret <16 x float> %res
1372 }
1374 define <16 x float>@test_int_x86_avx512_mask_unpckl_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) {
1375 ; X86-LABEL: test_int_x86_avx512_mask_unpckl_ps_512:
1376 ; X86: ## %bb.0:
1377 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1378 ; X86-NEXT: vunpcklps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x14,0xd1]
1379 ; X86-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
1380 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
1381 ; X86-NEXT: retl ## encoding: [0xc3]
1382 ;
1383 ; X64-LABEL: test_int_x86_avx512_mask_unpckl_ps_512:
1384 ; X64: ## %bb.0:
1385 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1386 ; X64-NEXT: vunpcklps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x14,0xd1]
1387 ; X64-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
1388 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
1389 ; X64-NEXT: retq ## encoding: [0xc3]
1390 %res = call <16 x float> @llvm.x86.avx512.mask.unpckl.ps.512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3)
1391 ret <16 x float> %res
1392 }
1394 declare <8 x i64> @llvm.x86.avx512.mask.punpcklqd.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
1396 define <8 x i64>@test_int_x86_avx512_punpcklqd_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
1397 ; CHECK-LABEL: test_int_x86_avx512_punpcklqd_q_512:
1398 ; CHECK: ## %bb.0:
1399 ; CHECK-NEXT: vunpcklpd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x14,0xc1]
1400 ; CHECK-NEXT: ## zmm0 = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
1401 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1402 %res = call <8 x i64> @llvm.x86.avx512.mask.punpcklqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
1403 ret <8 x i64> %res
1404 }
1406 define <8 x i64>@test_int_x86_avx512_mask_punpcklqd_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
1407 ; X86-LABEL: test_int_x86_avx512_mask_punpcklqd_q_512:
1408 ; X86: ## %bb.0:
1409 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1410 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1411 ; X86-NEXT: vpunpcklqdq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x6c,0xd1]
1412 ; X86-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
1413 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1414 ; X86-NEXT: retl ## encoding: [0xc3]
1415 ;
1416 ; X64-LABEL: test_int_x86_avx512_mask_punpcklqd_q_512:
1417 ; X64: ## %bb.0:
1418 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1419 ; X64-NEXT: vpunpcklqdq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x6c,0xd1]
1420 ; X64-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
1421 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1422 ; X64-NEXT: retq ## encoding: [0xc3]
1423 %res = call <8 x i64> @llvm.x86.avx512.mask.punpcklqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
1424 ret <8 x i64> %res
1425 }
1427 define <8 x i64>@test_int_x86_avx512_maskz_punpcklqd_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) {
1428 ; X86-LABEL: test_int_x86_avx512_maskz_punpcklqd_q_512:
1429 ; X86: ## %bb.0:
1430 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1431 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1432 ; X86-NEXT: vpunpcklqdq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x6c,0xc1]
1433 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
1434 ; X86-NEXT: retl ## encoding: [0xc3]
1435 ;
1436 ; X64-LABEL: test_int_x86_avx512_maskz_punpcklqd_q_512:
1437 ; X64: ## %bb.0:
1438 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1439 ; X64-NEXT: vpunpcklqdq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x6c,0xc1]
1440 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[0],zmm1[0],zmm0[2],zmm1[2],zmm0[4],zmm1[4],zmm0[6],zmm1[6]
1441 ; X64-NEXT: retq ## encoding: [0xc3]
1442 %res = call <8 x i64> @llvm.x86.avx512.mask.punpcklqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> zeroinitializer,i8 %x3)
1443 ret <8 x i64> %res
1444 }
1446 declare <8 x i64> @llvm.x86.avx512.mask.punpckhqd.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
1448 define <8 x i64>@test_int_x86_avx512_punpckhqd_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
1449 ; CHECK-LABEL: test_int_x86_avx512_punpckhqd_q_512:
1450 ; CHECK: ## %bb.0:
1451 ; CHECK-NEXT: vunpckhpd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x15,0xc1]
1452 ; CHECK-NEXT: ## zmm0 = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
1453 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1454 %res = call <8 x i64> @llvm.x86.avx512.mask.punpckhqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
1455 ret <8 x i64> %res
1456 }
1458 define <8 x i64>@test_int_x86_avx512_mask_punpckhqd_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
1459 ; X86-LABEL: test_int_x86_avx512_mask_punpckhqd_q_512:
1460 ; X86: ## %bb.0:
1461 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1462 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1463 ; X86-NEXT: vpunpckhqdq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x6d,0xd1]
1464 ; X86-NEXT: ## zmm2 {%k1} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
1465 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1466 ; X86-NEXT: retl ## encoding: [0xc3]
1467 ;
1468 ; X64-LABEL: test_int_x86_avx512_mask_punpckhqd_q_512:
1469 ; X64: ## %bb.0:
1470 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1471 ; X64-NEXT: vpunpckhqdq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x6d,0xd1]
1472 ; X64-NEXT: ## zmm2 {%k1} = zmm0[1],zmm1[1],zmm0[3],zmm1[3],zmm0[5],zmm1[5],zmm0[7],zmm1[7]
1473 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1474 ; X64-NEXT: retq ## encoding: [0xc3]
1475 %res = call <8 x i64> @llvm.x86.avx512.mask.punpckhqd.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
1476 ret <8 x i64> %res
1477 }
1479 declare <16 x i32> @llvm.x86.avx512.mask.punpckhd.q.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
1481 define <16 x i32>@test_int_x86_avx512_punpckhd_q_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
1482 ; CHECK-LABEL: test_int_x86_avx512_punpckhd_q_512:
1483 ; CHECK: ## %bb.0:
1484 ; CHECK-NEXT: vunpckhps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x15,0xc1]
1485 ; CHECK-NEXT: ## zmm0 = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]
1486 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1487 %res = call <16 x i32> @llvm.x86.avx512.mask.punpckhd.q.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
1488 ret <16 x i32> %res
1489 }
1491 define <16 x i32>@test_int_x86_avx512_mask_punpckhd_q_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
1492 ; X86-LABEL: test_int_x86_avx512_mask_punpckhd_q_512:
1493 ; X86: ## %bb.0:
1494 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1495 ; X86-NEXT: vpunpckhdq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x6a,0xd1]
1496 ; X86-NEXT: ## zmm2 {%k1} = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]
1497 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1498 ; X86-NEXT: retl ## encoding: [0xc3]
1499 ;
1500 ; X64-LABEL: test_int_x86_avx512_mask_punpckhd_q_512:
1501 ; X64: ## %bb.0:
1502 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1503 ; X64-NEXT: vpunpckhdq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x6a,0xd1]
1504 ; X64-NEXT: ## zmm2 {%k1} = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]
1505 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1506 ; X64-NEXT: retq ## encoding: [0xc3]
1507 %res = call <16 x i32> @llvm.x86.avx512.mask.punpckhd.q.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
1508 ret <16 x i32> %res
1509 }
1511 declare <16 x i32> @llvm.x86.avx512.mask.punpckld.q.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
1513 define <16 x i32>@test_int_x86_avx512_punpckld_q_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
1514 ; CHECK-LABEL: test_int_x86_avx512_punpckld_q_512:
1515 ; CHECK: ## %bb.0:
1516 ; CHECK-NEXT: vunpcklps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x14,0xc1]
1517 ; CHECK-NEXT: ## zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
1518 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1519 %res = call <16 x i32> @llvm.x86.avx512.mask.punpckld.q.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
1520 ret <16 x i32> %res
1521 }
1523 define <16 x i32>@test_int_x86_avx512_mask_punpckld_q_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
1524 ; X86-LABEL: test_int_x86_avx512_mask_punpckld_q_512:
1525 ; X86: ## %bb.0:
1526 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1527 ; X86-NEXT: vpunpckldq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x62,0xd1]
1528 ; X86-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
1529 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1530 ; X86-NEXT: retl ## encoding: [0xc3]
1531 ;
1532 ; X64-LABEL: test_int_x86_avx512_mask_punpckld_q_512:
1533 ; X64: ## %bb.0:
1534 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1535 ; X64-NEXT: vpunpckldq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x62,0xd1]
1536 ; X64-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
1537 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1538 ; X64-NEXT: retq ## encoding: [0xc3]
1539 %res = call <16 x i32> @llvm.x86.avx512.mask.punpckld.q.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
1540 ret <16 x i32> %res
1541 }
1543 define <16 x i32> @test_x86_avx512_pslli_d(<16 x i32> %a0) {
1544 ; CHECK-LABEL: test_x86_avx512_pslli_d:
1545 ; CHECK: ## %bb.0:
1546 ; CHECK-NEXT: vpslld $7, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0x72,0xf0,0x07]
1547 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1548 %res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)
1549 ret <16 x i32> %res
1550 }
1552 define <16 x i32> @test_x86_avx512_mask_pslli_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
1553 ; X86-LABEL: test_x86_avx512_mask_pslli_d:
1554 ; X86: ## %bb.0:
1555 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1556 ; X86-NEXT: vpslld $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x75,0x49,0x72,0xf0,0x07]
1557 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1558 ; X86-NEXT: retl ## encoding: [0xc3]
1559 ;
1560 ; X64-LABEL: test_x86_avx512_mask_pslli_d:
1561 ; X64: ## %bb.0:
1562 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1563 ; X64-NEXT: vpslld $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x75,0x49,0x72,0xf0,0x07]
1564 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1565 ; X64-NEXT: retq ## encoding: [0xc3]
1566 %res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)
1567 ret <16 x i32> %res
1568 }
1570 define <16 x i32> @test_x86_avx512_maskz_pslli_d(<16 x i32> %a0, i16 %mask) {
1571 ; X86-LABEL: test_x86_avx512_maskz_pslli_d:
1572 ; X86: ## %bb.0:
1573 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1574 ; X86-NEXT: vpslld $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x72,0xf0,0x07]
1575 ; X86-NEXT: retl ## encoding: [0xc3]
1576 ;
1577 ; X64-LABEL: test_x86_avx512_maskz_pslli_d:
1578 ; X64: ## %bb.0:
1579 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1580 ; X64-NEXT: vpslld $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x72,0xf0,0x07]
1581 ; X64-NEXT: retq ## encoding: [0xc3]
1582 %res = call <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)
1583 ret <16 x i32> %res
1584 }
1586 declare <16 x i32> @llvm.x86.avx512.mask.pslli.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone
1588 define <8 x i64> @test_x86_avx512_pslli_q(<8 x i64> %a0) {
1589 ; CHECK-LABEL: test_x86_avx512_pslli_q:
1590 ; CHECK: ## %bb.0:
1591 ; CHECK-NEXT: vpsllq $7, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x73,0xf0,0x07]
1592 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1593 %res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)
1594 ret <8 x i64> %res
1595 }
1597 define <8 x i64> @test_x86_avx512_mask_pslli_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
1598 ; X86-LABEL: test_x86_avx512_mask_pslli_q:
1599 ; X86: ## %bb.0:
1600 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1601 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1602 ; X86-NEXT: vpsllq $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xf5,0x49,0x73,0xf0,0x07]
1603 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1604 ; X86-NEXT: retl ## encoding: [0xc3]
1605 ;
1606 ; X64-LABEL: test_x86_avx512_mask_pslli_q:
1607 ; X64: ## %bb.0:
1608 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1609 ; X64-NEXT: vpsllq $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xf5,0x49,0x73,0xf0,0x07]
1610 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1611 ; X64-NEXT: retq ## encoding: [0xc3]
1612 %res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)
1613 ret <8 x i64> %res
1614 }
1616 define <8 x i64> @test_x86_avx512_maskz_pslli_q(<8 x i64> %a0, i8 %mask) {
1617 ; X86-LABEL: test_x86_avx512_maskz_pslli_q:
1618 ; X86: ## %bb.0:
1619 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1620 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1621 ; X86-NEXT: vpsllq $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x73,0xf0,0x07]
1622 ; X86-NEXT: retl ## encoding: [0xc3]
1623 ;
1624 ; X64-LABEL: test_x86_avx512_maskz_pslli_q:
1625 ; X64: ## %bb.0:
1626 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1627 ; X64-NEXT: vpsllq $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x73,0xf0,0x07]
1628 ; X64-NEXT: retq ## encoding: [0xc3]
1629 %res = call <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)
1630 ret <8 x i64> %res
1631 }
1633 declare <8 x i64> @llvm.x86.avx512.mask.pslli.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone
1635 define <16 x i32> @test_x86_avx512_psrli_d(<16 x i32> %a0) {
1636 ; CHECK-LABEL: test_x86_avx512_psrli_d:
1637 ; CHECK: ## %bb.0:
1638 ; CHECK-NEXT: vpsrld $7, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0x72,0xd0,0x07]
1639 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1640 %res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)
1641 ret <16 x i32> %res
1642 }
1644 define <16 x i32> @test_x86_avx512_mask_psrli_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
1645 ; X86-LABEL: test_x86_avx512_mask_psrli_d:
1646 ; X86: ## %bb.0:
1647 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1648 ; X86-NEXT: vpsrld $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x75,0x49,0x72,0xd0,0x07]
1649 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1650 ; X86-NEXT: retl ## encoding: [0xc3]
1651 ;
1652 ; X64-LABEL: test_x86_avx512_mask_psrli_d:
1653 ; X64: ## %bb.0:
1654 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1655 ; X64-NEXT: vpsrld $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x75,0x49,0x72,0xd0,0x07]
1656 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1657 ; X64-NEXT: retq ## encoding: [0xc3]
1658 %res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)
1659 ret <16 x i32> %res
1660 }
1662 define <16 x i32> @test_x86_avx512_maskz_psrli_d(<16 x i32> %a0, i16 %mask) {
1663 ; X86-LABEL: test_x86_avx512_maskz_psrli_d:
1664 ; X86: ## %bb.0:
1665 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1666 ; X86-NEXT: vpsrld $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x72,0xd0,0x07]
1667 ; X86-NEXT: retl ## encoding: [0xc3]
1668 ;
1669 ; X64-LABEL: test_x86_avx512_maskz_psrli_d:
1670 ; X64: ## %bb.0:
1671 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1672 ; X64-NEXT: vpsrld $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x72,0xd0,0x07]
1673 ; X64-NEXT: retq ## encoding: [0xc3]
1674 %res = call <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)
1675 ret <16 x i32> %res
1676 }
1678 declare <16 x i32> @llvm.x86.avx512.mask.psrli.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone
1680 define <8 x i64> @test_x86_avx512_psrli_q(<8 x i64> %a0) {
1681 ; CHECK-LABEL: test_x86_avx512_psrli_q:
1682 ; CHECK: ## %bb.0:
1683 ; CHECK-NEXT: vpsrlq $7, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x73,0xd0,0x07]
1684 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1685 %res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)
1686 ret <8 x i64> %res
1687 }
1689 define <8 x i64> @test_x86_avx512_mask_psrli_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
1690 ; X86-LABEL: test_x86_avx512_mask_psrli_q:
1691 ; X86: ## %bb.0:
1692 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1693 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1694 ; X86-NEXT: vpsrlq $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xf5,0x49,0x73,0xd0,0x07]
1695 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1696 ; X86-NEXT: retl ## encoding: [0xc3]
1697 ;
1698 ; X64-LABEL: test_x86_avx512_mask_psrli_q:
1699 ; X64: ## %bb.0:
1700 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1701 ; X64-NEXT: vpsrlq $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xf5,0x49,0x73,0xd0,0x07]
1702 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1703 ; X64-NEXT: retq ## encoding: [0xc3]
1704 %res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)
1705 ret <8 x i64> %res
1706 }
1708 define <8 x i64> @test_x86_avx512_maskz_psrli_q(<8 x i64> %a0, i8 %mask) {
1709 ; X86-LABEL: test_x86_avx512_maskz_psrli_q:
1710 ; X86: ## %bb.0:
1711 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1712 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1713 ; X86-NEXT: vpsrlq $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x73,0xd0,0x07]
1714 ; X86-NEXT: retl ## encoding: [0xc3]
1715 ;
1716 ; X64-LABEL: test_x86_avx512_maskz_psrli_q:
1717 ; X64: ## %bb.0:
1718 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1719 ; X64-NEXT: vpsrlq $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x73,0xd0,0x07]
1720 ; X64-NEXT: retq ## encoding: [0xc3]
1721 %res = call <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)
1722 ret <8 x i64> %res
1723 }
1725 declare <8 x i64> @llvm.x86.avx512.mask.psrli.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone
1727 define <16 x i32> @test_x86_avx512_psrai_d(<16 x i32> %a0) {
1728 ; CHECK-LABEL: test_x86_avx512_psrai_d:
1729 ; CHECK: ## %bb.0:
1730 ; CHECK-NEXT: vpsrad $7, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0x72,0xe0,0x07]
1731 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1732 %res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 -1)
1733 ret <16 x i32> %res
1734 }
1736 define <16 x i32> @test_x86_avx512_mask_psrai_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
1737 ; X86-LABEL: test_x86_avx512_mask_psrai_d:
1738 ; X86: ## %bb.0:
1739 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1740 ; X86-NEXT: vpsrad $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x75,0x49,0x72,0xe0,0x07]
1741 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1742 ; X86-NEXT: retl ## encoding: [0xc3]
1743 ;
1744 ; X64-LABEL: test_x86_avx512_mask_psrai_d:
1745 ; X64: ## %bb.0:
1746 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1747 ; X64-NEXT: vpsrad $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x75,0x49,0x72,0xe0,0x07]
1748 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1749 ; X64-NEXT: retq ## encoding: [0xc3]
1750 %res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> %a1, i16 %mask)
1751 ret <16 x i32> %res
1752 }
1754 define <16 x i32> @test_x86_avx512_maskz_psrai_d(<16 x i32> %a0, i16 %mask) {
1755 ; X86-LABEL: test_x86_avx512_maskz_psrai_d:
1756 ; X86: ## %bb.0:
1757 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1758 ; X86-NEXT: vpsrad $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x72,0xe0,0x07]
1759 ; X86-NEXT: retl ## encoding: [0xc3]
1760 ;
1761 ; X64-LABEL: test_x86_avx512_maskz_psrai_d:
1762 ; X64: ## %bb.0:
1763 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1764 ; X64-NEXT: vpsrad $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x72,0xe0,0x07]
1765 ; X64-NEXT: retq ## encoding: [0xc3]
1766 %res = call <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32> %a0, i32 7, <16 x i32> zeroinitializer, i16 %mask)
1767 ret <16 x i32> %res
1768 }
1770 declare <16 x i32> @llvm.x86.avx512.mask.psrai.d(<16 x i32>, i32, <16 x i32>, i16) nounwind readnone
1772 define <8 x i64> @test_x86_avx512_psrai_q(<8 x i64> %a0) {
1773 ; CHECK-LABEL: test_x86_avx512_psrai_q:
1774 ; CHECK: ## %bb.0:
1775 ; CHECK-NEXT: vpsraq $7, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x72,0xe0,0x07]
1776 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1777 %res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 -1)
1778 ret <8 x i64> %res
1779 }
1781 define <8 x i64> @test_x86_avx512_mask_psrai_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
1782 ; X86-LABEL: test_x86_avx512_mask_psrai_q:
1783 ; X86: ## %bb.0:
1784 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1785 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1786 ; X86-NEXT: vpsraq $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xf5,0x49,0x72,0xe0,0x07]
1787 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1788 ; X86-NEXT: retl ## encoding: [0xc3]
1789 ;
1790 ; X64-LABEL: test_x86_avx512_mask_psrai_q:
1791 ; X64: ## %bb.0:
1792 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1793 ; X64-NEXT: vpsraq $7, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xf5,0x49,0x72,0xe0,0x07]
1794 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
1795 ; X64-NEXT: retq ## encoding: [0xc3]
1796 %res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> %a1, i8 %mask)
1797 ret <8 x i64> %res
1798 }
1800 define <8 x i64> @test_x86_avx512_maskz_psrai_q(<8 x i64> %a0, i8 %mask) {
1801 ; X86-LABEL: test_x86_avx512_maskz_psrai_q:
1802 ; X86: ## %bb.0:
1803 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1804 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1805 ; X86-NEXT: vpsraq $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x72,0xe0,0x07]
1806 ; X86-NEXT: retl ## encoding: [0xc3]
1807 ;
1808 ; X64-LABEL: test_x86_avx512_maskz_psrai_q:
1809 ; X64: ## %bb.0:
1810 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1811 ; X64-NEXT: vpsraq $7, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x72,0xe0,0x07]
1812 ; X64-NEXT: retq ## encoding: [0xc3]
1813 %res = call <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64> %a0, i32 7, <8 x i64> zeroinitializer, i8 %mask)
1814 ret <8 x i64> %res
1815 }
1817 declare <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone
1819 declare void @llvm.x86.avx512.storent.q.512(ptr, <8 x i64>)
1821 define void@test_storent_q_512(<8 x i64> %data, ptr %ptr) {
1822 ; X86-LABEL: test_storent_q_512:
1823 ; X86: ## %bb.0:
1824 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
1825 ; X86-NEXT: vmovntps %zmm0, (%eax) ## encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x00]
1826 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1827 ; X86-NEXT: retl ## encoding: [0xc3]
1828 ;
1829 ; X64-LABEL: test_storent_q_512:
1830 ; X64: ## %bb.0:
1831 ; X64-NEXT: vmovntps %zmm0, (%rdi) ## encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x07]
1832 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1833 ; X64-NEXT: retq ## encoding: [0xc3]
1834 call void @llvm.x86.avx512.storent.q.512(ptr %ptr, <8 x i64> %data)
1835 ret void
1836 }
1838 declare void @llvm.x86.avx512.storent.pd.512(ptr, <8 x double>)
1840 define void @test_storent_pd_512(<8 x double> %data, ptr %ptr) {
1841 ; X86-LABEL: test_storent_pd_512:
1842 ; X86: ## %bb.0:
1843 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
1844 ; X86-NEXT: vmovntps %zmm0, (%eax) ## encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x00]
1845 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1846 ; X86-NEXT: retl ## encoding: [0xc3]
1847 ;
1848 ; X64-LABEL: test_storent_pd_512:
1849 ; X64: ## %bb.0:
1850 ; X64-NEXT: vmovntps %zmm0, (%rdi) ## encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x07]
1851 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1852 ; X64-NEXT: retq ## encoding: [0xc3]
1853 call void @llvm.x86.avx512.storent.pd.512(ptr %ptr, <8 x double> %data)
1854 ret void
1855 }
1857 declare void @llvm.x86.avx512.storent.ps.512(ptr, <16 x float>)
1859 define void @test_storent_ps_512(<16 x float> %data, ptr %ptr) {
1860 ; X86-LABEL: test_storent_ps_512:
1861 ; X86: ## %bb.0:
1862 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
1863 ; X86-NEXT: vmovntps %zmm0, (%eax) ## encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x00]
1864 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1865 ; X86-NEXT: retl ## encoding: [0xc3]
1866 ;
1867 ; X64-LABEL: test_storent_ps_512:
1868 ; X64: ## %bb.0:
1869 ; X64-NEXT: vmovntps %zmm0, (%rdi) ## encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x07]
1870 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
1871 ; X64-NEXT: retq ## encoding: [0xc3]
1872 call void @llvm.x86.avx512.storent.ps.512(ptr %ptr, <16 x float> %data)
1873 ret void
1874 }
1876 define <16 x i32> @test_xor_epi32(<16 x i32> %a, <16 x i32> %b) {
1877 ; CHECK-LABEL: test_xor_epi32:
1878 ; CHECK: ## %bb.0:
1879 ; CHECK-NEXT: vpxord %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xef,0xc1]
1880 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1881 %res = call <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)
1882 ret < 16 x i32> %res
1883 }
1885 define <16 x i32> @test_mask_xor_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
1886 ; X86-LABEL: test_mask_xor_epi32:
1887 ; X86: ## %bb.0:
1888 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1889 ; X86-NEXT: vpxord %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xef,0xd1]
1890 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1891 ; X86-NEXT: retl ## encoding: [0xc3]
1892 ;
1893 ; X64-LABEL: test_mask_xor_epi32:
1894 ; X64: ## %bb.0:
1895 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1896 ; X64-NEXT: vpxord %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xef,0xd1]
1897 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1898 ; X64-NEXT: retq ## encoding: [0xc3]
1899 %res = call <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
1900 ret < 16 x i32> %res
1901 }
1903 declare <16 x i32> @llvm.x86.avx512.mask.pxor.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
1905 define <16 x i32> @test_or_epi32(<16 x i32> %a, <16 x i32> %b) {
1906 ; CHECK-LABEL: test_or_epi32:
1907 ; CHECK: ## %bb.0:
1908 ; CHECK-NEXT: vpord %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xeb,0xc1]
1909 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1910 %res = call <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)
1911 ret < 16 x i32> %res
1912 }
1914 define <16 x i32> @test_mask_or_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
1915 ; X86-LABEL: test_mask_or_epi32:
1916 ; X86: ## %bb.0:
1917 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1918 ; X86-NEXT: vpord %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xeb,0xd1]
1919 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1920 ; X86-NEXT: retl ## encoding: [0xc3]
1921 ;
1922 ; X64-LABEL: test_mask_or_epi32:
1923 ; X64: ## %bb.0:
1924 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1925 ; X64-NEXT: vpord %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xeb,0xd1]
1926 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1927 ; X64-NEXT: retq ## encoding: [0xc3]
1928 %res = call <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
1929 ret < 16 x i32> %res
1930 }
1932 declare <16 x i32> @llvm.x86.avx512.mask.por.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
1934 define <16 x i32> @test_and_epi32(<16 x i32> %a, <16 x i32> %b) {
1935 ; CHECK-LABEL: test_and_epi32:
1936 ; CHECK: ## %bb.0:
1937 ; CHECK-NEXT: vpandd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xdb,0xc1]
1938 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1939 %res = call <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32> %a,<16 x i32> %b, <16 x i32>zeroinitializer, i16 -1)
1940 ret < 16 x i32> %res
1941 }
1943 define <16 x i32> @test_mask_and_epi32(<16 x i32> %a,<16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
1944 ; X86-LABEL: test_mask_and_epi32:
1945 ; X86: ## %bb.0:
1946 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
1947 ; X86-NEXT: vpandd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xdb,0xd1]
1948 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1949 ; X86-NEXT: retl ## encoding: [0xc3]
1950 ;
1951 ; X64-LABEL: test_mask_and_epi32:
1952 ; X64: ## %bb.0:
1953 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1954 ; X64-NEXT: vpandd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xdb,0xd1]
1955 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1956 ; X64-NEXT: retq ## encoding: [0xc3]
1957 %res = call <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
1958 ret < 16 x i32> %res
1959 }
1961 declare <16 x i32> @llvm.x86.avx512.mask.pand.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
1963 define <8 x i64> @test_xor_epi64(<8 x i64> %a, <8 x i64> %b) {
1964 ; CHECK-LABEL: test_xor_epi64:
1965 ; CHECK: ## %bb.0:
1966 ; CHECK-NEXT: vpxorq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xef,0xc1]
1967 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1968 %res = call <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)
1969 ret < 8 x i64> %res
1970 }
1972 define <8 x i64> @test_mask_xor_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
1973 ; X86-LABEL: test_mask_xor_epi64:
1974 ; X86: ## %bb.0:
1975 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
1976 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
1977 ; X86-NEXT: vpxorq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xef,0xd1]
1978 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1979 ; X86-NEXT: retl ## encoding: [0xc3]
1980 ;
1981 ; X64-LABEL: test_mask_xor_epi64:
1982 ; X64: ## %bb.0:
1983 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
1984 ; X64-NEXT: vpxorq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xef,0xd1]
1985 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
1986 ; X64-NEXT: retq ## encoding: [0xc3]
1987 %res = call <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
1988 ret < 8 x i64> %res
1989 }
1991 declare <8 x i64> @llvm.x86.avx512.mask.pxor.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
1993 define <8 x i64> @test_or_epi64(<8 x i64> %a, <8 x i64> %b) {
1994 ; CHECK-LABEL: test_or_epi64:
1995 ; CHECK: ## %bb.0:
1996 ; CHECK-NEXT: vporq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xeb,0xc1]
1997 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
1998 %res = call <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)
1999 ret < 8 x i64> %res
2000 }
2002 define <8 x i64> @test_mask_or_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
2003 ; X86-LABEL: test_mask_or_epi64:
2004 ; X86: ## %bb.0:
2005 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2006 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2007 ; X86-NEXT: vporq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xeb,0xd1]
2008 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2009 ; X86-NEXT: retl ## encoding: [0xc3]
2010 ;
2011 ; X64-LABEL: test_mask_or_epi64:
2012 ; X64: ## %bb.0:
2013 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2014 ; X64-NEXT: vporq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xeb,0xd1]
2015 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2016 ; X64-NEXT: retq ## encoding: [0xc3]
2017 %res = call <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
2018 ret < 8 x i64> %res
2019 }
2021 declare <8 x i64> @llvm.x86.avx512.mask.por.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
2023 define <8 x i64> @test_and_epi64(<8 x i64> %a, <8 x i64> %b) {
2024 ; CHECK-LABEL: test_and_epi64:
2025 ; CHECK: ## %bb.0:
2026 ; CHECK-NEXT: vpandq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xdb,0xc1]
2027 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2028 %res = call <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64> %a,<8 x i64> %b, <8 x i64>zeroinitializer, i8 -1)
2029 ret < 8 x i64> %res
2030 }
2032 define <8 x i64> @test_mask_and_epi64(<8 x i64> %a,<8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
2033 ; X86-LABEL: test_mask_and_epi64:
2034 ; X86: ## %bb.0:
2035 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2036 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2037 ; X86-NEXT: vpandq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xdb,0xd1]
2038 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2039 ; X86-NEXT: retl ## encoding: [0xc3]
2040 ;
2041 ; X64-LABEL: test_mask_and_epi64:
2042 ; X64: ## %bb.0:
2043 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2044 ; X64-NEXT: vpandq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xdb,0xd1]
2045 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2046 ; X64-NEXT: retq ## encoding: [0xc3]
2047 %res = call <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
2048 ret < 8 x i64> %res
2049 }
2051 declare <8 x i64> @llvm.x86.avx512.mask.pand.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
2053 define <16 x i32> @test_mask_add_epi32_rr(<16 x i32> %a, <16 x i32> %b) {
2054 ; CHECK-LABEL: test_mask_add_epi32_rr:
2055 ; CHECK: ## %bb.0:
2056 ; CHECK-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfe,0xc1]
2057 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2058 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2059 ret < 16 x i32> %res
2060 }
2062 define <16 x i32> @test_mask_add_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
2063 ; X86-LABEL: test_mask_add_epi32_rrk:
2064 ; X86: ## %bb.0:
2065 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
2066 ; X86-NEXT: vpaddd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfe,0xd1]
2067 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2068 ; X86-NEXT: retl ## encoding: [0xc3]
2069 ;
2070 ; X64-LABEL: test_mask_add_epi32_rrk:
2071 ; X64: ## %bb.0:
2072 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2073 ; X64-NEXT: vpaddd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfe,0xd1]
2074 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2075 ; X64-NEXT: retq ## encoding: [0xc3]
2076 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2077 ret < 16 x i32> %res
2078 }
2080 define <16 x i32> @test_mask_add_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
2081 ; X86-LABEL: test_mask_add_epi32_rrkz:
2082 ; X86: ## %bb.0:
2083 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
2084 ; X86-NEXT: vpaddd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfe,0xc1]
2085 ; X86-NEXT: retl ## encoding: [0xc3]
2086 ;
2087 ; X64-LABEL: test_mask_add_epi32_rrkz:
2088 ; X64: ## %bb.0:
2089 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2090 ; X64-NEXT: vpaddd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfe,0xc1]
2091 ; X64-NEXT: retq ## encoding: [0xc3]
2092 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2093 ret < 16 x i32> %res
2094 }
2096 define <16 x i32> @test_mask_add_epi32_rm(<16 x i32> %a, ptr %ptr_b) {
2097 ; X86-LABEL: test_mask_add_epi32_rm:
2098 ; X86: ## %bb.0:
2099 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2100 ; X86-NEXT: vpaddd (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfe,0x00]
2101 ; X86-NEXT: retl ## encoding: [0xc3]
2102 ;
2103 ; X64-LABEL: test_mask_add_epi32_rm:
2104 ; X64: ## %bb.0:
2105 ; X64-NEXT: vpaddd (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfe,0x07]
2106 ; X64-NEXT: retq ## encoding: [0xc3]
2107 %b = load <16 x i32>, ptr %ptr_b
2108 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2109 ret < 16 x i32> %res
2110 }
2112 define <16 x i32> @test_mask_add_epi32_rmk(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) {
2113 ; X86-LABEL: test_mask_add_epi32_rmk:
2114 ; X86: ## %bb.0:
2115 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2116 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2117 ; X86-NEXT: vpaddd (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfe,0x08]
2118 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2119 ; X86-NEXT: retl ## encoding: [0xc3]
2120 ;
2121 ; X64-LABEL: test_mask_add_epi32_rmk:
2122 ; X64: ## %bb.0:
2123 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2124 ; X64-NEXT: vpaddd (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfe,0x0f]
2125 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2126 ; X64-NEXT: retq ## encoding: [0xc3]
2127 %b = load <16 x i32>, ptr %ptr_b
2128 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2129 ret < 16 x i32> %res
2130 }
2132 define <16 x i32> @test_mask_add_epi32_rmkz(<16 x i32> %a, ptr %ptr_b, i16 %mask) {
2133 ; X86-LABEL: test_mask_add_epi32_rmkz:
2134 ; X86: ## %bb.0:
2135 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2136 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2137 ; X86-NEXT: vpaddd (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfe,0x00]
2138 ; X86-NEXT: retl ## encoding: [0xc3]
2139 ;
2140 ; X64-LABEL: test_mask_add_epi32_rmkz:
2141 ; X64: ## %bb.0:
2142 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2143 ; X64-NEXT: vpaddd (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfe,0x07]
2144 ; X64-NEXT: retq ## encoding: [0xc3]
2145 %b = load <16 x i32>, ptr %ptr_b
2146 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2147 ret < 16 x i32> %res
2148 }
2150 define <16 x i32> @test_mask_add_epi32_rmb(<16 x i32> %a, ptr %ptr_b) {
2151 ; X86-LABEL: test_mask_add_epi32_rmb:
2152 ; X86: ## %bb.0:
2153 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2154 ; X86-NEXT: vpaddd (%eax){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x58,0xfe,0x00]
2155 ; X86-NEXT: retl ## encoding: [0xc3]
2156 ;
2157 ; X64-LABEL: test_mask_add_epi32_rmb:
2158 ; X64: ## %bb.0:
2159 ; X64-NEXT: vpaddd (%rdi){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x58,0xfe,0x07]
2160 ; X64-NEXT: retq ## encoding: [0xc3]
2161 %q = load i32, ptr %ptr_b
2162 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2163 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2164 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2165 ret < 16 x i32> %res
2166 }
2168 define <16 x i32> @test_mask_add_epi32_rmbk(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) {
2169 ; X86-LABEL: test_mask_add_epi32_rmbk:
2170 ; X86: ## %bb.0:
2171 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2172 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2173 ; X86-NEXT: vpaddd (%eax){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x59,0xfe,0x08]
2174 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2175 ; X86-NEXT: retl ## encoding: [0xc3]
2176 ;
2177 ; X64-LABEL: test_mask_add_epi32_rmbk:
2178 ; X64: ## %bb.0:
2179 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2180 ; X64-NEXT: vpaddd (%rdi){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x59,0xfe,0x0f]
2181 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2182 ; X64-NEXT: retq ## encoding: [0xc3]
2183 %q = load i32, ptr %ptr_b
2184 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2185 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2186 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2187 ret < 16 x i32> %res
2188 }
2190 define <16 x i32> @test_mask_add_epi32_rmbkz(<16 x i32> %a, ptr %ptr_b, i16 %mask) {
2191 ; X86-LABEL: test_mask_add_epi32_rmbkz:
2192 ; X86: ## %bb.0:
2193 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2194 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2195 ; X86-NEXT: vpaddd (%eax){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xd9,0xfe,0x00]
2196 ; X86-NEXT: retl ## encoding: [0xc3]
2197 ;
2198 ; X64-LABEL: test_mask_add_epi32_rmbkz:
2199 ; X64: ## %bb.0:
2200 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2201 ; X64-NEXT: vpaddd (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xd9,0xfe,0x07]
2202 ; X64-NEXT: retq ## encoding: [0xc3]
2203 %q = load i32, ptr %ptr_b
2204 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2205 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2206 %res = call <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2207 ret < 16 x i32> %res
2208 }
2210 declare <16 x i32> @llvm.x86.avx512.mask.padd.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
2212 define <16 x i32> @test_mask_sub_epi32_rr(<16 x i32> %a, <16 x i32> %b) {
2213 ; CHECK-LABEL: test_mask_sub_epi32_rr:
2214 ; CHECK: ## %bb.0:
2215 ; CHECK-NEXT: vpsubd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfa,0xc1]
2216 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2217 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2218 ret < 16 x i32> %res
2219 }
2221 define <16 x i32> @test_mask_sub_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
2222 ; X86-LABEL: test_mask_sub_epi32_rrk:
2223 ; X86: ## %bb.0:
2224 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
2225 ; X86-NEXT: vpsubd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfa,0xd1]
2226 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2227 ; X86-NEXT: retl ## encoding: [0xc3]
2228 ;
2229 ; X64-LABEL: test_mask_sub_epi32_rrk:
2230 ; X64: ## %bb.0:
2231 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2232 ; X64-NEXT: vpsubd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfa,0xd1]
2233 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2234 ; X64-NEXT: retq ## encoding: [0xc3]
2235 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2236 ret < 16 x i32> %res
2237 }
2239 define <16 x i32> @test_mask_sub_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
2240 ; X86-LABEL: test_mask_sub_epi32_rrkz:
2241 ; X86: ## %bb.0:
2242 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
2243 ; X86-NEXT: vpsubd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfa,0xc1]
2244 ; X86-NEXT: retl ## encoding: [0xc3]
2245 ;
2246 ; X64-LABEL: test_mask_sub_epi32_rrkz:
2247 ; X64: ## %bb.0:
2248 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2249 ; X64-NEXT: vpsubd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfa,0xc1]
2250 ; X64-NEXT: retq ## encoding: [0xc3]
2251 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2252 ret < 16 x i32> %res
2253 }
2255 define <16 x i32> @test_mask_sub_epi32_rm(<16 x i32> %a, ptr %ptr_b) {
2256 ; X86-LABEL: test_mask_sub_epi32_rm:
2257 ; X86: ## %bb.0:
2258 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2259 ; X86-NEXT: vpsubd (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfa,0x00]
2260 ; X86-NEXT: retl ## encoding: [0xc3]
2261 ;
2262 ; X64-LABEL: test_mask_sub_epi32_rm:
2263 ; X64: ## %bb.0:
2264 ; X64-NEXT: vpsubd (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xfa,0x07]
2265 ; X64-NEXT: retq ## encoding: [0xc3]
2266 %b = load <16 x i32>, ptr %ptr_b
2267 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2268 ret < 16 x i32> %res
2269 }
2271 define <16 x i32> @test_mask_sub_epi32_rmk(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) {
2272 ; X86-LABEL: test_mask_sub_epi32_rmk:
2273 ; X86: ## %bb.0:
2274 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2275 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2276 ; X86-NEXT: vpsubd (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfa,0x08]
2277 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2278 ; X86-NEXT: retl ## encoding: [0xc3]
2279 ;
2280 ; X64-LABEL: test_mask_sub_epi32_rmk:
2281 ; X64: ## %bb.0:
2282 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2283 ; X64-NEXT: vpsubd (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xfa,0x0f]
2284 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2285 ; X64-NEXT: retq ## encoding: [0xc3]
2286 %b = load <16 x i32>, ptr %ptr_b
2287 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2288 ret < 16 x i32> %res
2289 }
2291 define <16 x i32> @test_mask_sub_epi32_rmkz(<16 x i32> %a, ptr %ptr_b, i16 %mask) {
2292 ; X86-LABEL: test_mask_sub_epi32_rmkz:
2293 ; X86: ## %bb.0:
2294 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2295 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2296 ; X86-NEXT: vpsubd (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfa,0x00]
2297 ; X86-NEXT: retl ## encoding: [0xc3]
2298 ;
2299 ; X64-LABEL: test_mask_sub_epi32_rmkz:
2300 ; X64: ## %bb.0:
2301 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2302 ; X64-NEXT: vpsubd (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xfa,0x07]
2303 ; X64-NEXT: retq ## encoding: [0xc3]
2304 %b = load <16 x i32>, ptr %ptr_b
2305 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2306 ret < 16 x i32> %res
2307 }
2309 define <16 x i32> @test_mask_sub_epi32_rmb(<16 x i32> %a, ptr %ptr_b) {
2310 ; X86-LABEL: test_mask_sub_epi32_rmb:
2311 ; X86: ## %bb.0:
2312 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2313 ; X86-NEXT: vpsubd (%eax){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x58,0xfa,0x00]
2314 ; X86-NEXT: retl ## encoding: [0xc3]
2315 ;
2316 ; X64-LABEL: test_mask_sub_epi32_rmb:
2317 ; X64: ## %bb.0:
2318 ; X64-NEXT: vpsubd (%rdi){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x58,0xfa,0x07]
2319 ; X64-NEXT: retq ## encoding: [0xc3]
2320 %q = load i32, ptr %ptr_b
2321 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2322 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2323 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2324 ret < 16 x i32> %res
2325 }
2327 define <16 x i32> @test_mask_sub_epi32_rmbk(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) {
2328 ; X86-LABEL: test_mask_sub_epi32_rmbk:
2329 ; X86: ## %bb.0:
2330 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2331 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2332 ; X86-NEXT: vpsubd (%eax){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x59,0xfa,0x08]
2333 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2334 ; X86-NEXT: retl ## encoding: [0xc3]
2335 ;
2336 ; X64-LABEL: test_mask_sub_epi32_rmbk:
2337 ; X64: ## %bb.0:
2338 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2339 ; X64-NEXT: vpsubd (%rdi){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x59,0xfa,0x0f]
2340 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2341 ; X64-NEXT: retq ## encoding: [0xc3]
2342 %q = load i32, ptr %ptr_b
2343 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2344 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2345 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2346 ret < 16 x i32> %res
2347 }
2349 define <16 x i32> @test_mask_sub_epi32_rmbkz(<16 x i32> %a, ptr %ptr_b, i16 %mask) {
2350 ; X86-LABEL: test_mask_sub_epi32_rmbkz:
2351 ; X86: ## %bb.0:
2352 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2353 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2354 ; X86-NEXT: vpsubd (%eax){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xd9,0xfa,0x00]
2355 ; X86-NEXT: retl ## encoding: [0xc3]
2356 ;
2357 ; X64-LABEL: test_mask_sub_epi32_rmbkz:
2358 ; X64: ## %bb.0:
2359 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2360 ; X64-NEXT: vpsubd (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xd9,0xfa,0x07]
2361 ; X64-NEXT: retq ## encoding: [0xc3]
2362 %q = load i32, ptr %ptr_b
2363 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2364 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2365 %res = call <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2366 ret < 16 x i32> %res
2367 }
2369 declare <16 x i32> @llvm.x86.avx512.mask.psub.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
2371 define <8 x i64> @test_mask_add_epi64_rr(<8 x i64> %a, <8 x i64> %b) {
2372 ; CHECK-LABEL: test_mask_add_epi64_rr:
2373 ; CHECK: ## %bb.0:
2374 ; CHECK-NEXT: vpaddq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xd4,0xc1]
2375 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2376 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
2377 ret < 8 x i64> %res
2378 }
2380 define <8 x i64> @test_mask_add_epi64_rrk(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
2381 ; X86-LABEL: test_mask_add_epi64_rrk:
2382 ; X86: ## %bb.0:
2383 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2384 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2385 ; X86-NEXT: vpaddq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xd4,0xd1]
2386 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2387 ; X86-NEXT: retl ## encoding: [0xc3]
2388 ;
2389 ; X64-LABEL: test_mask_add_epi64_rrk:
2390 ; X64: ## %bb.0:
2391 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2392 ; X64-NEXT: vpaddq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xd4,0xd1]
2393 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2394 ; X64-NEXT: retq ## encoding: [0xc3]
2395 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
2396 ret < 8 x i64> %res
2397 }
2399 define <8 x i64> @test_mask_add_epi64_rrkz(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
2400 ; X86-LABEL: test_mask_add_epi64_rrkz:
2401 ; X86: ## %bb.0:
2402 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2403 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2404 ; X86-NEXT: vpaddq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xd4,0xc1]
2405 ; X86-NEXT: retl ## encoding: [0xc3]
2406 ;
2407 ; X64-LABEL: test_mask_add_epi64_rrkz:
2408 ; X64: ## %bb.0:
2409 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2410 ; X64-NEXT: vpaddq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xd4,0xc1]
2411 ; X64-NEXT: retq ## encoding: [0xc3]
2412 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
2413 ret < 8 x i64> %res
2414 }
2416 define <8 x i64> @test_mask_add_epi64_rm(<8 x i64> %a, ptr %ptr_b) {
2417 ; X86-LABEL: test_mask_add_epi64_rm:
2418 ; X86: ## %bb.0:
2419 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2420 ; X86-NEXT: vpaddq (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xd4,0x00]
2421 ; X86-NEXT: retl ## encoding: [0xc3]
2422 ;
2423 ; X64-LABEL: test_mask_add_epi64_rm:
2424 ; X64: ## %bb.0:
2425 ; X64-NEXT: vpaddq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xd4,0x07]
2426 ; X64-NEXT: retq ## encoding: [0xc3]
2427 %b = load <8 x i64>, ptr %ptr_b
2428 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
2429 ret < 8 x i64> %res
2430 }
2432 define <8 x i64> @test_mask_add_epi64_rmk(<8 x i64> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
2433 ; X86-LABEL: test_mask_add_epi64_rmk:
2434 ; X86: ## %bb.0:
2435 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2436 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
2437 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
2438 ; X86-NEXT: vpaddq (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xd4,0x08]
2439 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2440 ; X86-NEXT: retl ## encoding: [0xc3]
2441 ;
2442 ; X64-LABEL: test_mask_add_epi64_rmk:
2443 ; X64: ## %bb.0:
2444 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2445 ; X64-NEXT: vpaddq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xd4,0x0f]
2446 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2447 ; X64-NEXT: retq ## encoding: [0xc3]
2448 %b = load <8 x i64>, ptr %ptr_b
2449 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
2450 ret < 8 x i64> %res
2451 }
2453 define <8 x i64> @test_mask_add_epi64_rmkz(<8 x i64> %a, ptr %ptr_b, i8 %mask) {
2454 ; X86-LABEL: test_mask_add_epi64_rmkz:
2455 ; X86: ## %bb.0:
2456 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2457 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
2458 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
2459 ; X86-NEXT: vpaddq (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xd4,0x00]
2460 ; X86-NEXT: retl ## encoding: [0xc3]
2461 ;
2462 ; X64-LABEL: test_mask_add_epi64_rmkz:
2463 ; X64: ## %bb.0:
2464 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2465 ; X64-NEXT: vpaddq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xd4,0x07]
2466 ; X64-NEXT: retq ## encoding: [0xc3]
2467 %b = load <8 x i64>, ptr %ptr_b
2468 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
2469 ret < 8 x i64> %res
2470 }
2472 define <8 x i64> @test_mask_add_epi64_rmb(<8 x i64> %a, ptr %ptr_b) {
2473 ; X86-LABEL: test_mask_add_epi64_rmb:
2474 ; X86: ## %bb.0:
2475 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2476 ; X86-NEXT: vpaddq (%eax){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xd4,0x00]
2477 ; X86-NEXT: retl ## encoding: [0xc3]
2478 ;
2479 ; X64-LABEL: test_mask_add_epi64_rmb:
2480 ; X64: ## %bb.0:
2481 ; X64-NEXT: vpaddq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xd4,0x07]
2482 ; X64-NEXT: retq ## encoding: [0xc3]
2483 %q = load i64, ptr %ptr_b
2484 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
2485 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
2486 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
2487 ret < 8 x i64> %res
2488 }
2490 define <8 x i64> @test_mask_add_epi64_rmbk(<8 x i64> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
2491 ; X86-LABEL: test_mask_add_epi64_rmbk:
2492 ; X86: ## %bb.0:
2493 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2494 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
2495 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
2496 ; X86-NEXT: vpaddq (%eax){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xd4,0x08]
2497 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2498 ; X86-NEXT: retl ## encoding: [0xc3]
2499 ;
2500 ; X64-LABEL: test_mask_add_epi64_rmbk:
2501 ; X64: ## %bb.0:
2502 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2503 ; X64-NEXT: vpaddq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xd4,0x0f]
2504 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2505 ; X64-NEXT: retq ## encoding: [0xc3]
2506 %q = load i64, ptr %ptr_b
2507 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
2508 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
2509 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
2510 ret < 8 x i64> %res
2511 }
2513 define <8 x i64> @test_mask_add_epi64_rmbkz(<8 x i64> %a, ptr %ptr_b, i8 %mask) {
2514 ; X86-LABEL: test_mask_add_epi64_rmbkz:
2515 ; X86: ## %bb.0:
2516 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2517 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
2518 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
2519 ; X86-NEXT: vpaddq (%eax){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xd4,0x00]
2520 ; X86-NEXT: retl ## encoding: [0xc3]
2521 ;
2522 ; X64-LABEL: test_mask_add_epi64_rmbkz:
2523 ; X64: ## %bb.0:
2524 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2525 ; X64-NEXT: vpaddq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xd4,0x07]
2526 ; X64-NEXT: retq ## encoding: [0xc3]
2527 %q = load i64, ptr %ptr_b
2528 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
2529 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
2530 %res = call <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
2531 ret < 8 x i64> %res
2532 }
2534 declare <8 x i64> @llvm.x86.avx512.mask.padd.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
2536 define <8 x i64> @test_mask_sub_epi64_rr(<8 x i64> %a, <8 x i64> %b) {
2537 ; CHECK-LABEL: test_mask_sub_epi64_rr:
2538 ; CHECK: ## %bb.0:
2539 ; CHECK-NEXT: vpsubq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xfb,0xc1]
2540 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2541 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
2542 ret < 8 x i64> %res
2543 }
2545 define <8 x i64> @test_mask_sub_epi64_rrk(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask) {
2546 ; X86-LABEL: test_mask_sub_epi64_rrk:
2547 ; X86: ## %bb.0:
2548 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2549 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2550 ; X86-NEXT: vpsubq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xfb,0xd1]
2551 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2552 ; X86-NEXT: retl ## encoding: [0xc3]
2553 ;
2554 ; X64-LABEL: test_mask_sub_epi64_rrk:
2555 ; X64: ## %bb.0:
2556 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2557 ; X64-NEXT: vpsubq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xfb,0xd1]
2558 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2559 ; X64-NEXT: retq ## encoding: [0xc3]
2560 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
2561 ret < 8 x i64> %res
2562 }
2564 define <8 x i64> @test_mask_sub_epi64_rrkz(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
2565 ; X86-LABEL: test_mask_sub_epi64_rrkz:
2566 ; X86: ## %bb.0:
2567 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2568 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2569 ; X86-NEXT: vpsubq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xfb,0xc1]
2570 ; X86-NEXT: retl ## encoding: [0xc3]
2571 ;
2572 ; X64-LABEL: test_mask_sub_epi64_rrkz:
2573 ; X64: ## %bb.0:
2574 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2575 ; X64-NEXT: vpsubq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xfb,0xc1]
2576 ; X64-NEXT: retq ## encoding: [0xc3]
2577 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
2578 ret < 8 x i64> %res
2579 }
2581 define <8 x i64> @test_mask_sub_epi64_rm(<8 x i64> %a, ptr %ptr_b) {
2582 ; X86-LABEL: test_mask_sub_epi64_rm:
2583 ; X86: ## %bb.0:
2584 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2585 ; X86-NEXT: vpsubq (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xfb,0x00]
2586 ; X86-NEXT: retl ## encoding: [0xc3]
2587 ;
2588 ; X64-LABEL: test_mask_sub_epi64_rm:
2589 ; X64: ## %bb.0:
2590 ; X64-NEXT: vpsubq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xfb,0x07]
2591 ; X64-NEXT: retq ## encoding: [0xc3]
2592 %b = load <8 x i64>, ptr %ptr_b
2593 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
2594 ret < 8 x i64> %res
2595 }
2597 define <8 x i64> @test_mask_sub_epi64_rmk(<8 x i64> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
2598 ; X86-LABEL: test_mask_sub_epi64_rmk:
2599 ; X86: ## %bb.0:
2600 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2601 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
2602 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
2603 ; X86-NEXT: vpsubq (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xfb,0x08]
2604 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2605 ; X86-NEXT: retl ## encoding: [0xc3]
2606 ;
2607 ; X64-LABEL: test_mask_sub_epi64_rmk:
2608 ; X64: ## %bb.0:
2609 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2610 ; X64-NEXT: vpsubq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xfb,0x0f]
2611 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2612 ; X64-NEXT: retq ## encoding: [0xc3]
2613 %b = load <8 x i64>, ptr %ptr_b
2614 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
2615 ret < 8 x i64> %res
2616 }
2618 define <8 x i64> @test_mask_sub_epi64_rmkz(<8 x i64> %a, ptr %ptr_b, i8 %mask) {
2619 ; X86-LABEL: test_mask_sub_epi64_rmkz:
2620 ; X86: ## %bb.0:
2621 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2622 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
2623 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
2624 ; X86-NEXT: vpsubq (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xfb,0x00]
2625 ; X86-NEXT: retl ## encoding: [0xc3]
2626 ;
2627 ; X64-LABEL: test_mask_sub_epi64_rmkz:
2628 ; X64: ## %bb.0:
2629 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2630 ; X64-NEXT: vpsubq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xfb,0x07]
2631 ; X64-NEXT: retq ## encoding: [0xc3]
2632 %b = load <8 x i64>, ptr %ptr_b
2633 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
2634 ret < 8 x i64> %res
2635 }
2637 define <8 x i64> @test_mask_sub_epi64_rmb(<8 x i64> %a, ptr %ptr_b) {
2638 ; X86-LABEL: test_mask_sub_epi64_rmb:
2639 ; X86: ## %bb.0:
2640 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2641 ; X86-NEXT: vpsubq (%eax){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xfb,0x00]
2642 ; X86-NEXT: retl ## encoding: [0xc3]
2643 ;
2644 ; X64-LABEL: test_mask_sub_epi64_rmb:
2645 ; X64: ## %bb.0:
2646 ; X64-NEXT: vpsubq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xfb,0x07]
2647 ; X64-NEXT: retq ## encoding: [0xc3]
2648 %q = load i64, ptr %ptr_b
2649 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
2650 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
2651 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
2652 ret < 8 x i64> %res
2653 }
2655 define <8 x i64> @test_mask_sub_epi64_rmbk(<8 x i64> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
2656 ; X86-LABEL: test_mask_sub_epi64_rmbk:
2657 ; X86: ## %bb.0:
2658 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2659 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
2660 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
2661 ; X86-NEXT: vpsubq (%eax){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xfb,0x08]
2662 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2663 ; X86-NEXT: retl ## encoding: [0xc3]
2664 ;
2665 ; X64-LABEL: test_mask_sub_epi64_rmbk:
2666 ; X64: ## %bb.0:
2667 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2668 ; X64-NEXT: vpsubq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xfb,0x0f]
2669 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2670 ; X64-NEXT: retq ## encoding: [0xc3]
2671 %q = load i64, ptr %ptr_b
2672 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
2673 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
2674 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> %passThru, i8 %mask)
2675 ret < 8 x i64> %res
2676 }
2678 define <8 x i64> @test_mask_sub_epi64_rmbkz(<8 x i64> %a, ptr %ptr_b, i8 %mask) {
2679 ; X86-LABEL: test_mask_sub_epi64_rmbkz:
2680 ; X86: ## %bb.0:
2681 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2682 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
2683 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
2684 ; X86-NEXT: vpsubq (%eax){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xfb,0x00]
2685 ; X86-NEXT: retl ## encoding: [0xc3]
2686 ;
2687 ; X64-LABEL: test_mask_sub_epi64_rmbkz:
2688 ; X64: ## %bb.0:
2689 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2690 ; X64-NEXT: vpsubq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xfb,0x07]
2691 ; X64-NEXT: retq ## encoding: [0xc3]
2692 %q = load i64, ptr %ptr_b
2693 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
2694 %b = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
2695 %res = call <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64> %a, <8 x i64> %b, <8 x i64> zeroinitializer, i8 %mask)
2696 ret < 8 x i64> %res
2697 }
2699 declare <8 x i64> @llvm.x86.avx512.mask.psub.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
2701 define <16 x i32> @test_mask_mullo_epi32_rr_512(<16 x i32> %a, <16 x i32> %b) {
2702 ; CHECK-LABEL: test_mask_mullo_epi32_rr_512:
2703 ; CHECK: ## %bb.0:
2704 ; CHECK-NEXT: vpmulld %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x40,0xc1]
2705 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2706 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2707 ret <16 x i32> %res
2708 }
2710 define <16 x i32> @test_mask_mullo_epi32_rrk_512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask) {
2711 ; X86-LABEL: test_mask_mullo_epi32_rrk_512:
2712 ; X86: ## %bb.0:
2713 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
2714 ; X86-NEXT: vpmulld %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x40,0xd1]
2715 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2716 ; X86-NEXT: retl ## encoding: [0xc3]
2717 ;
2718 ; X64-LABEL: test_mask_mullo_epi32_rrk_512:
2719 ; X64: ## %bb.0:
2720 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2721 ; X64-NEXT: vpmulld %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x40,0xd1]
2722 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2723 ; X64-NEXT: retq ## encoding: [0xc3]
2724 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2725 ret < 16 x i32> %res
2726 }
2728 define <16 x i32> @test_mask_mullo_epi32_rrkz_512(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
2729 ; X86-LABEL: test_mask_mullo_epi32_rrkz_512:
2730 ; X86: ## %bb.0:
2731 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
2732 ; X86-NEXT: vpmulld %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x40,0xc1]
2733 ; X86-NEXT: retl ## encoding: [0xc3]
2734 ;
2735 ; X64-LABEL: test_mask_mullo_epi32_rrkz_512:
2736 ; X64: ## %bb.0:
2737 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2738 ; X64-NEXT: vpmulld %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x40,0xc1]
2739 ; X64-NEXT: retq ## encoding: [0xc3]
2740 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2741 ret < 16 x i32> %res
2742 }
2744 define <16 x i32> @test_mask_mullo_epi32_rm_512(<16 x i32> %a, ptr %ptr_b) {
2745 ; X86-LABEL: test_mask_mullo_epi32_rm_512:
2746 ; X86: ## %bb.0:
2747 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2748 ; X86-NEXT: vpmulld (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x40,0x00]
2749 ; X86-NEXT: retl ## encoding: [0xc3]
2750 ;
2751 ; X64-LABEL: test_mask_mullo_epi32_rm_512:
2752 ; X64: ## %bb.0:
2753 ; X64-NEXT: vpmulld (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x40,0x07]
2754 ; X64-NEXT: retq ## encoding: [0xc3]
2755 %b = load <16 x i32>, ptr %ptr_b
2756 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2757 ret < 16 x i32> %res
2758 }
2760 define <16 x i32> @test_mask_mullo_epi32_rmk_512(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) {
2761 ; X86-LABEL: test_mask_mullo_epi32_rmk_512:
2762 ; X86: ## %bb.0:
2763 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2764 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2765 ; X86-NEXT: vpmulld (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x40,0x08]
2766 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2767 ; X86-NEXT: retl ## encoding: [0xc3]
2768 ;
2769 ; X64-LABEL: test_mask_mullo_epi32_rmk_512:
2770 ; X64: ## %bb.0:
2771 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2772 ; X64-NEXT: vpmulld (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x40,0x0f]
2773 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2774 ; X64-NEXT: retq ## encoding: [0xc3]
2775 %b = load <16 x i32>, ptr %ptr_b
2776 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2777 ret < 16 x i32> %res
2778 }
2780 define <16 x i32> @test_mask_mullo_epi32_rmkz_512(<16 x i32> %a, ptr %ptr_b, i16 %mask) {
2781 ; X86-LABEL: test_mask_mullo_epi32_rmkz_512:
2782 ; X86: ## %bb.0:
2783 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2784 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2785 ; X86-NEXT: vpmulld (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x40,0x00]
2786 ; X86-NEXT: retl ## encoding: [0xc3]
2787 ;
2788 ; X64-LABEL: test_mask_mullo_epi32_rmkz_512:
2789 ; X64: ## %bb.0:
2790 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2791 ; X64-NEXT: vpmulld (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x40,0x07]
2792 ; X64-NEXT: retq ## encoding: [0xc3]
2793 %b = load <16 x i32>, ptr %ptr_b
2794 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2795 ret < 16 x i32> %res
2796 }
2798 define <16 x i32> @test_mask_mullo_epi32_rmb_512(<16 x i32> %a, ptr %ptr_b) {
2799 ; X86-LABEL: test_mask_mullo_epi32_rmb_512:
2800 ; X86: ## %bb.0:
2801 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2802 ; X86-NEXT: vpmulld (%eax){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x58,0x40,0x00]
2803 ; X86-NEXT: retl ## encoding: [0xc3]
2804 ;
2805 ; X64-LABEL: test_mask_mullo_epi32_rmb_512:
2806 ; X64: ## %bb.0:
2807 ; X64-NEXT: vpmulld (%rdi){1to16}, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x58,0x40,0x07]
2808 ; X64-NEXT: retq ## encoding: [0xc3]
2809 %q = load i32, ptr %ptr_b
2810 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2811 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2812 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 -1)
2813 ret < 16 x i32> %res
2814 }
2816 define <16 x i32> @test_mask_mullo_epi32_rmbk_512(<16 x i32> %a, ptr %ptr_b, <16 x i32> %passThru, i16 %mask) {
2817 ; X86-LABEL: test_mask_mullo_epi32_rmbk_512:
2818 ; X86: ## %bb.0:
2819 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2820 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2821 ; X86-NEXT: vpmulld (%eax){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0x40,0x08]
2822 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2823 ; X86-NEXT: retl ## encoding: [0xc3]
2824 ;
2825 ; X64-LABEL: test_mask_mullo_epi32_rmbk_512:
2826 ; X64: ## %bb.0:
2827 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2828 ; X64-NEXT: vpmulld (%rdi){1to16}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0x40,0x0f]
2829 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
2830 ; X64-NEXT: retq ## encoding: [0xc3]
2831 %q = load i32, ptr %ptr_b
2832 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2833 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2834 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> %passThru, i16 %mask)
2835 ret < 16 x i32> %res
2836 }
2838 define <16 x i32> @test_mask_mullo_epi32_rmbkz_512(<16 x i32> %a, ptr %ptr_b, i16 %mask) {
2839 ; X86-LABEL: test_mask_mullo_epi32_rmbkz_512:
2840 ; X86: ## %bb.0:
2841 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
2842 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
2843 ; X86-NEXT: vpmulld (%eax){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xd9,0x40,0x00]
2844 ; X86-NEXT: retl ## encoding: [0xc3]
2845 ;
2846 ; X64-LABEL: test_mask_mullo_epi32_rmbkz_512:
2847 ; X64: ## %bb.0:
2848 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
2849 ; X64-NEXT: vpmulld (%rdi){1to16}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xd9,0x40,0x07]
2850 ; X64-NEXT: retq ## encoding: [0xc3]
2851 %q = load i32, ptr %ptr_b
2852 %vecinit.i = insertelement <16 x i32> undef, i32 %q, i32 0
2853 %b = shufflevector <16 x i32> %vecinit.i, <16 x i32> undef, <16 x i32> zeroinitializer
2854 %res = call <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32> %a, <16 x i32> %b, <16 x i32> zeroinitializer, i16 %mask)
2855 ret < 16 x i32> %res
2856 }
2858 declare <16 x i32> @llvm.x86.avx512.mask.pmull.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
2861 declare <16 x float> @llvm.x86.avx512.mask.shuf.f32x4(<16 x float>, <16 x float>, i32, <16 x float>, i16)
2863 define <16 x float>@test_int_x86_avx512_shuf_f32x4(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3) {
2864 ; CHECK-LABEL: test_int_x86_avx512_shuf_f32x4:
2865 ; CHECK: ## %bb.0:
2866 ; CHECK-NEXT: vshuff64x2 $22, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x23,0xc1,0x16]
2867 ; CHECK-NEXT: ## zmm0 = zmm0[4,5,2,3],zmm1[2,3,0,1]
2868 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2869 %res = call <16 x float> @llvm.x86.avx512.mask.shuf.f32x4(<16 x float> %x0, <16 x float> %x1, i32 22, <16 x float> %x3, i16 -1)
2870 ret <16 x float> %res
2871 }
2873 define <16 x float>@test_int_x86_avx512_mask_shuf_f32x4(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3, i16 %x4) {
2874 ; X86-LABEL: test_int_x86_avx512_mask_shuf_f32x4:
2875 ; X86: ## %bb.0:
2876 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
2877 ; X86-NEXT: vshuff32x4 $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x23,0xd1,0x16]
2878 ; X86-NEXT: ## zmm2 {%k1} = zmm0[8,9,10,11,4,5,6,7],zmm1[4,5,6,7,0,1,2,3]
2879 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
2880 ; X86-NEXT: retl ## encoding: [0xc3]
2881 ;
2882 ; X64-LABEL: test_int_x86_avx512_mask_shuf_f32x4:
2883 ; X64: ## %bb.0:
2884 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2885 ; X64-NEXT: vshuff32x4 $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x23,0xd1,0x16]
2886 ; X64-NEXT: ## zmm2 {%k1} = zmm0[8,9,10,11,4,5,6,7],zmm1[4,5,6,7,0,1,2,3]
2887 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
2888 ; X64-NEXT: retq ## encoding: [0xc3]
2889 %res = call <16 x float> @llvm.x86.avx512.mask.shuf.f32x4(<16 x float> %x0, <16 x float> %x1, i32 22, <16 x float> %x3, i16 %x4)
2890 ret <16 x float> %res
2891 }
2893 declare <8 x double> @llvm.x86.avx512.mask.shuf.f64x2(<8 x double>, <8 x double>, i32, <8 x double>, i8)
2895 define <8 x double>@test_int_x86_avx512_shuf_f64x2(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3) {
2896 ; CHECK-LABEL: test_int_x86_avx512_shuf_f64x2:
2897 ; CHECK: ## %bb.0:
2898 ; CHECK-NEXT: vshuff64x2 $22, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x23,0xc1,0x16]
2899 ; CHECK-NEXT: ## zmm0 = zmm0[4,5,2,3],zmm1[2,3,0,1]
2900 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2901 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.f64x2(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> %x3, i8 -1)
2902 ret <8 x double> %res
2903 }
2905 define <8 x double>@test_int_x86_avx512_mask_shuf_f64x2(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3, i8 %x4) {
2906 ; X86-LABEL: test_int_x86_avx512_mask_shuf_f64x2:
2907 ; X86: ## %bb.0:
2908 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2909 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2910 ; X86-NEXT: vshuff64x2 $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x23,0xd1,0x16]
2911 ; X86-NEXT: ## zmm2 {%k1} = zmm0[4,5,2,3],zmm1[2,3,0,1]
2912 ; X86-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
2913 ; X86-NEXT: retl ## encoding: [0xc3]
2914 ;
2915 ; X64-LABEL: test_int_x86_avx512_mask_shuf_f64x2:
2916 ; X64: ## %bb.0:
2917 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2918 ; X64-NEXT: vshuff64x2 $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x23,0xd1,0x16]
2919 ; X64-NEXT: ## zmm2 {%k1} = zmm0[4,5,2,3],zmm1[2,3,0,1]
2920 ; X64-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
2921 ; X64-NEXT: retq ## encoding: [0xc3]
2922 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.f64x2(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> %x3, i8 %x4)
2923 ret <8 x double> %res
2924 }
2926 define <8 x double>@test_int_x86_avx512_maskz_shuf_f64x2(<8 x double> %x0, <8 x double> %x1, i8 %x4) {
2927 ; X86-LABEL: test_int_x86_avx512_maskz_shuf_f64x2:
2928 ; X86: ## %bb.0:
2929 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2930 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2931 ; X86-NEXT: vshuff64x2 $22, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x23,0xc1,0x16]
2932 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[4,5,2,3],zmm1[2,3,0,1]
2933 ; X86-NEXT: retl ## encoding: [0xc3]
2934 ;
2935 ; X64-LABEL: test_int_x86_avx512_maskz_shuf_f64x2:
2936 ; X64: ## %bb.0:
2937 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2938 ; X64-NEXT: vshuff64x2 $22, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x23,0xc1,0x16]
2939 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[4,5,2,3],zmm1[2,3,0,1]
2940 ; X64-NEXT: retq ## encoding: [0xc3]
2941 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.f64x2(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> zeroinitializer, i8 %x4)
2942 ret <8 x double> %res
2943 }
2945 declare <16 x i32> @llvm.x86.avx512.mask.shuf.i32x4(<16 x i32>, <16 x i32>, i32, <16 x i32>, i16)
2947 define <16 x i32>@test_int_x86_avx512_shuf_i32x4(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x3) {
2948 ; CHECK-LABEL: test_int_x86_avx512_shuf_i32x4:
2949 ; CHECK: ## %bb.0:
2950 ; CHECK-NEXT: vshufi64x2 $22, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x43,0xc1,0x16]
2951 ; CHECK-NEXT: ## zmm0 = zmm0[4,5,2,3],zmm1[2,3,0,1]
2952 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2953 %res = call <16 x i32> @llvm.x86.avx512.mask.shuf.i32x4(<16 x i32> %x0, <16 x i32> %x1, i32 22, <16 x i32> %x3, i16 -1)
2954 ret <16 x i32> %res
2955 }
2957 define <16 x i32>@test_int_x86_avx512_mask_shuf_i32x4(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x3, i16 %x4) {
2958 ; X86-LABEL: test_int_x86_avx512_mask_shuf_i32x4:
2959 ; X86: ## %bb.0:
2960 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
2961 ; X86-NEXT: vshufi32x4 $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x43,0xd1,0x16]
2962 ; X86-NEXT: ## zmm2 {%k1} = zmm0[8,9,10,11,4,5,6,7],zmm1[4,5,6,7,0,1,2,3]
2963 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2964 ; X86-NEXT: retl ## encoding: [0xc3]
2965 ;
2966 ; X64-LABEL: test_int_x86_avx512_mask_shuf_i32x4:
2967 ; X64: ## %bb.0:
2968 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
2969 ; X64-NEXT: vshufi32x4 $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x43,0xd1,0x16]
2970 ; X64-NEXT: ## zmm2 {%k1} = zmm0[8,9,10,11,4,5,6,7],zmm1[4,5,6,7,0,1,2,3]
2971 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2972 ; X64-NEXT: retq ## encoding: [0xc3]
2973 %res = call <16 x i32> @llvm.x86.avx512.mask.shuf.i32x4(<16 x i32> %x0, <16 x i32> %x1, i32 22, <16 x i32> %x3, i16 %x4)
2974 ret <16 x i32> %res
2975 }
2977 declare <8 x i64> @llvm.x86.avx512.mask.shuf.i64x2(<8 x i64>, <8 x i64>, i32, <8 x i64>, i8)
2979 define <8 x i64>@test_int_x86_avx512_shuf_i64x2(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x3) {
2980 ; CHECK-LABEL: test_int_x86_avx512_shuf_i64x2:
2981 ; CHECK: ## %bb.0:
2982 ; CHECK-NEXT: vshufi64x2 $22, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x43,0xc1,0x16]
2983 ; CHECK-NEXT: ## zmm0 = zmm0[4,5,2,3],zmm1[2,3,0,1]
2984 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
2985 %res = call <8 x i64> @llvm.x86.avx512.mask.shuf.i64x2(<8 x i64> %x0, <8 x i64> %x1, i32 22, <8 x i64> %x3, i8 -1)
2986 ret <8 x i64> %res
2987 }
2989 define <8 x i64>@test_int_x86_avx512_mask_shuf_i64x2(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x3, i8 %x4) {
2990 ; X86-LABEL: test_int_x86_avx512_mask_shuf_i64x2:
2991 ; X86: ## %bb.0:
2992 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
2993 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
2994 ; X86-NEXT: vshufi64x2 $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x43,0xd1,0x16]
2995 ; X86-NEXT: ## zmm2 {%k1} = zmm0[4,5,2,3],zmm1[2,3,0,1]
2996 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
2997 ; X86-NEXT: retl ## encoding: [0xc3]
2998 ;
2999 ; X64-LABEL: test_int_x86_avx512_mask_shuf_i64x2:
3000 ; X64: ## %bb.0:
3001 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3002 ; X64-NEXT: vshufi64x2 $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x43,0xd1,0x16]
3003 ; X64-NEXT: ## zmm2 {%k1} = zmm0[4,5,2,3],zmm1[2,3,0,1]
3004 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3005 ; X64-NEXT: retq ## encoding: [0xc3]
3006 %res = call <8 x i64> @llvm.x86.avx512.mask.shuf.i64x2(<8 x i64> %x0, <8 x i64> %x1, i32 22, <8 x i64> %x3, i8 %x4)
3007 ret <8 x i64> %res
3008 }
3010 declare <8 x double> @llvm.x86.avx512.mask.shuf.pd.512(<8 x double>, <8 x double>, i32, <8 x double>, i8)
3012 define <8 x double>@test_int_x86_avx512_shuf_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3) {
3013 ; CHECK-LABEL: test_int_x86_avx512_shuf_pd_512:
3014 ; CHECK: ## %bb.0:
3015 ; CHECK-NEXT: vshufpd $22, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xc6,0xc1,0x16]
3016 ; CHECK-NEXT: ## zmm0 = zmm0[0],zmm1[1],zmm0[3],zmm1[2],zmm0[5],zmm1[4],zmm0[6],zmm1[6]
3017 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3018 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.pd.512(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> %x3, i8 -1)
3019 ret <8 x double> %res
3020 }
3022 define <8 x double>@test_int_x86_avx512_mask_shuf_pd_512(<8 x double> %x0, <8 x double> %x1, <8 x double> %x3, i8 %x4) {
3023 ; X86-LABEL: test_int_x86_avx512_mask_shuf_pd_512:
3024 ; X86: ## %bb.0:
3025 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3026 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3027 ; X86-NEXT: vshufpd $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xc6,0xd1,0x16]
3028 ; X86-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[1],zmm0[3],zmm1[2],zmm0[5],zmm1[4],zmm0[6],zmm1[6]
3029 ; X86-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
3030 ; X86-NEXT: retl ## encoding: [0xc3]
3031 ;
3032 ; X64-LABEL: test_int_x86_avx512_mask_shuf_pd_512:
3033 ; X64: ## %bb.0:
3034 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3035 ; X64-NEXT: vshufpd $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xc6,0xd1,0x16]
3036 ; X64-NEXT: ## zmm2 {%k1} = zmm0[0],zmm1[1],zmm0[3],zmm1[2],zmm0[5],zmm1[4],zmm0[6],zmm1[6]
3037 ; X64-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
3038 ; X64-NEXT: retq ## encoding: [0xc3]
3039 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.pd.512(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> %x3, i8 %x4)
3040 ret <8 x double> %res
3041 }
3043 define <8 x double>@test_int_x86_avx512_maskz_shuf_pd_512(<8 x double> %x0, <8 x double> %x1, i8 %x4) {
3044 ; X86-LABEL: test_int_x86_avx512_maskz_shuf_pd_512:
3045 ; X86: ## %bb.0:
3046 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3047 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3048 ; X86-NEXT: vshufpd $22, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xc6,0xc1,0x16]
3049 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm0[0],zmm1[1],zmm0[3],zmm1[2],zmm0[5],zmm1[4],zmm0[6],zmm1[6]
3050 ; X86-NEXT: retl ## encoding: [0xc3]
3051 ;
3052 ; X64-LABEL: test_int_x86_avx512_maskz_shuf_pd_512:
3053 ; X64: ## %bb.0:
3054 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3055 ; X64-NEXT: vshufpd $22, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xc6,0xc1,0x16]
3056 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm0[0],zmm1[1],zmm0[3],zmm1[2],zmm0[5],zmm1[4],zmm0[6],zmm1[6]
3057 ; X64-NEXT: retq ## encoding: [0xc3]
3058 %res = call <8 x double> @llvm.x86.avx512.mask.shuf.pd.512(<8 x double> %x0, <8 x double> %x1, i32 22, <8 x double> zeroinitializer, i8 %x4)
3059 ret <8 x double> %res
3060 }
3062 declare <16 x float> @llvm.x86.avx512.mask.shuf.ps.512(<16 x float>, <16 x float>, i32, <16 x float>, i16)
3064 define <16 x float>@test_int_x86_avx512_shuf_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3) {
3065 ; CHECK-LABEL: test_int_x86_avx512_shuf_ps_512:
3066 ; CHECK: ## %bb.0:
3067 ; CHECK-NEXT: vshufps $22, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0xc6,0xc1,0x16]
3068 ; CHECK-NEXT: ## zmm0 = zmm0[2,1],zmm1[1,0],zmm0[6,5],zmm1[5,4],zmm0[10,9],zmm1[9,8],zmm0[14,13],zmm1[13,12]
3069 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3070 %res = call <16 x float> @llvm.x86.avx512.mask.shuf.ps.512(<16 x float> %x0, <16 x float> %x1, i32 22, <16 x float> %x3, i16 -1)
3071 ret <16 x float> %res
3072 }
3074 define <16 x float>@test_int_x86_avx512_mask_shuf_ps_512(<16 x float> %x0, <16 x float> %x1, <16 x float> %x3, i16 %x4) {
3075 ; X86-LABEL: test_int_x86_avx512_mask_shuf_ps_512:
3076 ; X86: ## %bb.0:
3077 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3078 ; X86-NEXT: vshufps $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0xc6,0xd1,0x16]
3079 ; X86-NEXT: ## zmm2 {%k1} = zmm0[2,1],zmm1[1,0],zmm0[6,5],zmm1[5,4],zmm0[10,9],zmm1[9,8],zmm0[14,13],zmm1[13,12]
3080 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
3081 ; X86-NEXT: retl ## encoding: [0xc3]
3082 ;
3083 ; X64-LABEL: test_int_x86_avx512_mask_shuf_ps_512:
3084 ; X64: ## %bb.0:
3085 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3086 ; X64-NEXT: vshufps $22, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0xc6,0xd1,0x16]
3087 ; X64-NEXT: ## zmm2 {%k1} = zmm0[2,1],zmm1[1,0],zmm0[6,5],zmm1[5,4],zmm0[10,9],zmm1[9,8],zmm0[14,13],zmm1[13,12]
3088 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
3089 ; X64-NEXT: retq ## encoding: [0xc3]
3090 %res = call <16 x float> @llvm.x86.avx512.mask.shuf.ps.512(<16 x float> %x0, <16 x float> %x1, i32 22, <16 x float> %x3, i16 %x4)
3091 ret <16 x float> %res
3092 }
3094 declare <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
3096 define <16 x i32>@test_int_x86_avx512_pmaxs_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
3097 ; CHECK-LABEL: test_int_x86_avx512_pmaxs_d_512:
3098 ; CHECK: ## %bb.0:
3099 ; CHECK-NEXT: vpmaxsd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x3d,0xc1]
3100 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3101 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
3102 ret <16 x i32> %res
3103 }
3105 define <16 x i32>@test_int_x86_avx512_mask_pmaxs_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
3106 ; X86-LABEL: test_int_x86_avx512_mask_pmaxs_d_512:
3107 ; X86: ## %bb.0:
3108 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3109 ; X86-NEXT: vpmaxsd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x3d,0xd1]
3110 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3111 ; X86-NEXT: retl ## encoding: [0xc3]
3112 ;
3113 ; X64-LABEL: test_int_x86_avx512_mask_pmaxs_d_512:
3114 ; X64: ## %bb.0:
3115 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3116 ; X64-NEXT: vpmaxsd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x3d,0xd1]
3117 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3118 ; X64-NEXT: retq ## encoding: [0xc3]
3119 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaxs.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
3120 ret <16 x i32> %res
3121 }
3123 declare <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
3125 define <8 x i64>@test_int_x86_avx512_pmaxs_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
3126 ; CHECK-LABEL: test_int_x86_avx512_pmaxs_q_512:
3127 ; CHECK: ## %bb.0:
3128 ; CHECK-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x3d,0xc1]
3129 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3130 %res = call <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
3131 ret <8 x i64> %res
3132 }
3134 define <8 x i64>@test_int_x86_avx512_mask_pmaxs_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
3135 ; X86-LABEL: test_int_x86_avx512_mask_pmaxs_q_512:
3136 ; X86: ## %bb.0:
3137 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3138 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3139 ; X86-NEXT: vpmaxsq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x3d,0xd1]
3140 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3141 ; X86-NEXT: retl ## encoding: [0xc3]
3142 ;
3143 ; X64-LABEL: test_int_x86_avx512_mask_pmaxs_q_512:
3144 ; X64: ## %bb.0:
3145 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3146 ; X64-NEXT: vpmaxsq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x3d,0xd1]
3147 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3148 ; X64-NEXT: retq ## encoding: [0xc3]
3149 %res = call <8 x i64> @llvm.x86.avx512.mask.pmaxs.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
3150 ret <8 x i64> %res
3151 }
3153 declare <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
3155 define <16 x i32>@test_int_x86_avx512_pmaxu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
3156 ; CHECK-LABEL: test_int_x86_avx512_pmaxu_d_512:
3157 ; CHECK: ## %bb.0:
3158 ; CHECK-NEXT: vpmaxud %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x3f,0xc1]
3159 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3160 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
3161 ret <16 x i32> %res
3162 }
3164 define <16 x i32>@test_int_x86_avx512_mask_pmaxu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
3165 ; X86-LABEL: test_int_x86_avx512_mask_pmaxu_d_512:
3166 ; X86: ## %bb.0:
3167 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3168 ; X86-NEXT: vpmaxud %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x3f,0xd1]
3169 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3170 ; X86-NEXT: retl ## encoding: [0xc3]
3171 ;
3172 ; X64-LABEL: test_int_x86_avx512_mask_pmaxu_d_512:
3173 ; X64: ## %bb.0:
3174 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3175 ; X64-NEXT: vpmaxud %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x3f,0xd1]
3176 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3177 ; X64-NEXT: retq ## encoding: [0xc3]
3178 %res = call <16 x i32> @llvm.x86.avx512.mask.pmaxu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
3179 ret <16 x i32> %res
3180 }
3182 declare <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
3184 define <8 x i64>@test_int_x86_avx512_pmaxu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
3185 ; CHECK-LABEL: test_int_x86_avx512_pmaxu_q_512:
3186 ; CHECK: ## %bb.0:
3187 ; CHECK-NEXT: vpmaxuq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x3f,0xc1]
3188 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3189 %res = call <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
3190 ret <8 x i64> %res
3191 }
3193 define <8 x i64>@test_int_x86_avx512_mask_pmaxu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
3194 ; X86-LABEL: test_int_x86_avx512_mask_pmaxu_q_512:
3195 ; X86: ## %bb.0:
3196 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3197 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3198 ; X86-NEXT: vpmaxuq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x3f,0xd1]
3199 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3200 ; X86-NEXT: retl ## encoding: [0xc3]
3201 ;
3202 ; X64-LABEL: test_int_x86_avx512_mask_pmaxu_q_512:
3203 ; X64: ## %bb.0:
3204 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3205 ; X64-NEXT: vpmaxuq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x3f,0xd1]
3206 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3207 ; X64-NEXT: retq ## encoding: [0xc3]
3208 %res = call <8 x i64> @llvm.x86.avx512.mask.pmaxu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
3209 ret <8 x i64> %res
3210 }
3212 declare <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
3214 define <16 x i32>@test_int_x86_avx512_pmins_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
3215 ; CHECK-LABEL: test_int_x86_avx512_pmins_d_512:
3216 ; CHECK: ## %bb.0:
3217 ; CHECK-NEXT: vpminsd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x39,0xc1]
3218 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3219 %res = call <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
3220 ret <16 x i32> %res
3221 }
3223 define <16 x i32>@test_int_x86_avx512_mask_pmins_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
3224 ; X86-LABEL: test_int_x86_avx512_mask_pmins_d_512:
3225 ; X86: ## %bb.0:
3226 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3227 ; X86-NEXT: vpminsd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x39,0xd1]
3228 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3229 ; X86-NEXT: retl ## encoding: [0xc3]
3230 ;
3231 ; X64-LABEL: test_int_x86_avx512_mask_pmins_d_512:
3232 ; X64: ## %bb.0:
3233 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3234 ; X64-NEXT: vpminsd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x39,0xd1]
3235 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3236 ; X64-NEXT: retq ## encoding: [0xc3]
3237 %res = call <16 x i32> @llvm.x86.avx512.mask.pmins.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
3238 ret <16 x i32> %res
3239 }
3241 declare <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
3243 define <8 x i64>@test_int_x86_avx512_pmins_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
3244 ; CHECK-LABEL: test_int_x86_avx512_pmins_q_512:
3245 ; CHECK: ## %bb.0:
3246 ; CHECK-NEXT: vpminsq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x39,0xc1]
3247 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3248 %res = call <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
3249 ret <8 x i64> %res
3250 }
3252 define <8 x i64>@test_int_x86_avx512_mask_pmins_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
3253 ; X86-LABEL: test_int_x86_avx512_mask_pmins_q_512:
3254 ; X86: ## %bb.0:
3255 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3256 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3257 ; X86-NEXT: vpminsq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x39,0xd1]
3258 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3259 ; X86-NEXT: retl ## encoding: [0xc3]
3260 ;
3261 ; X64-LABEL: test_int_x86_avx512_mask_pmins_q_512:
3262 ; X64: ## %bb.0:
3263 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3264 ; X64-NEXT: vpminsq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x39,0xd1]
3265 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3266 ; X64-NEXT: retq ## encoding: [0xc3]
3267 %res = call <8 x i64> @llvm.x86.avx512.mask.pmins.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
3268 ret <8 x i64> %res
3269 }
3271 declare <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
3273 define <16 x i32>@test_int_x86_avx512_pminu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
3274 ; CHECK-LABEL: test_int_x86_avx512_pminu_d_512:
3275 ; CHECK: ## %bb.0:
3276 ; CHECK-NEXT: vpminud %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x3b,0xc1]
3277 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3278 %res = call <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
3279 ret <16 x i32> %res
3280 }
3282 define <16 x i32>@test_int_x86_avx512_mask_pminu_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
3283 ; X86-LABEL: test_int_x86_avx512_mask_pminu_d_512:
3284 ; X86: ## %bb.0:
3285 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3286 ; X86-NEXT: vpminud %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x3b,0xd1]
3287 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3288 ; X86-NEXT: retl ## encoding: [0xc3]
3289 ;
3290 ; X64-LABEL: test_int_x86_avx512_mask_pminu_d_512:
3291 ; X64: ## %bb.0:
3292 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3293 ; X64-NEXT: vpminud %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x3b,0xd1]
3294 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3295 ; X64-NEXT: retq ## encoding: [0xc3]
3296 %res = call <16 x i32> @llvm.x86.avx512.mask.pminu.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
3297 ret <16 x i32> %res
3298 }
3300 declare <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
3302 define <8 x i64>@test_int_x86_avx512_pminu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
3303 ; CHECK-LABEL: test_int_x86_avx512_pminu_q_512:
3304 ; CHECK: ## %bb.0:
3305 ; CHECK-NEXT: vpminuq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x3b,0xc1]
3306 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3307 %res = call <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
3308 ret <8 x i64> %res
3309 }
3311 define <8 x i64>@test_int_x86_avx512_mask_pminu_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
3312 ; X86-LABEL: test_int_x86_avx512_mask_pminu_q_512:
3313 ; X86: ## %bb.0:
3314 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3315 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3316 ; X86-NEXT: vpminuq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x3b,0xd1]
3317 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3318 ; X86-NEXT: retl ## encoding: [0xc3]
3319 ;
3320 ; X64-LABEL: test_int_x86_avx512_mask_pminu_q_512:
3321 ; X64: ## %bb.0:
3322 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3323 ; X64-NEXT: vpminuq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x3b,0xd1]
3324 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3325 ; X64-NEXT: retq ## encoding: [0xc3]
3326 %res = call <8 x i64> @llvm.x86.avx512.mask.pminu.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
3327 ret <8 x i64> %res
3328 }
3330 define <4 x float> @test_mm_mask_move_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
3331 ; X86-LABEL: test_mm_mask_move_ss:
3332 ; X86: ## %bb.0: ## %entry
3333 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3334 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3335 ; X86-NEXT: vmovss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x76,0x09,0x10,0xc2]
3336 ; X86-NEXT: retl ## encoding: [0xc3]
3337 ;
3338 ; X64-LABEL: test_mm_mask_move_ss:
3339 ; X64: ## %bb.0: ## %entry
3340 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3341 ; X64-NEXT: vmovss %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x76,0x09,0x10,0xc2]
3342 ; X64-NEXT: retq ## encoding: [0xc3]
3343 entry:
3344 %res = call <4 x float> @llvm.x86.avx512.mask.move.ss(<4 x float> %__A, <4 x float> %__B, <4 x float> %__W, i8 %__U)
3345 ret <4 x float> %res
3346 }
3349 define <4 x float> @test_mm_maskz_move_ss(i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) {
3350 ; X86-LABEL: test_mm_maskz_move_ss:
3351 ; X86: ## %bb.0: ## %entry
3352 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3353 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3354 ; X86-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x10,0xc1]
3355 ; X86-NEXT: retl ## encoding: [0xc3]
3356 ;
3357 ; X64-LABEL: test_mm_maskz_move_ss:
3358 ; X64: ## %bb.0: ## %entry
3359 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3360 ; X64-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x10,0xc1]
3361 ; X64-NEXT: retq ## encoding: [0xc3]
3362 entry:
3363 %res = call <4 x float> @llvm.x86.avx512.mask.move.ss(<4 x float> %__A, <4 x float> %__B, <4 x float> zeroinitializer, i8 %__U)
3364 ret <4 x float> %res
3365 }
3367 define <2 x double> @test_mm_mask_move_sd(<2 x double> %__W, i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
3368 ; X86-LABEL: test_mm_mask_move_sd:
3369 ; X86: ## %bb.0: ## %entry
3370 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3371 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3372 ; X86-NEXT: vmovsd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf7,0x09,0x10,0xc2]
3373 ; X86-NEXT: retl ## encoding: [0xc3]
3374 ;
3375 ; X64-LABEL: test_mm_mask_move_sd:
3376 ; X64: ## %bb.0: ## %entry
3377 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3378 ; X64-NEXT: vmovsd %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xf7,0x09,0x10,0xc2]
3379 ; X64-NEXT: retq ## encoding: [0xc3]
3380 entry:
3381 %res = call <2 x double> @llvm.x86.avx512.mask.move.sd(<2 x double> %__A, <2 x double> %__B, <2 x double> %__W, i8 %__U)
3382 ret <2 x double> %res
3383 }
3385 define <2 x double> @test_mm_maskz_move_sd(i8 zeroext %__U, <2 x double> %__A, <2 x double> %__B) {
3386 ; X86-LABEL: test_mm_maskz_move_sd:
3387 ; X86: ## %bb.0: ## %entry
3388 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3389 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3390 ; X86-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x10,0xc1]
3391 ; X86-NEXT: retl ## encoding: [0xc3]
3392 ;
3393 ; X64-LABEL: test_mm_maskz_move_sd:
3394 ; X64: ## %bb.0: ## %entry
3395 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3396 ; X64-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x10,0xc1]
3397 ; X64-NEXT: retq ## encoding: [0xc3]
3398 entry:
3399 %res = call <2 x double> @llvm.x86.avx512.mask.move.sd(<2 x double> %__A, <2 x double> %__B, <2 x double> zeroinitializer, i8 %__U)
3400 ret <2 x double> %res
3401 }
3403 declare <4 x float> @llvm.x86.avx512.mask.move.ss(<4 x float>, <4 x float>, <4 x float>, i8)
3404 declare <2 x double> @llvm.x86.avx512.mask.move.sd(<2 x double>, <2 x double>, <2 x double>, i8)
3406 declare <16 x i32> @llvm.x86.avx512.mask.pmovzxb.d.512(<16 x i8>, <16 x i32>, i16)
3408 define <16 x i32>@test_int_x86_avx512_pmovzxb_d_512(<16 x i8> %x0, <16 x i32> %x1) {
3409 ; CHECK-LABEL: test_int_x86_avx512_pmovzxb_d_512:
3410 ; CHECK: ## %bb.0:
3411 ; CHECK-NEXT: vpmovzxbd %xmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x31,0xc0]
3412 ; CHECK-NEXT: ## zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
3413 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3414 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxb.d.512(<16 x i8> %x0, <16 x i32> %x1, i16 -1)
3415 ret <16 x i32> %res
3416 }
3418 define <16 x i32>@test_int_x86_avx512_mask_pmovzxb_d_512(<16 x i8> %x0, <16 x i32> %x1, i16 %x2) {
3419 ; X86-LABEL: test_int_x86_avx512_mask_pmovzxb_d_512:
3420 ; X86: ## %bb.0:
3421 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3422 ; X86-NEXT: vpmovzxbd %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x31,0xc8]
3423 ; X86-NEXT: ## zmm1 {%k1} = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
3424 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3425 ; X86-NEXT: retl ## encoding: [0xc3]
3426 ;
3427 ; X64-LABEL: test_int_x86_avx512_mask_pmovzxb_d_512:
3428 ; X64: ## %bb.0:
3429 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3430 ; X64-NEXT: vpmovzxbd %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x31,0xc8]
3431 ; X64-NEXT: ## zmm1 {%k1} = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
3432 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3433 ; X64-NEXT: retq ## encoding: [0xc3]
3434 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxb.d.512(<16 x i8> %x0, <16 x i32> %x1, i16 %x2)
3435 ret <16 x i32> %res
3436 }
3438 define <16 x i32>@test_int_x86_avx512_maskz_pmovzxb_d_512(<16 x i8> %x0, i16 %x2) {
3439 ; X86-LABEL: test_int_x86_avx512_maskz_pmovzxb_d_512:
3440 ; X86: ## %bb.0:
3441 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3442 ; X86-NEXT: vpmovzxbd %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x31,0xc0]
3443 ; X86-NEXT: ## zmm0 {%k1} {z} = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
3444 ; X86-NEXT: retl ## encoding: [0xc3]
3445 ;
3446 ; X64-LABEL: test_int_x86_avx512_maskz_pmovzxb_d_512:
3447 ; X64: ## %bb.0:
3448 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3449 ; X64-NEXT: vpmovzxbd %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x31,0xc0]
3450 ; X64-NEXT: ## zmm0 {%k1} {z} = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
3451 ; X64-NEXT: retq ## encoding: [0xc3]
3452 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxb.d.512(<16 x i8> %x0, <16 x i32> zeroinitializer, i16 %x2)
3453 ret <16 x i32> %res
3454 }
3456 declare <8 x i64> @llvm.x86.avx512.mask.pmovzxb.q.512(<16 x i8>, <8 x i64>, i8)
3458 define <8 x i64>@test_int_x86_avx512_pmovzxb_q_512(<16 x i8> %x0, <8 x i64> %x1) {
3459 ; CHECK-LABEL: test_int_x86_avx512_pmovzxb_q_512:
3460 ; CHECK: ## %bb.0:
3461 ; CHECK-NEXT: vpmovzxbq %xmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x32,0xc0]
3462 ; CHECK-NEXT: ## zmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero
3463 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3464 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxb.q.512(<16 x i8> %x0, <8 x i64> %x1, i8 -1)
3465 ret <8 x i64> %res
3466 }
3468 define <8 x i64>@test_int_x86_avx512_mask_pmovzxb_q_512(<16 x i8> %x0, <8 x i64> %x1, i8 %x2) {
3469 ; X86-LABEL: test_int_x86_avx512_mask_pmovzxb_q_512:
3470 ; X86: ## %bb.0:
3471 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3472 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3473 ; X86-NEXT: vpmovzxbq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x32,0xc8]
3474 ; X86-NEXT: ## zmm1 {%k1} = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero
3475 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3476 ; X86-NEXT: retl ## encoding: [0xc3]
3477 ;
3478 ; X64-LABEL: test_int_x86_avx512_mask_pmovzxb_q_512:
3479 ; X64: ## %bb.0:
3480 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3481 ; X64-NEXT: vpmovzxbq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x32,0xc8]
3482 ; X64-NEXT: ## zmm1 {%k1} = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero
3483 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3484 ; X64-NEXT: retq ## encoding: [0xc3]
3485 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxb.q.512(<16 x i8> %x0, <8 x i64> %x1, i8 %x2)
3486 ret <8 x i64> %res
3487 }
3489 define <8 x i64>@test_int_x86_avx512_maskz_pmovzxb_q_512(<16 x i8> %x0, i8 %x2) {
3490 ; X86-LABEL: test_int_x86_avx512_maskz_pmovzxb_q_512:
3491 ; X86: ## %bb.0:
3492 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3493 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3494 ; X86-NEXT: vpmovzxbq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x32,0xc0]
3495 ; X86-NEXT: ## zmm0 {%k1} {z} = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero
3496 ; X86-NEXT: retl ## encoding: [0xc3]
3497 ;
3498 ; X64-LABEL: test_int_x86_avx512_maskz_pmovzxb_q_512:
3499 ; X64: ## %bb.0:
3500 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3501 ; X64-NEXT: vpmovzxbq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x32,0xc0]
3502 ; X64-NEXT: ## zmm0 {%k1} {z} = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero
3503 ; X64-NEXT: retq ## encoding: [0xc3]
3504 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxb.q.512(<16 x i8> %x0, <8 x i64> zeroinitializer, i8 %x2)
3505 ret <8 x i64> %res
3506 }
3508 declare <8 x i64> @llvm.x86.avx512.mask.pmovzxd.q.512(<8 x i32>, <8 x i64>, i8)
3510 define <8 x i64>@test_int_x86_avx512_pmovzxd_q_512(<8 x i32> %x0, <8 x i64> %x1) {
3511 ; CHECK-LABEL: test_int_x86_avx512_pmovzxd_q_512:
3512 ; CHECK: ## %bb.0:
3513 ; CHECK-NEXT: vpmovzxdq %ymm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x35,0xc0]
3514 ; CHECK-NEXT: ## zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
3515 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3516 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxd.q.512(<8 x i32> %x0, <8 x i64> %x1, i8 -1)
3517 ret <8 x i64> %res
3518 }
3520 define <8 x i64>@test_int_x86_avx512_mask_pmovzxd_q_512(<8 x i32> %x0, <8 x i64> %x1, i8 %x2) {
3521 ; X86-LABEL: test_int_x86_avx512_mask_pmovzxd_q_512:
3522 ; X86: ## %bb.0:
3523 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3524 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3525 ; X86-NEXT: vpmovzxdq %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x35,0xc8]
3526 ; X86-NEXT: ## zmm1 {%k1} = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
3527 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3528 ; X86-NEXT: retl ## encoding: [0xc3]
3529 ;
3530 ; X64-LABEL: test_int_x86_avx512_mask_pmovzxd_q_512:
3531 ; X64: ## %bb.0:
3532 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3533 ; X64-NEXT: vpmovzxdq %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x35,0xc8]
3534 ; X64-NEXT: ## zmm1 {%k1} = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
3535 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3536 ; X64-NEXT: retq ## encoding: [0xc3]
3537 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxd.q.512(<8 x i32> %x0, <8 x i64> %x1, i8 %x2)
3538 ret <8 x i64> %res
3539 }
3541 define <8 x i64>@test_int_x86_avx512_maskz_pmovzxd_q_512(<8 x i32> %x0, i8 %x2) {
3542 ; X86-LABEL: test_int_x86_avx512_maskz_pmovzxd_q_512:
3543 ; X86: ## %bb.0:
3544 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3545 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3546 ; X86-NEXT: vpmovzxdq %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x35,0xc0]
3547 ; X86-NEXT: ## zmm0 {%k1} {z} = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
3548 ; X86-NEXT: retl ## encoding: [0xc3]
3549 ;
3550 ; X64-LABEL: test_int_x86_avx512_maskz_pmovzxd_q_512:
3551 ; X64: ## %bb.0:
3552 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3553 ; X64-NEXT: vpmovzxdq %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x35,0xc0]
3554 ; X64-NEXT: ## zmm0 {%k1} {z} = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
3555 ; X64-NEXT: retq ## encoding: [0xc3]
3556 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxd.q.512(<8 x i32> %x0, <8 x i64> zeroinitializer, i8 %x2)
3557 ret <8 x i64> %res
3558 }
3560 declare <16 x i32> @llvm.x86.avx512.mask.pmovzxw.d.512(<16 x i16>, <16 x i32>, i16)
3562 define <16 x i32>@test_int_x86_avx512_pmovzxw_d_512(<16 x i16> %x0, <16 x i32> %x1) {
3563 ; CHECK-LABEL: test_int_x86_avx512_pmovzxw_d_512:
3564 ; CHECK: ## %bb.0:
3565 ; CHECK-NEXT: vpmovzxwd %ymm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x33,0xc0]
3566 ; CHECK-NEXT: ## zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
3567 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3568 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxw.d.512(<16 x i16> %x0, <16 x i32> %x1, i16 -1)
3569 ret <16 x i32> %res
3570 }
3572 define <16 x i32>@test_int_x86_avx512_mask_pmovzxw_d_512(<16 x i16> %x0, <16 x i32> %x1, i16 %x2) {
3573 ; X86-LABEL: test_int_x86_avx512_mask_pmovzxw_d_512:
3574 ; X86: ## %bb.0:
3575 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3576 ; X86-NEXT: vpmovzxwd %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x33,0xc8]
3577 ; X86-NEXT: ## zmm1 {%k1} = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
3578 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3579 ; X86-NEXT: retl ## encoding: [0xc3]
3580 ;
3581 ; X64-LABEL: test_int_x86_avx512_mask_pmovzxw_d_512:
3582 ; X64: ## %bb.0:
3583 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3584 ; X64-NEXT: vpmovzxwd %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x33,0xc8]
3585 ; X64-NEXT: ## zmm1 {%k1} = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
3586 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3587 ; X64-NEXT: retq ## encoding: [0xc3]
3588 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxw.d.512(<16 x i16> %x0, <16 x i32> %x1, i16 %x2)
3589 ret <16 x i32> %res
3590 }
3592 define <16 x i32>@test_int_x86_avx512_maskz_pmovzxw_d_512(<16 x i16> %x0, i16 %x2) {
3593 ; X86-LABEL: test_int_x86_avx512_maskz_pmovzxw_d_512:
3594 ; X86: ## %bb.0:
3595 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3596 ; X86-NEXT: vpmovzxwd %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x33,0xc0]
3597 ; X86-NEXT: ## zmm0 {%k1} {z} = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
3598 ; X86-NEXT: retl ## encoding: [0xc3]
3599 ;
3600 ; X64-LABEL: test_int_x86_avx512_maskz_pmovzxw_d_512:
3601 ; X64: ## %bb.0:
3602 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3603 ; X64-NEXT: vpmovzxwd %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x33,0xc0]
3604 ; X64-NEXT: ## zmm0 {%k1} {z} = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
3605 ; X64-NEXT: retq ## encoding: [0xc3]
3606 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovzxw.d.512(<16 x i16> %x0, <16 x i32> zeroinitializer, i16 %x2)
3607 ret <16 x i32> %res
3608 }
3610 declare <8 x i64> @llvm.x86.avx512.mask.pmovzxw.q.512(<8 x i16>, <8 x i64>, i8)
3612 define <8 x i64>@test_int_x86_avx512_pmovzxw_q_512(<8 x i16> %x0, <8 x i64> %x1) {
3613 ; CHECK-LABEL: test_int_x86_avx512_pmovzxw_q_512:
3614 ; CHECK: ## %bb.0:
3615 ; CHECK-NEXT: vpmovzxwq %xmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x34,0xc0]
3616 ; CHECK-NEXT: ## zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
3617 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3618 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxw.q.512(<8 x i16> %x0, <8 x i64> %x1, i8 -1)
3619 ret <8 x i64> %res
3620 }
3622 define <8 x i64>@test_int_x86_avx512_mask_pmovzxw_q_512(<8 x i16> %x0, <8 x i64> %x1, i8 %x2) {
3623 ; X86-LABEL: test_int_x86_avx512_mask_pmovzxw_q_512:
3624 ; X86: ## %bb.0:
3625 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3626 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3627 ; X86-NEXT: vpmovzxwq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x34,0xc8]
3628 ; X86-NEXT: ## zmm1 {%k1} = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
3629 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3630 ; X86-NEXT: retl ## encoding: [0xc3]
3631 ;
3632 ; X64-LABEL: test_int_x86_avx512_mask_pmovzxw_q_512:
3633 ; X64: ## %bb.0:
3634 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3635 ; X64-NEXT: vpmovzxwq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x34,0xc8]
3636 ; X64-NEXT: ## zmm1 {%k1} = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
3637 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3638 ; X64-NEXT: retq ## encoding: [0xc3]
3639 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxw.q.512(<8 x i16> %x0, <8 x i64> %x1, i8 %x2)
3640 ret <8 x i64> %res
3641 }
3643 define <8 x i64>@test_int_x86_avx512_maskz_pmovzxw_q_512(<8 x i16> %x0, i8 %x2) {
3644 ; X86-LABEL: test_int_x86_avx512_maskz_pmovzxw_q_512:
3645 ; X86: ## %bb.0:
3646 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3647 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3648 ; X86-NEXT: vpmovzxwq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x34,0xc0]
3649 ; X86-NEXT: ## zmm0 {%k1} {z} = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
3650 ; X86-NEXT: retl ## encoding: [0xc3]
3651 ;
3652 ; X64-LABEL: test_int_x86_avx512_maskz_pmovzxw_q_512:
3653 ; X64: ## %bb.0:
3654 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3655 ; X64-NEXT: vpmovzxwq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x34,0xc0]
3656 ; X64-NEXT: ## zmm0 {%k1} {z} = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
3657 ; X64-NEXT: retq ## encoding: [0xc3]
3658 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovzxw.q.512(<8 x i16> %x0, <8 x i64> zeroinitializer, i8 %x2)
3659 ret <8 x i64> %res
3660 }
3662 declare <16 x i32> @llvm.x86.avx512.mask.pmovsxb.d.512(<16 x i8>, <16 x i32>, i16)
3664 define <16 x i32>@test_int_x86_avx512_pmovsxb_d_512(<16 x i8> %x0, <16 x i32> %x1) {
3665 ; CHECK-LABEL: test_int_x86_avx512_pmovsxb_d_512:
3666 ; CHECK: ## %bb.0:
3667 ; CHECK-NEXT: vpmovsxbd %xmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x21,0xc0]
3668 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3669 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxb.d.512(<16 x i8> %x0, <16 x i32> %x1, i16 -1)
3670 ret <16 x i32> %res
3671 }
3673 define <16 x i32>@test_int_x86_avx512_mask_pmovsxb_d_512(<16 x i8> %x0, <16 x i32> %x1, i16 %x2) {
3674 ; X86-LABEL: test_int_x86_avx512_mask_pmovsxb_d_512:
3675 ; X86: ## %bb.0:
3676 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3677 ; X86-NEXT: vpmovsxbd %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x21,0xc8]
3678 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3679 ; X86-NEXT: retl ## encoding: [0xc3]
3680 ;
3681 ; X64-LABEL: test_int_x86_avx512_mask_pmovsxb_d_512:
3682 ; X64: ## %bb.0:
3683 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3684 ; X64-NEXT: vpmovsxbd %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x21,0xc8]
3685 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3686 ; X64-NEXT: retq ## encoding: [0xc3]
3687 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxb.d.512(<16 x i8> %x0, <16 x i32> %x1, i16 %x2)
3688 ret <16 x i32> %res
3689 }
3691 define <16 x i32>@test_int_x86_avx512_maskz_pmovsxb_d_512(<16 x i8> %x0, i16 %x2) {
3692 ; X86-LABEL: test_int_x86_avx512_maskz_pmovsxb_d_512:
3693 ; X86: ## %bb.0:
3694 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3695 ; X86-NEXT: vpmovsxbd %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x21,0xc0]
3696 ; X86-NEXT: retl ## encoding: [0xc3]
3697 ;
3698 ; X64-LABEL: test_int_x86_avx512_maskz_pmovsxb_d_512:
3699 ; X64: ## %bb.0:
3700 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3701 ; X64-NEXT: vpmovsxbd %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x21,0xc0]
3702 ; X64-NEXT: retq ## encoding: [0xc3]
3703 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxb.d.512(<16 x i8> %x0, <16 x i32> zeroinitializer, i16 %x2)
3704 ret <16 x i32> %res
3705 }
3707 declare <8 x i64> @llvm.x86.avx512.mask.pmovsxb.q.512(<16 x i8>, <8 x i64>, i8)
3709 define <8 x i64>@test_int_x86_avx512_pmovsxb_q_512(<16 x i8> %x0, <8 x i64> %x1) {
3710 ; CHECK-LABEL: test_int_x86_avx512_pmovsxb_q_512:
3711 ; CHECK: ## %bb.0:
3712 ; CHECK-NEXT: vpmovsxbq %xmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x22,0xc0]
3713 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3714 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxb.q.512(<16 x i8> %x0, <8 x i64> %x1, i8 -1)
3715 ret <8 x i64> %res
3716 }
3718 define <8 x i64>@test_int_x86_avx512_mask_pmovsxb_q_512(<16 x i8> %x0, <8 x i64> %x1, i8 %x2) {
3719 ; X86-LABEL: test_int_x86_avx512_mask_pmovsxb_q_512:
3720 ; X86: ## %bb.0:
3721 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3722 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3723 ; X86-NEXT: vpmovsxbq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x22,0xc8]
3724 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3725 ; X86-NEXT: retl ## encoding: [0xc3]
3726 ;
3727 ; X64-LABEL: test_int_x86_avx512_mask_pmovsxb_q_512:
3728 ; X64: ## %bb.0:
3729 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3730 ; X64-NEXT: vpmovsxbq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x22,0xc8]
3731 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3732 ; X64-NEXT: retq ## encoding: [0xc3]
3733 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxb.q.512(<16 x i8> %x0, <8 x i64> %x1, i8 %x2)
3734 ret <8 x i64> %res
3735 }
3737 define <8 x i64>@test_int_x86_avx512_maskz_pmovsxb_q_512(<16 x i8> %x0, i8 %x2) {
3738 ; X86-LABEL: test_int_x86_avx512_maskz_pmovsxb_q_512:
3739 ; X86: ## %bb.0:
3740 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3741 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3742 ; X86-NEXT: vpmovsxbq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x22,0xc0]
3743 ; X86-NEXT: retl ## encoding: [0xc3]
3744 ;
3745 ; X64-LABEL: test_int_x86_avx512_maskz_pmovsxb_q_512:
3746 ; X64: ## %bb.0:
3747 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3748 ; X64-NEXT: vpmovsxbq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x22,0xc0]
3749 ; X64-NEXT: retq ## encoding: [0xc3]
3750 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxb.q.512(<16 x i8> %x0, <8 x i64> zeroinitializer, i8 %x2)
3751 ret <8 x i64> %res
3752 }
3754 declare <8 x i64> @llvm.x86.avx512.mask.pmovsxd.q.512(<8 x i32>, <8 x i64>, i8)
3756 define <8 x i64>@test_int_x86_avx512_pmovsxd_q_512(<8 x i32> %x0, <8 x i64> %x1) {
3757 ; CHECK-LABEL: test_int_x86_avx512_pmovsxd_q_512:
3758 ; CHECK: ## %bb.0:
3759 ; CHECK-NEXT: vpmovsxdq %ymm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x25,0xc0]
3760 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3761 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxd.q.512(<8 x i32> %x0, <8 x i64> %x1, i8 -1)
3762 ret <8 x i64> %res
3763 }
3765 define <8 x i64>@test_int_x86_avx512_mask_pmovsxd_q_512(<8 x i32> %x0, <8 x i64> %x1, i8 %x2) {
3766 ; X86-LABEL: test_int_x86_avx512_mask_pmovsxd_q_512:
3767 ; X86: ## %bb.0:
3768 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3769 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3770 ; X86-NEXT: vpmovsxdq %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x25,0xc8]
3771 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3772 ; X86-NEXT: retl ## encoding: [0xc3]
3773 ;
3774 ; X64-LABEL: test_int_x86_avx512_mask_pmovsxd_q_512:
3775 ; X64: ## %bb.0:
3776 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3777 ; X64-NEXT: vpmovsxdq %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x25,0xc8]
3778 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3779 ; X64-NEXT: retq ## encoding: [0xc3]
3780 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxd.q.512(<8 x i32> %x0, <8 x i64> %x1, i8 %x2)
3781 ret <8 x i64> %res
3782 }
3784 define <8 x i64>@test_int_x86_avx512_maskz_pmovsxd_q_512(<8 x i32> %x0, i8 %x2) {
3785 ; X86-LABEL: test_int_x86_avx512_maskz_pmovsxd_q_512:
3786 ; X86: ## %bb.0:
3787 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3788 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3789 ; X86-NEXT: vpmovsxdq %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x25,0xc0]
3790 ; X86-NEXT: retl ## encoding: [0xc3]
3791 ;
3792 ; X64-LABEL: test_int_x86_avx512_maskz_pmovsxd_q_512:
3793 ; X64: ## %bb.0:
3794 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3795 ; X64-NEXT: vpmovsxdq %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x25,0xc0]
3796 ; X64-NEXT: retq ## encoding: [0xc3]
3797 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxd.q.512(<8 x i32> %x0, <8 x i64> zeroinitializer, i8 %x2)
3798 ret <8 x i64> %res
3799 }
3801 declare <16 x i32> @llvm.x86.avx512.mask.pmovsxw.d.512(<16 x i16>, <16 x i32>, i16)
3803 define <16 x i32>@test_int_x86_avx512_pmovsxw_d_512(<16 x i16> %x0, <16 x i32> %x1) {
3804 ; CHECK-LABEL: test_int_x86_avx512_pmovsxw_d_512:
3805 ; CHECK: ## %bb.0:
3806 ; CHECK-NEXT: vpmovsxwd %ymm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x23,0xc0]
3807 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3808 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxw.d.512(<16 x i16> %x0, <16 x i32> %x1, i16 -1)
3809 ret <16 x i32> %res
3810 }
3812 define <16 x i32>@test_int_x86_avx512_mask_pmovsxw_d_512(<16 x i16> %x0, <16 x i32> %x1, i16 %x2) {
3813 ; X86-LABEL: test_int_x86_avx512_mask_pmovsxw_d_512:
3814 ; X86: ## %bb.0:
3815 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3816 ; X86-NEXT: vpmovsxwd %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x23,0xc8]
3817 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3818 ; X86-NEXT: retl ## encoding: [0xc3]
3819 ;
3820 ; X64-LABEL: test_int_x86_avx512_mask_pmovsxw_d_512:
3821 ; X64: ## %bb.0:
3822 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3823 ; X64-NEXT: vpmovsxwd %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x23,0xc8]
3824 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3825 ; X64-NEXT: retq ## encoding: [0xc3]
3826 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxw.d.512(<16 x i16> %x0, <16 x i32> %x1, i16 %x2)
3827 ret <16 x i32> %res
3828 }
3830 define <16 x i32>@test_int_x86_avx512_maskz_pmovsxw_d_512(<16 x i16> %x0, i16 %x2) {
3831 ; X86-LABEL: test_int_x86_avx512_maskz_pmovsxw_d_512:
3832 ; X86: ## %bb.0:
3833 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3834 ; X86-NEXT: vpmovsxwd %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x23,0xc0]
3835 ; X86-NEXT: retl ## encoding: [0xc3]
3836 ;
3837 ; X64-LABEL: test_int_x86_avx512_maskz_pmovsxw_d_512:
3838 ; X64: ## %bb.0:
3839 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3840 ; X64-NEXT: vpmovsxwd %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x23,0xc0]
3841 ; X64-NEXT: retq ## encoding: [0xc3]
3842 %res = call <16 x i32> @llvm.x86.avx512.mask.pmovsxw.d.512(<16 x i16> %x0, <16 x i32> zeroinitializer, i16 %x2)
3843 ret <16 x i32> %res
3844 }
3846 declare <8 x i64> @llvm.x86.avx512.mask.pmovsxw.q.512(<8 x i16>, <8 x i64>, i8)
3848 define <8 x i64>@test_int_x86_avx512_pmovsxw_q_512(<8 x i16> %x0, <8 x i64> %x1) {
3849 ; CHECK-LABEL: test_int_x86_avx512_pmovsxw_q_512:
3850 ; CHECK: ## %bb.0:
3851 ; CHECK-NEXT: vpmovsxwq %xmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x24,0xc0]
3852 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3853 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxw.q.512(<8 x i16> %x0, <8 x i64> %x1, i8 -1)
3854 ret <8 x i64> %res
3855 }
3857 define <8 x i64>@test_int_x86_avx512_mask_pmovsxw_q_512(<8 x i16> %x0, <8 x i64> %x1, i8 %x2) {
3858 ; X86-LABEL: test_int_x86_avx512_mask_pmovsxw_q_512:
3859 ; X86: ## %bb.0:
3860 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3861 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3862 ; X86-NEXT: vpmovsxwq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x24,0xc8]
3863 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3864 ; X86-NEXT: retl ## encoding: [0xc3]
3865 ;
3866 ; X64-LABEL: test_int_x86_avx512_mask_pmovsxw_q_512:
3867 ; X64: ## %bb.0:
3868 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3869 ; X64-NEXT: vpmovsxwq %xmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x24,0xc8]
3870 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
3871 ; X64-NEXT: retq ## encoding: [0xc3]
3872 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxw.q.512(<8 x i16> %x0, <8 x i64> %x1, i8 %x2)
3873 ret <8 x i64> %res
3874 }
3876 define <8 x i64>@test_int_x86_avx512_maskz_pmovsxw_q_512(<8 x i16> %x0, i8 %x2) {
3877 ; X86-LABEL: test_int_x86_avx512_maskz_pmovsxw_q_512:
3878 ; X86: ## %bb.0:
3879 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3880 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3881 ; X86-NEXT: vpmovsxwq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x24,0xc0]
3882 ; X86-NEXT: retl ## encoding: [0xc3]
3883 ;
3884 ; X64-LABEL: test_int_x86_avx512_maskz_pmovsxw_q_512:
3885 ; X64: ## %bb.0:
3886 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3887 ; X64-NEXT: vpmovsxwq %xmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x24,0xc0]
3888 ; X64-NEXT: retq ## encoding: [0xc3]
3889 %res = call <8 x i64> @llvm.x86.avx512.mask.pmovsxw.q.512(<8 x i16> %x0, <8 x i64> zeroinitializer, i8 %x2)
3890 ret <8 x i64> %res
3891 }
3893 declare <16 x i32> @llvm.x86.avx512.prolv.d.512(<16 x i32>, <16 x i32>)
3895 define <16 x i32>@test_int_x86_avx512_prolv_d_512(<16 x i32> %x0, <16 x i32> %x1) {
3896 ; CHECK-LABEL: test_int_x86_avx512_prolv_d_512:
3897 ; CHECK: ## %bb.0:
3898 ; CHECK-NEXT: vprolvd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x15,0xc1]
3899 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3900 %1 = call <16 x i32> @llvm.x86.avx512.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1)
3901 ret <16 x i32> %1
3902 }
3904 define <16 x i32>@test_int_x86_avx512_mask_prolv_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
3905 ; X86-LABEL: test_int_x86_avx512_mask_prolv_d_512:
3906 ; X86: ## %bb.0:
3907 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3908 ; X86-NEXT: vprolvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x15,0xd1]
3909 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3910 ; X86-NEXT: retl ## encoding: [0xc3]
3911 ;
3912 ; X64-LABEL: test_int_x86_avx512_mask_prolv_d_512:
3913 ; X64: ## %bb.0:
3914 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3915 ; X64-NEXT: vprolvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x15,0xd1]
3916 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3917 ; X64-NEXT: retq ## encoding: [0xc3]
3918 %1 = call <16 x i32> @llvm.x86.avx512.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1)
3919 %2 = bitcast i16 %x3 to <16 x i1>
3920 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2
3921 ret <16 x i32> %3
3922 }
3924 define <16 x i32>@test_int_x86_avx512_maskz_prolv_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) {
3925 ; X86-LABEL: test_int_x86_avx512_maskz_prolv_d_512:
3926 ; X86: ## %bb.0:
3927 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
3928 ; X86-NEXT: vprolvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x15,0xc1]
3929 ; X86-NEXT: retl ## encoding: [0xc3]
3930 ;
3931 ; X64-LABEL: test_int_x86_avx512_maskz_prolv_d_512:
3932 ; X64: ## %bb.0:
3933 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3934 ; X64-NEXT: vprolvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x15,0xc1]
3935 ; X64-NEXT: retq ## encoding: [0xc3]
3936 %1 = call <16 x i32> @llvm.x86.avx512.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1)
3937 %2 = bitcast i16 %x3 to <16 x i1>
3938 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer
3939 ret <16 x i32> %3
3940 }
3942 declare <8 x i64> @llvm.x86.avx512.prolv.q.512(<8 x i64>, <8 x i64>)
3944 define <8 x i64>@test_int_x86_avx512_prolv_q_512(<8 x i64> %x0, <8 x i64> %x1) {
3945 ; CHECK-LABEL: test_int_x86_avx512_prolv_q_512:
3946 ; CHECK: ## %bb.0:
3947 ; CHECK-NEXT: vprolvq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x15,0xc1]
3948 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
3949 %1 = call <8 x i64> @llvm.x86.avx512.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1)
3950 ret <8 x i64> %1
3951 }
3953 define <8 x i64>@test_int_x86_avx512_mask_prolv_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
3954 ; X86-LABEL: test_int_x86_avx512_mask_prolv_q_512:
3955 ; X86: ## %bb.0:
3956 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3957 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3958 ; X86-NEXT: vprolvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x15,0xd1]
3959 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3960 ; X86-NEXT: retl ## encoding: [0xc3]
3961 ;
3962 ; X64-LABEL: test_int_x86_avx512_mask_prolv_q_512:
3963 ; X64: ## %bb.0:
3964 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3965 ; X64-NEXT: vprolvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x15,0xd1]
3966 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
3967 ; X64-NEXT: retq ## encoding: [0xc3]
3968 %1 = call <8 x i64> @llvm.x86.avx512.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1)
3969 %2 = bitcast i8 %x3 to <8 x i1>
3970 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x2
3971 ret <8 x i64> %3
3972 }
3974 define <8 x i64>@test_int_x86_avx512_maskz_prolv_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) {
3975 ; X86-LABEL: test_int_x86_avx512_maskz_prolv_q_512:
3976 ; X86: ## %bb.0:
3977 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
3978 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
3979 ; X86-NEXT: vprolvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x15,0xc1]
3980 ; X86-NEXT: retl ## encoding: [0xc3]
3981 ;
3982 ; X64-LABEL: test_int_x86_avx512_maskz_prolv_q_512:
3983 ; X64: ## %bb.0:
3984 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
3985 ; X64-NEXT: vprolvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x15,0xc1]
3986 ; X64-NEXT: retq ## encoding: [0xc3]
3987 %1 = call <8 x i64> @llvm.x86.avx512.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1)
3988 %2 = bitcast i8 %x3 to <8 x i1>
3989 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> zeroinitializer
3990 ret <8 x i64> %3
3991 }
3993 declare <16 x i32> @llvm.x86.avx512.prorv.d.512(<16 x i32>, <16 x i32>)
3995 define <16 x i32>@test_int_x86_avx512_prorv_d_512(<16 x i32> %x0, <16 x i32> %x1) {
3996 ; CHECK-LABEL: test_int_x86_avx512_prorv_d_512:
3997 ; CHECK: ## %bb.0:
3998 ; CHECK-NEXT: vprorvd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x14,0xc1]
3999 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4000 %1 = call <16 x i32> @llvm.x86.avx512.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1)
4001 ret <16 x i32> %1
4002 }
4004 define <16 x i32>@test_int_x86_avx512_mask_prorv_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
4005 ; X86-LABEL: test_int_x86_avx512_mask_prorv_d_512:
4006 ; X86: ## %bb.0:
4007 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4008 ; X86-NEXT: vprorvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x14,0xd1]
4009 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4010 ; X86-NEXT: retl ## encoding: [0xc3]
4011 ;
4012 ; X64-LABEL: test_int_x86_avx512_mask_prorv_d_512:
4013 ; X64: ## %bb.0:
4014 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4015 ; X64-NEXT: vprorvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x14,0xd1]
4016 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4017 ; X64-NEXT: retq ## encoding: [0xc3]
4018 %1 = call <16 x i32> @llvm.x86.avx512.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1)
4019 %2 = bitcast i16 %x3 to <16 x i1>
4020 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2
4021 ret <16 x i32> %3
4022 }
4024 define <16 x i32>@test_int_x86_avx512_maskz_prorv_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) {
4025 ; X86-LABEL: test_int_x86_avx512_maskz_prorv_d_512:
4026 ; X86: ## %bb.0:
4027 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4028 ; X86-NEXT: vprorvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x14,0xc1]
4029 ; X86-NEXT: retl ## encoding: [0xc3]
4030 ;
4031 ; X64-LABEL: test_int_x86_avx512_maskz_prorv_d_512:
4032 ; X64: ## %bb.0:
4033 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4034 ; X64-NEXT: vprorvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x14,0xc1]
4035 ; X64-NEXT: retq ## encoding: [0xc3]
4036 %1 = call <16 x i32> @llvm.x86.avx512.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1)
4037 %2 = bitcast i16 %x3 to <16 x i1>
4038 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> zeroinitializer
4039 ret <16 x i32> %3
4040 }
4042 declare <8 x i64> @llvm.x86.avx512.prorv.q.512(<8 x i64>, <8 x i64>)
4044 define <8 x i64>@test_int_x86_avx512_prorv_q_512(<8 x i64> %x0, <8 x i64> %x1) {
4045 ; CHECK-LABEL: test_int_x86_avx512_prorv_q_512:
4046 ; CHECK: ## %bb.0:
4047 ; CHECK-NEXT: vprorvq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x14,0xc1]
4048 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4049 %1 = call <8 x i64> @llvm.x86.avx512.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1)
4050 ret <8 x i64> %1
4051 }
4053 define <8 x i64>@test_int_x86_avx512_mask_prorv_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
4054 ; X86-LABEL: test_int_x86_avx512_mask_prorv_q_512:
4055 ; X86: ## %bb.0:
4056 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4057 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4058 ; X86-NEXT: vprorvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x14,0xd1]
4059 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4060 ; X86-NEXT: retl ## encoding: [0xc3]
4061 ;
4062 ; X64-LABEL: test_int_x86_avx512_mask_prorv_q_512:
4063 ; X64: ## %bb.0:
4064 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4065 ; X64-NEXT: vprorvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x14,0xd1]
4066 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4067 ; X64-NEXT: retq ## encoding: [0xc3]
4068 %1 = call <8 x i64> @llvm.x86.avx512.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1)
4069 %2 = bitcast i8 %x3 to <8 x i1>
4070 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x2
4071 ret <8 x i64> %3
4072 }
4074 define <8 x i64>@test_int_x86_avx512_maskz_prorv_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) {
4075 ; X86-LABEL: test_int_x86_avx512_maskz_prorv_q_512:
4076 ; X86: ## %bb.0:
4077 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4078 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4079 ; X86-NEXT: vprorvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x14,0xc1]
4080 ; X86-NEXT: retl ## encoding: [0xc3]
4081 ;
4082 ; X64-LABEL: test_int_x86_avx512_maskz_prorv_q_512:
4083 ; X64: ## %bb.0:
4084 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4085 ; X64-NEXT: vprorvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x14,0xc1]
4086 ; X64-NEXT: retq ## encoding: [0xc3]
4087 %1 = call <8 x i64> @llvm.x86.avx512.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1)
4088 %2 = bitcast i8 %x3 to <8 x i1>
4089 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> zeroinitializer
4090 ret <8 x i64> %3
4091 }
4093 declare <16 x i32> @llvm.x86.avx512.prol.d.512(<16 x i32>, i32)
4095 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_prol_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) {
4096 ; X86-LABEL: test_int_x86_avx512_prol_d_512:
4097 ; X86: ## %bb.0:
4098 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4099 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
4100 ; X86-NEXT: vprold $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xc8,0x03]
4101 ; X86-NEXT: vprold $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xc8,0x04]
4102 ; X86-NEXT: vprold $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xc8,0x05]
4103 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4104 ; X86-NEXT: retl ## encoding: [0xc3]
4105 ;
4106 ; X64-LABEL: test_int_x86_avx512_prol_d_512:
4107 ; X64: ## %bb.0:
4108 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4109 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4110 ; X64-NEXT: vprold $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xc8,0x03]
4111 ; X64-NEXT: vprold $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xc8,0x04]
4112 ; X64-NEXT: vprold $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xc8,0x05]
4113 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4114 ; X64-NEXT: retq ## encoding: [0xc3]
4115 %1 = call <16 x i32> @llvm.x86.avx512.prol.d.512(<16 x i32> %x0, i32 3)
4116 %2 = bitcast i16 %x3 to <16 x i1>
4117 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2
4118 %4 = call <16 x i32> @llvm.x86.avx512.prol.d.512(<16 x i32> %x0, i32 4)
4119 %5 = bitcast i16 %x3 to <16 x i1>
4120 %6 = select <16 x i1> %5, <16 x i32> %4, <16 x i32> zeroinitializer
4121 %7 = call <16 x i32> @llvm.x86.avx512.prol.d.512(<16 x i32> %x0, i32 5)
4122 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %3, 0
4123 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %6, 1
4124 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %7, 2
4125 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
4126 }
4128 declare <8 x i64> @llvm.x86.avx512.prol.q.512(<8 x i64>, i32)
4130 define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_prol_q_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) {
4131 ; X86-LABEL: test_int_x86_avx512_prol_q_512:
4132 ; X86: ## %bb.0:
4133 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4134 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
4135 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4136 ; X86-NEXT: vprolq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xc8,0x03]
4137 ; X86-NEXT: vprolq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xc8,0x04]
4138 ; X86-NEXT: vprolq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xc8,0x05]
4139 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4140 ; X86-NEXT: retl ## encoding: [0xc3]
4141 ;
4142 ; X64-LABEL: test_int_x86_avx512_prol_q_512:
4143 ; X64: ## %bb.0:
4144 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4145 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4146 ; X64-NEXT: vprolq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xc8,0x03]
4147 ; X64-NEXT: vprolq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xc8,0x04]
4148 ; X64-NEXT: vprolq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xc8,0x05]
4149 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4150 ; X64-NEXT: retq ## encoding: [0xc3]
4151 %1 = call <8 x i64> @llvm.x86.avx512.prol.q.512(<8 x i64> %x0, i32 3)
4152 %2 = bitcast i8 %x3 to <8 x i1>
4153 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x2
4154 %4 = call <8 x i64> @llvm.x86.avx512.prol.q.512(<8 x i64> %x0, i32 4)
4155 %5 = bitcast i8 %x3 to <8 x i1>
4156 %6 = select <8 x i1> %5, <8 x i64> %4, <8 x i64> zeroinitializer
4157 %7 = call <8 x i64> @llvm.x86.avx512.prol.q.512(<8 x i64> %x0, i32 5)
4158 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %3, 0
4159 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %6, 1
4160 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %7, 2
4161 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5
4162 }
4164 declare <16 x i32> @llvm.x86.avx512.pror.d.512(<16 x i32>, i32)
4166 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_pror_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) {
4167 ; X86-LABEL: test_int_x86_avx512_pror_d_512:
4168 ; X86: ## %bb.0:
4169 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4170 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
4171 ; X86-NEXT: vprord $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xc0,0x03]
4172 ; X86-NEXT: vprord $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xc0,0x04]
4173 ; X86-NEXT: vprord $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xc0,0x05]
4174 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4175 ; X86-NEXT: retl ## encoding: [0xc3]
4176 ;
4177 ; X64-LABEL: test_int_x86_avx512_pror_d_512:
4178 ; X64: ## %bb.0:
4179 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4180 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4181 ; X64-NEXT: vprord $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xc0,0x03]
4182 ; X64-NEXT: vprord $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xc0,0x04]
4183 ; X64-NEXT: vprord $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xc0,0x05]
4184 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4185 ; X64-NEXT: retq ## encoding: [0xc3]
4186 %1 = call <16 x i32> @llvm.x86.avx512.pror.d.512(<16 x i32> %x0, i32 3)
4187 %2 = bitcast i16 %x3 to <16 x i1>
4188 %3 = select <16 x i1> %2, <16 x i32> %1, <16 x i32> %x2
4189 %4 = call <16 x i32> @llvm.x86.avx512.pror.d.512(<16 x i32> %x0, i32 4)
4190 %5 = bitcast i16 %x3 to <16 x i1>
4191 %6 = select <16 x i1> %5, <16 x i32> %4, <16 x i32> zeroinitializer
4192 %7 = call <16 x i32> @llvm.x86.avx512.pror.d.512(<16 x i32> %x0, i32 5)
4193 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %3, 0
4194 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %6, 1
4195 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %7, 2
4196 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
4197 }
4199 declare <8 x i64> @llvm.x86.avx512.pror.q.512(<8 x i64>, i32)
4201 define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_pror_q_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) {
4202 ; X86-LABEL: test_int_x86_avx512_pror_q_512:
4203 ; X86: ## %bb.0:
4204 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4205 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
4206 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4207 ; X86-NEXT: vprorq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xc0,0x03]
4208 ; X86-NEXT: vprorq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xc0,0x04]
4209 ; X86-NEXT: vprorq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xc0,0x05]
4210 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4211 ; X86-NEXT: retl ## encoding: [0xc3]
4212 ;
4213 ; X64-LABEL: test_int_x86_avx512_pror_q_512:
4214 ; X64: ## %bb.0:
4215 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4216 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4217 ; X64-NEXT: vprorq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xc0,0x03]
4218 ; X64-NEXT: vprorq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xc0,0x04]
4219 ; X64-NEXT: vprorq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xc0,0x05]
4220 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4221 ; X64-NEXT: retq ## encoding: [0xc3]
4222 %1 = call <8 x i64> @llvm.x86.avx512.pror.q.512(<8 x i64> %x0, i32 3)
4223 %2 = bitcast i8 %x3 to <8 x i1>
4224 %3 = select <8 x i1> %2, <8 x i64> %1, <8 x i64> %x2
4225 %4 = call <8 x i64> @llvm.x86.avx512.pror.q.512(<8 x i64> %x0, i32 4)
4226 %5 = bitcast i8 %x3 to <8 x i1>
4227 %6 = select <8 x i1> %5, <8 x i64> %4, <8 x i64> zeroinitializer
4228 %7 = call <8 x i64> @llvm.x86.avx512.pror.q.512(<8 x i64> %x0, i32 5)
4229 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %3, 0
4230 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %6, 1
4231 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %7, 2
4232 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5
4233 }
4235 declare <8 x i64> @llvm.x86.avx512.mask.psrl.qi.512(<8 x i64>, i32, <8 x i64>, i8)
4237 define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_psrl_qi_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) {
4238 ; X86-LABEL: test_int_x86_avx512_mask_psrl_qi_512:
4239 ; X86: ## %bb.0:
4240 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4241 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
4242 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4243 ; X86-NEXT: vpsrlq $4, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x73,0xd0,0x04]
4244 ; X86-NEXT: vpsrlq $5, %zmm0, %zmm1 ## encoding: [0x62,0xf1,0xf5,0x48,0x73,0xd0,0x05]
4245 ; X86-NEXT: vpsrlq $6, %zmm0, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0xed,0xc9,0x73,0xd0,0x06]
4246 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4247 ; X86-NEXT: retl ## encoding: [0xc3]
4248 ;
4249 ; X64-LABEL: test_int_x86_avx512_mask_psrl_qi_512:
4250 ; X64: ## %bb.0:
4251 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4252 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4253 ; X64-NEXT: vpsrlq $4, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x73,0xd0,0x04]
4254 ; X64-NEXT: vpsrlq $5, %zmm0, %zmm1 ## encoding: [0x62,0xf1,0xf5,0x48,0x73,0xd0,0x05]
4255 ; X64-NEXT: vpsrlq $6, %zmm0, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0xed,0xc9,0x73,0xd0,0x06]
4256 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4257 ; X64-NEXT: retq ## encoding: [0xc3]
4258 %res0 = call <8 x i64> @llvm.x86.avx512.mask.psrl.qi.512(<8 x i64> %x0, i32 4, <8 x i64> %x2, i8 %x3)
4259 %res1 = call <8 x i64> @llvm.x86.avx512.mask.psrl.qi.512(<8 x i64> %x0, i32 5, <8 x i64> %x2, i8 -1)
4260 %res2 = call <8 x i64> @llvm.x86.avx512.mask.psrl.qi.512(<8 x i64> %x0, i32 6, <8 x i64> zeroinitializer, i8 %x3)
4261 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
4262 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
4263 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 2
4264 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5
4265 }
4267 declare <16 x i32>@llvm.x86.avx512.mask.psrl.di.512(<16 x i32>, i32, <16 x i32>, i16)
4269 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_psrl_di_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) {
4270 ; X86-LABEL: test_int_x86_avx512_mask_psrl_di_512:
4271 ; X86: ## %bb.0:
4272 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4273 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
4274 ; X86-NEXT: vpsrld $4, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xd0,0x04]
4275 ; X86-NEXT: vpsrld $5, %zmm0, %zmm1 ## encoding: [0x62,0xf1,0x75,0x48,0x72,0xd0,0x05]
4276 ; X86-NEXT: vpsrld $6, %zmm0, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0x6d,0xc9,0x72,0xd0,0x06]
4277 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4278 ; X86-NEXT: retl ## encoding: [0xc3]
4279 ;
4280 ; X64-LABEL: test_int_x86_avx512_mask_psrl_di_512:
4281 ; X64: ## %bb.0:
4282 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4283 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4284 ; X64-NEXT: vpsrld $4, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xd0,0x04]
4285 ; X64-NEXT: vpsrld $5, %zmm0, %zmm1 ## encoding: [0x62,0xf1,0x75,0x48,0x72,0xd0,0x05]
4286 ; X64-NEXT: vpsrld $6, %zmm0, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0x6d,0xc9,0x72,0xd0,0x06]
4287 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4288 ; X64-NEXT: retq ## encoding: [0xc3]
4289 %res0 = call <16 x i32> @llvm.x86.avx512.mask.psrl.di.512(<16 x i32> %x0, i32 4, <16 x i32> %x2, i16 %x3)
4290 %res1 = call <16 x i32> @llvm.x86.avx512.mask.psrl.di.512(<16 x i32> %x0, i32 5, <16 x i32> %x2, i16 -1)
4291 %res2 = call <16 x i32> @llvm.x86.avx512.mask.psrl.di.512(<16 x i32> %x0, i32 6, <16 x i32> zeroinitializer, i16 %x3)
4292 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
4293 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 1
4294 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 2
4295 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
4296 }
4298 declare <16 x i32> @llvm.x86.avx512.mask.psra.di.512(<16 x i32>, i32, <16 x i32>, i16)
4300 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_psra_di_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) {
4301 ; X86-LABEL: test_int_x86_avx512_mask_psra_di_512:
4302 ; X86: ## %bb.0:
4303 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4304 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
4305 ; X86-NEXT: vpsrad $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xe0,0x03]
4306 ; X86-NEXT: vpsrad $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xe0,0x04]
4307 ; X86-NEXT: vpsrad $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xe0,0x05]
4308 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4309 ; X86-NEXT: retl ## encoding: [0xc3]
4310 ;
4311 ; X64-LABEL: test_int_x86_avx512_mask_psra_di_512:
4312 ; X64: ## %bb.0:
4313 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4314 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4315 ; X64-NEXT: vpsrad $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xe0,0x03]
4316 ; X64-NEXT: vpsrad $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xe0,0x04]
4317 ; X64-NEXT: vpsrad $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xe0,0x05]
4318 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4319 ; X64-NEXT: retq ## encoding: [0xc3]
4320 %res0 = call <16 x i32> @llvm.x86.avx512.mask.psra.di.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 %x3)
4321 %res1 = call <16 x i32> @llvm.x86.avx512.mask.psra.di.512(<16 x i32> %x0, i32 4, <16 x i32> zeroinitializer, i16 %x3)
4322 %res2 = call <16 x i32> @llvm.x86.avx512.mask.psra.di.512(<16 x i32> %x0, i32 5, <16 x i32> %x2, i16 -1)
4323 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
4324 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 1
4325 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 2
4326 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
4327 }
4329 declare <8 x i64> @llvm.x86.avx512.mask.psra.qi.512(<8 x i64>, i32, <8 x i64>, i8)
4331 define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_psra_qi_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) {
4332 ; X86-LABEL: test_int_x86_avx512_mask_psra_qi_512:
4333 ; X86: ## %bb.0:
4334 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4335 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
4336 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4337 ; X86-NEXT: vpsraq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xe0,0x03]
4338 ; X86-NEXT: vpsraq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xe0,0x04]
4339 ; X86-NEXT: vpsraq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xe0,0x05]
4340 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4341 ; X86-NEXT: retl ## encoding: [0xc3]
4342 ;
4343 ; X64-LABEL: test_int_x86_avx512_mask_psra_qi_512:
4344 ; X64: ## %bb.0:
4345 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4346 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4347 ; X64-NEXT: vpsraq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xe0,0x03]
4348 ; X64-NEXT: vpsraq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xe0,0x04]
4349 ; X64-NEXT: vpsraq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xe0,0x05]
4350 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4351 ; X64-NEXT: retq ## encoding: [0xc3]
4352 %res0 = call <8 x i64> @llvm.x86.avx512.mask.psra.qi.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 %x3)
4353 %res1 = call <8 x i64> @llvm.x86.avx512.mask.psra.qi.512(<8 x i64> %x0, i32 4, <8 x i64> zeroinitializer, i8 %x3)
4354 %res2 = call <8 x i64> @llvm.x86.avx512.mask.psra.qi.512(<8 x i64> %x0, i32 5, <8 x i64> %x2, i8 -1)
4355 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
4356 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
4357 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 2
4358 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5
4359 }
4361 declare <16 x i32> @llvm.x86.avx512.mask.psll.di.512(<16 x i32>, i32, <16 x i32>, i16)
4363 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_psll_di_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) {
4364 ; X86-LABEL: test_int_x86_avx512_mask_psll_di_512:
4365 ; X86: ## %bb.0:
4366 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4367 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
4368 ; X86-NEXT: vpslld $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xf0,0x03]
4369 ; X86-NEXT: vpslld $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xf0,0x04]
4370 ; X86-NEXT: vpslld $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xf0,0x05]
4371 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4372 ; X86-NEXT: retl ## encoding: [0xc3]
4373 ;
4374 ; X64-LABEL: test_int_x86_avx512_mask_psll_di_512:
4375 ; X64: ## %bb.0:
4376 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4377 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4378 ; X64-NEXT: vpslld $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xf0,0x03]
4379 ; X64-NEXT: vpslld $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xf0,0x04]
4380 ; X64-NEXT: vpslld $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xf0,0x05]
4381 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4382 ; X64-NEXT: retq ## encoding: [0xc3]
4383 %res0 = call <16 x i32> @llvm.x86.avx512.mask.psll.di.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 %x3)
4384 %res1 = call <16 x i32> @llvm.x86.avx512.mask.psll.di.512(<16 x i32> %x0, i32 4, <16 x i32> zeroinitializer, i16 %x3)
4385 %res2 = call <16 x i32> @llvm.x86.avx512.mask.psll.di.512(<16 x i32> %x0, i32 5, <16 x i32> %x2, i16 -1)
4386 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
4387 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 1
4388 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 2
4389 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
4390 }
4392 declare <8 x i64> @llvm.x86.avx512.mask.psll.qi.512(<8 x i64>, i32, <8 x i64>, i8)
4394 define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_psll_qi_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) {
4395 ; X86-LABEL: test_int_x86_avx512_mask_psll_qi_512:
4396 ; X86: ## %bb.0:
4397 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4398 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
4399 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4400 ; X86-NEXT: vpsllq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x73,0xf0,0x03]
4401 ; X86-NEXT: vpsllq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x73,0xf0,0x04]
4402 ; X86-NEXT: vpsllq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x73,0xf0,0x05]
4403 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4404 ; X86-NEXT: retl ## encoding: [0xc3]
4405 ;
4406 ; X64-LABEL: test_int_x86_avx512_mask_psll_qi_512:
4407 ; X64: ## %bb.0:
4408 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
4409 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
4410 ; X64-NEXT: vpsllq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x73,0xf0,0x03]
4411 ; X64-NEXT: vpsllq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x73,0xf0,0x04]
4412 ; X64-NEXT: vpsllq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x73,0xf0,0x05]
4413 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
4414 ; X64-NEXT: retq ## encoding: [0xc3]
4415 %res0 = call <8 x i64> @llvm.x86.avx512.mask.psll.qi.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 %x3)
4416 %res1 = call <8 x i64> @llvm.x86.avx512.mask.psll.qi.512(<8 x i64> %x0, i32 4, <8 x i64> zeroinitializer, i8 %x3)
4417 %res2 = call <8 x i64> @llvm.x86.avx512.mask.psll.qi.512(<8 x i64> %x0, i32 5, <8 x i64> %x2, i8 -1)
4418 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
4419 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
4420 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 2
4421 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5
4422 }
4424 define <16 x i32> @test_x86_avx512_psll_d(<16 x i32> %a0, <4 x i32> %a1) {
4425 ; CHECK-LABEL: test_x86_avx512_psll_d:
4426 ; CHECK: ## %bb.0:
4427 ; CHECK-NEXT: vpslld %xmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xf2,0xc1]
4428 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4429 %res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
4430 ret <16 x i32> %res
4431 }
4433 define <16 x i32> @test_x86_avx512_mask_psll_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) {
4434 ; X86-LABEL: test_x86_avx512_mask_psll_d:
4435 ; X86: ## %bb.0:
4436 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4437 ; X86-NEXT: vpslld %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xf2,0xd1]
4438 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4439 ; X86-NEXT: retl ## encoding: [0xc3]
4440 ;
4441 ; X64-LABEL: test_x86_avx512_mask_psll_d:
4442 ; X64: ## %bb.0:
4443 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4444 ; X64-NEXT: vpslld %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xf2,0xd1]
4445 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4446 ; X64-NEXT: retq ## encoding: [0xc3]
4447 %res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)
4448 ret <16 x i32> %res
4449 }
4451 define <16 x i32> @test_x86_avx512_maskz_psll_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {
4452 ; X86-LABEL: test_x86_avx512_maskz_psll_d:
4453 ; X86: ## %bb.0:
4454 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4455 ; X86-NEXT: vpslld %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xf2,0xc1]
4456 ; X86-NEXT: retl ## encoding: [0xc3]
4457 ;
4458 ; X64-LABEL: test_x86_avx512_maskz_psll_d:
4459 ; X64: ## %bb.0:
4460 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4461 ; X64-NEXT: vpslld %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xf2,0xc1]
4462 ; X64-NEXT: retq ## encoding: [0xc3]
4463 %res = call <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
4464 ret <16 x i32> %res
4465 }
4467 declare <16 x i32> @llvm.x86.avx512.mask.psll.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone
4469 define <8 x i64> @test_x86_avx512_psll_q(<8 x i64> %a0, <2 x i64> %a1) {
4470 ; CHECK-LABEL: test_x86_avx512_psll_q:
4471 ; CHECK: ## %bb.0:
4472 ; CHECK-NEXT: vpsllq %xmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf3,0xc1]
4473 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4474 %res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
4475 ret <8 x i64> %res
4476 }
4478 define <8 x i64> @test_x86_avx512_mask_psll_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) {
4479 ; X86-LABEL: test_x86_avx512_mask_psll_q:
4480 ; X86: ## %bb.0:
4481 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4482 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4483 ; X86-NEXT: vpsllq %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf3,0xd1]
4484 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4485 ; X86-NEXT: retl ## encoding: [0xc3]
4486 ;
4487 ; X64-LABEL: test_x86_avx512_mask_psll_q:
4488 ; X64: ## %bb.0:
4489 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4490 ; X64-NEXT: vpsllq %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf3,0xd1]
4491 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4492 ; X64-NEXT: retq ## encoding: [0xc3]
4493 %res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)
4494 ret <8 x i64> %res
4495 }
4497 define <8 x i64> @test_x86_avx512_maskz_psll_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {
4498 ; X86-LABEL: test_x86_avx512_maskz_psll_q:
4499 ; X86: ## %bb.0:
4500 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4501 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4502 ; X86-NEXT: vpsllq %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf3,0xc1]
4503 ; X86-NEXT: retl ## encoding: [0xc3]
4504 ;
4505 ; X64-LABEL: test_x86_avx512_maskz_psll_q:
4506 ; X64: ## %bb.0:
4507 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4508 ; X64-NEXT: vpsllq %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf3,0xc1]
4509 ; X64-NEXT: retq ## encoding: [0xc3]
4510 %res = call <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
4511 ret <8 x i64> %res
4512 }
4514 declare <8 x i64> @llvm.x86.avx512.mask.psll.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone
4516 define <16 x i32> @test_x86_avx512_psrl_d(<16 x i32> %a0, <4 x i32> %a1) {
4517 ; CHECK-LABEL: test_x86_avx512_psrl_d:
4518 ; CHECK: ## %bb.0:
4519 ; CHECK-NEXT: vpsrld %xmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xd2,0xc1]
4520 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4521 %res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
4522 ret <16 x i32> %res
4523 }
4525 define <16 x i32> @test_x86_avx512_mask_psrl_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) {
4526 ; X86-LABEL: test_x86_avx512_mask_psrl_d:
4527 ; X86: ## %bb.0:
4528 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4529 ; X86-NEXT: vpsrld %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xd2,0xd1]
4530 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4531 ; X86-NEXT: retl ## encoding: [0xc3]
4532 ;
4533 ; X64-LABEL: test_x86_avx512_mask_psrl_d:
4534 ; X64: ## %bb.0:
4535 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4536 ; X64-NEXT: vpsrld %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xd2,0xd1]
4537 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4538 ; X64-NEXT: retq ## encoding: [0xc3]
4539 %res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)
4540 ret <16 x i32> %res
4541 }
4543 define <16 x i32> @test_x86_avx512_maskz_psrl_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {
4544 ; X86-LABEL: test_x86_avx512_maskz_psrl_d:
4545 ; X86: ## %bb.0:
4546 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4547 ; X86-NEXT: vpsrld %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xd2,0xc1]
4548 ; X86-NEXT: retl ## encoding: [0xc3]
4549 ;
4550 ; X64-LABEL: test_x86_avx512_maskz_psrl_d:
4551 ; X64: ## %bb.0:
4552 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4553 ; X64-NEXT: vpsrld %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xd2,0xc1]
4554 ; X64-NEXT: retq ## encoding: [0xc3]
4555 %res = call <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
4556 ret <16 x i32> %res
4557 }
4559 declare <16 x i32> @llvm.x86.avx512.mask.psrl.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone
4561 define <8 x i64> @test_x86_avx512_psrl_q(<8 x i64> %a0, <2 x i64> %a1) {
4562 ; CHECK-LABEL: test_x86_avx512_psrl_q:
4563 ; CHECK: ## %bb.0:
4564 ; CHECK-NEXT: vpsrlq %xmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xd3,0xc1]
4565 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4566 %res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
4567 ret <8 x i64> %res
4568 }
4570 define <8 x i64> @test_x86_avx512_mask_psrl_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) {
4571 ; X86-LABEL: test_x86_avx512_mask_psrl_q:
4572 ; X86: ## %bb.0:
4573 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4574 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4575 ; X86-NEXT: vpsrlq %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xd3,0xd1]
4576 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4577 ; X86-NEXT: retl ## encoding: [0xc3]
4578 ;
4579 ; X64-LABEL: test_x86_avx512_mask_psrl_q:
4580 ; X64: ## %bb.0:
4581 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4582 ; X64-NEXT: vpsrlq %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xd3,0xd1]
4583 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4584 ; X64-NEXT: retq ## encoding: [0xc3]
4585 %res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)
4586 ret <8 x i64> %res
4587 }
4589 define <8 x i64> @test_x86_avx512_maskz_psrl_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {
4590 ; X86-LABEL: test_x86_avx512_maskz_psrl_q:
4591 ; X86: ## %bb.0:
4592 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4593 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4594 ; X86-NEXT: vpsrlq %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xd3,0xc1]
4595 ; X86-NEXT: retl ## encoding: [0xc3]
4596 ;
4597 ; X64-LABEL: test_x86_avx512_maskz_psrl_q:
4598 ; X64: ## %bb.0:
4599 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4600 ; X64-NEXT: vpsrlq %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xd3,0xc1]
4601 ; X64-NEXT: retq ## encoding: [0xc3]
4602 %res = call <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
4603 ret <8 x i64> %res
4604 }
4606 declare <8 x i64> @llvm.x86.avx512.mask.psrl.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone
4608 define <16 x i32> @test_x86_avx512_psra_d(<16 x i32> %a0, <4 x i32> %a1) {
4609 ; CHECK-LABEL: test_x86_avx512_psra_d:
4610 ; CHECK: ## %bb.0:
4611 ; CHECK-NEXT: vpsrad %xmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7d,0x48,0xe2,0xc1]
4612 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4613 %res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
4614 ret <16 x i32> %res
4615 }
4617 define <16 x i32> @test_x86_avx512_mask_psra_d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask) {
4618 ; X86-LABEL: test_x86_avx512_mask_psra_d:
4619 ; X86: ## %bb.0:
4620 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4621 ; X86-NEXT: vpsrad %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xe2,0xd1]
4622 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4623 ; X86-NEXT: retl ## encoding: [0xc3]
4624 ;
4625 ; X64-LABEL: test_x86_avx512_mask_psra_d:
4626 ; X64: ## %bb.0:
4627 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4628 ; X64-NEXT: vpsrad %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0xe2,0xd1]
4629 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4630 ; X64-NEXT: retq ## encoding: [0xc3]
4631 %res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> %a2, i16 %mask)
4632 ret <16 x i32> %res
4633 }
4635 define <16 x i32> @test_x86_avx512_maskz_psra_d(<16 x i32> %a0, <4 x i32> %a1, i16 %mask) {
4636 ; X86-LABEL: test_x86_avx512_maskz_psra_d:
4637 ; X86: ## %bb.0:
4638 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4639 ; X86-NEXT: vpsrad %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xe2,0xc1]
4640 ; X86-NEXT: retl ## encoding: [0xc3]
4641 ;
4642 ; X64-LABEL: test_x86_avx512_maskz_psra_d:
4643 ; X64: ## %bb.0:
4644 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4645 ; X64-NEXT: vpsrad %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0xe2,0xc1]
4646 ; X64-NEXT: retq ## encoding: [0xc3]
4647 %res = call <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32> %a0, <4 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
4648 ret <16 x i32> %res
4649 }
4651 declare <16 x i32> @llvm.x86.avx512.mask.psra.d(<16 x i32>, <4 x i32>, <16 x i32>, i16) nounwind readnone
4653 define <8 x i64> @test_x86_avx512_psra_q(<8 x i64> %a0, <2 x i64> %a1) {
4654 ; CHECK-LABEL: test_x86_avx512_psra_q:
4655 ; CHECK: ## %bb.0:
4656 ; CHECK-NEXT: vpsraq %xmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xe2,0xc1]
4657 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4658 %res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
4659 ret <8 x i64> %res
4660 }
4662 define <8 x i64> @test_x86_avx512_mask_psra_q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask) {
4663 ; X86-LABEL: test_x86_avx512_mask_psra_q:
4664 ; X86: ## %bb.0:
4665 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4666 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4667 ; X86-NEXT: vpsraq %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xe2,0xd1]
4668 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4669 ; X86-NEXT: retl ## encoding: [0xc3]
4670 ;
4671 ; X64-LABEL: test_x86_avx512_mask_psra_q:
4672 ; X64: ## %bb.0:
4673 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4674 ; X64-NEXT: vpsraq %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xe2,0xd1]
4675 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4676 ; X64-NEXT: retq ## encoding: [0xc3]
4677 %res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> %a2, i8 %mask)
4678 ret <8 x i64> %res
4679 }
4681 define <8 x i64> @test_x86_avx512_maskz_psra_q(<8 x i64> %a0, <2 x i64> %a1, i8 %mask) {
4682 ; X86-LABEL: test_x86_avx512_maskz_psra_q:
4683 ; X86: ## %bb.0:
4684 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4685 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4686 ; X86-NEXT: vpsraq %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xe2,0xc1]
4687 ; X86-NEXT: retl ## encoding: [0xc3]
4688 ;
4689 ; X64-LABEL: test_x86_avx512_maskz_psra_q:
4690 ; X64: ## %bb.0:
4691 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4692 ; X64-NEXT: vpsraq %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xe2,0xc1]
4693 ; X64-NEXT: retq ## encoding: [0xc3]
4694 %res = call <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64> %a0, <2 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
4695 ret <8 x i64> %res
4696 }
4698 declare <8 x i64> @llvm.x86.avx512.mask.psra.q(<8 x i64>, <2 x i64>, <8 x i64>, i8) nounwind readnone
4700 define <16 x i32> @test_x86_avx512_psllv_d(<16 x i32> %a0, <16 x i32> %a1) {
4701 ; CHECK-LABEL: test_x86_avx512_psllv_d:
4702 ; CHECK: ## %bb.0:
4703 ; CHECK-NEXT: vpsllvd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x47,0xc1]
4704 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4705 %res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
4706 ret <16 x i32> %res
4707 }
4709 define <16 x i32> @test_x86_avx512_mask_psllv_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {
4710 ; X86-LABEL: test_x86_avx512_mask_psllv_d:
4711 ; X86: ## %bb.0:
4712 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4713 ; X86-NEXT: vpsllvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x47,0xd1]
4714 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4715 ; X86-NEXT: retl ## encoding: [0xc3]
4716 ;
4717 ; X64-LABEL: test_x86_avx512_mask_psllv_d:
4718 ; X64: ## %bb.0:
4719 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4720 ; X64-NEXT: vpsllvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x47,0xd1]
4721 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4722 ; X64-NEXT: retq ## encoding: [0xc3]
4723 %res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)
4724 ret <16 x i32> %res
4725 }
4727 define <16 x i32> @test_x86_avx512_maskz_psllv_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
4728 ; X86-LABEL: test_x86_avx512_maskz_psllv_d:
4729 ; X86: ## %bb.0:
4730 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4731 ; X86-NEXT: vpsllvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x47,0xc1]
4732 ; X86-NEXT: retl ## encoding: [0xc3]
4733 ;
4734 ; X64-LABEL: test_x86_avx512_maskz_psllv_d:
4735 ; X64: ## %bb.0:
4736 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4737 ; X64-NEXT: vpsllvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x47,0xc1]
4738 ; X64-NEXT: retq ## encoding: [0xc3]
4739 %res = call <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
4740 ret <16 x i32> %res
4741 }
4743 declare <16 x i32> @llvm.x86.avx512.mask.psllv.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone
4745 define <8 x i64> @test_x86_avx512_psllv_q(<8 x i64> %a0, <8 x i64> %a1) {
4746 ; CHECK-LABEL: test_x86_avx512_psllv_q:
4747 ; CHECK: ## %bb.0:
4748 ; CHECK-NEXT: vpsllvq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x47,0xc1]
4749 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4750 %res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
4751 ret <8 x i64> %res
4752 }
4754 define <8 x i64> @test_x86_avx512_mask_psllv_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {
4755 ; X86-LABEL: test_x86_avx512_mask_psllv_q:
4756 ; X86: ## %bb.0:
4757 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4758 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4759 ; X86-NEXT: vpsllvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x47,0xd1]
4760 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4761 ; X86-NEXT: retl ## encoding: [0xc3]
4762 ;
4763 ; X64-LABEL: test_x86_avx512_mask_psllv_q:
4764 ; X64: ## %bb.0:
4765 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4766 ; X64-NEXT: vpsllvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x47,0xd1]
4767 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4768 ; X64-NEXT: retq ## encoding: [0xc3]
4769 %res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)
4770 ret <8 x i64> %res
4771 }
4773 define <8 x i64> @test_x86_avx512_maskz_psllv_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
4774 ; X86-LABEL: test_x86_avx512_maskz_psllv_q:
4775 ; X86: ## %bb.0:
4776 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4777 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4778 ; X86-NEXT: vpsllvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x47,0xc1]
4779 ; X86-NEXT: retl ## encoding: [0xc3]
4780 ;
4781 ; X64-LABEL: test_x86_avx512_maskz_psllv_q:
4782 ; X64: ## %bb.0:
4783 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4784 ; X64-NEXT: vpsllvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x47,0xc1]
4785 ; X64-NEXT: retq ## encoding: [0xc3]
4786 %res = call <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
4787 ret <8 x i64> %res
4788 }
4790 declare <8 x i64> @llvm.x86.avx512.mask.psllv.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone
4793 define <16 x i32> @test_x86_avx512_psrav_d(<16 x i32> %a0, <16 x i32> %a1) {
4794 ; CHECK-LABEL: test_x86_avx512_psrav_d:
4795 ; CHECK: ## %bb.0:
4796 ; CHECK-NEXT: vpsravd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x46,0xc1]
4797 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4798 %res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
4799 ret <16 x i32> %res
4800 }
4802 define <16 x i32> @test_x86_avx512_mask_psrav_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {
4803 ; X86-LABEL: test_x86_avx512_mask_psrav_d:
4804 ; X86: ## %bb.0:
4805 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4806 ; X86-NEXT: vpsravd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x46,0xd1]
4807 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4808 ; X86-NEXT: retl ## encoding: [0xc3]
4809 ;
4810 ; X64-LABEL: test_x86_avx512_mask_psrav_d:
4811 ; X64: ## %bb.0:
4812 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4813 ; X64-NEXT: vpsravd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x46,0xd1]
4814 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4815 ; X64-NEXT: retq ## encoding: [0xc3]
4816 %res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)
4817 ret <16 x i32> %res
4818 }
4820 define <16 x i32> @test_x86_avx512_maskz_psrav_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
4821 ; X86-LABEL: test_x86_avx512_maskz_psrav_d:
4822 ; X86: ## %bb.0:
4823 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4824 ; X86-NEXT: vpsravd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x46,0xc1]
4825 ; X86-NEXT: retl ## encoding: [0xc3]
4826 ;
4827 ; X64-LABEL: test_x86_avx512_maskz_psrav_d:
4828 ; X64: ## %bb.0:
4829 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4830 ; X64-NEXT: vpsravd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x46,0xc1]
4831 ; X64-NEXT: retq ## encoding: [0xc3]
4832 %res = call <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
4833 ret <16 x i32> %res
4834 }
4836 declare <16 x i32> @llvm.x86.avx512.mask.psrav.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone
4838 define <8 x i64> @test_x86_avx512_psrav_q(<8 x i64> %a0, <8 x i64> %a1) {
4839 ; CHECK-LABEL: test_x86_avx512_psrav_q:
4840 ; CHECK: ## %bb.0:
4841 ; CHECK-NEXT: vpsravq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x46,0xc1]
4842 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4843 %res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
4844 ret <8 x i64> %res
4845 }
4847 define <8 x i64> @test_x86_avx512_mask_psrav_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {
4848 ; X86-LABEL: test_x86_avx512_mask_psrav_q:
4849 ; X86: ## %bb.0:
4850 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4851 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4852 ; X86-NEXT: vpsravq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x46,0xd1]
4853 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4854 ; X86-NEXT: retl ## encoding: [0xc3]
4855 ;
4856 ; X64-LABEL: test_x86_avx512_mask_psrav_q:
4857 ; X64: ## %bb.0:
4858 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4859 ; X64-NEXT: vpsravq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x46,0xd1]
4860 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4861 ; X64-NEXT: retq ## encoding: [0xc3]
4862 %res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)
4863 ret <8 x i64> %res
4864 }
4866 define <8 x i64> @test_x86_avx512_maskz_psrav_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
4867 ; X86-LABEL: test_x86_avx512_maskz_psrav_q:
4868 ; X86: ## %bb.0:
4869 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4870 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4871 ; X86-NEXT: vpsravq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x46,0xc1]
4872 ; X86-NEXT: retl ## encoding: [0xc3]
4873 ;
4874 ; X64-LABEL: test_x86_avx512_maskz_psrav_q:
4875 ; X64: ## %bb.0:
4876 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4877 ; X64-NEXT: vpsravq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x46,0xc1]
4878 ; X64-NEXT: retq ## encoding: [0xc3]
4879 %res = call <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
4880 ret <8 x i64> %res
4881 }
4883 declare <8 x i64> @llvm.x86.avx512.mask.psrav.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone
4885 define <16 x i32> @test_x86_avx512_psrlv_d(<16 x i32> %a0, <16 x i32> %a1) {
4886 ; CHECK-LABEL: test_x86_avx512_psrlv_d:
4887 ; CHECK: ## %bb.0:
4888 ; CHECK-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x45,0xc1]
4889 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4890 %res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 -1)
4891 ret <16 x i32> %res
4892 }
4894 define <16 x i32> @test_x86_avx512_mask_psrlv_d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask) {
4895 ; X86-LABEL: test_x86_avx512_mask_psrlv_d:
4896 ; X86: ## %bb.0:
4897 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4898 ; X86-NEXT: vpsrlvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x45,0xd1]
4899 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4900 ; X86-NEXT: retl ## encoding: [0xc3]
4901 ;
4902 ; X64-LABEL: test_x86_avx512_mask_psrlv_d:
4903 ; X64: ## %bb.0:
4904 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4905 ; X64-NEXT: vpsrlvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x45,0xd1]
4906 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4907 ; X64-NEXT: retq ## encoding: [0xc3]
4908 %res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> %a2, i16 %mask)
4909 ret <16 x i32> %res
4910 }
4912 define <16 x i32> @test_x86_avx512_maskz_psrlv_d(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
4913 ; X86-LABEL: test_x86_avx512_maskz_psrlv_d:
4914 ; X86: ## %bb.0:
4915 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
4916 ; X86-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x45,0xc1]
4917 ; X86-NEXT: retl ## encoding: [0xc3]
4918 ;
4919 ; X64-LABEL: test_x86_avx512_maskz_psrlv_d:
4920 ; X64: ## %bb.0:
4921 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4922 ; X64-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x45,0xc1]
4923 ; X64-NEXT: retq ## encoding: [0xc3]
4924 %res = call <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32> %a0, <16 x i32> %a1, <16 x i32> zeroinitializer, i16 %mask)
4925 ret <16 x i32> %res
4926 }
4928 declare <16 x i32> @llvm.x86.avx512.mask.psrlv.d(<16 x i32>, <16 x i32>, <16 x i32>, i16) nounwind readnone
4930 define <8 x i64> @test_x86_avx512_psrlv_q(<8 x i64> %a0, <8 x i64> %a1) {
4931 ; CHECK-LABEL: test_x86_avx512_psrlv_q:
4932 ; CHECK: ## %bb.0:
4933 ; CHECK-NEXT: vpsrlvq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x45,0xc1]
4934 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
4935 %res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 -1)
4936 ret <8 x i64> %res
4937 }
4939 define <8 x i64> @test_x86_avx512_mask_psrlv_q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask) {
4940 ; X86-LABEL: test_x86_avx512_mask_psrlv_q:
4941 ; X86: ## %bb.0:
4942 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4943 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4944 ; X86-NEXT: vpsrlvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x45,0xd1]
4945 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4946 ; X86-NEXT: retl ## encoding: [0xc3]
4947 ;
4948 ; X64-LABEL: test_x86_avx512_mask_psrlv_q:
4949 ; X64: ## %bb.0:
4950 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4951 ; X64-NEXT: vpsrlvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x45,0xd1]
4952 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
4953 ; X64-NEXT: retq ## encoding: [0xc3]
4954 %res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> %a2, i8 %mask)
4955 ret <8 x i64> %res
4956 }
4958 define <8 x i64> @test_x86_avx512_maskz_psrlv_q(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
4959 ; X86-LABEL: test_x86_avx512_maskz_psrlv_q:
4960 ; X86: ## %bb.0:
4961 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
4962 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
4963 ; X86-NEXT: vpsrlvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x45,0xc1]
4964 ; X86-NEXT: retl ## encoding: [0xc3]
4965 ;
4966 ; X64-LABEL: test_x86_avx512_maskz_psrlv_q:
4967 ; X64: ## %bb.0:
4968 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
4969 ; X64-NEXT: vpsrlvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x45,0xc1]
4970 ; X64-NEXT: retq ## encoding: [0xc3]
4971 %res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %a1, <8 x i64> zeroinitializer, i8 %mask)
4972 ret <8 x i64> %res
4973 }
4975 declare <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64>, <8 x i64>, <8 x i64>, i8) nounwind readnone
4977 define <8 x i64> @test_x86_avx512_psrlv_q_memop(<8 x i64> %a0, ptr %ptr) {
4978 ; X86-LABEL: test_x86_avx512_psrlv_q_memop:
4979 ; X86: ## %bb.0:
4980 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
4981 ; X86-NEXT: vpsrlvq (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x45,0x00]
4982 ; X86-NEXT: retl ## encoding: [0xc3]
4983 ;
4984 ; X64-LABEL: test_x86_avx512_psrlv_q_memop:
4985 ; X64: ## %bb.0:
4986 ; X64-NEXT: vpsrlvq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x45,0x07]
4987 ; X64-NEXT: retq ## encoding: [0xc3]
4988 %b = load <8 x i64>, ptr %ptr
4989 %res = call <8 x i64> @llvm.x86.avx512.mask.psrlv.q(<8 x i64> %a0, <8 x i64> %b, <8 x i64> zeroinitializer, i8 -1)
4990 ret <8 x i64> %res
4991 }
4993 declare <8 x double> @llvm.x86.avx512.mask.cvtdq2pd.512(<8 x i32>, <8 x double>, i8)
4995 define <8 x double>@test_int_x86_avx512_cvt_dq2pd_512(<8 x i32> %x0, <8 x double> %x1) {
4996 ; CHECK-LABEL: test_int_x86_avx512_cvt_dq2pd_512:
4997 ; CHECK: ## %bb.0:
4998 ; CHECK-NEXT: vcvtdq2pd %ymm0, %zmm0 ## encoding: [0x62,0xf1,0x7e,0x48,0xe6,0xc0]
4999 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5000 %res = call <8 x double> @llvm.x86.avx512.mask.cvtdq2pd.512(<8 x i32> %x0, <8 x double> %x1, i8 -1)
5001 ret <8 x double> %res
5002 }
5004 define <8 x double>@test_int_x86_avx512_mask_cvt_dq2pd_512(<8 x i32> %x0, <8 x double> %x1, i8 %x2) {
5005 ; X86-LABEL: test_int_x86_avx512_mask_cvt_dq2pd_512:
5006 ; X86: ## %bb.0:
5007 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5008 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5009 ; X86-NEXT: vcvtdq2pd %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0xe6,0xc8]
5010 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
5011 ; X86-NEXT: retl ## encoding: [0xc3]
5012 ;
5013 ; X64-LABEL: test_int_x86_avx512_mask_cvt_dq2pd_512:
5014 ; X64: ## %bb.0:
5015 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5016 ; X64-NEXT: vcvtdq2pd %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0xe6,0xc8]
5017 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
5018 ; X64-NEXT: retq ## encoding: [0xc3]
5019 %res = call <8 x double> @llvm.x86.avx512.mask.cvtdq2pd.512(<8 x i32> %x0, <8 x double> %x1, i8 %x2)
5020 ret <8 x double> %res
5021 }
5023 declare <8 x double> @llvm.x86.avx512.mask.cvtudq2pd.512(<8 x i32>, <8 x double>, i8)
5025 define <8 x double>@test_int_x86_avx512_cvt_udq2pd_512(<8 x i32> %x0, <8 x double> %x1) {
5026 ; CHECK-LABEL: test_int_x86_avx512_cvt_udq2pd_512:
5027 ; CHECK: ## %bb.0:
5028 ; CHECK-NEXT: vcvtudq2pd %ymm0, %zmm0 ## encoding: [0x62,0xf1,0x7e,0x48,0x7a,0xc0]
5029 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5030 %res = call <8 x double> @llvm.x86.avx512.mask.cvtudq2pd.512(<8 x i32> %x0, <8 x double> %x1, i8 -1)
5031 ret <8 x double> %res
5032 }
5034 define <8 x double>@test_int_x86_avx512_mask_cvt_udq2pd_512(<8 x i32> %x0, <8 x double> %x1, i8 %x2) {
5035 ; X86-LABEL: test_int_x86_avx512_mask_cvt_udq2pd_512:
5036 ; X86: ## %bb.0:
5037 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5038 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5039 ; X86-NEXT: vcvtudq2pd %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x7a,0xc8]
5040 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
5041 ; X86-NEXT: retl ## encoding: [0xc3]
5042 ;
5043 ; X64-LABEL: test_int_x86_avx512_mask_cvt_udq2pd_512:
5044 ; X64: ## %bb.0:
5045 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5046 ; X64-NEXT: vcvtudq2pd %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7e,0x49,0x7a,0xc8]
5047 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
5048 ; X64-NEXT: retq ## encoding: [0xc3]
5049 %res = call <8 x double> @llvm.x86.avx512.mask.cvtudq2pd.512(<8 x i32> %x0, <8 x double> %x1, i8 %x2)
5050 ret <8 x double> %res
5051 }
5053 define <16 x float> @test_x86_vcvtph2ps_512(<16 x i16> %a0) {
5054 ; CHECK-LABEL: test_x86_vcvtph2ps_512:
5055 ; CHECK: ## %bb.0:
5056 ; CHECK-NEXT: vcvtph2ps %ymm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x13,0xc0]
5057 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5058 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 -1, i32 4)
5059 ret <16 x float> %res
5060 }
5062 define <16 x float> @test_x86_vcvtph2ps_512_sae(<16 x i16> %a0) {
5063 ; CHECK-LABEL: test_x86_vcvtph2ps_512_sae:
5064 ; CHECK: ## %bb.0:
5065 ; CHECK-NEXT: vcvtph2ps {sae}, %ymm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x18,0x13,0xc0]
5066 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5067 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 -1, i32 8)
5068 ret <16 x float> %res
5069 }
5071 define <16 x float> @test_x86_vcvtph2ps_512_rrk(<16 x i16> %a0,<16 x float> %a1, i16 %mask) {
5072 ; X86-LABEL: test_x86_vcvtph2ps_512_rrk:
5073 ; X86: ## %bb.0:
5074 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5075 ; X86-NEXT: vcvtph2ps %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x13,0xc8]
5076 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
5077 ; X86-NEXT: retl ## encoding: [0xc3]
5078 ;
5079 ; X64-LABEL: test_x86_vcvtph2ps_512_rrk:
5080 ; X64: ## %bb.0:
5081 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5082 ; X64-NEXT: vcvtph2ps %ymm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x13,0xc8]
5083 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
5084 ; X64-NEXT: retq ## encoding: [0xc3]
5085 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> %a1, i16 %mask, i32 4)
5086 ret <16 x float> %res
5087 }
5089 define <16 x float> @test_x86_vcvtph2ps_512_sae_rrkz(<16 x i16> %a0, i16 %mask) {
5090 ; X86-LABEL: test_x86_vcvtph2ps_512_sae_rrkz:
5091 ; X86: ## %bb.0:
5092 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5093 ; X86-NEXT: vcvtph2ps {sae}, %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0x99,0x13,0xc0]
5094 ; X86-NEXT: retl ## encoding: [0xc3]
5095 ;
5096 ; X64-LABEL: test_x86_vcvtph2ps_512_sae_rrkz:
5097 ; X64: ## %bb.0:
5098 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5099 ; X64-NEXT: vcvtph2ps {sae}, %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0x99,0x13,0xc0]
5100 ; X64-NEXT: retq ## encoding: [0xc3]
5101 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 %mask, i32 8)
5102 ret <16 x float> %res
5103 }
5105 define <16 x float> @test_x86_vcvtph2ps_512_rrkz(<16 x i16> %a0, i16 %mask) {
5106 ; X86-LABEL: test_x86_vcvtph2ps_512_rrkz:
5107 ; X86: ## %bb.0:
5108 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5109 ; X86-NEXT: vcvtph2ps %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x13,0xc0]
5110 ; X86-NEXT: retl ## encoding: [0xc3]
5111 ;
5112 ; X64-LABEL: test_x86_vcvtph2ps_512_rrkz:
5113 ; X64: ## %bb.0:
5114 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5115 ; X64-NEXT: vcvtph2ps %ymm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x13,0xc0]
5116 ; X64-NEXT: retq ## encoding: [0xc3]
5117 %res = call <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16> %a0, <16 x float> zeroinitializer, i16 %mask, i32 4)
5118 ret <16 x float> %res
5119 }
5121 declare <16 x float> @llvm.x86.avx512.mask.vcvtph2ps.512(<16 x i16>, <16 x float>, i16, i32) nounwind readonly
5123 define <8 x i64> @test_valign_q(<8 x i64> %a, <8 x i64> %b) {
5124 ; CHECK-LABEL: test_valign_q:
5125 ; CHECK: ## %bb.0:
5126 ; CHECK-NEXT: valignq $2, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x03,0xc1,0x02]
5127 ; CHECK-NEXT: ## zmm0 = zmm1[2,3,4,5,6,7],zmm0[0,1]
5128 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5129 %res = call <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64> %a, <8 x i64> %b, i32 2, <8 x i64> zeroinitializer, i8 -1)
5130 ret <8 x i64> %res
5131 }
5133 define <8 x i64> @test_mask_valign_q(<8 x i64> %a, <8 x i64> %b, <8 x i64> %src, i8 %mask) {
5134 ; X86-LABEL: test_mask_valign_q:
5135 ; X86: ## %bb.0:
5136 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5137 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5138 ; X86-NEXT: valignq $2, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x03,0xd1,0x02]
5139 ; X86-NEXT: ## zmm2 {%k1} = zmm1[2,3,4,5,6,7],zmm0[0,1]
5140 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5141 ; X86-NEXT: retl ## encoding: [0xc3]
5142 ;
5143 ; X64-LABEL: test_mask_valign_q:
5144 ; X64: ## %bb.0:
5145 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5146 ; X64-NEXT: valignq $2, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x03,0xd1,0x02]
5147 ; X64-NEXT: ## zmm2 {%k1} = zmm1[2,3,4,5,6,7],zmm0[0,1]
5148 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5149 ; X64-NEXT: retq ## encoding: [0xc3]
5150 %res = call <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64> %a, <8 x i64> %b, i32 2, <8 x i64> %src, i8 %mask)
5151 ret <8 x i64> %res
5152 }
5154 declare <8 x i64> @llvm.x86.avx512.mask.valign.q.512(<8 x i64>, <8 x i64>, i32, <8 x i64>, i8)
5156 define <16 x i32> @test_maskz_valign_d(<16 x i32> %a, <16 x i32> %b, i16 %mask) {
5157 ; X86-LABEL: test_maskz_valign_d:
5158 ; X86: ## %bb.0:
5159 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5160 ; X86-NEXT: valignd $5, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x03,0xc1,0x05]
5161 ; X86-NEXT: ## zmm0 {%k1} {z} = zmm1[5,6,7,8,9,10,11,12,13,14,15],zmm0[0,1,2,3,4]
5162 ; X86-NEXT: retl ## encoding: [0xc3]
5163 ;
5164 ; X64-LABEL: test_maskz_valign_d:
5165 ; X64: ## %bb.0:
5166 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5167 ; X64-NEXT: valignd $5, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x03,0xc1,0x05]
5168 ; X64-NEXT: ## zmm0 {%k1} {z} = zmm1[5,6,7,8,9,10,11,12,13,14,15],zmm0[0,1,2,3,4]
5169 ; X64-NEXT: retq ## encoding: [0xc3]
5170 %res = call <16 x i32> @llvm.x86.avx512.mask.valign.d.512(<16 x i32> %a, <16 x i32> %b, i32 5, <16 x i32> zeroinitializer, i16 %mask)
5171 ret <16 x i32> %res
5172 }
5174 declare <16 x i32> @llvm.x86.avx512.mask.valign.d.512(<16 x i32>, <16 x i32>, i32, <16 x i32>, i16)
5176 declare <8 x double> @llvm.x86.avx512.mask.vpermilvar.pd.512(<8 x double>, <8 x i64>, <8 x double>, i8)
5178 define <8 x double>@test_int_x86_avx512_vpermilvar_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2) {
5179 ; CHECK-LABEL: test_int_x86_avx512_vpermilvar_pd_512:
5180 ; CHECK: ## %bb.0:
5181 ; CHECK-NEXT: vpermilpd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x0d,0xc1]
5182 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5183 %res = call <8 x double> @llvm.x86.avx512.mask.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 -1)
5184 ret <8 x double> %res
5185 }
5187 define <8 x double>@test_int_x86_avx512_mask_vpermilvar_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) {
5188 ; X86-LABEL: test_int_x86_avx512_mask_vpermilvar_pd_512:
5189 ; X86: ## %bb.0:
5190 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5191 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5192 ; X86-NEXT: vpermilpd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x0d,0xd1]
5193 ; X86-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
5194 ; X86-NEXT: retl ## encoding: [0xc3]
5195 ;
5196 ; X64-LABEL: test_int_x86_avx512_mask_vpermilvar_pd_512:
5197 ; X64: ## %bb.0:
5198 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5199 ; X64-NEXT: vpermilpd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x0d,0xd1]
5200 ; X64-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
5201 ; X64-NEXT: retq ## encoding: [0xc3]
5202 %res = call <8 x double> @llvm.x86.avx512.mask.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3)
5203 ret <8 x double> %res
5204 }
5206 define <8 x double>@test_int_x86_avx512_maskz_vpermilvar_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) {
5207 ; X86-LABEL: test_int_x86_avx512_maskz_vpermilvar_pd_512:
5208 ; X86: ## %bb.0:
5209 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5210 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5211 ; X86-NEXT: vpermilpd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x0d,0xc1]
5212 ; X86-NEXT: retl ## encoding: [0xc3]
5213 ;
5214 ; X64-LABEL: test_int_x86_avx512_maskz_vpermilvar_pd_512:
5215 ; X64: ## %bb.0:
5216 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5217 ; X64-NEXT: vpermilpd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x0d,0xc1]
5218 ; X64-NEXT: retq ## encoding: [0xc3]
5219 %res = call <8 x double> @llvm.x86.avx512.mask.vpermilvar.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> zeroinitializer, i8 %x3)
5220 ret <8 x double> %res
5221 }
5223 declare <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)
5225 define <16 x float>@test_int_x86_avx512_vpermilvar_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2) {
5226 ; CHECK-LABEL: test_int_x86_avx512_vpermilvar_ps_512:
5227 ; CHECK: ## %bb.0:
5228 ; CHECK-NEXT: vpermilps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x0c,0xc1]
5229 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5230 %res = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 -1)
5231 ret <16 x float> %res
5232 }
5234 define <16 x float>@test_int_x86_avx512_mask_vpermilvar_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) {
5235 ; X86-LABEL: test_int_x86_avx512_mask_vpermilvar_ps_512:
5236 ; X86: ## %bb.0:
5237 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5238 ; X86-NEXT: vpermilps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x0c,0xd1]
5239 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
5240 ; X86-NEXT: retl ## encoding: [0xc3]
5241 ;
5242 ; X64-LABEL: test_int_x86_avx512_mask_vpermilvar_ps_512:
5243 ; X64: ## %bb.0:
5244 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5245 ; X64-NEXT: vpermilps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x0c,0xd1]
5246 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
5247 ; X64-NEXT: retq ## encoding: [0xc3]
5248 %res = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3)
5249 ret <16 x float> %res
5250 }
5253 define <16 x float>@test_int_x86_avx512_maskz_vpermilvar_ps_512(<16 x float> %x0, <16 x i32> %x1, i16 %x3) {
5254 ; X86-LABEL: test_int_x86_avx512_maskz_vpermilvar_ps_512:
5255 ; X86: ## %bb.0:
5256 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5257 ; X86-NEXT: vpermilps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x0c,0xc1]
5258 ; X86-NEXT: retl ## encoding: [0xc3]
5259 ;
5260 ; X64-LABEL: test_int_x86_avx512_maskz_vpermilvar_ps_512:
5261 ; X64: ## %bb.0:
5262 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5263 ; X64-NEXT: vpermilps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x0c,0xc1]
5264 ; X64-NEXT: retq ## encoding: [0xc3]
5265 %res = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> zeroinitializer, i16 %x3)
5266 ret <16 x float> %res
5267 }
5269 ; Test case to make sure we can print shuffle decode comments for constant pool loads.
5270 define <16 x float>@test_int_x86_avx512_mask_vpermilvar_ps_512_constant_pool(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) {
5271 ; X86-LABEL: test_int_x86_avx512_mask_vpermilvar_ps_512_constant_pool:
5272 ; X86: ## %bb.0:
5273 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5274 ; X86-NEXT: vpermilps {{.*#+}} zmm2 {%k1} = zmm0[2,3,0,1,7,6,5,4,9,8,11,10,12,13,14,15]
5275 ; X86-NEXT: ## encoding: [0x62,0xf2,0x7d,0x49,0x0c,0x15,A,A,A,A]
5276 ; X86-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: FK_Data_4
5277 ; X86-NEXT: vpermilps {{.*#+}} zmm1 {%k1} {z} = zmm0[1,0,3,2,4,5,6,7,9,8,11,10,12,13,14,15]
5278 ; X86-NEXT: ## encoding: [0x62,0xf2,0x7d,0xc9,0x0c,0x0d,A,A,A,A]
5279 ; X86-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: FK_Data_4
5280 ; X86-NEXT: vaddps %zmm1, %zmm2, %zmm1 ## encoding: [0x62,0xf1,0x6c,0x48,0x58,0xc9]
5281 ; X86-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[1,0,3,2,4,5,6,7,10,11,8,9,14,15,13,12]
5282 ; X86-NEXT: ## encoding: [0x62,0xf2,0x7d,0x48,0x0c,0x05,A,A,A,A]
5283 ; X86-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind: FK_Data_4
5284 ; X86-NEXT: vaddps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x58,0xc1]
5285 ; X86-NEXT: retl ## encoding: [0xc3]
5286 ;
5287 ; X64-LABEL: test_int_x86_avx512_mask_vpermilvar_ps_512_constant_pool:
5288 ; X64: ## %bb.0:
5289 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5290 ; X64-NEXT: vpermilps {{.*#+}} zmm2 {%k1} = zmm0[2,3,0,1,7,6,5,4,9,8,11,10,12,13,14,15]
5291 ; X64-NEXT: ## encoding: [0x62,0xf2,0x7d,0x49,0x0c,0x15,A,A,A,A]
5292 ; X64-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte
5293 ; X64-NEXT: vpermilps {{.*#+}} zmm1 {%k1} {z} = zmm0[1,0,3,2,4,5,6,7,9,8,11,10,12,13,14,15]
5294 ; X64-NEXT: ## encoding: [0x62,0xf2,0x7d,0xc9,0x0c,0x0d,A,A,A,A]
5295 ; X64-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte
5296 ; X64-NEXT: vaddps %zmm1, %zmm2, %zmm1 ## encoding: [0x62,0xf1,0x6c,0x48,0x58,0xc9]
5297 ; X64-NEXT: vpermilps {{.*#+}} zmm0 = zmm0[1,0,3,2,4,5,6,7,10,11,8,9,14,15,13,12]
5298 ; X64-NEXT: ## encoding: [0x62,0xf2,0x7d,0x48,0x0c,0x05,A,A,A,A]
5299 ; X64-NEXT: ## fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte
5300 ; X64-NEXT: vaddps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x58,0xc1]
5301 ; X64-NEXT: retq ## encoding: [0xc3]
5302 %res = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 2, i32 3, i32 0, i32 1, i32 3, i32 2, i32 1, i32 0, i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3>, <16 x float> %x2, i16 %x3)
5303 %res1 = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3>, <16 x float> zeroinitializer, i16 %x3)
5304 %res2 = call <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float> %x0, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 1, i32 0>, <16 x float> %x2, i16 -1)
5305 %res3 = fadd <16 x float> %res, %res1
5306 %res4 = fadd <16 x float> %res2, %res3
5307 ret <16 x float> %res4
5308 }
5310 define <8 x i64> @test_mask_mul_epi32_rr(<16 x i32> %a, <16 x i32> %b) {
5311 ; CHECK-LABEL: test_mask_mul_epi32_rr:
5312 ; CHECK: ## %bb.0:
5313 ; CHECK-NEXT: vpmuldq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x28,0xc1]
5314 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5315 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
5316 ret < 8 x i64> %res
5317 }
5319 define <8 x i64> @test_mask_mul_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) {
5320 ; X86-LABEL: test_mask_mul_epi32_rrk:
5321 ; X86: ## %bb.0:
5322 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5323 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5324 ; X86-NEXT: vpmuldq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0xd1]
5325 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5326 ; X86-NEXT: retl ## encoding: [0xc3]
5327 ;
5328 ; X64-LABEL: test_mask_mul_epi32_rrk:
5329 ; X64: ## %bb.0:
5330 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5331 ; X64-NEXT: vpmuldq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0xd1]
5332 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5333 ; X64-NEXT: retq ## encoding: [0xc3]
5334 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
5335 ret < 8 x i64> %res
5336 }
5338 define <8 x i64> @test_mask_mul_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) {
5339 ; X86-LABEL: test_mask_mul_epi32_rrkz:
5340 ; X86: ## %bb.0:
5341 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5342 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5343 ; X86-NEXT: vpmuldq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0xc1]
5344 ; X86-NEXT: retl ## encoding: [0xc3]
5345 ;
5346 ; X64-LABEL: test_mask_mul_epi32_rrkz:
5347 ; X64: ## %bb.0:
5348 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5349 ; X64-NEXT: vpmuldq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0xc1]
5350 ; X64-NEXT: retq ## encoding: [0xc3]
5351 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
5352 ret < 8 x i64> %res
5353 }
5355 define <8 x i64> @test_mask_mul_epi32_rm(<16 x i32> %a, ptr %ptr_b) {
5356 ; X86-LABEL: test_mask_mul_epi32_rm:
5357 ; X86: ## %bb.0:
5358 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5359 ; X86-NEXT: vpmuldq (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x28,0x00]
5360 ; X86-NEXT: retl ## encoding: [0xc3]
5361 ;
5362 ; X64-LABEL: test_mask_mul_epi32_rm:
5363 ; X64: ## %bb.0:
5364 ; X64-NEXT: vpmuldq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x28,0x07]
5365 ; X64-NEXT: retq ## encoding: [0xc3]
5366 %b = load <16 x i32>, ptr %ptr_b
5367 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
5368 ret < 8 x i64> %res
5369 }
5371 define <8 x i64> @test_mask_mul_epi32_rmk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
5372 ; X86-LABEL: test_mask_mul_epi32_rmk:
5373 ; X86: ## %bb.0:
5374 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5375 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5376 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5377 ; X86-NEXT: vpmuldq (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0x08]
5378 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5379 ; X86-NEXT: retl ## encoding: [0xc3]
5380 ;
5381 ; X64-LABEL: test_mask_mul_epi32_rmk:
5382 ; X64: ## %bb.0:
5383 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5384 ; X64-NEXT: vpmuldq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0x0f]
5385 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5386 ; X64-NEXT: retq ## encoding: [0xc3]
5387 %b = load <16 x i32>, ptr %ptr_b
5388 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
5389 ret < 8 x i64> %res
5390 }
5392 define <8 x i64> @test_mask_mul_epi32_rmkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
5393 ; X86-LABEL: test_mask_mul_epi32_rmkz:
5394 ; X86: ## %bb.0:
5395 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5396 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5397 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5398 ; X86-NEXT: vpmuldq (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0x00]
5399 ; X86-NEXT: retl ## encoding: [0xc3]
5400 ;
5401 ; X64-LABEL: test_mask_mul_epi32_rmkz:
5402 ; X64: ## %bb.0:
5403 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5404 ; X64-NEXT: vpmuldq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0x07]
5405 ; X64-NEXT: retq ## encoding: [0xc3]
5406 %b = load <16 x i32>, ptr %ptr_b
5407 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
5408 ret < 8 x i64> %res
5409 }
5411 define <8 x i64> @test_mask_mul_epi32_rmb(<16 x i32> %a, ptr %ptr_b) {
5412 ; X86-LABEL: test_mask_mul_epi32_rmb:
5413 ; X86: ## %bb.0:
5414 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5415 ; X86-NEXT: vpmuldq (%eax){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x58,0x28,0x00]
5416 ; X86-NEXT: retl ## encoding: [0xc3]
5417 ;
5418 ; X64-LABEL: test_mask_mul_epi32_rmb:
5419 ; X64: ## %bb.0:
5420 ; X64-NEXT: vpmuldq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x58,0x28,0x07]
5421 ; X64-NEXT: retq ## encoding: [0xc3]
5422 %q = load i64, ptr %ptr_b
5423 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
5424 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
5425 %b = bitcast <8 x i64> %b64 to <16 x i32>
5426 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
5427 ret < 8 x i64> %res
5428 }
5430 define <8 x i64> @test_mask_mul_epi32_rmbk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
5431 ; X86-LABEL: test_mask_mul_epi32_rmbk:
5432 ; X86: ## %bb.0:
5433 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5434 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5435 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5436 ; X86-NEXT: vpmuldq (%eax){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0x28,0x08]
5437 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5438 ; X86-NEXT: retl ## encoding: [0xc3]
5439 ;
5440 ; X64-LABEL: test_mask_mul_epi32_rmbk:
5441 ; X64: ## %bb.0:
5442 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5443 ; X64-NEXT: vpmuldq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0x28,0x0f]
5444 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5445 ; X64-NEXT: retq ## encoding: [0xc3]
5446 %q = load i64, ptr %ptr_b
5447 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
5448 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
5449 %b = bitcast <8 x i64> %b64 to <16 x i32>
5450 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
5451 ret < 8 x i64> %res
5452 }
5454 define <8 x i64> @test_mask_mul_epi32_rmbk_buildvector(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
5455 ; X86-LABEL: test_mask_mul_epi32_rmbk_buildvector:
5456 ; X86: ## %bb.0:
5457 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5458 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5459 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5460 ; X86-NEXT: vpmuldq (%eax){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0x28,0x08]
5461 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5462 ; X86-NEXT: retl ## encoding: [0xc3]
5463 ;
5464 ; X64-LABEL: test_mask_mul_epi32_rmbk_buildvector:
5465 ; X64: ## %bb.0:
5466 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5467 ; X64-NEXT: vpmuldq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0x28,0x0f]
5468 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5469 ; X64-NEXT: retq ## encoding: [0xc3]
5470 %q = load i64, ptr %ptr_b
5471 %vecinit.i = insertelement < 8 x i64> undef, i64 %q, i32 0
5472 %vecinit.i1 = insertelement < 8 x i64> %vecinit.i, i64 %q, i32 1
5473 %vecinit.i2 = insertelement < 8 x i64> %vecinit.i1, i64 %q, i32 2
5474 %vecinit.i3 = insertelement < 8 x i64> %vecinit.i2, i64 %q, i32 3
5475 %vecinit.i4 = insertelement < 8 x i64> %vecinit.i3, i64 %q, i32 4
5476 %vecinit.i5 = insertelement < 8 x i64> %vecinit.i4, i64 %q, i32 5
5477 %vecinit.i6 = insertelement < 8 x i64> %vecinit.i5, i64 %q, i32 6
5478 %b64 = insertelement < 8 x i64> %vecinit.i6, i64 %q, i32 7
5479 %b = bitcast <8 x i64> %b64 to <16 x i32>
5480 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
5481 ret < 8 x i64> %res
5482 }
5484 define <8 x i64> @test_mask_mul_epi32_rmbkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
5485 ; X86-LABEL: test_mask_mul_epi32_rmbkz:
5486 ; X86: ## %bb.0:
5487 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5488 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5489 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5490 ; X86-NEXT: vpmuldq (%eax){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xd9,0x28,0x00]
5491 ; X86-NEXT: retl ## encoding: [0xc3]
5492 ;
5493 ; X64-LABEL: test_mask_mul_epi32_rmbkz:
5494 ; X64: ## %bb.0:
5495 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5496 ; X64-NEXT: vpmuldq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xd9,0x28,0x07]
5497 ; X64-NEXT: retq ## encoding: [0xc3]
5498 %q = load i64, ptr %ptr_b
5499 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
5500 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
5501 %b = bitcast <8 x i64> %b64 to <16 x i32>
5502 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
5503 ret < 8 x i64> %res
5504 }
5506 define <8 x i64> @test_mask_mul_epi32_rmbkz_buildvector(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
5507 ; X86-LABEL: test_mask_mul_epi32_rmbkz_buildvector:
5508 ; X86: ## %bb.0:
5509 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5510 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5511 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5512 ; X86-NEXT: vpmuldq (%eax){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xd9,0x28,0x00]
5513 ; X86-NEXT: retl ## encoding: [0xc3]
5514 ;
5515 ; X64-LABEL: test_mask_mul_epi32_rmbkz_buildvector:
5516 ; X64: ## %bb.0:
5517 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5518 ; X64-NEXT: vpmuldq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xd9,0x28,0x07]
5519 ; X64-NEXT: retq ## encoding: [0xc3]
5520 %q = load i64, ptr %ptr_b
5521 %vecinit.i = insertelement < 8 x i64> undef, i64 %q, i32 0
5522 %vecinit.i1 = insertelement < 8 x i64> %vecinit.i, i64 %q, i32 1
5523 %vecinit.i2 = insertelement < 8 x i64> %vecinit.i1, i64 %q, i32 2
5524 %vecinit.i3 = insertelement < 8 x i64> %vecinit.i2, i64 %q, i32 3
5525 %vecinit.i4 = insertelement < 8 x i64> %vecinit.i3, i64 %q, i32 4
5526 %vecinit.i5 = insertelement < 8 x i64> %vecinit.i4, i64 %q, i32 5
5527 %vecinit.i6 = insertelement < 8 x i64> %vecinit.i5, i64 %q, i32 6
5528 %b64 = insertelement < 8 x i64> %vecinit.i6, i64 %q, i32 7
5529 %b = bitcast <8 x i64> %b64 to <16 x i32>
5530 %res = call <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
5531 ret < 8 x i64> %res
5532 }
5534 declare <8 x i64> @llvm.x86.avx512.mask.pmul.dq.512(<16 x i32>, <16 x i32>, <8 x i64>, i8)
5536 define <8 x i64> @test_mask_mul_epu32_rr(<16 x i32> %a, <16 x i32> %b) {
5537 ; CHECK-LABEL: test_mask_mul_epu32_rr:
5538 ; CHECK: ## %bb.0:
5539 ; CHECK-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf4,0xc1]
5540 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5541 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
5542 ret < 8 x i64> %res
5543 }
5545 define <8 x i64> @test_mask_mul_epu32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) {
5546 ; X86-LABEL: test_mask_mul_epu32_rrk:
5547 ; X86: ## %bb.0:
5548 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5549 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5550 ; X86-NEXT: vpmuludq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0xd1]
5551 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5552 ; X86-NEXT: retl ## encoding: [0xc3]
5553 ;
5554 ; X64-LABEL: test_mask_mul_epu32_rrk:
5555 ; X64: ## %bb.0:
5556 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5557 ; X64-NEXT: vpmuludq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0xd1]
5558 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5559 ; X64-NEXT: retq ## encoding: [0xc3]
5560 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
5561 ret < 8 x i64> %res
5562 }
5564 define <8 x i64> @test_mask_mul_epu32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) {
5565 ; X86-LABEL: test_mask_mul_epu32_rrkz:
5566 ; X86: ## %bb.0:
5567 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5568 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5569 ; X86-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0xc1]
5570 ; X86-NEXT: retl ## encoding: [0xc3]
5571 ;
5572 ; X64-LABEL: test_mask_mul_epu32_rrkz:
5573 ; X64: ## %bb.0:
5574 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5575 ; X64-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0xc1]
5576 ; X64-NEXT: retq ## encoding: [0xc3]
5577 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
5578 ret < 8 x i64> %res
5579 }
5581 define <8 x i64> @test_mask_mul_epu32_rm(<16 x i32> %a, ptr %ptr_b) {
5582 ; X86-LABEL: test_mask_mul_epu32_rm:
5583 ; X86: ## %bb.0:
5584 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5585 ; X86-NEXT: vpmuludq (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf4,0x00]
5586 ; X86-NEXT: retl ## encoding: [0xc3]
5587 ;
5588 ; X64-LABEL: test_mask_mul_epu32_rm:
5589 ; X64: ## %bb.0:
5590 ; X64-NEXT: vpmuludq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf4,0x07]
5591 ; X64-NEXT: retq ## encoding: [0xc3]
5592 %b = load <16 x i32>, ptr %ptr_b
5593 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
5594 ret < 8 x i64> %res
5595 }
5597 define <8 x i64> @test_mask_mul_epu32_rmk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
5598 ; X86-LABEL: test_mask_mul_epu32_rmk:
5599 ; X86: ## %bb.0:
5600 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5601 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5602 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5603 ; X86-NEXT: vpmuludq (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0x08]
5604 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5605 ; X86-NEXT: retl ## encoding: [0xc3]
5606 ;
5607 ; X64-LABEL: test_mask_mul_epu32_rmk:
5608 ; X64: ## %bb.0:
5609 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5610 ; X64-NEXT: vpmuludq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0x0f]
5611 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5612 ; X64-NEXT: retq ## encoding: [0xc3]
5613 %b = load <16 x i32>, ptr %ptr_b
5614 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
5615 ret < 8 x i64> %res
5616 }
5618 define <8 x i64> @test_mask_mul_epu32_rmkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
5619 ; X86-LABEL: test_mask_mul_epu32_rmkz:
5620 ; X86: ## %bb.0:
5621 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5622 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5623 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5624 ; X86-NEXT: vpmuludq (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0x00]
5625 ; X86-NEXT: retl ## encoding: [0xc3]
5626 ;
5627 ; X64-LABEL: test_mask_mul_epu32_rmkz:
5628 ; X64: ## %bb.0:
5629 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5630 ; X64-NEXT: vpmuludq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0x07]
5631 ; X64-NEXT: retq ## encoding: [0xc3]
5632 %b = load <16 x i32>, ptr %ptr_b
5633 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
5634 ret < 8 x i64> %res
5635 }
5637 define <8 x i64> @test_mask_mul_epu32_rmb(<16 x i32> %a, ptr %ptr_b) {
5638 ; X86-LABEL: test_mask_mul_epu32_rmb:
5639 ; X86: ## %bb.0:
5640 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5641 ; X86-NEXT: vpmuludq (%eax){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xf4,0x00]
5642 ; X86-NEXT: retl ## encoding: [0xc3]
5643 ;
5644 ; X64-LABEL: test_mask_mul_epu32_rmb:
5645 ; X64: ## %bb.0:
5646 ; X64-NEXT: vpmuludq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xf4,0x07]
5647 ; X64-NEXT: retq ## encoding: [0xc3]
5648 %q = load i64, ptr %ptr_b
5649 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
5650 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
5651 %b = bitcast <8 x i64> %b64 to <16 x i32>
5652 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 -1)
5653 ret < 8 x i64> %res
5654 }
5656 define <8 x i64> @test_mask_mul_epu32_rmbk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
5657 ; X86-LABEL: test_mask_mul_epu32_rmbk:
5658 ; X86: ## %bb.0:
5659 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5660 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5661 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5662 ; X86-NEXT: vpmuludq (%eax){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xf4,0x08]
5663 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5664 ; X86-NEXT: retl ## encoding: [0xc3]
5665 ;
5666 ; X64-LABEL: test_mask_mul_epu32_rmbk:
5667 ; X64: ## %bb.0:
5668 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5669 ; X64-NEXT: vpmuludq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xf4,0x0f]
5670 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
5671 ; X64-NEXT: retq ## encoding: [0xc3]
5672 %q = load i64, ptr %ptr_b
5673 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
5674 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
5675 %b = bitcast <8 x i64> %b64 to <16 x i32>
5676 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask)
5677 ret < 8 x i64> %res
5678 }
5680 define <8 x i64> @test_mask_mul_epu32_rmbkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
5681 ; X86-LABEL: test_mask_mul_epu32_rmbkz:
5682 ; X86: ## %bb.0:
5683 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5684 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
5685 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
5686 ; X86-NEXT: vpmuludq (%eax){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xf4,0x00]
5687 ; X86-NEXT: retl ## encoding: [0xc3]
5688 ;
5689 ; X64-LABEL: test_mask_mul_epu32_rmbkz:
5690 ; X64: ## %bb.0:
5691 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
5692 ; X64-NEXT: vpmuludq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xf4,0x07]
5693 ; X64-NEXT: retq ## encoding: [0xc3]
5694 %q = load i64, ptr %ptr_b
5695 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
5696 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
5697 %b = bitcast <8 x i64> %b64 to <16 x i32>
5698 %res = call <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b, <8 x i64> zeroinitializer, i8 %mask)
5699 ret < 8 x i64> %res
5700 }
5702 declare <8 x i64> @llvm.x86.avx512.mask.pmulu.dq.512(<16 x i32>, <16 x i32>, <8 x i64>, i8)
5704 define <4 x float> @test_mask_vextractf32x4(<4 x float> %b, <16 x float> %a, i8 %mask) {
5705 ; X86-LABEL: test_mask_vextractf32x4:
5706 ; X86: ## %bb.0:
5707 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5708 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5709 ; X86-NEXT: vextractf32x4 $2, %zmm1, %xmm0 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x19,0xc8,0x02]
5710 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
5711 ; X86-NEXT: retl ## encoding: [0xc3]
5712 ;
5713 ; X64-LABEL: test_mask_vextractf32x4:
5714 ; X64: ## %bb.0:
5715 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5716 ; X64-NEXT: vextractf32x4 $2, %zmm1, %xmm0 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x19,0xc8,0x02]
5717 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
5718 ; X64-NEXT: retq ## encoding: [0xc3]
5719 %res = call <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float> %a, i32 2, <4 x float> %b, i8 %mask)
5720 ret <4 x float> %res
5721 }
5723 declare <4 x float> @llvm.x86.avx512.mask.vextractf32x4.512(<16 x float>, i32, <4 x float>, i8)
5725 define <4 x i64> @test_mask_vextracti64x4(<4 x i64> %b, <8 x i64> %a, i8 %mask) {
5726 ; X86-LABEL: test_mask_vextracti64x4:
5727 ; X86: ## %bb.0:
5728 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5729 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5730 ; X86-NEXT: vextracti64x4 $1, %zmm1, %ymm0 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x3b,0xc8,0x01]
5731 ; X86-NEXT: retl ## encoding: [0xc3]
5732 ;
5733 ; X64-LABEL: test_mask_vextracti64x4:
5734 ; X64: ## %bb.0:
5735 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5736 ; X64-NEXT: vextracti64x4 $1, %zmm1, %ymm0 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x3b,0xc8,0x01]
5737 ; X64-NEXT: retq ## encoding: [0xc3]
5738 %res = call <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64> %a, i32 1, <4 x i64> %b, i8 %mask)
5739 ret <4 x i64> %res
5740 }
5742 declare <4 x i64> @llvm.x86.avx512.mask.vextracti64x4.512(<8 x i64>, i32, <4 x i64>, i8)
5744 define <4 x i32> @test_maskz_vextracti32x4(<16 x i32> %a, i8 %mask) {
5745 ; X86-LABEL: test_maskz_vextracti32x4:
5746 ; X86: ## %bb.0:
5747 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5748 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5749 ; X86-NEXT: vextracti32x4 $2, %zmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x39,0xc0,0x02]
5750 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
5751 ; X86-NEXT: retl ## encoding: [0xc3]
5752 ;
5753 ; X64-LABEL: test_maskz_vextracti32x4:
5754 ; X64: ## %bb.0:
5755 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5756 ; X64-NEXT: vextracti32x4 $2, %zmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x39,0xc0,0x02]
5757 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
5758 ; X64-NEXT: retq ## encoding: [0xc3]
5759 %res = call <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32> %a, i32 2, <4 x i32> zeroinitializer, i8 %mask)
5760 ret <4 x i32> %res
5761 }
5763 declare <4 x i32> @llvm.x86.avx512.mask.vextracti32x4.512(<16 x i32>, i32, <4 x i32>, i8)
5765 define <4 x double> @test_vextractf64x4(<8 x double> %a) {
5766 ; CHECK-LABEL: test_vextractf64x4:
5767 ; CHECK: ## %bb.0:
5768 ; CHECK-NEXT: vextractf64x4 $1, %zmm0, %ymm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x1b,0xc0,0x01]
5769 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5770 %res = call <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double> %a, i32 1, <4 x double> zeroinitializer, i8 -1)
5771 ret <4 x double> %res
5772 }
5774 declare <4 x double> @llvm.x86.avx512.mask.vextractf64x4.512(<8 x double>, i32, <4 x double>, i8)
5776 declare <16 x float> @llvm.x86.avx512.mask.insertf32x4.512(<16 x float>, <4 x float>, i32, <16 x float>, i16)
5778 define <16 x float>@test_int_x86_avx512_insertf32x4_512(<16 x float> %x0, <4 x float> %x1, <16 x float> %x3) {
5779 ; CHECK-LABEL: test_int_x86_avx512_insertf32x4_512:
5780 ; CHECK: ## %bb.0:
5781 ; CHECK-NEXT: vinsertf32x4 $1, %xmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0x7d,0x48,0x18,0xc1,0x01]
5782 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5783 %res = call <16 x float> @llvm.x86.avx512.mask.insertf32x4.512(<16 x float> %x0, <4 x float> %x1, i32 1, <16 x float> %x3, i16 -1)
5784 ret <16 x float> %res
5785 }
5787 define <16 x float>@test_int_x86_avx512_mask_insertf32x4_512(<16 x float> %x0, <4 x float> %x1, <16 x float> %x3, i16 %x4) {
5788 ; X86-LABEL: test_int_x86_avx512_mask_insertf32x4_512:
5789 ; X86: ## %bb.0:
5790 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5791 ; X86-NEXT: vinsertf32x4 $1, %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x18,0xd1,0x01]
5792 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
5793 ; X86-NEXT: retl ## encoding: [0xc3]
5794 ;
5795 ; X64-LABEL: test_int_x86_avx512_mask_insertf32x4_512:
5796 ; X64: ## %bb.0:
5797 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5798 ; X64-NEXT: vinsertf32x4 $1, %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x18,0xd1,0x01]
5799 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
5800 ; X64-NEXT: retq ## encoding: [0xc3]
5801 %res = call <16 x float> @llvm.x86.avx512.mask.insertf32x4.512(<16 x float> %x0, <4 x float> %x1, i32 1, <16 x float> %x3, i16 %x4)
5802 ret <16 x float> %res
5803 }
5805 define <16 x float>@test_int_x86_avx512_maskz_insertf32x4_512(<16 x float> %x0, <4 x float> %x1, i16 %x4) {
5806 ; X86-LABEL: test_int_x86_avx512_maskz_insertf32x4_512:
5807 ; X86: ## %bb.0:
5808 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5809 ; X86-NEXT: vinsertf32x4 $1, %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x18,0xc1,0x01]
5810 ; X86-NEXT: retl ## encoding: [0xc3]
5811 ;
5812 ; X64-LABEL: test_int_x86_avx512_maskz_insertf32x4_512:
5813 ; X64: ## %bb.0:
5814 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5815 ; X64-NEXT: vinsertf32x4 $1, %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x18,0xc1,0x01]
5816 ; X64-NEXT: retq ## encoding: [0xc3]
5817 %res = call <16 x float> @llvm.x86.avx512.mask.insertf32x4.512(<16 x float> %x0, <4 x float> %x1, i32 1, <16 x float> zeroinitializer, i16 %x4)
5818 ret <16 x float> %res
5819 }
5821 declare <16 x i32> @llvm.x86.avx512.mask.inserti32x4.512(<16 x i32>, <4 x i32>, i32, <16 x i32>, i16)
5823 define <16 x i32>@test_int_x86_avx512_inserti32x4_512(<16 x i32> %x0, <4 x i32> %x1, <16 x i32> %x3, i16 %x4) {
5824 ; CHECK-LABEL: test_int_x86_avx512_inserti32x4_512:
5825 ; CHECK: ## %bb.0:
5826 ; CHECK-NEXT: vinsertf32x4 $1, %xmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0x7d,0x48,0x18,0xc1,0x01]
5827 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5828 %res = call <16 x i32> @llvm.x86.avx512.mask.inserti32x4.512(<16 x i32> %x0, <4 x i32> %x1, i32 1, <16 x i32> %x3, i16 -1)
5829 ret <16 x i32> %res
5830 }
5832 define <16 x i32>@test_int_x86_avx512_mask_inserti32x4_512(<16 x i32> %x0, <4 x i32> %x1, <16 x i32> %x3, i16 %x4) {
5833 ; X86-LABEL: test_int_x86_avx512_mask_inserti32x4_512:
5834 ; X86: ## %bb.0:
5835 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5836 ; X86-NEXT: vinserti32x4 $1, %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x38,0xd1,0x01]
5837 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5838 ; X86-NEXT: retl ## encoding: [0xc3]
5839 ;
5840 ; X64-LABEL: test_int_x86_avx512_mask_inserti32x4_512:
5841 ; X64: ## %bb.0:
5842 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5843 ; X64-NEXT: vinserti32x4 $1, %xmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x38,0xd1,0x01]
5844 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5845 ; X64-NEXT: retq ## encoding: [0xc3]
5846 %res = call <16 x i32> @llvm.x86.avx512.mask.inserti32x4.512(<16 x i32> %x0, <4 x i32> %x1, i32 1, <16 x i32> %x3, i16 %x4)
5847 ret <16 x i32> %res
5848 }
5850 define <16 x i32>@test_int_x86_avx512_maskz_inserti32x4_512(<16 x i32> %x0, <4 x i32> %x1, i16 %x4) {
5851 ; X86-LABEL: test_int_x86_avx512_maskz_inserti32x4_512:
5852 ; X86: ## %bb.0:
5853 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
5854 ; X86-NEXT: vinserti32x4 $1, %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x38,0xc1,0x01]
5855 ; X86-NEXT: retl ## encoding: [0xc3]
5856 ;
5857 ; X64-LABEL: test_int_x86_avx512_maskz_inserti32x4_512:
5858 ; X64: ## %bb.0:
5859 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5860 ; X64-NEXT: vinserti32x4 $1, %xmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x7d,0xc9,0x38,0xc1,0x01]
5861 ; X64-NEXT: retq ## encoding: [0xc3]
5862 %res = call <16 x i32> @llvm.x86.avx512.mask.inserti32x4.512(<16 x i32> %x0, <4 x i32> %x1, i32 1, <16 x i32> zeroinitializer, i16 %x4)
5863 ret <16 x i32> %res
5864 }
5866 declare <8 x double> @llvm.x86.avx512.mask.insertf64x4.512(<8 x double>, <4 x double>, i32, <8 x double>, i8)
5868 define <8 x double>@test_int_x86_avx512_insertf64x4_512(<8 x double> %x0, <4 x double> %x1, <8 x double> %x3) {
5869 ; CHECK-LABEL: test_int_x86_avx512_insertf64x4_512:
5870 ; CHECK: ## %bb.0:
5871 ; CHECK-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x1a,0xc1,0x01]
5872 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5873 %res = call <8 x double> @llvm.x86.avx512.mask.insertf64x4.512(<8 x double> %x0, <4 x double> %x1, i32 1, <8 x double> %x3, i8 -1)
5874 ret <8 x double> %res
5875 }
5877 define <8 x double>@test_int_x86_avx512_mask_insertf64x4_512(<8 x double> %x0, <4 x double> %x1, <8 x double> %x3, i8 %x4) {
5878 ; X86-LABEL: test_int_x86_avx512_mask_insertf64x4_512:
5879 ; X86: ## %bb.0:
5880 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5881 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5882 ; X86-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1a,0xd1,0x01]
5883 ; X86-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
5884 ; X86-NEXT: retl ## encoding: [0xc3]
5885 ;
5886 ; X64-LABEL: test_int_x86_avx512_mask_insertf64x4_512:
5887 ; X64: ## %bb.0:
5888 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5889 ; X64-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1a,0xd1,0x01]
5890 ; X64-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
5891 ; X64-NEXT: retq ## encoding: [0xc3]
5892 %res = call <8 x double> @llvm.x86.avx512.mask.insertf64x4.512(<8 x double> %x0, <4 x double> %x1, i32 1, <8 x double> %x3, i8 %x4)
5893 ret <8 x double> %res
5894 }
5896 define <8 x double>@test_int_x86_avx512_maskz_insertf64x4_512(<8 x double> %x0, <4 x double> %x1, i8 %x4) {
5897 ; X86-LABEL: test_int_x86_avx512_maskz_insertf64x4_512:
5898 ; X86: ## %bb.0:
5899 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5900 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5901 ; X86-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x1a,0xc1,0x01]
5902 ; X86-NEXT: retl ## encoding: [0xc3]
5903 ;
5904 ; X64-LABEL: test_int_x86_avx512_maskz_insertf64x4_512:
5905 ; X64: ## %bb.0:
5906 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5907 ; X64-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x1a,0xc1,0x01]
5908 ; X64-NEXT: retq ## encoding: [0xc3]
5909 %res = call <8 x double> @llvm.x86.avx512.mask.insertf64x4.512(<8 x double> %x0, <4 x double> %x1, i32 1, <8 x double> zeroinitializer, i8 %x4)
5910 ret <8 x double> %res
5911 }
5913 declare <8 x i64> @llvm.x86.avx512.mask.inserti64x4.512(<8 x i64>, <4 x i64>, i32, <8 x i64>, i8)
5915 define <8 x i64>@test_int_x86_avx512_inserti64x4_512(<8 x i64> %x0, <4 x i64> %x1, <8 x i64> %x3) {
5916 ; CHECK-LABEL: test_int_x86_avx512_inserti64x4_512:
5917 ; CHECK: ## %bb.0:
5918 ; CHECK-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x1a,0xc1,0x01]
5919 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
5920 %res = call <8 x i64> @llvm.x86.avx512.mask.inserti64x4.512(<8 x i64> %x0, <4 x i64> %x1, i32 1, <8 x i64> %x3, i8 -1)
5921 ret <8 x i64> %res
5922 }
5924 define <8 x i64>@test_int_x86_avx512_mask_inserti64x4_512(<8 x i64> %x0, <4 x i64> %x1, <8 x i64> %x3, i8 %x4) {
5925 ; X86-LABEL: test_int_x86_avx512_mask_inserti64x4_512:
5926 ; X86: ## %bb.0:
5927 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5928 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5929 ; X86-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x3a,0xd1,0x01]
5930 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5931 ; X86-NEXT: retl ## encoding: [0xc3]
5932 ;
5933 ; X64-LABEL: test_int_x86_avx512_mask_inserti64x4_512:
5934 ; X64: ## %bb.0:
5935 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5936 ; X64-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x3a,0xd1,0x01]
5937 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
5938 ; X64-NEXT: retq ## encoding: [0xc3]
5939 %res = call <8 x i64> @llvm.x86.avx512.mask.inserti64x4.512(<8 x i64> %x0, <4 x i64> %x1, i32 1, <8 x i64> %x3, i8 %x4)
5940 ret <8 x i64> %res
5941 }
5943 define <8 x i64>@test_int_x86_avx512_maskz_inserti64x4_512(<8 x i64> %x0, <4 x i64> %x1, i8 %x4) {
5944 ; X86-LABEL: test_int_x86_avx512_maskz_inserti64x4_512:
5945 ; X86: ## %bb.0:
5946 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
5947 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
5948 ; X86-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x3a,0xc1,0x01]
5949 ; X86-NEXT: retl ## encoding: [0xc3]
5950 ;
5951 ; X64-LABEL: test_int_x86_avx512_maskz_inserti64x4_512:
5952 ; X64: ## %bb.0:
5953 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
5954 ; X64-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x3a,0xc1,0x01]
5955 ; X64-NEXT: retq ## encoding: [0xc3]
5956 %res = call <8 x i64> @llvm.x86.avx512.mask.inserti64x4.512(<8 x i64> %x0, <4 x i64> %x1, i32 1, <8 x i64> zeroinitializer, i8 %x4)
5957 ret <8 x i64> %res
5958 }
5960 define <8 x i64> @test_x86_avx512_movntdqa(ptr %a0) {
5961 ; X86-LABEL: test_x86_avx512_movntdqa:
5962 ; X86: ## %bb.0:
5963 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
5964 ; X86-NEXT: vmovntdqa (%eax), %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x2a,0x00]
5965 ; X86-NEXT: retl ## encoding: [0xc3]
5966 ;
5967 ; X64-LABEL: test_x86_avx512_movntdqa:
5968 ; X64: ## %bb.0:
5969 ; X64-NEXT: vmovntdqa (%rdi), %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x2a,0x07]
5970 ; X64-NEXT: retq ## encoding: [0xc3]
5971 %res = call <8 x i64> @llvm.x86.avx512.movntdqa(ptr %a0)
5972 ret <8 x i64> %res
5973 }
5975 declare <8 x i64> @llvm.x86.avx512.movntdqa(ptr) nounwind readonly
5977 define <8 x i16> @test_cmp_d_512(<16 x i32> %a0, <16 x i32> %a1) {
5978 ; CHECK-LABEL: test_cmp_d_512:
5979 ; CHECK: ## %bb.0:
5980 ; CHECK-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7d,0x48,0x76,0xc1]
5981 ; CHECK-NEXT: vpcmpgtd %zmm0, %zmm1, %k1 ## encoding: [0x62,0xf1,0x75,0x48,0x66,0xc8]
5982 ; CHECK-NEXT: vpcmpled %zmm1, %zmm0, %k2 ## encoding: [0x62,0xf3,0x7d,0x48,0x1f,0xd1,0x02]
5983 ; CHECK-NEXT: vpcmpneqd %zmm1, %zmm0, %k3 ## encoding: [0x62,0xf3,0x7d,0x48,0x1f,0xd9,0x04]
5984 ; CHECK-NEXT: vpcmpnltd %zmm1, %zmm0, %k4 ## encoding: [0x62,0xf3,0x7d,0x48,0x1f,0xe1,0x05]
5985 ; CHECK-NEXT: vpcmpgtd %zmm1, %zmm0, %k5 ## encoding: [0x62,0xf1,0x7d,0x48,0x66,0xe9]
5986 ; CHECK-NEXT: kmovw %k1, %eax ## encoding: [0xc5,0xf8,0x93,0xc1]
5987 ; CHECK-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
5988 ; CHECK-NEXT: vmovd %ecx, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc1]
5989 ; CHECK-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x01]
5990 ; CHECK-NEXT: kmovw %k2, %eax ## encoding: [0xc5,0xf8,0x93,0xc2]
5991 ; CHECK-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x02]
5992 ; CHECK-NEXT: kmovw %k3, %eax ## encoding: [0xc5,0xf8,0x93,0xc3]
5993 ; CHECK-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x04]
5994 ; CHECK-NEXT: kmovw %k4, %eax ## encoding: [0xc5,0xf8,0x93,0xc4]
5995 ; CHECK-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x05]
5996 ; CHECK-NEXT: kmovw %k5, %eax ## encoding: [0xc5,0xf8,0x93,0xc5]
5997 ; CHECK-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x06]
5998 ; CHECK-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x76,0xc9]
5999 ; CHECK-NEXT: vpblendw $128, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0e,0xc1,0x80]
6000 ; CHECK-NEXT: ## xmm0 = xmm0[0,1,2,3,4,5,6],xmm1[7]
6001 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6002 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
6003 %res0 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 -1)
6004 %vec0 = insertelement <8 x i16> undef, i16 %res0, i32 0
6005 %res1 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 -1)
6006 %vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 1
6007 %res2 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 -1)
6008 %vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 2
6009 %res3 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 -1)
6010 %vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 3
6011 %res4 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 -1)
6012 %vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 4
6013 %res5 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 -1)
6014 %vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 5
6015 %res6 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 -1)
6016 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
6017 %res7 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 -1)
6018 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
6019 ret <8 x i16> %vec7
6020 }
6022 define <8 x i16> @test_mask_cmp_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
6023 ; X86-LABEL: test_mask_cmp_d_512:
6024 ; X86: ## %bb.0:
6025 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6026 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6027 ; X86-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x76,0xc1]
6028 ; X86-NEXT: vpcmpgtd %zmm0, %zmm1, %k2 {%k1} ## encoding: [0x62,0xf1,0x75,0x49,0x66,0xd0]
6029 ; X86-NEXT: vpcmpled %zmm1, %zmm0, %k3 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1f,0xd9,0x02]
6030 ; X86-NEXT: vpcmpneqd %zmm1, %zmm0, %k4 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1f,0xe1,0x04]
6031 ; X86-NEXT: vpcmpnltd %zmm1, %zmm0, %k5 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1f,0xe9,0x05]
6032 ; X86-NEXT: vpcmpgtd %zmm1, %zmm0, %k1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x66,0xc9]
6033 ; X86-NEXT: kmovw %k2, %ecx ## encoding: [0xc5,0xf8,0x93,0xca]
6034 ; X86-NEXT: kmovw %k0, %edx ## encoding: [0xc5,0xf8,0x93,0xd0]
6035 ; X86-NEXT: vmovd %edx, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc2]
6036 ; X86-NEXT: vpinsrw $1, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x01]
6037 ; X86-NEXT: kmovw %k3, %ecx ## encoding: [0xc5,0xf8,0x93,0xcb]
6038 ; X86-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x02]
6039 ; X86-NEXT: kmovw %k4, %ecx ## encoding: [0xc5,0xf8,0x93,0xcc]
6040 ; X86-NEXT: vpinsrw $4, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x04]
6041 ; X86-NEXT: kmovw %k5, %ecx ## encoding: [0xc5,0xf8,0x93,0xcd]
6042 ; X86-NEXT: vpinsrw $5, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x05]
6043 ; X86-NEXT: kmovw %k1, %ecx ## encoding: [0xc5,0xf8,0x93,0xc9]
6044 ; X86-NEXT: vpinsrw $6, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x06]
6045 ; X86-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x07]
6046 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6047 ; X86-NEXT: retl ## encoding: [0xc3]
6048 ;
6049 ; X64-LABEL: test_mask_cmp_d_512:
6050 ; X64: ## %bb.0:
6051 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6052 ; X64-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x76,0xc1]
6053 ; X64-NEXT: vpcmpgtd %zmm0, %zmm1, %k2 {%k1} ## encoding: [0x62,0xf1,0x75,0x49,0x66,0xd0]
6054 ; X64-NEXT: vpcmpled %zmm1, %zmm0, %k3 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1f,0xd9,0x02]
6055 ; X64-NEXT: vpcmpneqd %zmm1, %zmm0, %k4 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1f,0xe1,0x04]
6056 ; X64-NEXT: vpcmpnltd %zmm1, %zmm0, %k5 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1f,0xe9,0x05]
6057 ; X64-NEXT: vpcmpgtd %zmm1, %zmm0, %k1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x66,0xc9]
6058 ; X64-NEXT: kmovw %k2, %eax ## encoding: [0xc5,0xf8,0x93,0xc2]
6059 ; X64-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6060 ; X64-NEXT: vmovd %ecx, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc1]
6061 ; X64-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x01]
6062 ; X64-NEXT: kmovw %k3, %eax ## encoding: [0xc5,0xf8,0x93,0xc3]
6063 ; X64-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x02]
6064 ; X64-NEXT: kmovw %k4, %eax ## encoding: [0xc5,0xf8,0x93,0xc4]
6065 ; X64-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x04]
6066 ; X64-NEXT: kmovw %k5, %eax ## encoding: [0xc5,0xf8,0x93,0xc5]
6067 ; X64-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x05]
6068 ; X64-NEXT: kmovw %k1, %eax ## encoding: [0xc5,0xf8,0x93,0xc1]
6069 ; X64-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x06]
6070 ; X64-NEXT: vpinsrw $7, %edi, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc7,0x07]
6071 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6072 ; X64-NEXT: retq ## encoding: [0xc3]
6073 %res0 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 %mask)
6074 %vec0 = insertelement <8 x i16> undef, i16 %res0, i32 0
6075 %res1 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 %mask)
6076 %vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 1
6077 %res2 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 %mask)
6078 %vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 2
6079 %res3 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 %mask)
6080 %vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 3
6081 %res4 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 %mask)
6082 %vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 4
6083 %res5 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 %mask)
6084 %vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 5
6085 %res6 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 %mask)
6086 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
6087 %res7 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 %mask)
6088 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
6089 ret <8 x i16> %vec7
6090 }
6092 declare i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32>, <16 x i32>, i32, i16) nounwind readnone
6094 define <8 x i16> @test_ucmp_d_512(<16 x i32> %a0, <16 x i32> %a1) {
6095 ; CHECK-LABEL: test_ucmp_d_512:
6096 ; CHECK: ## %bb.0:
6097 ; CHECK-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7d,0x48,0x76,0xc1]
6098 ; CHECK-NEXT: vpcmpltud %zmm1, %zmm0, %k1 ## encoding: [0x62,0xf3,0x7d,0x48,0x1e,0xc9,0x01]
6099 ; CHECK-NEXT: vpcmpleud %zmm1, %zmm0, %k2 ## encoding: [0x62,0xf3,0x7d,0x48,0x1e,0xd1,0x02]
6100 ; CHECK-NEXT: vpcmpneqd %zmm1, %zmm0, %k3 ## encoding: [0x62,0xf3,0x7d,0x48,0x1f,0xd9,0x04]
6101 ; CHECK-NEXT: vpcmpnltud %zmm1, %zmm0, %k4 ## encoding: [0x62,0xf3,0x7d,0x48,0x1e,0xe1,0x05]
6102 ; CHECK-NEXT: vpcmpnleud %zmm1, %zmm0, %k5 ## encoding: [0x62,0xf3,0x7d,0x48,0x1e,0xe9,0x06]
6103 ; CHECK-NEXT: kmovw %k1, %eax ## encoding: [0xc5,0xf8,0x93,0xc1]
6104 ; CHECK-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6105 ; CHECK-NEXT: vmovd %ecx, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc1]
6106 ; CHECK-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x01]
6107 ; CHECK-NEXT: kmovw %k2, %eax ## encoding: [0xc5,0xf8,0x93,0xc2]
6108 ; CHECK-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x02]
6109 ; CHECK-NEXT: kmovw %k3, %eax ## encoding: [0xc5,0xf8,0x93,0xc3]
6110 ; CHECK-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x04]
6111 ; CHECK-NEXT: kmovw %k4, %eax ## encoding: [0xc5,0xf8,0x93,0xc4]
6112 ; CHECK-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x05]
6113 ; CHECK-NEXT: kmovw %k5, %eax ## encoding: [0xc5,0xf8,0x93,0xc5]
6114 ; CHECK-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x06]
6115 ; CHECK-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 ## encoding: [0xc5,0xf1,0x76,0xc9]
6116 ; CHECK-NEXT: vpblendw $128, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0e,0xc1,0x80]
6117 ; CHECK-NEXT: ## xmm0 = xmm0[0,1,2,3,4,5,6],xmm1[7]
6118 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6119 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
6120 %res0 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 -1)
6121 %vec0 = insertelement <8 x i16> undef, i16 %res0, i32 0
6122 %res1 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 -1)
6123 %vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 1
6124 %res2 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 -1)
6125 %vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 2
6126 %res3 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 -1)
6127 %vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 3
6128 %res4 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 -1)
6129 %vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 4
6130 %res5 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 -1)
6131 %vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 5
6132 %res6 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 -1)
6133 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
6134 %res7 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 -1)
6135 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
6136 ret <8 x i16> %vec7
6137 }
6139 define <8 x i16> @test_mask_ucmp_d_512(<16 x i32> %a0, <16 x i32> %a1, i16 %mask) {
6140 ; X86-LABEL: test_mask_ucmp_d_512:
6141 ; X86: ## %bb.0:
6142 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6143 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6144 ; X86-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x76,0xc1]
6145 ; X86-NEXT: vpcmpltud %zmm1, %zmm0, %k2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1e,0xd1,0x01]
6146 ; X86-NEXT: vpcmpleud %zmm1, %zmm0, %k3 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1e,0xd9,0x02]
6147 ; X86-NEXT: vpcmpneqd %zmm1, %zmm0, %k4 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1f,0xe1,0x04]
6148 ; X86-NEXT: vpcmpnltud %zmm1, %zmm0, %k5 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1e,0xe9,0x05]
6149 ; X86-NEXT: vpcmpnleud %zmm1, %zmm0, %k1 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1e,0xc9,0x06]
6150 ; X86-NEXT: kmovw %k2, %ecx ## encoding: [0xc5,0xf8,0x93,0xca]
6151 ; X86-NEXT: kmovw %k0, %edx ## encoding: [0xc5,0xf8,0x93,0xd0]
6152 ; X86-NEXT: vmovd %edx, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc2]
6153 ; X86-NEXT: vpinsrw $1, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x01]
6154 ; X86-NEXT: kmovw %k3, %ecx ## encoding: [0xc5,0xf8,0x93,0xcb]
6155 ; X86-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x02]
6156 ; X86-NEXT: kmovw %k4, %ecx ## encoding: [0xc5,0xf8,0x93,0xcc]
6157 ; X86-NEXT: vpinsrw $4, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x04]
6158 ; X86-NEXT: kmovw %k5, %ecx ## encoding: [0xc5,0xf8,0x93,0xcd]
6159 ; X86-NEXT: vpinsrw $5, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x05]
6160 ; X86-NEXT: kmovw %k1, %ecx ## encoding: [0xc5,0xf8,0x93,0xc9]
6161 ; X86-NEXT: vpinsrw $6, %ecx, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc1,0x06]
6162 ; X86-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x07]
6163 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6164 ; X86-NEXT: retl ## encoding: [0xc3]
6165 ;
6166 ; X64-LABEL: test_mask_ucmp_d_512:
6167 ; X64: ## %bb.0:
6168 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6169 ; X64-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x76,0xc1]
6170 ; X64-NEXT: vpcmpltud %zmm1, %zmm0, %k2 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1e,0xd1,0x01]
6171 ; X64-NEXT: vpcmpleud %zmm1, %zmm0, %k3 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1e,0xd9,0x02]
6172 ; X64-NEXT: vpcmpneqd %zmm1, %zmm0, %k4 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1f,0xe1,0x04]
6173 ; X64-NEXT: vpcmpnltud %zmm1, %zmm0, %k5 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1e,0xe9,0x05]
6174 ; X64-NEXT: vpcmpnleud %zmm1, %zmm0, %k1 {%k1} ## encoding: [0x62,0xf3,0x7d,0x49,0x1e,0xc9,0x06]
6175 ; X64-NEXT: kmovw %k2, %eax ## encoding: [0xc5,0xf8,0x93,0xc2]
6176 ; X64-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6177 ; X64-NEXT: vmovd %ecx, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc1]
6178 ; X64-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x01]
6179 ; X64-NEXT: kmovw %k3, %eax ## encoding: [0xc5,0xf8,0x93,0xc3]
6180 ; X64-NEXT: vpinsrw $2, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x02]
6181 ; X64-NEXT: kmovw %k4, %eax ## encoding: [0xc5,0xf8,0x93,0xc4]
6182 ; X64-NEXT: vpinsrw $4, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x04]
6183 ; X64-NEXT: kmovw %k5, %eax ## encoding: [0xc5,0xf8,0x93,0xc5]
6184 ; X64-NEXT: vpinsrw $5, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x05]
6185 ; X64-NEXT: kmovw %k1, %eax ## encoding: [0xc5,0xf8,0x93,0xc1]
6186 ; X64-NEXT: vpinsrw $6, %eax, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc0,0x06]
6187 ; X64-NEXT: vpinsrw $7, %edi, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc4,0xc7,0x07]
6188 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6189 ; X64-NEXT: retq ## encoding: [0xc3]
6190 %res0 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 0, i16 %mask)
6191 %vec0 = insertelement <8 x i16> undef, i16 %res0, i32 0
6192 %res1 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 1, i16 %mask)
6193 %vec1 = insertelement <8 x i16> %vec0, i16 %res1, i32 1
6194 %res2 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 2, i16 %mask)
6195 %vec2 = insertelement <8 x i16> %vec1, i16 %res2, i32 2
6196 %res3 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 3, i16 %mask)
6197 %vec3 = insertelement <8 x i16> %vec2, i16 %res3, i32 3
6198 %res4 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 4, i16 %mask)
6199 %vec4 = insertelement <8 x i16> %vec3, i16 %res4, i32 4
6200 %res5 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 5, i16 %mask)
6201 %vec5 = insertelement <8 x i16> %vec4, i16 %res5, i32 5
6202 %res6 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 6, i16 %mask)
6203 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
6204 %res7 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i32 7, i16 %mask)
6205 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
6206 ret <8 x i16> %vec7
6207 }
6209 declare i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32>, <16 x i32>, i32, i16) nounwind readnone
6211 define <8 x i8> @test_cmp_q_512(<8 x i64> %a0, <8 x i64> %a1) {
6212 ; CHECK-LABEL: test_cmp_q_512:
6213 ; CHECK: ## %bb.0:
6214 ; CHECK-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x29,0xc1]
6215 ; CHECK-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
6216 ; CHECK-NEXT: vpcmpgtq %zmm0, %zmm1, %k0 ## encoding: [0x62,0xf2,0xf5,0x48,0x37,0xc0]
6217 ; CHECK-NEXT: vpcmpleq %zmm1, %zmm0, %k1 ## encoding: [0x62,0xf3,0xfd,0x48,0x1f,0xc9,0x02]
6218 ; CHECK-NEXT: vpcmpneqq %zmm1, %zmm0, %k2 ## encoding: [0x62,0xf3,0xfd,0x48,0x1f,0xd1,0x04]
6219 ; CHECK-NEXT: vpcmpnltq %zmm1, %zmm0, %k3 ## encoding: [0x62,0xf3,0xfd,0x48,0x1f,0xd9,0x05]
6220 ; CHECK-NEXT: vpcmpgtq %zmm1, %zmm0, %k4 ## encoding: [0x62,0xf2,0xfd,0x48,0x37,0xe1]
6221 ; CHECK-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6222 ; CHECK-NEXT: movzbl %al, %eax ## encoding: [0x0f,0xb6,0xc0]
6223 ; CHECK-NEXT: vmovd %eax, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc0]
6224 ; CHECK-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x01]
6225 ; CHECK-NEXT: kmovw %k1, %eax ## encoding: [0xc5,0xf8,0x93,0xc1]
6226 ; CHECK-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x02]
6227 ; CHECK-NEXT: kmovw %k2, %eax ## encoding: [0xc5,0xf8,0x93,0xc2]
6228 ; CHECK-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x04]
6229 ; CHECK-NEXT: kmovw %k3, %eax ## encoding: [0xc5,0xf8,0x93,0xc3]
6230 ; CHECK-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x05]
6231 ; CHECK-NEXT: kmovw %k4, %eax ## encoding: [0xc5,0xf8,0x93,0xc4]
6232 ; CHECK-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x06]
6233 ; CHECK-NEXT: movl $255, %eax ## encoding: [0xb8,0xff,0x00,0x00,0x00]
6234 ; CHECK-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x07]
6235 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6236 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
6237 %res0 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 -1)
6238 %vec0 = insertelement <8 x i8> undef, i8 %res0, i32 0
6239 %res1 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 -1)
6240 %vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 1
6241 %res2 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 -1)
6242 %vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 2
6243 %res3 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 -1)
6244 %vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 3
6245 %res4 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 -1)
6246 %vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 4
6247 %res5 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 -1)
6248 %vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 5
6249 %res6 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 -1)
6250 %vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 6
6251 %res7 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 -1)
6252 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
6253 ret <8 x i8> %vec7
6254 }
6256 define <8 x i8> @test_mask_cmp_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
6257 ; X86-LABEL: test_mask_cmp_q_512:
6258 ; X86: ## %bb.0:
6259 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6260 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6261 ; X86-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x29,0xc1]
6262 ; X86-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6263 ; X86-NEXT: vpcmpgtq %zmm0, %zmm1, %k0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x37,0xc0]
6264 ; X86-NEXT: vpcmpleq %zmm1, %zmm0, %k2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1f,0xd1,0x02]
6265 ; X86-NEXT: vpcmpneqq %zmm1, %zmm0, %k3 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1f,0xd9,0x04]
6266 ; X86-NEXT: vpcmpnltq %zmm1, %zmm0, %k4 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1f,0xe1,0x05]
6267 ; X86-NEXT: vpcmpgtq %zmm1, %zmm0, %k1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x37,0xc9]
6268 ; X86-NEXT: kmovw %k0, %edx ## encoding: [0xc5,0xf8,0x93,0xd0]
6269 ; X86-NEXT: movzbl %cl, %ecx ## encoding: [0x0f,0xb6,0xc9]
6270 ; X86-NEXT: vmovd %ecx, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc1]
6271 ; X86-NEXT: vpinsrb $1, %edx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc2,0x01]
6272 ; X86-NEXT: kmovw %k2, %ecx ## encoding: [0xc5,0xf8,0x93,0xca]
6273 ; X86-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x02]
6274 ; X86-NEXT: kmovw %k3, %ecx ## encoding: [0xc5,0xf8,0x93,0xcb]
6275 ; X86-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x04]
6276 ; X86-NEXT: kmovw %k4, %ecx ## encoding: [0xc5,0xf8,0x93,0xcc]
6277 ; X86-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x05]
6278 ; X86-NEXT: kmovw %k1, %ecx ## encoding: [0xc5,0xf8,0x93,0xc9]
6279 ; X86-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x06]
6280 ; X86-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x07]
6281 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6282 ; X86-NEXT: retl ## encoding: [0xc3]
6283 ;
6284 ; X64-LABEL: test_mask_cmp_q_512:
6285 ; X64: ## %bb.0:
6286 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6287 ; X64-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x29,0xc1]
6288 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
6289 ; X64-NEXT: vpcmpgtq %zmm0, %zmm1, %k0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x37,0xc0]
6290 ; X64-NEXT: vpcmpleq %zmm1, %zmm0, %k2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1f,0xd1,0x02]
6291 ; X64-NEXT: vpcmpneqq %zmm1, %zmm0, %k3 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1f,0xd9,0x04]
6292 ; X64-NEXT: vpcmpnltq %zmm1, %zmm0, %k4 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1f,0xe1,0x05]
6293 ; X64-NEXT: vpcmpgtq %zmm1, %zmm0, %k1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x37,0xc9]
6294 ; X64-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6295 ; X64-NEXT: movzbl %al, %eax ## encoding: [0x0f,0xb6,0xc0]
6296 ; X64-NEXT: vmovd %eax, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc0]
6297 ; X64-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x01]
6298 ; X64-NEXT: kmovw %k2, %eax ## encoding: [0xc5,0xf8,0x93,0xc2]
6299 ; X64-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x02]
6300 ; X64-NEXT: kmovw %k3, %eax ## encoding: [0xc5,0xf8,0x93,0xc3]
6301 ; X64-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x04]
6302 ; X64-NEXT: kmovw %k4, %eax ## encoding: [0xc5,0xf8,0x93,0xc4]
6303 ; X64-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x05]
6304 ; X64-NEXT: kmovw %k1, %eax ## encoding: [0xc5,0xf8,0x93,0xc1]
6305 ; X64-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x06]
6306 ; X64-NEXT: vpinsrb $7, %edi, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc7,0x07]
6307 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6308 ; X64-NEXT: retq ## encoding: [0xc3]
6309 %res0 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 %mask)
6310 %vec0 = insertelement <8 x i8> undef, i8 %res0, i32 0
6311 %res1 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 %mask)
6312 %vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 1
6313 %res2 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 %mask)
6314 %vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 2
6315 %res3 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 %mask)
6316 %vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 3
6317 %res4 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 %mask)
6318 %vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 4
6319 %res5 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 %mask)
6320 %vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 5
6321 %res6 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 %mask)
6322 %vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 6
6323 %res7 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 %mask)
6324 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
6325 ret <8 x i8> %vec7
6326 }
6328 declare i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64>, <8 x i64>, i32, i8) nounwind readnone
6330 define <8 x i8> @test_ucmp_q_512(<8 x i64> %a0, <8 x i64> %a1) {
6331 ; CHECK-LABEL: test_ucmp_q_512:
6332 ; CHECK: ## %bb.0:
6333 ; CHECK-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x29,0xc1]
6334 ; CHECK-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
6335 ; CHECK-NEXT: vpcmpltuq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf3,0xfd,0x48,0x1e,0xc1,0x01]
6336 ; CHECK-NEXT: vpcmpleuq %zmm1, %zmm0, %k1 ## encoding: [0x62,0xf3,0xfd,0x48,0x1e,0xc9,0x02]
6337 ; CHECK-NEXT: vpcmpneqq %zmm1, %zmm0, %k2 ## encoding: [0x62,0xf3,0xfd,0x48,0x1f,0xd1,0x04]
6338 ; CHECK-NEXT: vpcmpnltuq %zmm1, %zmm0, %k3 ## encoding: [0x62,0xf3,0xfd,0x48,0x1e,0xd9,0x05]
6339 ; CHECK-NEXT: vpcmpnleuq %zmm1, %zmm0, %k4 ## encoding: [0x62,0xf3,0xfd,0x48,0x1e,0xe1,0x06]
6340 ; CHECK-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6341 ; CHECK-NEXT: movzbl %al, %eax ## encoding: [0x0f,0xb6,0xc0]
6342 ; CHECK-NEXT: vmovd %eax, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc0]
6343 ; CHECK-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x01]
6344 ; CHECK-NEXT: kmovw %k1, %eax ## encoding: [0xc5,0xf8,0x93,0xc1]
6345 ; CHECK-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x02]
6346 ; CHECK-NEXT: kmovw %k2, %eax ## encoding: [0xc5,0xf8,0x93,0xc2]
6347 ; CHECK-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x04]
6348 ; CHECK-NEXT: kmovw %k3, %eax ## encoding: [0xc5,0xf8,0x93,0xc3]
6349 ; CHECK-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x05]
6350 ; CHECK-NEXT: kmovw %k4, %eax ## encoding: [0xc5,0xf8,0x93,0xc4]
6351 ; CHECK-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x06]
6352 ; CHECK-NEXT: movl $255, %eax ## encoding: [0xb8,0xff,0x00,0x00,0x00]
6353 ; CHECK-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x07]
6354 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6355 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
6356 %res0 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 -1)
6357 %vec0 = insertelement <8 x i8> undef, i8 %res0, i32 0
6358 %res1 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 -1)
6359 %vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 1
6360 %res2 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 -1)
6361 %vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 2
6362 %res3 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 -1)
6363 %vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 3
6364 %res4 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 -1)
6365 %vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 4
6366 %res5 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 -1)
6367 %vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 5
6368 %res6 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 -1)
6369 %vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 6
6370 %res7 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 -1)
6371 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
6372 ret <8 x i8> %vec7
6373 }
6375 define <8 x i8> @test_mask_ucmp_q_512(<8 x i64> %a0, <8 x i64> %a1, i8 %mask) {
6376 ; X86-LABEL: test_mask_ucmp_q_512:
6377 ; X86: ## %bb.0:
6378 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6379 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6380 ; X86-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x29,0xc1]
6381 ; X86-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6382 ; X86-NEXT: vpcmpltuq %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1e,0xc1,0x01]
6383 ; X86-NEXT: vpcmpleuq %zmm1, %zmm0, %k2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1e,0xd1,0x02]
6384 ; X86-NEXT: vpcmpneqq %zmm1, %zmm0, %k3 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1f,0xd9,0x04]
6385 ; X86-NEXT: vpcmpnltuq %zmm1, %zmm0, %k4 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1e,0xe1,0x05]
6386 ; X86-NEXT: vpcmpnleuq %zmm1, %zmm0, %k1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1e,0xc9,0x06]
6387 ; X86-NEXT: kmovw %k0, %edx ## encoding: [0xc5,0xf8,0x93,0xd0]
6388 ; X86-NEXT: movzbl %cl, %ecx ## encoding: [0x0f,0xb6,0xc9]
6389 ; X86-NEXT: vmovd %ecx, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc1]
6390 ; X86-NEXT: vpinsrb $1, %edx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc2,0x01]
6391 ; X86-NEXT: kmovw %k2, %ecx ## encoding: [0xc5,0xf8,0x93,0xca]
6392 ; X86-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x02]
6393 ; X86-NEXT: kmovw %k3, %ecx ## encoding: [0xc5,0xf8,0x93,0xcb]
6394 ; X86-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x04]
6395 ; X86-NEXT: kmovw %k4, %ecx ## encoding: [0xc5,0xf8,0x93,0xcc]
6396 ; X86-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x05]
6397 ; X86-NEXT: kmovw %k1, %ecx ## encoding: [0xc5,0xf8,0x93,0xc9]
6398 ; X86-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x06]
6399 ; X86-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x07]
6400 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6401 ; X86-NEXT: retl ## encoding: [0xc3]
6402 ;
6403 ; X64-LABEL: test_mask_ucmp_q_512:
6404 ; X64: ## %bb.0:
6405 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6406 ; X64-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x29,0xc1]
6407 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
6408 ; X64-NEXT: vpcmpltuq %zmm1, %zmm0, %k0 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1e,0xc1,0x01]
6409 ; X64-NEXT: vpcmpleuq %zmm1, %zmm0, %k2 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1e,0xd1,0x02]
6410 ; X64-NEXT: vpcmpneqq %zmm1, %zmm0, %k3 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1f,0xd9,0x04]
6411 ; X64-NEXT: vpcmpnltuq %zmm1, %zmm0, %k4 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1e,0xe1,0x05]
6412 ; X64-NEXT: vpcmpnleuq %zmm1, %zmm0, %k1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1e,0xc9,0x06]
6413 ; X64-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6414 ; X64-NEXT: movzbl %al, %eax ## encoding: [0x0f,0xb6,0xc0]
6415 ; X64-NEXT: vmovd %eax, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6e,0xc0]
6416 ; X64-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc1,0x01]
6417 ; X64-NEXT: kmovw %k2, %eax ## encoding: [0xc5,0xf8,0x93,0xc2]
6418 ; X64-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x02]
6419 ; X64-NEXT: kmovw %k3, %eax ## encoding: [0xc5,0xf8,0x93,0xc3]
6420 ; X64-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x04]
6421 ; X64-NEXT: kmovw %k4, %eax ## encoding: [0xc5,0xf8,0x93,0xc4]
6422 ; X64-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x05]
6423 ; X64-NEXT: kmovw %k1, %eax ## encoding: [0xc5,0xf8,0x93,0xc1]
6424 ; X64-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc0,0x06]
6425 ; X64-NEXT: vpinsrb $7, %edi, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x20,0xc7,0x07]
6426 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6427 ; X64-NEXT: retq ## encoding: [0xc3]
6428 %res0 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 0, i8 %mask)
6429 %vec0 = insertelement <8 x i8> undef, i8 %res0, i32 0
6430 %res1 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 1, i8 %mask)
6431 %vec1 = insertelement <8 x i8> %vec0, i8 %res1, i32 1
6432 %res2 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 2, i8 %mask)
6433 %vec2 = insertelement <8 x i8> %vec1, i8 %res2, i32 2
6434 %res3 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 3, i8 %mask)
6435 %vec3 = insertelement <8 x i8> %vec2, i8 %res3, i32 3
6436 %res4 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 4, i8 %mask)
6437 %vec4 = insertelement <8 x i8> %vec3, i8 %res4, i32 4
6438 %res5 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 5, i8 %mask)
6439 %vec5 = insertelement <8 x i8> %vec4, i8 %res5, i32 5
6440 %res6 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 6, i8 %mask)
6441 %vec6 = insertelement <8 x i8> %vec5, i8 %res6, i32 6
6442 %res7 = call i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i32 7, i8 %mask)
6443 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
6444 ret <8 x i8> %vec7
6445 }
6447 declare i8 @llvm.x86.avx512.mask.ucmp.q.512(<8 x i64>, <8 x i64>, i32, i8) nounwind readnone
6449 declare <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float>, <16 x float>, i16)
6451 define <16 x float>@test_int_x86_avx512_mask_broadcastf32x4_512(<4 x float> %x0, <16 x float> %x2, i16 %mask) {
6452 ; X86-LABEL: test_int_x86_avx512_mask_broadcastf32x4_512:
6453 ; X86: ## %bb.0:
6454 ; X86-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0
6455 ; X86-NEXT: vshuff64x2 $0, %zmm0, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x23,0xc0,0x00]
6456 ; X86-NEXT: ## zmm0 = zmm0[0,1,0,1,0,1,0,1]
6457 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
6458 ; X86-NEXT: vmovaps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x28,0xc8]
6459 ; X86-NEXT: vmovaps %zmm0, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x28,0xd0]
6460 ; X86-NEXT: vaddps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x58,0xc1]
6461 ; X86-NEXT: vaddps %zmm0, %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x6c,0x48,0x58,0xc0]
6462 ; X86-NEXT: retl ## encoding: [0xc3]
6463 ;
6464 ; X64-LABEL: test_int_x86_avx512_mask_broadcastf32x4_512:
6465 ; X64: ## %bb.0:
6466 ; X64-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0
6467 ; X64-NEXT: vshuff64x2 $0, %zmm0, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x23,0xc0,0x00]
6468 ; X64-NEXT: ## zmm0 = zmm0[0,1,0,1,0,1,0,1]
6469 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6470 ; X64-NEXT: vmovaps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x28,0xc8]
6471 ; X64-NEXT: vmovaps %zmm0, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x28,0xd0]
6472 ; X64-NEXT: vaddps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x58,0xc1]
6473 ; X64-NEXT: vaddps %zmm0, %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x6c,0x48,0x58,0xc0]
6474 ; X64-NEXT: retq ## encoding: [0xc3]
6476 %res1 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 -1)
6477 %res2 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 %mask)
6478 %res3 = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> zeroinitializer, i16 %mask)
6479 %res4 = fadd <16 x float> %res1, %res2
6480 %res5 = fadd <16 x float> %res3, %res4
6481 ret <16 x float> %res5
6482 }
6484 define <16 x float>@test_int_x86_avx512_mask_broadcastf32x4_512_load(ptr %x0ptr, <16 x float> %x2, i16 %mask) {
6485 ; X86-LABEL: test_int_x86_avx512_mask_broadcastf32x4_512_load:
6486 ; X86: ## %bb.0:
6487 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6488 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
6489 ; X86-NEXT: vbroadcastf32x4 (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x1a,0x00]
6490 ; X86-NEXT: ## zmm0 {%k1} = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
6491 ; X86-NEXT: retl ## encoding: [0xc3]
6492 ;
6493 ; X64-LABEL: test_int_x86_avx512_mask_broadcastf32x4_512_load:
6494 ; X64: ## %bb.0:
6495 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
6496 ; X64-NEXT: vbroadcastf32x4 (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x1a,0x07]
6497 ; X64-NEXT: ## zmm0 {%k1} = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
6498 ; X64-NEXT: retq ## encoding: [0xc3]
6499 %x0 = load <4 x float>, ptr %x0ptr
6500 %res = call <16 x float> @llvm.x86.avx512.mask.broadcastf32x4.512(<4 x float> %x0, <16 x float> %x2, i16 %mask)
6501 ret <16 x float> %res
6502 }
6504 declare <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double>, <8 x double>, i8)
6506 define <8 x double>@test_int_x86_avx512_broadcastf64x4_512(<4 x double> %x0, <8 x double> %x2) {
6507 ; CHECK-LABEL: test_int_x86_avx512_broadcastf64x4_512:
6508 ; CHECK: ## %bb.0:
6509 ; CHECK-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6510 ; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x1a,0xc0,0x01]
6511 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
6513 %res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 -1)
6514 ret <8 x double> %res
6515 }
6517 define <8 x double>@test_int_x86_avx512_mask_broadcastf64x4_512(<4 x double> %x0, <8 x double> %x2, i8 %mask) {
6518 ; X86-LABEL: test_int_x86_avx512_mask_broadcastf64x4_512:
6519 ; X86: ## %bb.0:
6520 ; X86-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6521 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
6522 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6523 ; X86-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1a,0xc8,0x01]
6524 ; X86-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
6525 ; X86-NEXT: retl ## encoding: [0xc3]
6526 ;
6527 ; X64-LABEL: test_int_x86_avx512_mask_broadcastf64x4_512:
6528 ; X64: ## %bb.0:
6529 ; X64-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6530 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6531 ; X64-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x1a,0xc8,0x01]
6532 ; X64-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
6533 ; X64-NEXT: retq ## encoding: [0xc3]
6535 %res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 %mask)
6536 ret <8 x double> %res
6537 }
6539 define <8 x double>@test_int_x86_avx512_maskz_broadcastf64x4_512(<4 x double> %x0, i8 %mask) {
6540 ; X86-LABEL: test_int_x86_avx512_maskz_broadcastf64x4_512:
6541 ; X86: ## %bb.0:
6542 ; X86-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6543 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
6544 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6545 ; X86-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x1a,0xc0,0x01]
6546 ; X86-NEXT: retl ## encoding: [0xc3]
6547 ;
6548 ; X64-LABEL: test_int_x86_avx512_maskz_broadcastf64x4_512:
6549 ; X64: ## %bb.0:
6550 ; X64-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6551 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6552 ; X64-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x1a,0xc0,0x01]
6553 ; X64-NEXT: retq ## encoding: [0xc3]
6555 %res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> zeroinitializer, i8 %mask)
6556 ret <8 x double> %res
6557 }
6559 define <8 x double>@test_int_x86_avx512_mask_broadcastf64x4_512_load(ptr %x0ptr, <8 x double> %x2, i8 %mask) {
6560 ; X86-LABEL: test_int_x86_avx512_mask_broadcastf64x4_512_load:
6561 ; X86: ## %bb.0:
6562 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6563 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
6564 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
6565 ; X86-NEXT: vbroadcastf64x4 (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x1b,0x00]
6566 ; X86-NEXT: ## zmm0 {%k1} = mem[0,1,2,3,0,1,2,3]
6567 ; X86-NEXT: retl ## encoding: [0xc3]
6568 ;
6569 ; X64-LABEL: test_int_x86_avx512_mask_broadcastf64x4_512_load:
6570 ; X64: ## %bb.0:
6571 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
6572 ; X64-NEXT: vbroadcastf64x4 (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x1b,0x07]
6573 ; X64-NEXT: ## zmm0 {%k1} = mem[0,1,2,3,0,1,2,3]
6574 ; X64-NEXT: retq ## encoding: [0xc3]
6576 %x0 = load <4 x double>, ptr %x0ptr
6577 %res = call <8 x double> @llvm.x86.avx512.mask.broadcastf64x4.512(<4 x double> %x0, <8 x double> %x2, i8 %mask)
6578 ret <8 x double> %res
6579 }
6581 declare <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32>, <16 x i32>, i16)
6583 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_broadcasti32x4_512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask) {
6584 ; X86-LABEL: test_int_x86_avx512_mask_broadcasti32x4_512:
6585 ; X86: ## %bb.0:
6586 ; X86-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0
6587 ; X86-NEXT: vshufi64x2 $0, %zmm0, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
6588 ; X86-NEXT: ## zmm0 = zmm0[0,1,0,1,0,1,0,1]
6589 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
6590 ; X86-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x6f,0xc8]
6591 ; X86-NEXT: vmovdqa32 %zmm0, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x6f,0xd0]
6592 ; X86-NEXT: retl ## encoding: [0xc3]
6593 ;
6594 ; X64-LABEL: test_int_x86_avx512_mask_broadcasti32x4_512:
6595 ; X64: ## %bb.0:
6596 ; X64-NEXT: ## kill: def $xmm0 killed $xmm0 def $zmm0
6597 ; X64-NEXT: vshufi64x2 $0, %zmm0, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
6598 ; X64-NEXT: ## zmm0 = zmm0[0,1,0,1,0,1,0,1]
6599 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6600 ; X64-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7d,0x49,0x6f,0xc8]
6601 ; X64-NEXT: vmovdqa32 %zmm0, %zmm2 {%k1} {z} ## encoding: [0x62,0xf1,0x7d,0xc9,0x6f,0xd0]
6602 ; X64-NEXT: retq ## encoding: [0xc3]
6603 %res0 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 -1)
6604 %res1 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask)
6605 %res2 = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> zeroinitializer, i16 %mask)
6606 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
6607 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 1
6608 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 2
6609 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
6610 }
6612 define <16 x i32>@test_int_x86_avx512_mask_broadcasti32x4_512_load(ptr %x0ptr, <16 x i32> %x2, i16 %mask) {
6613 ; X86-LABEL: test_int_x86_avx512_mask_broadcasti32x4_512_load:
6614 ; X86: ## %bb.0:
6615 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6616 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
6617 ; X86-NEXT: vbroadcasti32x4 (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x5a,0x00]
6618 ; X86-NEXT: ## zmm0 {%k1} = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
6619 ; X86-NEXT: retl ## encoding: [0xc3]
6620 ;
6621 ; X64-LABEL: test_int_x86_avx512_mask_broadcasti32x4_512_load:
6622 ; X64: ## %bb.0:
6623 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
6624 ; X64-NEXT: vbroadcasti32x4 (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x5a,0x07]
6625 ; X64-NEXT: ## zmm0 {%k1} = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
6626 ; X64-NEXT: retq ## encoding: [0xc3]
6628 %x0 = load <4 x i32>, ptr %x0ptr
6629 %res = call <16 x i32> @llvm.x86.avx512.mask.broadcasti32x4.512(<4 x i32> %x0, <16 x i32> %x2, i16 %mask)
6630 ret <16 x i32> %res
6631 }
6633 declare <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64>, <8 x i64>, i8)
6635 define <8 x i64>@test_int_x86_avx512_broadcasti64x4_512(<4 x i64> %x0, <8 x i64> %x2) {
6636 ; CHECK-LABEL: test_int_x86_avx512_broadcasti64x4_512:
6637 ; CHECK: ## %bb.0:
6638 ; CHECK-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6639 ; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 ## encoding: [0x62,0xf3,0xfd,0x48,0x1a,0xc0,0x01]
6640 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
6642 %res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 -1)
6643 ret <8 x i64> %res
6644 }
6646 define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x4_512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask) {
6647 ; X86-LABEL: test_int_x86_avx512_mask_broadcasti64x4_512:
6648 ; X86: ## %bb.0:
6649 ; X86-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6650 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
6651 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6652 ; X86-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x3a,0xc8,0x01]
6653 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
6654 ; X86-NEXT: retl ## encoding: [0xc3]
6655 ;
6656 ; X64-LABEL: test_int_x86_avx512_mask_broadcasti64x4_512:
6657 ; X64: ## %bb.0:
6658 ; X64-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6659 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6660 ; X64-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf3,0xfd,0x49,0x3a,0xc8,0x01]
6661 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
6662 ; X64-NEXT: retq ## encoding: [0xc3]
6664 %res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask)
6665 ret <8 x i64> %res
6666 }
6668 define <8 x i64>@test_int_x86_avx512_maskz_broadcasti64x4_512(<4 x i64> %x0, i8 %mask) {
6669 ; X86-LABEL: test_int_x86_avx512_maskz_broadcasti64x4_512:
6670 ; X86: ## %bb.0:
6671 ; X86-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6672 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
6673 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6674 ; X86-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x3a,0xc0,0x01]
6675 ; X86-NEXT: retl ## encoding: [0xc3]
6676 ;
6677 ; X64-LABEL: test_int_x86_avx512_maskz_broadcasti64x4_512:
6678 ; X64: ## %bb.0:
6679 ; X64-NEXT: ## kill: def $ymm0 killed $ymm0 def $zmm0
6680 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6681 ; X64-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xfd,0xc9,0x3a,0xc0,0x01]
6682 ; X64-NEXT: retq ## encoding: [0xc3]
6684 %res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> zeroinitializer, i8 %mask)
6685 ret <8 x i64> %res
6686 }
6688 define <8 x i64>@test_int_x86_avx512_mask_broadcasti64x4_512_load(ptr %x0ptr, <8 x i64> %x2, i8 %mask) {
6689 ; X86-LABEL: test_int_x86_avx512_mask_broadcasti64x4_512_load:
6690 ; X86: ## %bb.0:
6691 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6692 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
6693 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
6694 ; X86-NEXT: vbroadcasti64x4 (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x5b,0x00]
6695 ; X86-NEXT: ## zmm0 {%k1} = mem[0,1,2,3,0,1,2,3]
6696 ; X86-NEXT: retl ## encoding: [0xc3]
6697 ;
6698 ; X64-LABEL: test_int_x86_avx512_mask_broadcasti64x4_512_load:
6699 ; X64: ## %bb.0:
6700 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
6701 ; X64-NEXT: vbroadcasti64x4 (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x5b,0x07]
6702 ; X64-NEXT: ## zmm0 {%k1} = mem[0,1,2,3,0,1,2,3]
6703 ; X64-NEXT: retq ## encoding: [0xc3]
6705 %x0 = load <4 x i64>, ptr %x0ptr
6706 %res = call <8 x i64> @llvm.x86.avx512.mask.broadcasti64x4.512(<4 x i64> %x0, <8 x i64> %x2, i8 %mask)
6707 ret <8 x i64> %res
6708 }
6710 declare <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32>, <16 x i32>, i16)
6712 define <16 x i32>@test_int_x86_avx512_pabs_d_512(<16 x i32> %x0, <16 x i32> %x1) {
6713 ; CHECK-LABEL: test_int_x86_avx512_pabs_d_512:
6714 ; CHECK: ## %bb.0:
6715 ; CHECK-NEXT: vpabsd %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x1e,0xc0]
6716 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
6717 %res = call <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32> %x0, <16 x i32> %x1, i16 -1)
6718 ret <16 x i32> %res
6719 }
6721 define <16 x i32>@test_int_x86_avx512_mask_pabs_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2) {
6722 ; X86-LABEL: test_int_x86_avx512_mask_pabs_d_512:
6723 ; X86: ## %bb.0:
6724 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
6725 ; X86-NEXT: vpabsd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x1e,0xc8]
6726 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
6727 ; X86-NEXT: retl ## encoding: [0xc3]
6728 ;
6729 ; X64-LABEL: test_int_x86_avx512_mask_pabs_d_512:
6730 ; X64: ## %bb.0:
6731 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6732 ; X64-NEXT: vpabsd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x1e,0xc8]
6733 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
6734 ; X64-NEXT: retq ## encoding: [0xc3]
6735 %res = call <16 x i32> @llvm.x86.avx512.mask.pabs.d.512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2)
6736 ret <16 x i32> %res
6737 }
6739 declare <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64>, <8 x i64>, i8)
6741 define <8 x i64>@test_int_x86_avx512_pabs_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2) {
6742 ; CHECK-LABEL: test_int_x86_avx512_pabs_q_512:
6743 ; CHECK: ## %bb.0:
6744 ; CHECK-NEXT: vpabsq %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x1f,0xc0]
6745 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
6746 %res = call <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64> %x0, <8 x i64> %x1, i8 -1)
6747 ret <8 x i64> %res
6748 }
6750 define <8 x i64>@test_int_x86_avx512_mask_pabs_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2) {
6751 ; X86-LABEL: test_int_x86_avx512_mask_pabs_q_512:
6752 ; X86: ## %bb.0:
6753 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
6754 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
6755 ; X86-NEXT: vpabsq %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x1f,0xc8]
6756 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
6757 ; X86-NEXT: retl ## encoding: [0xc3]
6758 ;
6759 ; X64-LABEL: test_int_x86_avx512_mask_pabs_q_512:
6760 ; X64: ## %bb.0:
6761 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
6762 ; X64-NEXT: vpabsq %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x1f,0xc8]
6763 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
6764 ; X64-NEXT: retq ## encoding: [0xc3]
6765 %res = call <8 x i64> @llvm.x86.avx512.mask.pabs.q.512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2)
6766 ret <8 x i64> %res
6767 }
6769 define i8 @test_vptestmq(<8 x i64> %a0, <8 x i64> %a1, i8 %m) {
6770 ; X86-LABEL: test_vptestmq:
6771 ; X86: ## %bb.0:
6772 ; X86-NEXT: vptestmq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x27,0xc1]
6773 ; X86-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6774 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
6775 ; X86-NEXT: andb %cl, %al ## encoding: [0x20,0xc8]
6776 ; X86-NEXT: addb %cl, %al ## encoding: [0x00,0xc8]
6777 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6778 ; X86-NEXT: retl ## encoding: [0xc3]
6779 ;
6780 ; X64-LABEL: test_vptestmq:
6781 ; X64: ## %bb.0:
6782 ; X64-NEXT: vptestmq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfd,0x48,0x27,0xc1]
6783 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
6784 ; X64-NEXT: andb %al, %dil ## encoding: [0x40,0x20,0xc7]
6785 ; X64-NEXT: addb %dil, %al ## encoding: [0x40,0x00,0xf8]
6786 ; X64-NEXT: ## kill: def $al killed $al killed $eax
6787 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6788 ; X64-NEXT: retq ## encoding: [0xc3]
6789 %res = call i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64> %a0, <8 x i64> %a1, i8 -1)
6790 %res1 = call i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64> %a0, <8 x i64> %a1, i8 %m)
6791 %res2 = add i8 %res1, %res
6792 ret i8 %res2
6793 }
6794 declare i8 @llvm.x86.avx512.ptestm.q.512(<8 x i64>, <8 x i64>, i8)
6796 define i16 @test_vptestmd(<16 x i32> %a0, <16 x i32> %a1, i16 %m) {
6797 ; X86-LABEL: test_vptestmd:
6798 ; X86: ## %bb.0:
6799 ; X86-NEXT: vptestmd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0x7d,0x48,0x27,0xc1]
6800 ; X86-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6801 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb7,0x44,0x24,0x04]
6802 ; X86-NEXT: andw %cx, %ax ## encoding: [0x66,0x21,0xc8]
6803 ; X86-NEXT: addl %ecx, %eax ## encoding: [0x01,0xc8]
6804 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
6805 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6806 ; X86-NEXT: retl ## encoding: [0xc3]
6807 ;
6808 ; X64-LABEL: test_vptestmd:
6809 ; X64: ## %bb.0:
6810 ; X64-NEXT: vptestmd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0x7d,0x48,0x27,0xc1]
6811 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
6812 ; X64-NEXT: andl %eax, %edi ## encoding: [0x21,0xc7]
6813 ; X64-NEXT: addl %edi, %eax ## encoding: [0x01,0xf8]
6814 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
6815 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6816 ; X64-NEXT: retq ## encoding: [0xc3]
6817 %res = call i16 @llvm.x86.avx512.ptestm.d.512(<16 x i32> %a0, <16 x i32> %a1, i16 -1)
6818 %res1 = call i16 @llvm.x86.avx512.ptestm.d.512(<16 x i32> %a0, <16 x i32> %a1, i16 %m)
6819 %res2 = add i16 %res1, %res
6820 ret i16 %res2
6821 }
6822 declare i16 @llvm.x86.avx512.ptestm.d.512(<16 x i32>, <16 x i32>, i16)
6824 declare i16 @llvm.x86.avx512.ptestnm.d.512(<16 x i32>, <16 x i32>, i16 %x2)
6826 define i16@test_int_x86_avx512_ptestnm_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2) {
6827 ; X86-LABEL: test_int_x86_avx512_ptestnm_d_512:
6828 ; X86: ## %bb.0:
6829 ; X86-NEXT: vptestnmd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0x7e,0x48,0x27,0xc1]
6830 ; X86-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6831 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb7,0x44,0x24,0x04]
6832 ; X86-NEXT: andw %cx, %ax ## encoding: [0x66,0x21,0xc8]
6833 ; X86-NEXT: addl %ecx, %eax ## encoding: [0x01,0xc8]
6834 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
6835 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6836 ; X86-NEXT: retl ## encoding: [0xc3]
6837 ;
6838 ; X64-LABEL: test_int_x86_avx512_ptestnm_d_512:
6839 ; X64: ## %bb.0:
6840 ; X64-NEXT: vptestnmd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0x7e,0x48,0x27,0xc1]
6841 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
6842 ; X64-NEXT: andl %eax, %edi ## encoding: [0x21,0xc7]
6843 ; X64-NEXT: addl %edi, %eax ## encoding: [0x01,0xf8]
6844 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
6845 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6846 ; X64-NEXT: retq ## encoding: [0xc3]
6847 %res = call i16 @llvm.x86.avx512.ptestnm.d.512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2)
6848 %res1 = call i16 @llvm.x86.avx512.ptestnm.d.512(<16 x i32> %x0, <16 x i32> %x1, i16-1)
6849 %res2 = add i16 %res, %res1
6850 ret i16 %res2
6851 }
6853 declare i8 @llvm.x86.avx512.ptestnm.q.512(<8 x i64>, <8 x i64>, i8 %x2)
6855 define i8@test_int_x86_avx512_ptestnm_q_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2) {
6856 ; X86-LABEL: test_int_x86_avx512_ptestnm_q_512:
6857 ; X86: ## %bb.0:
6858 ; X86-NEXT: vptestnmq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfe,0x48,0x27,0xc1]
6859 ; X86-NEXT: kmovw %k0, %ecx ## encoding: [0xc5,0xf8,0x93,0xc8]
6860 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
6861 ; X86-NEXT: andb %cl, %al ## encoding: [0x20,0xc8]
6862 ; X86-NEXT: addb %cl, %al ## encoding: [0x00,0xc8]
6863 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6864 ; X86-NEXT: retl ## encoding: [0xc3]
6865 ;
6866 ; X64-LABEL: test_int_x86_avx512_ptestnm_q_512:
6867 ; X64: ## %bb.0:
6868 ; X64-NEXT: vptestnmq %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf2,0xfe,0x48,0x27,0xc1]
6869 ; X64-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
6870 ; X64-NEXT: andb %al, %dil ## encoding: [0x40,0x20,0xc7]
6871 ; X64-NEXT: addb %dil, %al ## encoding: [0x40,0x00,0xf8]
6872 ; X64-NEXT: ## kill: def $al killed $al killed $eax
6873 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
6874 ; X64-NEXT: retq ## encoding: [0xc3]
6875 %res = call i8 @llvm.x86.avx512.ptestnm.q.512(<8 x i64> %x0, <8 x i64> %x1, i8 %x2)
6876 %res1 = call i8 @llvm.x86.avx512.ptestnm.q.512(<8 x i64> %x0, <8 x i64> %x1, i8-1)
6877 %res2 = add i8 %res, %res1
6878 ret i8 %res2
6879 }
6881 declare i16 @llvm.x86.avx512.kand.w(i16, i16) nounwind readnone
6882 define i16 @test_kand(i16 %a0, i16 %a1) {
6883 ; X86-LABEL: test_kand:
6884 ; X86: ## %bb.0:
6885 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb7,0x44,0x24,0x04]
6886 ; X86-NEXT: andw {{[0-9]+}}(%esp), %ax ## encoding: [0x66,0x23,0x44,0x24,0x08]
6887 ; X86-NEXT: andl $8, %eax ## encoding: [0x83,0xe0,0x08]
6888 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
6889 ; X86-NEXT: retl ## encoding: [0xc3]
6890 ;
6891 ; X64-LABEL: test_kand:
6892 ; X64: ## %bb.0:
6893 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
6894 ; X64-NEXT: andl %esi, %eax ## encoding: [0x21,0xf0]
6895 ; X64-NEXT: andl $8, %eax ## encoding: [0x83,0xe0,0x08]
6896 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
6897 ; X64-NEXT: retq ## encoding: [0xc3]
6898 %t1 = call i16 @llvm.x86.avx512.kand.w(i16 %a0, i16 8)
6899 %t2 = call i16 @llvm.x86.avx512.kand.w(i16 %t1, i16 %a1)
6900 ret i16 %t2
6901 }
6903 declare i16 @llvm.x86.avx512.kandn.w(i16, i16) nounwind readnone
6904 define i16 @test_kandn(i16 %a0, i16 %a1) {
6905 ; X86-LABEL: test_kandn:
6906 ; X86: ## %bb.0:
6907 ; X86-NEXT: movl $65527, %eax ## encoding: [0xb8,0xf7,0xff,0x00,0x00]
6908 ; X86-NEXT: ## imm = 0xFFF7
6909 ; X86-NEXT: orl {{[0-9]+}}(%esp), %eax ## encoding: [0x0b,0x44,0x24,0x04]
6910 ; X86-NEXT: andw {{[0-9]+}}(%esp), %ax ## encoding: [0x66,0x23,0x44,0x24,0x08]
6911 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
6912 ; X86-NEXT: retl ## encoding: [0xc3]
6913 ;
6914 ; X64-LABEL: test_kandn:
6915 ; X64: ## %bb.0:
6916 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
6917 ; X64-NEXT: orl $-9, %eax ## encoding: [0x83,0xc8,0xf7]
6918 ; X64-NEXT: andl %esi, %eax ## encoding: [0x21,0xf0]
6919 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
6920 ; X64-NEXT: retq ## encoding: [0xc3]
6921 %t1 = call i16 @llvm.x86.avx512.kandn.w(i16 %a0, i16 8)
6922 %t2 = call i16 @llvm.x86.avx512.kandn.w(i16 %t1, i16 %a1)
6923 ret i16 %t2
6924 }
6926 declare i16 @llvm.x86.avx512.knot.w(i16) nounwind readnone
6927 define i16 @test_knot(i16 %a0) {
6928 ; X86-LABEL: test_knot:
6929 ; X86: ## %bb.0:
6930 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
6931 ; X86-NEXT: notl %eax ## encoding: [0xf7,0xd0]
6932 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
6933 ; X86-NEXT: retl ## encoding: [0xc3]
6934 ;
6935 ; X64-LABEL: test_knot:
6936 ; X64: ## %bb.0:
6937 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
6938 ; X64-NEXT: notl %eax ## encoding: [0xf7,0xd0]
6939 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
6940 ; X64-NEXT: retq ## encoding: [0xc3]
6941 %res = call i16 @llvm.x86.avx512.knot.w(i16 %a0)
6942 ret i16 %res
6943 }
6945 declare i16 @llvm.x86.avx512.kor.w(i16, i16) nounwind readnone
6946 define i16 @test_kor(i16 %a0, i16 %a1) {
6947 ; X86-LABEL: test_kor:
6948 ; X86: ## %bb.0:
6949 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb7,0x44,0x24,0x04]
6950 ; X86-NEXT: orw {{[0-9]+}}(%esp), %ax ## encoding: [0x66,0x0b,0x44,0x24,0x08]
6951 ; X86-NEXT: orl $8, %eax ## encoding: [0x83,0xc8,0x08]
6952 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
6953 ; X86-NEXT: retl ## encoding: [0xc3]
6954 ;
6955 ; X64-LABEL: test_kor:
6956 ; X64: ## %bb.0:
6957 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
6958 ; X64-NEXT: orl %esi, %eax ## encoding: [0x09,0xf0]
6959 ; X64-NEXT: orl $8, %eax ## encoding: [0x83,0xc8,0x08]
6960 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
6961 ; X64-NEXT: retq ## encoding: [0xc3]
6962 %t1 = call i16 @llvm.x86.avx512.kor.w(i16 %a0, i16 8)
6963 %t2 = call i16 @llvm.x86.avx512.kor.w(i16 %t1, i16 %a1)
6964 ret i16 %t2
6965 }
6967 declare i16 @llvm.x86.avx512.kxnor.w(i16, i16) nounwind readnone
6968 ; TODO: the two kxnor instructions here a no op and should be elimintaed,
6969 ; probably by FoldConstantArithmetic in SelectionDAG.
6970 define i16 @test_kxnor(i16 %a0, i16 %a1) {
6971 ; X86-LABEL: test_kxnor:
6972 ; X86: ## %bb.0:
6973 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb7,0x44,0x24,0x04]
6974 ; X86-NEXT: xorw {{[0-9]+}}(%esp), %ax ## encoding: [0x66,0x33,0x44,0x24,0x08]
6975 ; X86-NEXT: xorl $8, %eax ## encoding: [0x83,0xf0,0x08]
6976 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
6977 ; X86-NEXT: retl ## encoding: [0xc3]
6978 ;
6979 ; X64-LABEL: test_kxnor:
6980 ; X64: ## %bb.0:
6981 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
6982 ; X64-NEXT: xorl %esi, %eax ## encoding: [0x31,0xf0]
6983 ; X64-NEXT: xorl $8, %eax ## encoding: [0x83,0xf0,0x08]
6984 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
6985 ; X64-NEXT: retq ## encoding: [0xc3]
6986 %t1 = call i16 @llvm.x86.avx512.kxnor.w(i16 %a0, i16 8)
6987 %t2 = call i16 @llvm.x86.avx512.kxnor.w(i16 %t1, i16 %a1)
6988 ret i16 %t2
6989 }
6991 declare i16 @llvm.x86.avx512.kxor.w(i16, i16) nounwind readnone
6992 define i16 @test_kxor(i16 %a0, i16 %a1) {
6993 ; X86-LABEL: test_kxor:
6994 ; X86: ## %bb.0:
6995 ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb7,0x44,0x24,0x04]
6996 ; X86-NEXT: xorw {{[0-9]+}}(%esp), %ax ## encoding: [0x66,0x33,0x44,0x24,0x08]
6997 ; X86-NEXT: xorl $8, %eax ## encoding: [0x83,0xf0,0x08]
6998 ; X86-NEXT: ## kill: def $ax killed $ax killed $eax
6999 ; X86-NEXT: retl ## encoding: [0xc3]
7000 ;
7001 ; X64-LABEL: test_kxor:
7002 ; X64: ## %bb.0:
7003 ; X64-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
7004 ; X64-NEXT: xorl %esi, %eax ## encoding: [0x31,0xf0]
7005 ; X64-NEXT: xorl $8, %eax ## encoding: [0x83,0xf0,0x08]
7006 ; X64-NEXT: ## kill: def $ax killed $ax killed $eax
7007 ; X64-NEXT: retq ## encoding: [0xc3]
7008 %t1 = call i16 @llvm.x86.avx512.kxor.w(i16 %a0, i16 8)
7009 %t2 = call i16 @llvm.x86.avx512.kxor.w(i16 %t1, i16 %a1)
7010 ret i16 %t2
7011 }
7013 declare i32 @llvm.x86.avx512.kortestz.w(i16, i16) nounwind readnone
7014 define i32 @test_kortestz(<8 x i64> %A, <8 x i64> %B, <8 x i64> %C, <8 x i64> %D) {
7015 ; CHECK-LABEL: test_kortestz:
7016 ; CHECK: ## %bb.0: ## %entry
7017 ; CHECK-NEXT: vpcmpneqd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf3,0x7d,0x48,0x1f,0xc1,0x04]
7018 ; CHECK-NEXT: vpcmpneqd %zmm3, %zmm2, %k1 ## encoding: [0x62,0xf3,0x6d,0x48,0x1f,0xcb,0x04]
7019 ; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
7020 ; CHECK-NEXT: kortestw %k1, %k0 ## encoding: [0xc5,0xf8,0x98,0xc1]
7021 ; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
7022 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
7023 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7024 entry:
7025 %0 = bitcast <8 x i64> %A to <16 x i32>
7026 %1 = bitcast <8 x i64> %B to <16 x i32>
7027 %2 = icmp ne <16 x i32> %0, %1
7028 %3 = bitcast <8 x i64> %C to <16 x i32>
7029 %4 = bitcast <8 x i64> %D to <16 x i32>
7030 %5 = icmp ne <16 x i32> %3, %4
7031 %6 = bitcast <16 x i1> %2 to i16
7032 %7 = bitcast <16 x i1> %5 to i16
7033 %res = call i32 @llvm.x86.avx512.kortestz.w(i16 %6, i16 %7)
7034 ret i32 %res
7035 }
7037 declare i32 @llvm.x86.avx512.kortestc.w(i16, i16) nounwind readnone
7038 define i32 @test_kortestc(<8 x i64> %A, <8 x i64> %B, <8 x i64> %C, <8 x i64> %D) {
7039 ; CHECK-LABEL: test_kortestc:
7040 ; CHECK: ## %bb.0: ## %entry
7041 ; CHECK-NEXT: vpcmpneqd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf3,0x7d,0x48,0x1f,0xc1,0x04]
7042 ; CHECK-NEXT: vpcmpneqd %zmm3, %zmm2, %k1 ## encoding: [0x62,0xf3,0x6d,0x48,0x1f,0xcb,0x04]
7043 ; CHECK-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0]
7044 ; CHECK-NEXT: kortestw %k1, %k0 ## encoding: [0xc5,0xf8,0x98,0xc1]
7045 ; CHECK-NEXT: sete %al ## encoding: [0x0f,0x94,0xc0]
7046 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
7047 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7048 entry:
7049 %0 = bitcast <8 x i64> %A to <16 x i32>
7050 %1 = bitcast <8 x i64> %B to <16 x i32>
7051 %2 = icmp ne <16 x i32> %0, %1
7052 %3 = bitcast <8 x i64> %C to <16 x i32>
7053 %4 = bitcast <8 x i64> %D to <16 x i32>
7054 %5 = icmp ne <16 x i32> %3, %4
7055 %6 = bitcast <16 x i1> %2 to i16
7056 %7 = bitcast <16 x i1> %5 to i16
7057 %res = call i32 @llvm.x86.avx512.kortestz.w(i16 %6, i16 %7)
7058 ret i32 %res
7059 }
7061 define i16 @test_cmpps(<16 x float> %a, <16 x float> %b) {
7062 ; CHECK-LABEL: test_cmpps:
7063 ; CHECK: ## %bb.0:
7064 ; CHECK-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7c,0x18,0xc2,0xc1,0x02]
7065 ; CHECK-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
7066 ; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax
7067 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
7068 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7069 %res = call i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> %a, <16 x float> %b, i32 2, i16 -1, i32 8)
7070 ret i16 %res
7071 }
7072 declare i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> , <16 x float> , i32, i16, i32)
7074 define i8 @test_cmppd(<8 x double> %a, <8 x double> %b) {
7075 ; CHECK-LABEL: test_cmppd:
7076 ; CHECK: ## %bb.0:
7077 ; CHECK-NEXT: vcmpneqpd %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0xfd,0x48,0xc2,0xc1,0x04]
7078 ; CHECK-NEXT: kmovw %k0, %eax ## encoding: [0xc5,0xf8,0x93,0xc0]
7079 ; CHECK-NEXT: ## kill: def $al killed $al killed $eax
7080 ; CHECK-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
7081 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7082 %res = call i8 @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> %a, <8 x double> %b, i32 4, i8 -1, i32 4)
7083 ret i8 %res
7084 }
7085 declare i8 @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> , <8 x double> , i32, i8, i32)
7087 define <8 x i64> @test_mul_epi32_rr(<16 x i32> %a, <16 x i32> %b) {
7088 ; CHECK-LABEL: test_mul_epi32_rr:
7089 ; CHECK: ## %bb.0:
7090 ; CHECK-NEXT: vpmuldq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x28,0xc1]
7091 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7092 %res = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7093 ret < 8 x i64> %res
7094 }
7096 define <8 x i64> @test_mul_epi32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) {
7097 ; X86-LABEL: test_mul_epi32_rrk:
7098 ; X86: ## %bb.0:
7099 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7100 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7101 ; X86-NEXT: vpmuldq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0xd1]
7102 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
7103 ; X86-NEXT: retl ## encoding: [0xc3]
7104 ;
7105 ; X64-LABEL: test_mul_epi32_rrk:
7106 ; X64: ## %bb.0:
7107 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7108 ; X64-NEXT: vpmuldq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0xd1]
7109 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
7110 ; X64-NEXT: retq ## encoding: [0xc3]
7111 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7112 %mask.cast = bitcast i8 %mask to <8 x i1>
7113 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru
7114 ret < 8 x i64> %res
7115 }
7117 define <8 x i64> @test_mul_epi32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) {
7118 ; X86-LABEL: test_mul_epi32_rrkz:
7119 ; X86: ## %bb.0:
7120 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7121 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7122 ; X86-NEXT: vpmuldq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0xc1]
7123 ; X86-NEXT: retl ## encoding: [0xc3]
7124 ;
7125 ; X64-LABEL: test_mul_epi32_rrkz:
7126 ; X64: ## %bb.0:
7127 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7128 ; X64-NEXT: vpmuldq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0xc1]
7129 ; X64-NEXT: retq ## encoding: [0xc3]
7130 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7131 %mask.cast = bitcast i8 %mask to <8 x i1>
7132 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer
7133 ret < 8 x i64> %res
7134 }
7136 define <8 x i64> @test_mul_epi32_rm(<16 x i32> %a, ptr %ptr_b) {
7137 ; X86-LABEL: test_mul_epi32_rm:
7138 ; X86: ## %bb.0:
7139 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7140 ; X86-NEXT: vpmuldq (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x28,0x00]
7141 ; X86-NEXT: retl ## encoding: [0xc3]
7142 ;
7143 ; X64-LABEL: test_mul_epi32_rm:
7144 ; X64: ## %bb.0:
7145 ; X64-NEXT: vpmuldq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x28,0x07]
7146 ; X64-NEXT: retq ## encoding: [0xc3]
7147 %b = load <16 x i32>, ptr %ptr_b
7148 %res = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7149 ret < 8 x i64> %res
7150 }
7152 define <8 x i64> @test_mul_epi32_rmk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
7153 ; X86-LABEL: test_mul_epi32_rmk:
7154 ; X86: ## %bb.0:
7155 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7156 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7157 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7158 ; X86-NEXT: vpmuldq (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0x08]
7159 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7160 ; X86-NEXT: retl ## encoding: [0xc3]
7161 ;
7162 ; X64-LABEL: test_mul_epi32_rmk:
7163 ; X64: ## %bb.0:
7164 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7165 ; X64-NEXT: vpmuldq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x28,0x0f]
7166 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7167 ; X64-NEXT: retq ## encoding: [0xc3]
7168 %b = load <16 x i32>, ptr %ptr_b
7169 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7170 %mask.cast = bitcast i8 %mask to <8 x i1>
7171 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru
7172 ret < 8 x i64> %res
7173 }
7175 define <8 x i64> @test_mul_epi32_rmkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
7176 ; X86-LABEL: test_mul_epi32_rmkz:
7177 ; X86: ## %bb.0:
7178 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7179 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7180 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7181 ; X86-NEXT: vpmuldq (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0x00]
7182 ; X86-NEXT: retl ## encoding: [0xc3]
7183 ;
7184 ; X64-LABEL: test_mul_epi32_rmkz:
7185 ; X64: ## %bb.0:
7186 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7187 ; X64-NEXT: vpmuldq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x28,0x07]
7188 ; X64-NEXT: retq ## encoding: [0xc3]
7189 %b = load <16 x i32>, ptr %ptr_b
7190 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7191 %mask.cast = bitcast i8 %mask to <8 x i1>
7192 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer
7193 ret < 8 x i64> %res
7194 }
7196 define <8 x i64> @test_mul_epi32_rmb(<16 x i32> %a, ptr %ptr_b) {
7197 ; X86-LABEL: test_mul_epi32_rmb:
7198 ; X86: ## %bb.0:
7199 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7200 ; X86-NEXT: vpmuldq (%eax){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x58,0x28,0x00]
7201 ; X86-NEXT: retl ## encoding: [0xc3]
7202 ;
7203 ; X64-LABEL: test_mul_epi32_rmb:
7204 ; X64: ## %bb.0:
7205 ; X64-NEXT: vpmuldq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x58,0x28,0x07]
7206 ; X64-NEXT: retq ## encoding: [0xc3]
7207 %q = load i64, ptr %ptr_b
7208 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
7209 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
7210 %b = bitcast <8 x i64> %b64 to <16 x i32>
7211 %res = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7212 ret < 8 x i64> %res
7213 }
7215 define <8 x i64> @test_mul_epi32_rmbk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
7216 ; X86-LABEL: test_mul_epi32_rmbk:
7217 ; X86: ## %bb.0:
7218 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7219 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7220 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7221 ; X86-NEXT: vpmuldq (%eax){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0x28,0x08]
7222 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7223 ; X86-NEXT: retl ## encoding: [0xc3]
7224 ;
7225 ; X64-LABEL: test_mul_epi32_rmbk:
7226 ; X64: ## %bb.0:
7227 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7228 ; X64-NEXT: vpmuldq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0x28,0x0f]
7229 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7230 ; X64-NEXT: retq ## encoding: [0xc3]
7231 %q = load i64, ptr %ptr_b
7232 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
7233 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
7234 %b = bitcast <8 x i64> %b64 to <16 x i32>
7235 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7236 %mask.cast = bitcast i8 %mask to <8 x i1>
7237 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru
7238 ret < 8 x i64> %res
7239 }
7241 define <8 x i64> @test_mul_epi32_rmbkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
7242 ; X86-LABEL: test_mul_epi32_rmbkz:
7243 ; X86: ## %bb.0:
7244 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7245 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7246 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7247 ; X86-NEXT: vpmuldq (%eax){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xd9,0x28,0x00]
7248 ; X86-NEXT: retl ## encoding: [0xc3]
7249 ;
7250 ; X64-LABEL: test_mul_epi32_rmbkz:
7251 ; X64: ## %bb.0:
7252 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7253 ; X64-NEXT: vpmuldq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xd9,0x28,0x07]
7254 ; X64-NEXT: retq ## encoding: [0xc3]
7255 %q = load i64, ptr %ptr_b
7256 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
7257 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
7258 %b = bitcast <8 x i64> %b64 to <16 x i32>
7259 %mul = call <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32> %a, <16 x i32> %b)
7260 %mask.cast = bitcast i8 %mask to <8 x i1>
7261 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer
7262 ret < 8 x i64> %res
7263 }
7265 declare <8 x i64> @llvm.x86.avx512.pmul.dq.512(<16 x i32>, <16 x i32>)
7267 define <8 x i64> @test_mul_epu32_rr(<16 x i32> %a, <16 x i32> %b) {
7268 ; CHECK-LABEL: test_mul_epu32_rr:
7269 ; CHECK: ## %bb.0:
7270 ; CHECK-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf4,0xc1]
7271 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7272 %res = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7273 ret < 8 x i64> %res
7274 }
7276 define <8 x i64> @test_mul_epu32_rrk(<16 x i32> %a, <16 x i32> %b, <8 x i64> %passThru, i8 %mask) {
7277 ; X86-LABEL: test_mul_epu32_rrk:
7278 ; X86: ## %bb.0:
7279 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7280 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7281 ; X86-NEXT: vpmuludq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0xd1]
7282 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
7283 ; X86-NEXT: retl ## encoding: [0xc3]
7284 ;
7285 ; X64-LABEL: test_mul_epu32_rrk:
7286 ; X64: ## %bb.0:
7287 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7288 ; X64-NEXT: vpmuludq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0xd1]
7289 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
7290 ; X64-NEXT: retq ## encoding: [0xc3]
7291 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7292 %mask.cast = bitcast i8 %mask to <8 x i1>
7293 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru
7294 ret < 8 x i64> %res
7295 }
7297 define <8 x i64> @test_mul_epu32_rrkz(<16 x i32> %a, <16 x i32> %b, i8 %mask) {
7298 ; X86-LABEL: test_mul_epu32_rrkz:
7299 ; X86: ## %bb.0:
7300 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7301 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7302 ; X86-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0xc1]
7303 ; X86-NEXT: retl ## encoding: [0xc3]
7304 ;
7305 ; X64-LABEL: test_mul_epu32_rrkz:
7306 ; X64: ## %bb.0:
7307 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7308 ; X64-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0xc1]
7309 ; X64-NEXT: retq ## encoding: [0xc3]
7310 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7311 %mask.cast = bitcast i8 %mask to <8 x i1>
7312 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer
7313 ret < 8 x i64> %res
7314 }
7316 define <8 x i64> @test_mul_epu32_rm(<16 x i32> %a, ptr %ptr_b) {
7317 ; X86-LABEL: test_mul_epu32_rm:
7318 ; X86: ## %bb.0:
7319 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7320 ; X86-NEXT: vpmuludq (%eax), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf4,0x00]
7321 ; X86-NEXT: retl ## encoding: [0xc3]
7322 ;
7323 ; X64-LABEL: test_mul_epu32_rm:
7324 ; X64: ## %bb.0:
7325 ; X64-NEXT: vpmuludq (%rdi), %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0xf4,0x07]
7326 ; X64-NEXT: retq ## encoding: [0xc3]
7327 %b = load <16 x i32>, ptr %ptr_b
7328 %res = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7329 ret < 8 x i64> %res
7330 }
7332 define <8 x i64> @test_mul_epu32_rmk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
7333 ; X86-LABEL: test_mul_epu32_rmk:
7334 ; X86: ## %bb.0:
7335 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7336 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7337 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7338 ; X86-NEXT: vpmuludq (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0x08]
7339 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7340 ; X86-NEXT: retl ## encoding: [0xc3]
7341 ;
7342 ; X64-LABEL: test_mul_epu32_rmk:
7343 ; X64: ## %bb.0:
7344 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7345 ; X64-NEXT: vpmuludq (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0xf4,0x0f]
7346 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7347 ; X64-NEXT: retq ## encoding: [0xc3]
7348 %b = load <16 x i32>, ptr %ptr_b
7349 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7350 %mask.cast = bitcast i8 %mask to <8 x i1>
7351 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru
7352 ret < 8 x i64> %res
7353 }
7355 define <8 x i64> @test_mul_epu32_rmkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
7356 ; X86-LABEL: test_mul_epu32_rmkz:
7357 ; X86: ## %bb.0:
7358 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7359 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7360 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7361 ; X86-NEXT: vpmuludq (%eax), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0x00]
7362 ; X86-NEXT: retl ## encoding: [0xc3]
7363 ;
7364 ; X64-LABEL: test_mul_epu32_rmkz:
7365 ; X64: ## %bb.0:
7366 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7367 ; X64-NEXT: vpmuludq (%rdi), %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0xf4,0x07]
7368 ; X64-NEXT: retq ## encoding: [0xc3]
7369 %b = load <16 x i32>, ptr %ptr_b
7370 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7371 %mask.cast = bitcast i8 %mask to <8 x i1>
7372 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer
7373 ret < 8 x i64> %res
7374 }
7376 define <8 x i64> @test_mul_epu32_rmb(<16 x i32> %a, ptr %ptr_b) {
7377 ; X86-LABEL: test_mul_epu32_rmb:
7378 ; X86: ## %bb.0:
7379 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7380 ; X86-NEXT: vpmuludq (%eax){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xf4,0x00]
7381 ; X86-NEXT: retl ## encoding: [0xc3]
7382 ;
7383 ; X64-LABEL: test_mul_epu32_rmb:
7384 ; X64: ## %bb.0:
7385 ; X64-NEXT: vpmuludq (%rdi){1to8}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x58,0xf4,0x07]
7386 ; X64-NEXT: retq ## encoding: [0xc3]
7387 %q = load i64, ptr %ptr_b
7388 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
7389 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
7390 %b = bitcast <8 x i64> %b64 to <16 x i32>
7391 %res = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7392 ret < 8 x i64> %res
7393 }
7395 define <8 x i64> @test_mul_epu32_rmbk(<16 x i32> %a, ptr %ptr_b, <8 x i64> %passThru, i8 %mask) {
7396 ; X86-LABEL: test_mul_epu32_rmbk:
7397 ; X86: ## %bb.0:
7398 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7399 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7400 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7401 ; X86-NEXT: vpmuludq (%eax){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xf4,0x08]
7402 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7403 ; X86-NEXT: retl ## encoding: [0xc3]
7404 ;
7405 ; X64-LABEL: test_mul_epu32_rmbk:
7406 ; X64: ## %bb.0:
7407 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7408 ; X64-NEXT: vpmuludq (%rdi){1to8}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x59,0xf4,0x0f]
7409 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7410 ; X64-NEXT: retq ## encoding: [0xc3]
7411 %q = load i64, ptr %ptr_b
7412 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
7413 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
7414 %b = bitcast <8 x i64> %b64 to <16 x i32>
7415 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7416 %mask.cast = bitcast i8 %mask to <8 x i1>
7417 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> %passThru
7418 ret < 8 x i64> %res
7419 }
7421 define <8 x i64> @test_mul_epu32_rmbkz(<16 x i32> %a, ptr %ptr_b, i8 %mask) {
7422 ; X86-LABEL: test_mul_epu32_rmbkz:
7423 ; X86: ## %bb.0:
7424 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7425 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7426 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7427 ; X86-NEXT: vpmuludq (%eax){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xf4,0x00]
7428 ; X86-NEXT: retl ## encoding: [0xc3]
7429 ;
7430 ; X64-LABEL: test_mul_epu32_rmbkz:
7431 ; X64: ## %bb.0:
7432 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7433 ; X64-NEXT: vpmuludq (%rdi){1to8}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0xf4,0x07]
7434 ; X64-NEXT: retq ## encoding: [0xc3]
7435 %q = load i64, ptr %ptr_b
7436 %vecinit.i = insertelement <8 x i64> undef, i64 %q, i32 0
7437 %b64 = shufflevector <8 x i64> %vecinit.i, <8 x i64> undef, <8 x i32> zeroinitializer
7438 %b = bitcast <8 x i64> %b64 to <16 x i32>
7439 %mul = call <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32> %a, <16 x i32> %b)
7440 %mask.cast = bitcast i8 %mask to <8 x i1>
7441 %res = select <8 x i1> %mask.cast, <8 x i64> %mul, <8 x i64> zeroinitializer
7442 ret < 8 x i64> %res
7443 }
7445 declare <8 x i64> @llvm.x86.avx512.pmulu.dq.512(<16 x i32>, <16 x i32>)
7447 define <2 x double> @test_x86_avx512_mm_cvtu32_sd(<2 x double> %a, i32 %b)
7448 ; X86-LABEL: test_x86_avx512_mm_cvtu32_sd:
7449 ; X86: ## %bb.0:
7450 ; X86-NEXT: vcvtusi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x7b,0x44,0x24,0x01]
7451 ; X86-NEXT: retl ## encoding: [0xc3]
7452 ;
7453 ; X64-LABEL: test_x86_avx512_mm_cvtu32_sd:
7454 ; X64: ## %bb.0:
7455 ; X64-NEXT: vcvtusi2sd %edi, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0x7f,0x08,0x7b,0xc7]
7456 ; X64-NEXT: retq ## encoding: [0xc3]
7457 {
7458 %res = call <2 x double> @llvm.x86.avx512.cvtusi2sd(<2 x double> %a, i32 %b) ; <<<2 x double>> [#uses=1]
7459 ret <2 x double> %res
7460 }
7461 declare <2 x double> @llvm.x86.avx512.cvtusi2sd(<2 x double>, i32) nounwind readnone
7463 define <16 x float> @test_x86_vbroadcast_ss_512(ptr %a0) {
7464 ; X86-LABEL: test_x86_vbroadcast_ss_512:
7465 ; X86: ## %bb.0:
7466 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7467 ; X86-NEXT: vbroadcastss (%eax), %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x18,0x00]
7468 ; X86-NEXT: retl ## encoding: [0xc3]
7469 ;
7470 ; X64-LABEL: test_x86_vbroadcast_ss_512:
7471 ; X64: ## %bb.0:
7472 ; X64-NEXT: vbroadcastss (%rdi), %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x18,0x07]
7473 ; X64-NEXT: retq ## encoding: [0xc3]
7474 %res = call <16 x float> @llvm.x86.avx512.vbroadcast.ss.512(ptr %a0) ; <<16 x float>> [#uses=1]
7475 ret <16 x float> %res
7476 }
7477 declare <16 x float> @llvm.x86.avx512.vbroadcast.ss.512(ptr) nounwind readonly
7479 define <8 x double> @test_x86_vbroadcast_sd_512(ptr %a0) {
7480 ; X86-LABEL: test_x86_vbroadcast_sd_512:
7481 ; X86: ## %bb.0:
7482 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7483 ; X86-NEXT: vbroadcastsd (%eax), %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x19,0x00]
7484 ; X86-NEXT: retl ## encoding: [0xc3]
7485 ;
7486 ; X64-LABEL: test_x86_vbroadcast_sd_512:
7487 ; X64: ## %bb.0:
7488 ; X64-NEXT: vbroadcastsd (%rdi), %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x19,0x07]
7489 ; X64-NEXT: retq ## encoding: [0xc3]
7490 %res = call <8 x double> @llvm.x86.avx512.vbroadcast.sd.512(ptr %a0) ; <<8 x double>> [#uses=1]
7491 ret <8 x double> %res
7492 }
7493 declare <8 x double> @llvm.x86.avx512.vbroadcast.sd.512(ptr) nounwind readonly
7495 declare <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double>, <8 x i64>, <8 x double>, i8)
7497 define <8 x double>@test_int_x86_avx512_permvar_df_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2) {
7498 ; CHECK-LABEL: test_int_x86_avx512_permvar_df_512:
7499 ; CHECK: ## %bb.0:
7500 ; CHECK-NEXT: vpermpd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0xf5,0x48,0x16,0xc0]
7501 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7502 %res = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 -1)
7503 ret <8 x double> %res
7504 }
7506 define <8 x double>@test_int_x86_avx512_mask_permvar_df_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) {
7507 ; X86-LABEL: test_int_x86_avx512_mask_permvar_df_512:
7508 ; X86: ## %bb.0:
7509 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7510 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7511 ; X86-NEXT: vpermpd %zmm0, %zmm1, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x16,0xd0]
7512 ; X86-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
7513 ; X86-NEXT: retl ## encoding: [0xc3]
7514 ;
7515 ; X64-LABEL: test_int_x86_avx512_mask_permvar_df_512:
7516 ; X64: ## %bb.0:
7517 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7518 ; X64-NEXT: vpermpd %zmm0, %zmm1, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x16,0xd0]
7519 ; X64-NEXT: vmovapd %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc2]
7520 ; X64-NEXT: retq ## encoding: [0xc3]
7521 %res = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3)
7522 ret <8 x double> %res
7523 }
7525 define <8 x double>@test_int_x86_avx512_maskz_permvar_df_512(<8 x double> %x0, <8 x i64> %x1, i8 %x3) {
7526 ; X86-LABEL: test_int_x86_avx512_maskz_permvar_df_512:
7527 ; X86: ## %bb.0:
7528 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7529 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7530 ; X86-NEXT: vpermpd %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xc9,0x16,0xc0]
7531 ; X86-NEXT: retl ## encoding: [0xc3]
7532 ;
7533 ; X64-LABEL: test_int_x86_avx512_maskz_permvar_df_512:
7534 ; X64: ## %bb.0:
7535 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7536 ; X64-NEXT: vpermpd %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xc9,0x16,0xc0]
7537 ; X64-NEXT: retq ## encoding: [0xc3]
7538 %res = call <8 x double> @llvm.x86.avx512.mask.permvar.df.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> zeroinitializer, i8 %x3)
7539 ret <8 x double> %res
7540 }
7542 declare <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
7544 define <8 x i64>@test_int_x86_avx512_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
7545 ; CHECK-LABEL: test_int_x86_avx512_permvar_di_512:
7546 ; CHECK: ## %bb.0:
7547 ; CHECK-NEXT: vpermpd %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0xf5,0x48,0x16,0xc0]
7548 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7549 %res = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
7550 ret <8 x i64> %res
7551 }
7553 define <8 x i64>@test_int_x86_avx512_mask_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
7554 ; X86-LABEL: test_int_x86_avx512_mask_permvar_di_512:
7555 ; X86: ## %bb.0:
7556 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7557 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7558 ; X86-NEXT: vpermq %zmm0, %zmm1, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x36,0xd0]
7559 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
7560 ; X86-NEXT: retl ## encoding: [0xc3]
7561 ;
7562 ; X64-LABEL: test_int_x86_avx512_mask_permvar_di_512:
7563 ; X64: ## %bb.0:
7564 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7565 ; X64-NEXT: vpermq %zmm0, %zmm1, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xf5,0x49,0x36,0xd0]
7566 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
7567 ; X64-NEXT: retq ## encoding: [0xc3]
7568 %res = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
7569 ret <8 x i64> %res
7570 }
7572 define <8 x i64>@test_int_x86_avx512_maskz_permvar_di_512(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) {
7573 ; X86-LABEL: test_int_x86_avx512_maskz_permvar_di_512:
7574 ; X86: ## %bb.0:
7575 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7576 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7577 ; X86-NEXT: vpermq %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xc9,0x36,0xc0]
7578 ; X86-NEXT: retl ## encoding: [0xc3]
7579 ;
7580 ; X64-LABEL: test_int_x86_avx512_maskz_permvar_di_512:
7581 ; X64: ## %bb.0:
7582 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7583 ; X64-NEXT: vpermq %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xc9,0x36,0xc0]
7584 ; X64-NEXT: retq ## encoding: [0xc3]
7585 %res = call <8 x i64> @llvm.x86.avx512.mask.permvar.di.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> zeroinitializer, i8 %x3)
7586 ret <8 x i64> %res
7587 }
7589 declare <16 x float> @llvm.x86.avx512.mask.permvar.sf.512(<16 x float>, <16 x i32>, <16 x float>, i16)
7591 define <16 x float>@test_int_x86_avx512_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2) {
7592 ; CHECK-LABEL: test_int_x86_avx512_permvar_sf_512:
7593 ; CHECK: ## %bb.0:
7594 ; CHECK-NEXT: vpermps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0x75,0x48,0x16,0xc0]
7595 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7596 %res = call <16 x float> @llvm.x86.avx512.mask.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 -1)
7597 ret <16 x float> %res
7598 }
7600 define <16 x float>@test_int_x86_avx512_mask_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) {
7601 ; X86-LABEL: test_int_x86_avx512_mask_permvar_sf_512:
7602 ; X86: ## %bb.0:
7603 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7604 ; X86-NEXT: vpermps %zmm0, %zmm1, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x16,0xd0]
7605 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
7606 ; X86-NEXT: retl ## encoding: [0xc3]
7607 ;
7608 ; X64-LABEL: test_int_x86_avx512_mask_permvar_sf_512:
7609 ; X64: ## %bb.0:
7610 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7611 ; X64-NEXT: vpermps %zmm0, %zmm1, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x16,0xd0]
7612 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
7613 ; X64-NEXT: retq ## encoding: [0xc3]
7614 %res = call <16 x float> @llvm.x86.avx512.mask.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3)
7615 ret <16 x float> %res
7616 }
7618 define <16 x float>@test_int_x86_avx512_maskz_permvar_sf_512(<16 x float> %x0, <16 x i32> %x1, i16 %x3) {
7619 ; X86-LABEL: test_int_x86_avx512_maskz_permvar_sf_512:
7620 ; X86: ## %bb.0:
7621 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7622 ; X86-NEXT: vpermps %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0xc9,0x16,0xc0]
7623 ; X86-NEXT: retl ## encoding: [0xc3]
7624 ;
7625 ; X64-LABEL: test_int_x86_avx512_maskz_permvar_sf_512:
7626 ; X64: ## %bb.0:
7627 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7628 ; X64-NEXT: vpermps %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0xc9,0x16,0xc0]
7629 ; X64-NEXT: retq ## encoding: [0xc3]
7630 %res = call <16 x float> @llvm.x86.avx512.mask.permvar.sf.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> zeroinitializer, i16 %x3)
7631 ret <16 x float> %res
7632 }
7634 declare <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
7636 define <16 x i32>@test_int_x86_avx512_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
7637 ; CHECK-LABEL: test_int_x86_avx512_permvar_si_512:
7638 ; CHECK: ## %bb.0:
7639 ; CHECK-NEXT: vpermps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0x75,0x48,0x16,0xc0]
7640 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7641 %res = call <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
7642 ret <16 x i32> %res
7643 }
7645 define <16 x i32>@test_int_x86_avx512_mask_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
7646 ; X86-LABEL: test_int_x86_avx512_mask_permvar_si_512:
7647 ; X86: ## %bb.0:
7648 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7649 ; X86-NEXT: vpermd %zmm0, %zmm1, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x36,0xd0]
7650 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
7651 ; X86-NEXT: retl ## encoding: [0xc3]
7652 ;
7653 ; X64-LABEL: test_int_x86_avx512_mask_permvar_si_512:
7654 ; X64: ## %bb.0:
7655 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7656 ; X64-NEXT: vpermd %zmm0, %zmm1, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x75,0x49,0x36,0xd0]
7657 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
7658 ; X64-NEXT: retq ## encoding: [0xc3]
7659 %res = call <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
7660 ret <16 x i32> %res
7661 }
7663 define <16 x i32>@test_int_x86_avx512_maskz_permvar_si_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) {
7664 ; X86-LABEL: test_int_x86_avx512_maskz_permvar_si_512:
7665 ; X86: ## %bb.0:
7666 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7667 ; X86-NEXT: vpermd %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0xc9,0x36,0xc0]
7668 ; X86-NEXT: retl ## encoding: [0xc3]
7669 ;
7670 ; X64-LABEL: test_int_x86_avx512_maskz_permvar_si_512:
7671 ; X64: ## %bb.0:
7672 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7673 ; X64-NEXT: vpermd %zmm0, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0xc9,0x36,0xc0]
7674 ; X64-NEXT: retq ## encoding: [0xc3]
7675 %res = call <16 x i32> @llvm.x86.avx512.mask.permvar.si.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> zeroinitializer, i16 %x3)
7676 ret <16 x i32> %res
7677 }
7679 declare <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32, i16)
7681 define <16 x i32>@test_int_x86_avx512_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
7682 ; CHECK-LABEL: test_int_x86_avx512_pternlog_d_512:
7683 ; CHECK: ## %bb.0:
7684 ; CHECK-NEXT: vpternlogd $33, %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf3,0x75,0x48,0x25,0xc2,0x21]
7685 ; CHECK-NEXT: ## zmm0 = ~(zmm1 | (zmm0 ^ zmm2))
7686 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7687 %res = call <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 -1)
7688 ret <16 x i32> %res
7689 }
7691 define <16 x i32>@test_int_x86_avx512_mask_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x4) {
7692 ; X86-LABEL: test_int_x86_avx512_mask_pternlog_d_512:
7693 ; X86: ## %bb.0:
7694 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7695 ; X86-NEXT: vpternlogd $33, %zmm2, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf3,0x75,0x49,0x25,0xc2,0x21]
7696 ; X86-NEXT: ## zmm0 {%k1} = ~(zmm1 | (zmm0 ^ zmm2))
7697 ; X86-NEXT: retl ## encoding: [0xc3]
7698 ;
7699 ; X64-LABEL: test_int_x86_avx512_mask_pternlog_d_512:
7700 ; X64: ## %bb.0:
7701 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7702 ; X64-NEXT: vpternlogd $33, %zmm2, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf3,0x75,0x49,0x25,0xc2,0x21]
7703 ; X64-NEXT: ## zmm0 {%k1} = ~(zmm1 | (zmm0 ^ zmm2))
7704 ; X64-NEXT: retq ## encoding: [0xc3]
7705 %res = call <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 %x4)
7706 ret <16 x i32> %res
7707 }
7709 declare <16 x i32> @llvm.x86.avx512.maskz.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32, i16)
7711 define <16 x i32>@test_int_x86_avx512_maskz_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x4) {
7712 ; X86-LABEL: test_int_x86_avx512_maskz_pternlog_d_512:
7713 ; X86: ## %bb.0:
7714 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7715 ; X86-NEXT: vpternlogd $33, %zmm2, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x75,0xc9,0x25,0xc2,0x21]
7716 ; X86-NEXT: ## zmm0 {%k1} {z} = ~(zmm1 | (zmm0 ^ zmm2))
7717 ; X86-NEXT: retl ## encoding: [0xc3]
7718 ;
7719 ; X64-LABEL: test_int_x86_avx512_maskz_pternlog_d_512:
7720 ; X64: ## %bb.0:
7721 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7722 ; X64-NEXT: vpternlogd $33, %zmm2, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0x75,0xc9,0x25,0xc2,0x21]
7723 ; X64-NEXT: ## zmm0 {%k1} {z} = ~(zmm1 | (zmm0 ^ zmm2))
7724 ; X64-NEXT: retq ## encoding: [0xc3]
7725 %res = call <16 x i32> @llvm.x86.avx512.maskz.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 %x4)
7726 ret <16 x i32> %res
7727 }
7729 declare <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32, i8)
7731 define <8 x i64>@test_int_x86_avx512_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
7732 ; CHECK-LABEL: test_int_x86_avx512_pternlog_q_512:
7733 ; CHECK: ## %bb.0:
7734 ; CHECK-NEXT: vpternlogq $33, %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf3,0xf5,0x48,0x25,0xc2,0x21]
7735 ; CHECK-NEXT: ## zmm0 = ~(zmm1 | (zmm0 ^ zmm2))
7736 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7737 %res = call <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 -1)
7738 ret <8 x i64> %res
7739 }
7741 define <8 x i64>@test_int_x86_avx512_mask_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x4) {
7742 ; X86-LABEL: test_int_x86_avx512_mask_pternlog_q_512:
7743 ; X86: ## %bb.0:
7744 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7745 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7746 ; X86-NEXT: vpternlogq $33, %zmm2, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf3,0xf5,0x49,0x25,0xc2,0x21]
7747 ; X86-NEXT: ## zmm0 {%k1} = ~(zmm1 | (zmm0 ^ zmm2))
7748 ; X86-NEXT: retl ## encoding: [0xc3]
7749 ;
7750 ; X64-LABEL: test_int_x86_avx512_mask_pternlog_q_512:
7751 ; X64: ## %bb.0:
7752 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7753 ; X64-NEXT: vpternlogq $33, %zmm2, %zmm1, %zmm0 {%k1} ## encoding: [0x62,0xf3,0xf5,0x49,0x25,0xc2,0x21]
7754 ; X64-NEXT: ## zmm0 {%k1} = ~(zmm1 | (zmm0 ^ zmm2))
7755 ; X64-NEXT: retq ## encoding: [0xc3]
7756 %res = call <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 %x4)
7757 ret <8 x i64> %res
7758 }
7760 declare <8 x i64> @llvm.x86.avx512.maskz.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32, i8)
7762 define <8 x i64>@test_int_x86_avx512_maskz_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x4) {
7763 ; X86-LABEL: test_int_x86_avx512_maskz_pternlog_q_512:
7764 ; X86: ## %bb.0:
7765 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7766 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7767 ; X86-NEXT: vpternlogq $33, %zmm2, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xf5,0xc9,0x25,0xc2,0x21]
7768 ; X86-NEXT: ## zmm0 {%k1} {z} = ~(zmm1 | (zmm0 ^ zmm2))
7769 ; X86-NEXT: retl ## encoding: [0xc3]
7770 ;
7771 ; X64-LABEL: test_int_x86_avx512_maskz_pternlog_q_512:
7772 ; X64: ## %bb.0:
7773 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7774 ; X64-NEXT: vpternlogq $33, %zmm2, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf3,0xf5,0xc9,0x25,0xc2,0x21]
7775 ; X64-NEXT: ## zmm0 {%k1} {z} = ~(zmm1 | (zmm0 ^ zmm2))
7776 ; X64-NEXT: retq ## encoding: [0xc3]
7777 %res = call <8 x i64> @llvm.x86.avx512.maskz.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 %x4)
7778 ret <8 x i64> %res
7779 }
7781 declare <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
7783 define <16 x i32>@test_int_x86_avx512_vpermi2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p, <16 x i32> %x4) {
7784 ; CHECK-LABEL: test_int_x86_avx512_vpermi2var_d_512:
7785 ; CHECK: ## %bb.0:
7786 ; CHECK-NEXT: vpermt2d %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0x75,0x48,0x7e,0xc2]
7787 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7788 %x2 = load <16 x i32>, ptr %x2p
7789 %res = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x4, i16 -1)
7790 ret <16 x i32> %res
7791 }
7793 define <16 x i32>@test_int_x86_avx512_mask_vpermi2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p, <16 x i32> %x4, i16 %x3) {
7794 ; X86-LABEL: test_int_x86_avx512_mask_vpermi2var_d_512:
7795 ; X86: ## %bb.0:
7796 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7797 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
7798 ; X86-NEXT: vpermi2d (%eax), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x76,0x08]
7799 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7800 ; X86-NEXT: retl ## encoding: [0xc3]
7801 ;
7802 ; X64-LABEL: test_int_x86_avx512_mask_vpermi2var_d_512:
7803 ; X64: ## %bb.0:
7804 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7805 ; X64-NEXT: vpermi2d (%rdi), %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x76,0x0f]
7806 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7807 ; X64-NEXT: retq ## encoding: [0xc3]
7808 %x2 = load <16 x i32>, ptr %x2p
7809 %res = call <16 x i32> @llvm.x86.avx512.mask.vpermi2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
7810 ret <16 x i32> %res
7811 }
7813 declare <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double>, <8 x i64>, <8 x double>, i8)
7815 define <8 x double>@test_int_x86_avx512_vpermi2var_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2) {
7816 ; CHECK-LABEL: test_int_x86_avx512_vpermi2var_pd_512:
7817 ; CHECK: ## %bb.0:
7818 ; CHECK-NEXT: vpermt2pd %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0xf5,0x48,0x7f,0xc2]
7819 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7820 %res = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 -1)
7821 ret <8 x double> %res
7822 }
7824 define <8 x double>@test_int_x86_avx512_mask_vpermi2var_pd_512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3) {
7825 ; X86-LABEL: test_int_x86_avx512_mask_vpermi2var_pd_512:
7826 ; X86: ## %bb.0:
7827 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7828 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7829 ; X86-NEXT: vpermi2pd %zmm2, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x77,0xca]
7830 ; X86-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
7831 ; X86-NEXT: retl ## encoding: [0xc3]
7832 ;
7833 ; X64-LABEL: test_int_x86_avx512_mask_vpermi2var_pd_512:
7834 ; X64: ## %bb.0:
7835 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7836 ; X64-NEXT: vpermi2pd %zmm2, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x77,0xca]
7837 ; X64-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
7838 ; X64-NEXT: retq ## encoding: [0xc3]
7839 %res = call <8 x double> @llvm.x86.avx512.mask.vpermi2var.pd.512(<8 x double> %x0, <8 x i64> %x1, <8 x double> %x2, i8 %x3)
7840 ret <8 x double> %res
7841 }
7843 declare <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)
7845 define <16 x float>@test_int_x86_avx512_vpermi2var_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2) {
7846 ; CHECK-LABEL: test_int_x86_avx512_vpermi2var_ps_512:
7847 ; CHECK: ## %bb.0:
7848 ; CHECK-NEXT: vpermt2ps %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0x75,0x48,0x7f,0xc2]
7849 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7850 %res = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 -1)
7851 ret <16 x float> %res
7852 }
7854 define <16 x float>@test_int_x86_avx512_mask_vpermi2var_ps_512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3) {
7855 ; X86-LABEL: test_int_x86_avx512_mask_vpermi2var_ps_512:
7856 ; X86: ## %bb.0:
7857 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7858 ; X86-NEXT: vpermi2ps %zmm2, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x77,0xca]
7859 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
7860 ; X86-NEXT: retl ## encoding: [0xc3]
7861 ;
7862 ; X64-LABEL: test_int_x86_avx512_mask_vpermi2var_ps_512:
7863 ; X64: ## %bb.0:
7864 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7865 ; X64-NEXT: vpermi2ps %zmm2, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x77,0xca]
7866 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
7867 ; X64-NEXT: retq ## encoding: [0xc3]
7868 %res = call <16 x float> @llvm.x86.avx512.mask.vpermi2var.ps.512(<16 x float> %x0, <16 x i32> %x1, <16 x float> %x2, i16 %x3)
7869 ret <16 x float> %res
7870 }
7872 declare <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
7874 define <8 x i64>@test_int_x86_avx512_vpermi2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
7875 ; CHECK-LABEL: test_int_x86_avx512_vpermi2var_q_512:
7876 ; CHECK: ## %bb.0:
7877 ; CHECK-NEXT: vpermt2q %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0xf5,0x48,0x7e,0xc2]
7878 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7879 %res = call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
7880 ret <8 x i64> %res
7881 }
7883 define <8 x i64>@test_int_x86_avx512_mask_vpermi2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
7884 ; X86-LABEL: test_int_x86_avx512_mask_vpermi2var_q_512:
7885 ; X86: ## %bb.0:
7886 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7887 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7888 ; X86-NEXT: vpermi2q %zmm2, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x76,0xca]
7889 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7890 ; X86-NEXT: retl ## encoding: [0xc3]
7891 ;
7892 ; X64-LABEL: test_int_x86_avx512_mask_vpermi2var_q_512:
7893 ; X64: ## %bb.0:
7894 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7895 ; X64-NEXT: vpermi2q %zmm2, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x76,0xca]
7896 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
7897 ; X64-NEXT: retq ## encoding: [0xc3]
7898 %res = call <8 x i64> @llvm.x86.avx512.mask.vpermi2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
7899 ret <8 x i64> %res
7900 }
7902 declare <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
7904 define <16 x i32>@test_int_x86_avx512_maskz_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, ptr %x2p, i16 %x3) {
7905 ; X86-LABEL: test_int_x86_avx512_maskz_vpermt2var_d_512:
7906 ; X86: ## %bb.0:
7907 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7908 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
7909 ; X86-NEXT: vpermi2d (%eax), %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0xc9,0x76,0x00]
7910 ; X86-NEXT: retl ## encoding: [0xc3]
7911 ;
7912 ; X64-LABEL: test_int_x86_avx512_maskz_vpermt2var_d_512:
7913 ; X64: ## %bb.0:
7914 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7915 ; X64-NEXT: vpermi2d (%rdi), %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0xc9,0x76,0x07]
7916 ; X64-NEXT: retq ## encoding: [0xc3]
7917 %x2 = load <16 x i32>, ptr %x2p
7918 %res = call <16 x i32> @llvm.x86.avx512.maskz.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
7919 ret <16 x i32> %res
7920 }
7922 declare <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64>, <8 x double>, <8 x double>, i8)
7924 define <8 x double>@test_int_x86_avx512_maskz_vpermt2var_pd_512(<8 x i64> %x0, <8 x double> %x1, ptr %x2ptr, i8 %x3) {
7925 ; X86-LABEL: test_int_x86_avx512_maskz_vpermt2var_pd_512:
7926 ; X86: ## %bb.0:
7927 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
7928 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
7929 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
7930 ; X86-NEXT: vpermi2pd (%eax){1to8}, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xd9,0x77,0x00]
7931 ; X86-NEXT: retl ## encoding: [0xc3]
7932 ;
7933 ; X64-LABEL: test_int_x86_avx512_maskz_vpermt2var_pd_512:
7934 ; X64: ## %bb.0:
7935 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
7936 ; X64-NEXT: vpermi2pd (%rdi){1to8}, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xd9,0x77,0x07]
7937 ; X64-NEXT: retq ## encoding: [0xc3]
7938 %x2s = load double, ptr %x2ptr
7939 %x2ins = insertelement <8 x double> undef, double %x2s, i32 0
7940 %x2 = shufflevector <8 x double> %x2ins, <8 x double> undef, <8 x i32> zeroinitializer
7941 %res = call <8 x double> @llvm.x86.avx512.maskz.vpermt2var.pd.512(<8 x i64> %x0, <8 x double> %x1, <8 x double> %x2, i8 %x3)
7942 ret <8 x double> %res
7943 }
7945 declare <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32>, <16 x float>, <16 x float>, i16)
7947 define <16 x float>@test_int_x86_avx512_maskz_vpermt2var_ps_512(<16 x i32> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3) {
7948 ; X86-LABEL: test_int_x86_avx512_maskz_vpermt2var_ps_512:
7949 ; X86: ## %bb.0:
7950 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7951 ; X86-NEXT: vpermi2ps %zmm2, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0xc9,0x77,0xc2]
7952 ; X86-NEXT: retl ## encoding: [0xc3]
7953 ;
7954 ; X64-LABEL: test_int_x86_avx512_maskz_vpermt2var_ps_512:
7955 ; X64: ## %bb.0:
7956 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7957 ; X64-NEXT: vpermi2ps %zmm2, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0xc9,0x77,0xc2]
7958 ; X64-NEXT: retq ## encoding: [0xc3]
7959 %res = call <16 x float> @llvm.x86.avx512.maskz.vpermt2var.ps.512(<16 x i32> %x0, <16 x float> %x1, <16 x float> %x2, i16 %x3)
7960 ret <16 x float> %res
7961 }
7964 declare <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
7966 define <8 x i64>@test_int_x86_avx512_maskz_vpermt2var_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
7967 ; X86-LABEL: test_int_x86_avx512_maskz_vpermt2var_q_512:
7968 ; X86: ## %bb.0:
7969 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
7970 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
7971 ; X86-NEXT: vpermi2q %zmm2, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xc9,0x76,0xc2]
7972 ; X86-NEXT: retl ## encoding: [0xc3]
7973 ;
7974 ; X64-LABEL: test_int_x86_avx512_maskz_vpermt2var_q_512:
7975 ; X64: ## %bb.0:
7976 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
7977 ; X64-NEXT: vpermi2q %zmm2, %zmm1, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xc9,0x76,0xc2]
7978 ; X64-NEXT: retq ## encoding: [0xc3]
7979 %res = call <8 x i64> @llvm.x86.avx512.maskz.vpermt2var.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
7980 ret <8 x i64> %res
7981 }
7983 declare <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
7985 define <16 x i32>@test_int_x86_avx512_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
7986 ; CHECK-LABEL: test_int_x86_avx512_vpermt2var_d_512:
7987 ; CHECK: ## %bb.0:
7988 ; CHECK-NEXT: vpermi2d %zmm2, %zmm1, %zmm0 ## encoding: [0x62,0xf2,0x75,0x48,0x76,0xc2]
7989 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
7990 %res = call <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
7991 ret <16 x i32> %res
7992 }
7994 define <16 x i32>@test_int_x86_avx512_mask_vpermt2var_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
7995 ; X86-LABEL: test_int_x86_avx512_mask_vpermt2var_d_512:
7996 ; X86: ## %bb.0:
7997 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
7998 ; X86-NEXT: vpermt2d %zmm2, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x7e,0xca]
7999 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
8000 ; X86-NEXT: retl ## encoding: [0xc3]
8001 ;
8002 ; X64-LABEL: test_int_x86_avx512_mask_vpermt2var_d_512:
8003 ; X64: ## %bb.0:
8004 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8005 ; X64-NEXT: vpermt2d %zmm2, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x7e,0xca]
8006 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
8007 ; X64-NEXT: retq ## encoding: [0xc3]
8008 %res = call <16 x i32> @llvm.x86.avx512.mask.vpermt2var.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
8009 ret <16 x i32> %res
8010 }
8012 declare <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
8013 declare <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
8014 declare <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)
8016 define <16 x float> @test_vsubps_rn(<16 x float> %a0, <16 x float> %a1) {
8017 ; CHECK-LABEL: test_vsubps_rn:
8018 ; CHECK: ## %bb.0:
8019 ; CHECK-NEXT: vsubps {rn-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x5c,0xc1]
8020 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8021 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,
8022 <16 x float> zeroinitializer, i16 -1, i32 8)
8023 ret <16 x float> %res
8024 }
8026 define <16 x float> @test_vsubps_rd(<16 x float> %a0, <16 x float> %a1) {
8027 ; CHECK-LABEL: test_vsubps_rd:
8028 ; CHECK: ## %bb.0:
8029 ; CHECK-NEXT: vsubps {rd-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x38,0x5c,0xc1]
8030 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8031 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,
8032 <16 x float> zeroinitializer, i16 -1, i32 9)
8033 ret <16 x float> %res
8034 }
8036 define <16 x float> @test_vsubps_ru(<16 x float> %a0, <16 x float> %a1) {
8037 ; CHECK-LABEL: test_vsubps_ru:
8038 ; CHECK: ## %bb.0:
8039 ; CHECK-NEXT: vsubps {ru-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x58,0x5c,0xc1]
8040 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8041 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,
8042 <16 x float> zeroinitializer, i16 -1, i32 10)
8043 ret <16 x float> %res
8044 }
8046 define <16 x float> @test_vsubps_rz(<16 x float> %a0, <16 x float> %a1) {
8047 ; CHECK-LABEL: test_vsubps_rz:
8048 ; CHECK: ## %bb.0:
8049 ; CHECK-NEXT: vsubps {rz-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x78,0x5c,0xc1]
8050 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8051 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1,
8052 <16 x float> zeroinitializer, i16 -1, i32 11)
8053 ret <16 x float> %res
8054 }
8056 define <16 x float> @test_vmulps_rn(<16 x float> %a0, <16 x float> %a1) {
8057 ; CHECK-LABEL: test_vmulps_rn:
8058 ; CHECK: ## %bb.0:
8059 ; CHECK-NEXT: vmulps {rn-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x59,0xc1]
8060 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8061 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8062 <16 x float> zeroinitializer, i16 -1, i32 8)
8063 ret <16 x float> %res
8064 }
8066 define <16 x float> @test_vmulps_rd(<16 x float> %a0, <16 x float> %a1) {
8067 ; CHECK-LABEL: test_vmulps_rd:
8068 ; CHECK: ## %bb.0:
8069 ; CHECK-NEXT: vmulps {rd-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x38,0x59,0xc1]
8070 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8071 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8072 <16 x float> zeroinitializer, i16 -1, i32 9)
8073 ret <16 x float> %res
8074 }
8076 define <16 x float> @test_vmulps_ru(<16 x float> %a0, <16 x float> %a1) {
8077 ; CHECK-LABEL: test_vmulps_ru:
8078 ; CHECK: ## %bb.0:
8079 ; CHECK-NEXT: vmulps {ru-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x58,0x59,0xc1]
8080 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8081 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8082 <16 x float> zeroinitializer, i16 -1, i32 10)
8083 ret <16 x float> %res
8084 }
8086 define <16 x float> @test_vmulps_rz(<16 x float> %a0, <16 x float> %a1) {
8087 ; CHECK-LABEL: test_vmulps_rz:
8088 ; CHECK: ## %bb.0:
8089 ; CHECK-NEXT: vmulps {rz-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x78,0x59,0xc1]
8090 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8091 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8092 <16 x float> zeroinitializer, i16 -1, i32 11)
8093 ret <16 x float> %res
8094 }
8096 ;; mask float
8097 define <16 x float> @test_vmulps_mask_rn(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8098 ; X86-LABEL: test_vmulps_mask_rn:
8099 ; X86: ## %bb.0:
8100 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8101 ; X86-NEXT: vmulps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x59,0xc1]
8102 ; X86-NEXT: retl ## encoding: [0xc3]
8103 ;
8104 ; X64-LABEL: test_vmulps_mask_rn:
8105 ; X64: ## %bb.0:
8106 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8107 ; X64-NEXT: vmulps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x59,0xc1]
8108 ; X64-NEXT: retq ## encoding: [0xc3]
8109 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8110 <16 x float> zeroinitializer, i16 %mask, i32 8)
8111 ret <16 x float> %res
8112 }
8114 define <16 x float> @test_vmulps_mask_rd(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8115 ; X86-LABEL: test_vmulps_mask_rd:
8116 ; X86: ## %bb.0:
8117 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8118 ; X86-NEXT: vmulps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xb9,0x59,0xc1]
8119 ; X86-NEXT: retl ## encoding: [0xc3]
8120 ;
8121 ; X64-LABEL: test_vmulps_mask_rd:
8122 ; X64: ## %bb.0:
8123 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8124 ; X64-NEXT: vmulps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xb9,0x59,0xc1]
8125 ; X64-NEXT: retq ## encoding: [0xc3]
8126 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8127 <16 x float> zeroinitializer, i16 %mask, i32 9)
8128 ret <16 x float> %res
8129 }
8131 define <16 x float> @test_vmulps_mask_ru(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8132 ; X86-LABEL: test_vmulps_mask_ru:
8133 ; X86: ## %bb.0:
8134 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8135 ; X86-NEXT: vmulps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xd9,0x59,0xc1]
8136 ; X86-NEXT: retl ## encoding: [0xc3]
8137 ;
8138 ; X64-LABEL: test_vmulps_mask_ru:
8139 ; X64: ## %bb.0:
8140 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8141 ; X64-NEXT: vmulps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xd9,0x59,0xc1]
8142 ; X64-NEXT: retq ## encoding: [0xc3]
8143 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8144 <16 x float> zeroinitializer, i16 %mask, i32 10)
8145 ret <16 x float> %res
8146 }
8148 define <16 x float> @test_vmulps_mask_rz(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8149 ; X86-LABEL: test_vmulps_mask_rz:
8150 ; X86: ## %bb.0:
8151 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8152 ; X86-NEXT: vmulps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x59,0xc1]
8153 ; X86-NEXT: retl ## encoding: [0xc3]
8154 ;
8155 ; X64-LABEL: test_vmulps_mask_rz:
8156 ; X64: ## %bb.0:
8157 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8158 ; X64-NEXT: vmulps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x59,0xc1]
8159 ; X64-NEXT: retq ## encoding: [0xc3]
8160 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8161 <16 x float> zeroinitializer, i16 %mask, i32 11)
8162 ret <16 x float> %res
8163 }
8165 ;; With Passthru value
8166 define <16 x float> @test_vmulps_mask_passthru_rn(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {
8167 ; X86-LABEL: test_vmulps_mask_passthru_rn:
8168 ; X86: ## %bb.0:
8169 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8170 ; X86-NEXT: vmulps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x59,0xd1]
8171 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8172 ; X86-NEXT: retl ## encoding: [0xc3]
8173 ;
8174 ; X64-LABEL: test_vmulps_mask_passthru_rn:
8175 ; X64: ## %bb.0:
8176 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8177 ; X64-NEXT: vmulps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x59,0xd1]
8178 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8179 ; X64-NEXT: retq ## encoding: [0xc3]
8180 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8181 <16 x float> %passthru, i16 %mask, i32 8)
8182 ret <16 x float> %res
8183 }
8185 define <16 x float> @test_vmulps_mask_passthru_rd(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {
8186 ; X86-LABEL: test_vmulps_mask_passthru_rd:
8187 ; X86: ## %bb.0:
8188 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8189 ; X86-NEXT: vmulps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x59,0xd1]
8190 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8191 ; X86-NEXT: retl ## encoding: [0xc3]
8192 ;
8193 ; X64-LABEL: test_vmulps_mask_passthru_rd:
8194 ; X64: ## %bb.0:
8195 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8196 ; X64-NEXT: vmulps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x59,0xd1]
8197 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8198 ; X64-NEXT: retq ## encoding: [0xc3]
8199 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8200 <16 x float> %passthru, i16 %mask, i32 9)
8201 ret <16 x float> %res
8202 }
8204 define <16 x float> @test_vmulps_mask_passthru_ru(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {
8205 ; X86-LABEL: test_vmulps_mask_passthru_ru:
8206 ; X86: ## %bb.0:
8207 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8208 ; X86-NEXT: vmulps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x59,0xd1]
8209 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8210 ; X86-NEXT: retl ## encoding: [0xc3]
8211 ;
8212 ; X64-LABEL: test_vmulps_mask_passthru_ru:
8213 ; X64: ## %bb.0:
8214 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8215 ; X64-NEXT: vmulps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x59,0xd1]
8216 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8217 ; X64-NEXT: retq ## encoding: [0xc3]
8218 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8219 <16 x float> %passthru, i16 %mask, i32 10)
8220 ret <16 x float> %res
8221 }
8223 define <16 x float> @test_vmulps_mask_passthru_rz(<16 x float> %a0, <16 x float> %a1, <16 x float> %passthru, i16 %mask) {
8224 ; X86-LABEL: test_vmulps_mask_passthru_rz:
8225 ; X86: ## %bb.0:
8226 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8227 ; X86-NEXT: vmulps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x59,0xd1]
8228 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8229 ; X86-NEXT: retl ## encoding: [0xc3]
8230 ;
8231 ; X64-LABEL: test_vmulps_mask_passthru_rz:
8232 ; X64: ## %bb.0:
8233 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8234 ; X64-NEXT: vmulps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x59,0xd1]
8235 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8236 ; X64-NEXT: retq ## encoding: [0xc3]
8237 %res = call <16 x float> @llvm.x86.avx512.mask.mul.ps.512(<16 x float> %a0, <16 x float> %a1,
8238 <16 x float> %passthru, i16 %mask, i32 11)
8239 ret <16 x float> %res
8240 }
8242 ;; mask double
8243 define <8 x double> @test_vmulpd_mask_rn(<8 x double> %a0, <8 x double> %a1, i8 %mask) {
8244 ; X86-LABEL: test_vmulpd_mask_rn:
8245 ; X86: ## %bb.0:
8246 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
8247 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
8248 ; X86-NEXT: vmulpd {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0x99,0x59,0xc1]
8249 ; X86-NEXT: retl ## encoding: [0xc3]
8250 ;
8251 ; X64-LABEL: test_vmulpd_mask_rn:
8252 ; X64: ## %bb.0:
8253 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8254 ; X64-NEXT: vmulpd {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0x99,0x59,0xc1]
8255 ; X64-NEXT: retq ## encoding: [0xc3]
8256 %res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,
8257 <8 x double> zeroinitializer, i8 %mask, i32 8)
8258 ret <8 x double> %res
8259 }
8261 define <8 x double> @test_vmulpd_mask_rd(<8 x double> %a0, <8 x double> %a1, i8 %mask) {
8262 ; X86-LABEL: test_vmulpd_mask_rd:
8263 ; X86: ## %bb.0:
8264 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
8265 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
8266 ; X86-NEXT: vmulpd {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xb9,0x59,0xc1]
8267 ; X86-NEXT: retl ## encoding: [0xc3]
8268 ;
8269 ; X64-LABEL: test_vmulpd_mask_rd:
8270 ; X64: ## %bb.0:
8271 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8272 ; X64-NEXT: vmulpd {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xb9,0x59,0xc1]
8273 ; X64-NEXT: retq ## encoding: [0xc3]
8274 %res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,
8275 <8 x double> zeroinitializer, i8 %mask, i32 9)
8276 ret <8 x double> %res
8277 }
8279 define <8 x double> @test_vmulpd_mask_ru(<8 x double> %a0, <8 x double> %a1, i8 %mask) {
8280 ; X86-LABEL: test_vmulpd_mask_ru:
8281 ; X86: ## %bb.0:
8282 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
8283 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
8284 ; X86-NEXT: vmulpd {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0x59,0xc1]
8285 ; X86-NEXT: retl ## encoding: [0xc3]
8286 ;
8287 ; X64-LABEL: test_vmulpd_mask_ru:
8288 ; X64: ## %bb.0:
8289 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8290 ; X64-NEXT: vmulpd {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xd9,0x59,0xc1]
8291 ; X64-NEXT: retq ## encoding: [0xc3]
8292 %res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,
8293 <8 x double> zeroinitializer, i8 %mask, i32 10)
8294 ret <8 x double> %res
8295 }
8297 define <8 x double> @test_vmulpd_mask_rz(<8 x double> %a0, <8 x double> %a1, i8 %mask) {
8298 ; X86-LABEL: test_vmulpd_mask_rz:
8299 ; X86: ## %bb.0:
8300 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
8301 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
8302 ; X86-NEXT: vmulpd {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xf9,0x59,0xc1]
8303 ; X86-NEXT: retl ## encoding: [0xc3]
8304 ;
8305 ; X64-LABEL: test_vmulpd_mask_rz:
8306 ; X64: ## %bb.0:
8307 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8308 ; X64-NEXT: vmulpd {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xf9,0x59,0xc1]
8309 ; X64-NEXT: retq ## encoding: [0xc3]
8310 %res = call <8 x double> @llvm.x86.avx512.mask.mul.pd.512(<8 x double> %a0, <8 x double> %a1,
8311 <8 x double> zeroinitializer, i8 %mask, i32 11)
8312 ret <8 x double> %res
8313 }
8315 define <16 x float> @test_mm512_maskz_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8316 ; X86-LABEL: test_mm512_maskz_add_round_ps_rn_sae:
8317 ; X86: ## %bb.0:
8318 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8319 ; X86-NEXT: vaddps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x58,0xc1]
8320 ; X86-NEXT: retl ## encoding: [0xc3]
8321 ;
8322 ; X64-LABEL: test_mm512_maskz_add_round_ps_rn_sae:
8323 ; X64: ## %bb.0:
8324 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8325 ; X64-NEXT: vaddps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x58,0xc1]
8326 ; X64-NEXT: retq ## encoding: [0xc3]
8327 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 8)
8328 ret <16 x float> %res
8329 }
8330 define <16 x float> @test_mm512_maskz_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8331 ; X86-LABEL: test_mm512_maskz_add_round_ps_rd_sae:
8332 ; X86: ## %bb.0:
8333 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8334 ; X86-NEXT: vaddps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xb9,0x58,0xc1]
8335 ; X86-NEXT: retl ## encoding: [0xc3]
8336 ;
8337 ; X64-LABEL: test_mm512_maskz_add_round_ps_rd_sae:
8338 ; X64: ## %bb.0:
8339 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8340 ; X64-NEXT: vaddps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xb9,0x58,0xc1]
8341 ; X64-NEXT: retq ## encoding: [0xc3]
8342 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 9)
8343 ret <16 x float> %res
8344 }
8345 define <16 x float> @test_mm512_maskz_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8346 ; X86-LABEL: test_mm512_maskz_add_round_ps_ru_sae:
8347 ; X86: ## %bb.0:
8348 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8349 ; X86-NEXT: vaddps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xd9,0x58,0xc1]
8350 ; X86-NEXT: retl ## encoding: [0xc3]
8351 ;
8352 ; X64-LABEL: test_mm512_maskz_add_round_ps_ru_sae:
8353 ; X64: ## %bb.0:
8354 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8355 ; X64-NEXT: vaddps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xd9,0x58,0xc1]
8356 ; X64-NEXT: retq ## encoding: [0xc3]
8357 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 10)
8358 ret <16 x float> %res
8359 }
8361 define <16 x float> @test_mm512_maskz_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8362 ; X86-LABEL: test_mm512_maskz_add_round_ps_rz_sae:
8363 ; X86: ## %bb.0:
8364 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8365 ; X86-NEXT: vaddps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x58,0xc1]
8366 ; X86-NEXT: retl ## encoding: [0xc3]
8367 ;
8368 ; X64-LABEL: test_mm512_maskz_add_round_ps_rz_sae:
8369 ; X64: ## %bb.0:
8370 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8371 ; X64-NEXT: vaddps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x58,0xc1]
8372 ; X64-NEXT: retq ## encoding: [0xc3]
8373 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 11)
8374 ret <16 x float> %res
8375 }
8378 define <16 x float> @test_mm512_maskz_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8379 ; X86-LABEL: test_mm512_maskz_add_round_ps_current:
8380 ; X86: ## %bb.0:
8381 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8382 ; X86-NEXT: vaddps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x58,0xc1]
8383 ; X86-NEXT: retl ## encoding: [0xc3]
8384 ;
8385 ; X64-LABEL: test_mm512_maskz_add_round_ps_current:
8386 ; X64: ## %bb.0:
8387 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8388 ; X64-NEXT: vaddps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x58,0xc1]
8389 ; X64-NEXT: retq ## encoding: [0xc3]
8390 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 4)
8391 ret <16 x float> %res
8392 }
8394 define <16 x float> @test_mm512_mask_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8395 ; X86-LABEL: test_mm512_mask_add_round_ps_rn_sae:
8396 ; X86: ## %bb.0:
8397 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8398 ; X86-NEXT: vaddps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x58,0xd1]
8399 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8400 ; X86-NEXT: retl ## encoding: [0xc3]
8401 ;
8402 ; X64-LABEL: test_mm512_mask_add_round_ps_rn_sae:
8403 ; X64: ## %bb.0:
8404 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8405 ; X64-NEXT: vaddps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x58,0xd1]
8406 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8407 ; X64-NEXT: retq ## encoding: [0xc3]
8408 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 8)
8409 ret <16 x float> %res
8410 }
8411 define <16 x float> @test_mm512_mask_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8412 ; X86-LABEL: test_mm512_mask_add_round_ps_rd_sae:
8413 ; X86: ## %bb.0:
8414 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8415 ; X86-NEXT: vaddps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x58,0xd1]
8416 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8417 ; X86-NEXT: retl ## encoding: [0xc3]
8418 ;
8419 ; X64-LABEL: test_mm512_mask_add_round_ps_rd_sae:
8420 ; X64: ## %bb.0:
8421 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8422 ; X64-NEXT: vaddps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x58,0xd1]
8423 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8424 ; X64-NEXT: retq ## encoding: [0xc3]
8425 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 9)
8426 ret <16 x float> %res
8427 }
8428 define <16 x float> @test_mm512_mask_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8429 ; X86-LABEL: test_mm512_mask_add_round_ps_ru_sae:
8430 ; X86: ## %bb.0:
8431 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8432 ; X86-NEXT: vaddps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x58,0xd1]
8433 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8434 ; X86-NEXT: retl ## encoding: [0xc3]
8435 ;
8436 ; X64-LABEL: test_mm512_mask_add_round_ps_ru_sae:
8437 ; X64: ## %bb.0:
8438 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8439 ; X64-NEXT: vaddps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x58,0xd1]
8440 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8441 ; X64-NEXT: retq ## encoding: [0xc3]
8442 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 10)
8443 ret <16 x float> %res
8444 }
8446 define <16 x float> @test_mm512_mask_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8447 ; X86-LABEL: test_mm512_mask_add_round_ps_rz_sae:
8448 ; X86: ## %bb.0:
8449 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8450 ; X86-NEXT: vaddps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x58,0xd1]
8451 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8452 ; X86-NEXT: retl ## encoding: [0xc3]
8453 ;
8454 ; X64-LABEL: test_mm512_mask_add_round_ps_rz_sae:
8455 ; X64: ## %bb.0:
8456 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8457 ; X64-NEXT: vaddps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x58,0xd1]
8458 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8459 ; X64-NEXT: retq ## encoding: [0xc3]
8460 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 11)
8461 ret <16 x float> %res
8462 }
8465 define <16 x float> @test_mm512_mask_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8466 ; X86-LABEL: test_mm512_mask_add_round_ps_current:
8467 ; X86: ## %bb.0:
8468 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8469 ; X86-NEXT: vaddps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x58,0xd1]
8470 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8471 ; X86-NEXT: retl ## encoding: [0xc3]
8472 ;
8473 ; X64-LABEL: test_mm512_mask_add_round_ps_current:
8474 ; X64: ## %bb.0:
8475 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8476 ; X64-NEXT: vaddps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x58,0xd1]
8477 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8478 ; X64-NEXT: retq ## encoding: [0xc3]
8479 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
8480 ret <16 x float> %res
8481 }
8484 define <16 x float> @test_mm512_add_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8485 ; CHECK-LABEL: test_mm512_add_round_ps_rn_sae:
8486 ; CHECK: ## %bb.0:
8487 ; CHECK-NEXT: vaddps {rn-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x58,0xc1]
8488 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8489 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 8)
8490 ret <16 x float> %res
8491 }
8492 define <16 x float> @test_mm512_add_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8493 ; CHECK-LABEL: test_mm512_add_round_ps_rd_sae:
8494 ; CHECK: ## %bb.0:
8495 ; CHECK-NEXT: vaddps {rd-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x38,0x58,0xc1]
8496 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8497 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 9)
8498 ret <16 x float> %res
8499 }
8500 define <16 x float> @test_mm512_add_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8501 ; CHECK-LABEL: test_mm512_add_round_ps_ru_sae:
8502 ; CHECK: ## %bb.0:
8503 ; CHECK-NEXT: vaddps {ru-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x58,0x58,0xc1]
8504 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8505 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 10)
8506 ret <16 x float> %res
8507 }
8509 define <16 x float> @test_mm512_add_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8510 ; CHECK-LABEL: test_mm512_add_round_ps_rz_sae:
8511 ; CHECK: ## %bb.0:
8512 ; CHECK-NEXT: vaddps {rz-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x78,0x58,0xc1]
8513 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8514 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 11)
8515 ret <16 x float> %res
8516 }
8518 define <16 x float> @test_mm512_add_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8519 ; CHECK-LABEL: test_mm512_add_round_ps_current:
8520 ; CHECK: ## %bb.0:
8521 ; CHECK-NEXT: vaddps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x58,0xc1]
8522 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8523 %res = call <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
8524 ret <16 x float> %res
8525 }
8526 declare <16 x float> @llvm.x86.avx512.mask.add.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
8528 define <16 x float> @test_mm512_mask_sub_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8529 ; X86-LABEL: test_mm512_mask_sub_round_ps_rn_sae:
8530 ; X86: ## %bb.0:
8531 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8532 ; X86-NEXT: vsubps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x5c,0xd1]
8533 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8534 ; X86-NEXT: retl ## encoding: [0xc3]
8535 ;
8536 ; X64-LABEL: test_mm512_mask_sub_round_ps_rn_sae:
8537 ; X64: ## %bb.0:
8538 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8539 ; X64-NEXT: vsubps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x5c,0xd1]
8540 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8541 ; X64-NEXT: retq ## encoding: [0xc3]
8542 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 8)
8543 ret <16 x float> %res
8544 }
8545 define <16 x float> @test_mm512_mask_sub_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8546 ; X86-LABEL: test_mm512_mask_sub_round_ps_rd_sae:
8547 ; X86: ## %bb.0:
8548 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8549 ; X86-NEXT: vsubps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x5c,0xd1]
8550 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8551 ; X86-NEXT: retl ## encoding: [0xc3]
8552 ;
8553 ; X64-LABEL: test_mm512_mask_sub_round_ps_rd_sae:
8554 ; X64: ## %bb.0:
8555 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8556 ; X64-NEXT: vsubps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x5c,0xd1]
8557 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8558 ; X64-NEXT: retq ## encoding: [0xc3]
8559 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 9)
8560 ret <16 x float> %res
8561 }
8562 define <16 x float> @test_mm512_mask_sub_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8563 ; X86-LABEL: test_mm512_mask_sub_round_ps_ru_sae:
8564 ; X86: ## %bb.0:
8565 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8566 ; X86-NEXT: vsubps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x5c,0xd1]
8567 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8568 ; X86-NEXT: retl ## encoding: [0xc3]
8569 ;
8570 ; X64-LABEL: test_mm512_mask_sub_round_ps_ru_sae:
8571 ; X64: ## %bb.0:
8572 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8573 ; X64-NEXT: vsubps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x5c,0xd1]
8574 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8575 ; X64-NEXT: retq ## encoding: [0xc3]
8576 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 10)
8577 ret <16 x float> %res
8578 }
8580 define <16 x float> @test_mm512_mask_sub_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8581 ; X86-LABEL: test_mm512_mask_sub_round_ps_rz_sae:
8582 ; X86: ## %bb.0:
8583 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8584 ; X86-NEXT: vsubps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x5c,0xd1]
8585 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8586 ; X86-NEXT: retl ## encoding: [0xc3]
8587 ;
8588 ; X64-LABEL: test_mm512_mask_sub_round_ps_rz_sae:
8589 ; X64: ## %bb.0:
8590 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8591 ; X64-NEXT: vsubps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x5c,0xd1]
8592 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8593 ; X64-NEXT: retq ## encoding: [0xc3]
8594 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 11)
8595 ret <16 x float> %res
8596 }
8599 define <16 x float> @test_mm512_mask_sub_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8600 ; X86-LABEL: test_mm512_mask_sub_round_ps_current:
8601 ; X86: ## %bb.0:
8602 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8603 ; X86-NEXT: vsubps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5c,0xd1]
8604 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8605 ; X86-NEXT: retl ## encoding: [0xc3]
8606 ;
8607 ; X64-LABEL: test_mm512_mask_sub_round_ps_current:
8608 ; X64: ## %bb.0:
8609 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8610 ; X64-NEXT: vsubps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5c,0xd1]
8611 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8612 ; X64-NEXT: retq ## encoding: [0xc3]
8613 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
8614 ret <16 x float> %res
8615 }
8617 define <16 x float> @test_mm512_sub_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8618 ; CHECK-LABEL: test_mm512_sub_round_ps_rn_sae:
8619 ; CHECK: ## %bb.0:
8620 ; CHECK-NEXT: vsubps {rn-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x5c,0xc1]
8621 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8622 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 8)
8623 ret <16 x float> %res
8624 }
8625 define <16 x float> @test_mm512_sub_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8626 ; CHECK-LABEL: test_mm512_sub_round_ps_rd_sae:
8627 ; CHECK: ## %bb.0:
8628 ; CHECK-NEXT: vsubps {rd-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x38,0x5c,0xc1]
8629 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8630 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 9)
8631 ret <16 x float> %res
8632 }
8633 define <16 x float> @test_mm512_sub_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8634 ; CHECK-LABEL: test_mm512_sub_round_ps_ru_sae:
8635 ; CHECK: ## %bb.0:
8636 ; CHECK-NEXT: vsubps {ru-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x58,0x5c,0xc1]
8637 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8638 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 10)
8639 ret <16 x float> %res
8640 }
8642 define <16 x float> @test_mm512_sub_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8643 ; CHECK-LABEL: test_mm512_sub_round_ps_rz_sae:
8644 ; CHECK: ## %bb.0:
8645 ; CHECK-NEXT: vsubps {rz-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x78,0x5c,0xc1]
8646 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8647 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 11)
8648 ret <16 x float> %res
8649 }
8651 define <16 x float> @test_mm512_sub_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8652 ; CHECK-LABEL: test_mm512_sub_round_ps_current:
8653 ; CHECK: ## %bb.0:
8654 ; CHECK-NEXT: vsubps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x5c,0xc1]
8655 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8656 %res = call <16 x float> @llvm.x86.avx512.mask.sub.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
8657 ret <16 x float> %res
8658 }
8660 define <16 x float> @test_mm512_maskz_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8661 ; X86-LABEL: test_mm512_maskz_div_round_ps_rn_sae:
8662 ; X86: ## %bb.0:
8663 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8664 ; X86-NEXT: vdivps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x5e,0xc1]
8665 ; X86-NEXT: retl ## encoding: [0xc3]
8666 ;
8667 ; X64-LABEL: test_mm512_maskz_div_round_ps_rn_sae:
8668 ; X64: ## %bb.0:
8669 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8670 ; X64-NEXT: vdivps {rn-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x5e,0xc1]
8671 ; X64-NEXT: retq ## encoding: [0xc3]
8672 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 8)
8673 ret <16 x float> %res
8674 }
8675 define <16 x float> @test_mm512_maskz_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8676 ; X86-LABEL: test_mm512_maskz_div_round_ps_rd_sae:
8677 ; X86: ## %bb.0:
8678 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8679 ; X86-NEXT: vdivps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xb9,0x5e,0xc1]
8680 ; X86-NEXT: retl ## encoding: [0xc3]
8681 ;
8682 ; X64-LABEL: test_mm512_maskz_div_round_ps_rd_sae:
8683 ; X64: ## %bb.0:
8684 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8685 ; X64-NEXT: vdivps {rd-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xb9,0x5e,0xc1]
8686 ; X64-NEXT: retq ## encoding: [0xc3]
8687 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 9)
8688 ret <16 x float> %res
8689 }
8690 define <16 x float> @test_mm512_maskz_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8691 ; X86-LABEL: test_mm512_maskz_div_round_ps_ru_sae:
8692 ; X86: ## %bb.0:
8693 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8694 ; X86-NEXT: vdivps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xd9,0x5e,0xc1]
8695 ; X86-NEXT: retl ## encoding: [0xc3]
8696 ;
8697 ; X64-LABEL: test_mm512_maskz_div_round_ps_ru_sae:
8698 ; X64: ## %bb.0:
8699 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8700 ; X64-NEXT: vdivps {ru-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xd9,0x5e,0xc1]
8701 ; X64-NEXT: retq ## encoding: [0xc3]
8702 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 10)
8703 ret <16 x float> %res
8704 }
8706 define <16 x float> @test_mm512_maskz_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8707 ; X86-LABEL: test_mm512_maskz_div_round_ps_rz_sae:
8708 ; X86: ## %bb.0:
8709 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8710 ; X86-NEXT: vdivps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x5e,0xc1]
8711 ; X86-NEXT: retl ## encoding: [0xc3]
8712 ;
8713 ; X64-LABEL: test_mm512_maskz_div_round_ps_rz_sae:
8714 ; X64: ## %bb.0:
8715 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8716 ; X64-NEXT: vdivps {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x5e,0xc1]
8717 ; X64-NEXT: retq ## encoding: [0xc3]
8718 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 11)
8719 ret <16 x float> %res
8720 }
8723 define <16 x float> @test_mm512_maskz_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8724 ; X86-LABEL: test_mm512_maskz_div_round_ps_current:
8725 ; X86: ## %bb.0:
8726 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8727 ; X86-NEXT: vdivps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x5e,0xc1]
8728 ; X86-NEXT: retl ## encoding: [0xc3]
8729 ;
8730 ; X64-LABEL: test_mm512_maskz_div_round_ps_current:
8731 ; X64: ## %bb.0:
8732 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8733 ; X64-NEXT: vdivps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x5e,0xc1]
8734 ; X64-NEXT: retq ## encoding: [0xc3]
8735 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 4)
8736 ret <16 x float> %res
8737 }
8739 define <16 x float> @test_mm512_mask_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8740 ; X86-LABEL: test_mm512_mask_div_round_ps_rn_sae:
8741 ; X86: ## %bb.0:
8742 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8743 ; X86-NEXT: vdivps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x5e,0xd1]
8744 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8745 ; X86-NEXT: retl ## encoding: [0xc3]
8746 ;
8747 ; X64-LABEL: test_mm512_mask_div_round_ps_rn_sae:
8748 ; X64: ## %bb.0:
8749 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8750 ; X64-NEXT: vdivps {rn-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x5e,0xd1]
8751 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8752 ; X64-NEXT: retq ## encoding: [0xc3]
8753 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 8)
8754 ret <16 x float> %res
8755 }
8756 define <16 x float> @test_mm512_mask_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8757 ; X86-LABEL: test_mm512_mask_div_round_ps_rd_sae:
8758 ; X86: ## %bb.0:
8759 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8760 ; X86-NEXT: vdivps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x5e,0xd1]
8761 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8762 ; X86-NEXT: retl ## encoding: [0xc3]
8763 ;
8764 ; X64-LABEL: test_mm512_mask_div_round_ps_rd_sae:
8765 ; X64: ## %bb.0:
8766 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8767 ; X64-NEXT: vdivps {rd-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x39,0x5e,0xd1]
8768 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8769 ; X64-NEXT: retq ## encoding: [0xc3]
8770 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 9)
8771 ret <16 x float> %res
8772 }
8773 define <16 x float> @test_mm512_mask_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8774 ; X86-LABEL: test_mm512_mask_div_round_ps_ru_sae:
8775 ; X86: ## %bb.0:
8776 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8777 ; X86-NEXT: vdivps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x5e,0xd1]
8778 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8779 ; X86-NEXT: retl ## encoding: [0xc3]
8780 ;
8781 ; X64-LABEL: test_mm512_mask_div_round_ps_ru_sae:
8782 ; X64: ## %bb.0:
8783 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8784 ; X64-NEXT: vdivps {ru-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x59,0x5e,0xd1]
8785 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8786 ; X64-NEXT: retq ## encoding: [0xc3]
8787 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 10)
8788 ret <16 x float> %res
8789 }
8791 define <16 x float> @test_mm512_mask_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8792 ; X86-LABEL: test_mm512_mask_div_round_ps_rz_sae:
8793 ; X86: ## %bb.0:
8794 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8795 ; X86-NEXT: vdivps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x5e,0xd1]
8796 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8797 ; X86-NEXT: retl ## encoding: [0xc3]
8798 ;
8799 ; X64-LABEL: test_mm512_mask_div_round_ps_rz_sae:
8800 ; X64: ## %bb.0:
8801 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8802 ; X64-NEXT: vdivps {rz-sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x5e,0xd1]
8803 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8804 ; X64-NEXT: retq ## encoding: [0xc3]
8805 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 11)
8806 ret <16 x float> %res
8807 }
8810 define <16 x float> @test_mm512_mask_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
8811 ; X86-LABEL: test_mm512_mask_div_round_ps_current:
8812 ; X86: ## %bb.0:
8813 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
8814 ; X86-NEXT: vdivps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5e,0xd1]
8815 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8816 ; X86-NEXT: retl ## encoding: [0xc3]
8817 ;
8818 ; X64-LABEL: test_mm512_mask_div_round_ps_current:
8819 ; X64: ## %bb.0:
8820 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
8821 ; X64-NEXT: vdivps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5e,0xd1]
8822 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
8823 ; X64-NEXT: retq ## encoding: [0xc3]
8824 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
8825 ret <16 x float> %res
8826 }
8829 define <16 x float> @test_mm512_div_round_ps_rn_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8830 ; CHECK-LABEL: test_mm512_div_round_ps_rn_sae:
8831 ; CHECK: ## %bb.0:
8832 ; CHECK-NEXT: vdivps {rn-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x5e,0xc1]
8833 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8834 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 8)
8835 ret <16 x float> %res
8836 }
8837 define <16 x float> @test_mm512_div_round_ps_rd_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8838 ; CHECK-LABEL: test_mm512_div_round_ps_rd_sae:
8839 ; CHECK: ## %bb.0:
8840 ; CHECK-NEXT: vdivps {rd-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x38,0x5e,0xc1]
8841 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8842 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 9)
8843 ret <16 x float> %res
8844 }
8845 define <16 x float> @test_mm512_div_round_ps_ru_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8846 ; CHECK-LABEL: test_mm512_div_round_ps_ru_sae:
8847 ; CHECK: ## %bb.0:
8848 ; CHECK-NEXT: vdivps {ru-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x58,0x5e,0xc1]
8849 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8850 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 10)
8851 ret <16 x float> %res
8852 }
8854 define <16 x float> @test_mm512_div_round_ps_rz_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8855 ; CHECK-LABEL: test_mm512_div_round_ps_rz_sae:
8856 ; CHECK: ## %bb.0:
8857 ; CHECK-NEXT: vdivps {rz-sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x78,0x5e,0xc1]
8858 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8859 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 11)
8860 ret <16 x float> %res
8861 }
8863 define <16 x float> @test_mm512_div_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
8864 ; CHECK-LABEL: test_mm512_div_round_ps_current:
8865 ; CHECK: ## %bb.0:
8866 ; CHECK-NEXT: vdivps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x5e,0xc1]
8867 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
8868 %res = call <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
8869 ret <16 x float> %res
8870 }
8871 declare <16 x float> @llvm.x86.avx512.mask.div.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
8873 define void @test_mask_compress_store_pd_512(ptr %addr, <8 x double> %data, i8 %mask) {
8874 ; X86-LABEL: test_mask_compress_store_pd_512:
8875 ; X86: ## %bb.0:
8876 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
8877 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
8878 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
8879 ; X86-NEXT: vcompresspd %zmm0, (%eax) {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8a,0x00]
8880 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8881 ; X86-NEXT: retl ## encoding: [0xc3]
8882 ;
8883 ; X64-LABEL: test_mask_compress_store_pd_512:
8884 ; X64: ## %bb.0:
8885 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
8886 ; X64-NEXT: vcompresspd %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8a,0x07]
8887 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8888 ; X64-NEXT: retq ## encoding: [0xc3]
8889 call void @llvm.x86.avx512.mask.compress.store.pd.512(ptr %addr, <8 x double> %data, i8 %mask)
8890 ret void
8891 }
8893 declare void @llvm.x86.avx512.mask.compress.store.pd.512(ptr %addr, <8 x double> %data, i8 %mask)
8895 define void @test_compress_store_pd_512(ptr %addr, <8 x double> %data) {
8896 ; X86-LABEL: test_compress_store_pd_512:
8897 ; X86: ## %bb.0:
8898 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
8899 ; X86-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
8900 ; X86-NEXT: vcompresspd %zmm0, (%eax) {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8a,0x00]
8901 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8902 ; X86-NEXT: retl ## encoding: [0xc3]
8903 ;
8904 ; X64-LABEL: test_compress_store_pd_512:
8905 ; X64: ## %bb.0:
8906 ; X64-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
8907 ; X64-NEXT: vcompresspd %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8a,0x07]
8908 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8909 ; X64-NEXT: retq ## encoding: [0xc3]
8910 call void @llvm.x86.avx512.mask.compress.store.pd.512(ptr %addr, <8 x double> %data, i8 -1)
8911 ret void
8912 }
8914 define void @test_mask_compress_store_ps_512(ptr %addr, <16 x float> %data, i16 %mask) {
8915 ; X86-LABEL: test_mask_compress_store_ps_512:
8916 ; X86: ## %bb.0:
8917 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
8918 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
8919 ; X86-NEXT: vcompressps %zmm0, (%eax) {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8a,0x00]
8920 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8921 ; X86-NEXT: retl ## encoding: [0xc3]
8922 ;
8923 ; X64-LABEL: test_mask_compress_store_ps_512:
8924 ; X64: ## %bb.0:
8925 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
8926 ; X64-NEXT: vcompressps %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8a,0x07]
8927 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8928 ; X64-NEXT: retq ## encoding: [0xc3]
8929 call void @llvm.x86.avx512.mask.compress.store.ps.512(ptr %addr, <16 x float> %data, i16 %mask)
8930 ret void
8931 }
8933 declare void @llvm.x86.avx512.mask.compress.store.ps.512(ptr %addr, <16 x float> %data, i16 %mask)
8935 define void @test_compress_store_ps_512(ptr %addr, <16 x float> %data) {
8936 ; X86-LABEL: test_compress_store_ps_512:
8937 ; X86: ## %bb.0:
8938 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
8939 ; X86-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
8940 ; X86-NEXT: vcompressps %zmm0, (%eax) {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8a,0x00]
8941 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8942 ; X86-NEXT: retl ## encoding: [0xc3]
8943 ;
8944 ; X64-LABEL: test_compress_store_ps_512:
8945 ; X64: ## %bb.0:
8946 ; X64-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
8947 ; X64-NEXT: vcompressps %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8a,0x07]
8948 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8949 ; X64-NEXT: retq ## encoding: [0xc3]
8950 call void @llvm.x86.avx512.mask.compress.store.ps.512(ptr %addr, <16 x float> %data, i16 -1)
8951 ret void
8952 }
8954 define void @test_mask_compress_store_q_512(ptr %addr, <8 x i64> %data, i8 %mask) {
8955 ; X86-LABEL: test_mask_compress_store_q_512:
8956 ; X86: ## %bb.0:
8957 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
8958 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
8959 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
8960 ; X86-NEXT: vpcompressq %zmm0, (%eax) {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8b,0x00]
8961 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8962 ; X86-NEXT: retl ## encoding: [0xc3]
8963 ;
8964 ; X64-LABEL: test_mask_compress_store_q_512:
8965 ; X64: ## %bb.0:
8966 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
8967 ; X64-NEXT: vpcompressq %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8b,0x07]
8968 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8969 ; X64-NEXT: retq ## encoding: [0xc3]
8970 call void @llvm.x86.avx512.mask.compress.store.q.512(ptr %addr, <8 x i64> %data, i8 %mask)
8971 ret void
8972 }
8974 declare void @llvm.x86.avx512.mask.compress.store.q.512(ptr %addr, <8 x i64> %data, i8 %mask)
8976 define void @test_compress_store_q_512(ptr %addr, <8 x i64> %data) {
8977 ; X86-LABEL: test_compress_store_q_512:
8978 ; X86: ## %bb.0:
8979 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
8980 ; X86-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
8981 ; X86-NEXT: vpcompressq %zmm0, (%eax) {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8b,0x00]
8982 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8983 ; X86-NEXT: retl ## encoding: [0xc3]
8984 ;
8985 ; X64-LABEL: test_compress_store_q_512:
8986 ; X64: ## %bb.0:
8987 ; X64-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
8988 ; X64-NEXT: vpcompressq %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8b,0x07]
8989 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
8990 ; X64-NEXT: retq ## encoding: [0xc3]
8991 call void @llvm.x86.avx512.mask.compress.store.q.512(ptr %addr, <8 x i64> %data, i8 -1)
8992 ret void
8993 }
8995 define void @test_mask_compress_store_d_512(ptr %addr, <16 x i32> %data, i16 %mask) {
8996 ; X86-LABEL: test_mask_compress_store_d_512:
8997 ; X86: ## %bb.0:
8998 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
8999 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
9000 ; X86-NEXT: vpcompressd %zmm0, (%eax) {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8b,0x00]
9001 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
9002 ; X86-NEXT: retl ## encoding: [0xc3]
9003 ;
9004 ; X64-LABEL: test_mask_compress_store_d_512:
9005 ; X64: ## %bb.0:
9006 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9007 ; X64-NEXT: vpcompressd %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8b,0x07]
9008 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
9009 ; X64-NEXT: retq ## encoding: [0xc3]
9010 call void @llvm.x86.avx512.mask.compress.store.d.512(ptr %addr, <16 x i32> %data, i16 %mask)
9011 ret void
9012 }
9014 declare void @llvm.x86.avx512.mask.compress.store.d.512(ptr %addr, <16 x i32> %data, i16 %mask)
9016 define void @test_compress_store_d_512(ptr %addr, <16 x i32> %data) {
9017 ; X86-LABEL: test_compress_store_d_512:
9018 ; X86: ## %bb.0:
9019 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9020 ; X86-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9021 ; X86-NEXT: vpcompressd %zmm0, (%eax) {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8b,0x00]
9022 ; X86-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
9023 ; X86-NEXT: retl ## encoding: [0xc3]
9024 ;
9025 ; X64-LABEL: test_compress_store_d_512:
9026 ; X64: ## %bb.0:
9027 ; X64-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9028 ; X64-NEXT: vpcompressd %zmm0, (%rdi) {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8b,0x07]
9029 ; X64-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
9030 ; X64-NEXT: retq ## encoding: [0xc3]
9031 call void @llvm.x86.avx512.mask.compress.store.d.512(ptr %addr, <16 x i32> %data, i16 -1)
9032 ret void
9033 }
9035 define <8 x double> @test_mask_expand_load_pd_512(ptr %addr, <8 x double> %data, i8 %mask) {
9036 ; X86-LABEL: test_mask_expand_load_pd_512:
9037 ; X86: ## %bb.0:
9038 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9039 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
9040 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
9041 ; X86-NEXT: vexpandpd (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x88,0x00]
9042 ; X86-NEXT: retl ## encoding: [0xc3]
9043 ;
9044 ; X64-LABEL: test_mask_expand_load_pd_512:
9045 ; X64: ## %bb.0:
9046 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9047 ; X64-NEXT: vexpandpd (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x88,0x07]
9048 ; X64-NEXT: retq ## encoding: [0xc3]
9049 %res = call <8 x double> @llvm.x86.avx512.mask.expand.load.pd.512(ptr %addr, <8 x double> %data, i8 %mask)
9050 ret <8 x double> %res
9051 }
9053 define <8 x double> @test_maskz_expand_load_pd_512(ptr %addr, i8 %mask) {
9054 ; X86-LABEL: test_maskz_expand_load_pd_512:
9055 ; X86: ## %bb.0:
9056 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9057 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
9058 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
9059 ; X86-NEXT: vexpandpd (%eax), %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x88,0x00]
9060 ; X86-NEXT: retl ## encoding: [0xc3]
9061 ;
9062 ; X64-LABEL: test_maskz_expand_load_pd_512:
9063 ; X64: ## %bb.0:
9064 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9065 ; X64-NEXT: vexpandpd (%rdi), %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x88,0x07]
9066 ; X64-NEXT: retq ## encoding: [0xc3]
9067 %res = call <8 x double> @llvm.x86.avx512.mask.expand.load.pd.512(ptr %addr, <8 x double> zeroinitializer, i8 %mask)
9068 ret <8 x double> %res
9069 }
9071 declare <8 x double> @llvm.x86.avx512.mask.expand.load.pd.512(ptr %addr, <8 x double> %data, i8 %mask)
9073 define <8 x double> @test_expand_load_pd_512(ptr %addr, <8 x double> %data) {
9074 ; X86-LABEL: test_expand_load_pd_512:
9075 ; X86: ## %bb.0:
9076 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9077 ; X86-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9078 ; X86-NEXT: vexpandpd (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x88,0x00]
9079 ; X86-NEXT: retl ## encoding: [0xc3]
9080 ;
9081 ; X64-LABEL: test_expand_load_pd_512:
9082 ; X64: ## %bb.0:
9083 ; X64-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9084 ; X64-NEXT: vexpandpd (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x88,0x07]
9085 ; X64-NEXT: retq ## encoding: [0xc3]
9086 %res = call <8 x double> @llvm.x86.avx512.mask.expand.load.pd.512(ptr %addr, <8 x double> %data, i8 -1)
9087 ret <8 x double> %res
9088 }
9090 ; Make sure we don't crash if you pass 0 to the mask.
9091 define <8 x double> @test_zero_mask_expand_load_pd_512(ptr %addr, <8 x double> %data, i8 %mask) {
9092 ; CHECK-LABEL: test_zero_mask_expand_load_pd_512:
9093 ; CHECK: ## %bb.0:
9094 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9095 %res = call <8 x double> @llvm.x86.avx512.mask.expand.load.pd.512(ptr %addr, <8 x double> %data, i8 0)
9096 ret <8 x double> %res
9097 }
9099 define <16 x float> @test_mask_expand_load_ps_512(ptr %addr, <16 x float> %data, i16 %mask) {
9100 ; X86-LABEL: test_mask_expand_load_ps_512:
9101 ; X86: ## %bb.0:
9102 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9103 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
9104 ; X86-NEXT: vexpandps (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x88,0x00]
9105 ; X86-NEXT: retl ## encoding: [0xc3]
9106 ;
9107 ; X64-LABEL: test_mask_expand_load_ps_512:
9108 ; X64: ## %bb.0:
9109 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9110 ; X64-NEXT: vexpandps (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x88,0x07]
9111 ; X64-NEXT: retq ## encoding: [0xc3]
9112 %res = call <16 x float> @llvm.x86.avx512.mask.expand.load.ps.512(ptr %addr, <16 x float> %data, i16 %mask)
9113 ret <16 x float> %res
9114 }
9116 define <16 x float> @test_maskz_expand_load_ps_512(ptr %addr, i16 %mask) {
9117 ; X86-LABEL: test_maskz_expand_load_ps_512:
9118 ; X86: ## %bb.0:
9119 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9120 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
9121 ; X86-NEXT: vexpandps (%eax), %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x88,0x00]
9122 ; X86-NEXT: retl ## encoding: [0xc3]
9123 ;
9124 ; X64-LABEL: test_maskz_expand_load_ps_512:
9125 ; X64: ## %bb.0:
9126 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9127 ; X64-NEXT: vexpandps (%rdi), %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x88,0x07]
9128 ; X64-NEXT: retq ## encoding: [0xc3]
9129 %res = call <16 x float> @llvm.x86.avx512.mask.expand.load.ps.512(ptr %addr, <16 x float> zeroinitializer, i16 %mask)
9130 ret <16 x float> %res
9131 }
9133 declare <16 x float> @llvm.x86.avx512.mask.expand.load.ps.512(ptr %addr, <16 x float> %data, i16 %mask)
9135 define <16 x float> @test_expand_load_ps_512(ptr %addr, <16 x float> %data) {
9136 ; X86-LABEL: test_expand_load_ps_512:
9137 ; X86: ## %bb.0:
9138 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9139 ; X86-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9140 ; X86-NEXT: vexpandps (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x88,0x00]
9141 ; X86-NEXT: retl ## encoding: [0xc3]
9142 ;
9143 ; X64-LABEL: test_expand_load_ps_512:
9144 ; X64: ## %bb.0:
9145 ; X64-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9146 ; X64-NEXT: vexpandps (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x88,0x07]
9147 ; X64-NEXT: retq ## encoding: [0xc3]
9148 %res = call <16 x float> @llvm.x86.avx512.mask.expand.load.ps.512(ptr %addr, <16 x float> %data, i16 -1)
9149 ret <16 x float> %res
9150 }
9152 define <8 x i64> @test_mask_expand_load_q_512(ptr %addr, <8 x i64> %data, i8 %mask) {
9153 ; X86-LABEL: test_mask_expand_load_q_512:
9154 ; X86: ## %bb.0:
9155 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9156 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
9157 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
9158 ; X86-NEXT: vpexpandq (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x89,0x00]
9159 ; X86-NEXT: retl ## encoding: [0xc3]
9160 ;
9161 ; X64-LABEL: test_mask_expand_load_q_512:
9162 ; X64: ## %bb.0:
9163 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9164 ; X64-NEXT: vpexpandq (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x89,0x07]
9165 ; X64-NEXT: retq ## encoding: [0xc3]
9166 %res = call <8 x i64> @llvm.x86.avx512.mask.expand.load.q.512(ptr %addr, <8 x i64> %data, i8 %mask)
9167 ret <8 x i64> %res
9168 }
9170 define <8 x i64> @test_maskz_expand_load_q_512(ptr %addr, i8 %mask) {
9171 ; X86-LABEL: test_maskz_expand_load_q_512:
9172 ; X86: ## %bb.0:
9173 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9174 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
9175 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
9176 ; X86-NEXT: vpexpandq (%eax), %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x89,0x00]
9177 ; X86-NEXT: retl ## encoding: [0xc3]
9178 ;
9179 ; X64-LABEL: test_maskz_expand_load_q_512:
9180 ; X64: ## %bb.0:
9181 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9182 ; X64-NEXT: vpexpandq (%rdi), %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x89,0x07]
9183 ; X64-NEXT: retq ## encoding: [0xc3]
9184 %res = call <8 x i64> @llvm.x86.avx512.mask.expand.load.q.512(ptr %addr, <8 x i64> zeroinitializer, i8 %mask)
9185 ret <8 x i64> %res
9186 }
9188 declare <8 x i64> @llvm.x86.avx512.mask.expand.load.q.512(ptr %addr, <8 x i64> %data, i8 %mask)
9190 define <8 x i64> @test_expand_load_q_512(ptr %addr, <8 x i64> %data) {
9191 ; X86-LABEL: test_expand_load_q_512:
9192 ; X86: ## %bb.0:
9193 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9194 ; X86-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9195 ; X86-NEXT: vpexpandq (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x89,0x00]
9196 ; X86-NEXT: retl ## encoding: [0xc3]
9197 ;
9198 ; X64-LABEL: test_expand_load_q_512:
9199 ; X64: ## %bb.0:
9200 ; X64-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9201 ; X64-NEXT: vpexpandq (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x89,0x07]
9202 ; X64-NEXT: retq ## encoding: [0xc3]
9203 %res = call <8 x i64> @llvm.x86.avx512.mask.expand.load.q.512(ptr %addr, <8 x i64> %data, i8 -1)
9204 ret <8 x i64> %res
9205 }
9207 define <16 x i32> @test_mask_expand_load_d_512(ptr %addr, <16 x i32> %data, i16 %mask) {
9208 ; X86-LABEL: test_mask_expand_load_d_512:
9209 ; X86: ## %bb.0:
9210 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9211 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
9212 ; X86-NEXT: vpexpandd (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x89,0x00]
9213 ; X86-NEXT: retl ## encoding: [0xc3]
9214 ;
9215 ; X64-LABEL: test_mask_expand_load_d_512:
9216 ; X64: ## %bb.0:
9217 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9218 ; X64-NEXT: vpexpandd (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x89,0x07]
9219 ; X64-NEXT: retq ## encoding: [0xc3]
9220 %res = call <16 x i32> @llvm.x86.avx512.mask.expand.load.d.512(ptr %addr, <16 x i32> %data, i16 %mask)
9221 ret <16 x i32> %res
9222 }
9224 define <16 x i32> @test_maskz_expand_load_d_512(ptr %addr, i16 %mask) {
9225 ; X86-LABEL: test_maskz_expand_load_d_512:
9226 ; X86: ## %bb.0:
9227 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9228 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
9229 ; X86-NEXT: vpexpandd (%eax), %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x89,0x00]
9230 ; X86-NEXT: retl ## encoding: [0xc3]
9231 ;
9232 ; X64-LABEL: test_maskz_expand_load_d_512:
9233 ; X64: ## %bb.0:
9234 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9235 ; X64-NEXT: vpexpandd (%rdi), %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x89,0x07]
9236 ; X64-NEXT: retq ## encoding: [0xc3]
9237 %res = call <16 x i32> @llvm.x86.avx512.mask.expand.load.d.512(ptr %addr, <16 x i32> zeroinitializer, i16 %mask)
9238 ret <16 x i32> %res
9239 }
9241 declare <16 x i32> @llvm.x86.avx512.mask.expand.load.d.512(ptr %addr, <16 x i32> %data, i16 %mask)
9243 define <16 x i32> @test_expand_load_d_512(ptr %addr, <16 x i32> %data) {
9244 ; X86-LABEL: test_expand_load_d_512:
9245 ; X86: ## %bb.0:
9246 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
9247 ; X86-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9248 ; X86-NEXT: vpexpandd (%eax), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x89,0x00]
9249 ; X86-NEXT: retl ## encoding: [0xc3]
9250 ;
9251 ; X64-LABEL: test_expand_load_d_512:
9252 ; X64: ## %bb.0:
9253 ; X64-NEXT: kxnorw %k0, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc8]
9254 ; X64-NEXT: vpexpandd (%rdi), %zmm0 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x89,0x07]
9255 ; X64-NEXT: retq ## encoding: [0xc3]
9256 %res = call <16 x i32> @llvm.x86.avx512.mask.expand.load.d.512(ptr %addr, <16 x i32> %data, i16 -1)
9257 ret <16 x i32> %res
9258 }
9260 define <16 x float> @test_mm512_maskz_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
9261 ; X86-LABEL: test_mm512_maskz_min_round_ps_sae:
9262 ; X86: ## %bb.0:
9263 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9264 ; X86-NEXT: vminps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x5d,0xc1]
9265 ; X86-NEXT: retl ## encoding: [0xc3]
9266 ;
9267 ; X64-LABEL: test_mm512_maskz_min_round_ps_sae:
9268 ; X64: ## %bb.0:
9269 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9270 ; X64-NEXT: vminps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x5d,0xc1]
9271 ; X64-NEXT: retq ## encoding: [0xc3]
9272 %res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 8)
9273 ret <16 x float> %res
9274 }
9276 define <16 x float> @test_mm512_maskz_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
9277 ; X86-LABEL: test_mm512_maskz_min_round_ps_current:
9278 ; X86: ## %bb.0:
9279 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9280 ; X86-NEXT: vminps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x5d,0xc1]
9281 ; X86-NEXT: retl ## encoding: [0xc3]
9282 ;
9283 ; X64-LABEL: test_mm512_maskz_min_round_ps_current:
9284 ; X64: ## %bb.0:
9285 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9286 ; X64-NEXT: vminps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x5d,0xc1]
9287 ; X64-NEXT: retq ## encoding: [0xc3]
9288 %res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 4)
9289 ret <16 x float> %res
9290 }
9292 define <16 x float> @test_mm512_mask_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
9293 ; X86-LABEL: test_mm512_mask_min_round_ps_sae:
9294 ; X86: ## %bb.0:
9295 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9296 ; X86-NEXT: vminps {sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x5d,0xd1]
9297 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
9298 ; X86-NEXT: retl ## encoding: [0xc3]
9299 ;
9300 ; X64-LABEL: test_mm512_mask_min_round_ps_sae:
9301 ; X64: ## %bb.0:
9302 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9303 ; X64-NEXT: vminps {sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x5d,0xd1]
9304 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
9305 ; X64-NEXT: retq ## encoding: [0xc3]
9306 %res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 8)
9307 ret <16 x float> %res
9308 }
9310 define <16 x float> @test_mm512_mask_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
9311 ; X86-LABEL: test_mm512_mask_min_round_ps_current:
9312 ; X86: ## %bb.0:
9313 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9314 ; X86-NEXT: vminps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5d,0xd1]
9315 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
9316 ; X86-NEXT: retl ## encoding: [0xc3]
9317 ;
9318 ; X64-LABEL: test_mm512_mask_min_round_ps_current:
9319 ; X64: ## %bb.0:
9320 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9321 ; X64-NEXT: vminps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5d,0xd1]
9322 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
9323 ; X64-NEXT: retq ## encoding: [0xc3]
9324 %res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
9325 ret <16 x float> %res
9326 }
9328 define <16 x float> @test_mm512_min_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
9329 ; CHECK-LABEL: test_mm512_min_round_ps_sae:
9330 ; CHECK: ## %bb.0:
9331 ; CHECK-NEXT: vminps {sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x5d,0xc1]
9332 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9333 %res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 8)
9334 ret <16 x float> %res
9335 }
9337 define <16 x float> @test_mm512_min_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
9338 ; CHECK-LABEL: test_mm512_min_round_ps_current:
9339 ; CHECK: ## %bb.0:
9340 ; CHECK-NEXT: vminps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x5d,0xc1]
9341 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9342 %res = call <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
9343 ret <16 x float> %res
9344 }
9345 declare <16 x float> @llvm.x86.avx512.mask.min.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
9347 define <16 x float> @test_mm512_maskz_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
9348 ; X86-LABEL: test_mm512_maskz_max_round_ps_sae:
9349 ; X86: ## %bb.0:
9350 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9351 ; X86-NEXT: vmaxps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x5f,0xc1]
9352 ; X86-NEXT: retl ## encoding: [0xc3]
9353 ;
9354 ; X64-LABEL: test_mm512_maskz_max_round_ps_sae:
9355 ; X64: ## %bb.0:
9356 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9357 ; X64-NEXT: vmaxps {sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0x99,0x5f,0xc1]
9358 ; X64-NEXT: retq ## encoding: [0xc3]
9359 %res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 8)
9360 ret <16 x float> %res
9361 }
9363 define <16 x float> @test_mm512_maskz_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
9364 ; X86-LABEL: test_mm512_maskz_max_round_ps_current:
9365 ; X86: ## %bb.0:
9366 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9367 ; X86-NEXT: vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x5f,0xc1]
9368 ; X86-NEXT: retl ## encoding: [0xc3]
9369 ;
9370 ; X64-LABEL: test_mm512_maskz_max_round_ps_current:
9371 ; X64: ## %bb.0:
9372 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9373 ; X64-NEXT: vmaxps %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x5f,0xc1]
9374 ; X64-NEXT: retq ## encoding: [0xc3]
9375 %res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 %mask, i32 4)
9376 ret <16 x float> %res
9377 }
9379 define <16 x float> @test_mm512_mask_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
9380 ; X86-LABEL: test_mm512_mask_max_round_ps_sae:
9381 ; X86: ## %bb.0:
9382 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9383 ; X86-NEXT: vmaxps {sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x5f,0xd1]
9384 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
9385 ; X86-NEXT: retl ## encoding: [0xc3]
9386 ;
9387 ; X64-LABEL: test_mm512_mask_max_round_ps_sae:
9388 ; X64: ## %bb.0:
9389 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9390 ; X64-NEXT: vmaxps {sae}, %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x19,0x5f,0xd1]
9391 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
9392 ; X64-NEXT: retq ## encoding: [0xc3]
9393 %res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 8)
9394 ret <16 x float> %res
9395 }
9397 define <16 x float> @test_mm512_mask_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask) {
9398 ; X86-LABEL: test_mm512_mask_max_round_ps_current:
9399 ; X86: ## %bb.0:
9400 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9401 ; X86-NEXT: vmaxps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5f,0xd1]
9402 ; X86-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
9403 ; X86-NEXT: retl ## encoding: [0xc3]
9404 ;
9405 ; X64-LABEL: test_mm512_mask_max_round_ps_current:
9406 ; X64: ## %bb.0:
9407 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9408 ; X64-NEXT: vmaxps %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5f,0xd1]
9409 ; X64-NEXT: vmovaps %zmm2, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc2]
9410 ; X64-NEXT: retq ## encoding: [0xc3]
9411 %res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float> %src, i16 %mask, i32 4)
9412 ret <16 x float> %res
9413 }
9415 define <16 x float> @test_mm512_max_round_ps_sae(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
9416 ; CHECK-LABEL: test_mm512_max_round_ps_sae:
9417 ; CHECK: ## %bb.0:
9418 ; CHECK-NEXT: vmaxps {sae}, %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x5f,0xc1]
9419 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9420 %res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 8)
9421 ret <16 x float> %res
9422 }
9424 define <16 x float> @test_mm512_max_round_ps_current(<16 x float> %a0, <16 x float> %a1, i16 %mask) {
9425 ; CHECK-LABEL: test_mm512_max_round_ps_current:
9426 ; CHECK: ## %bb.0:
9427 ; CHECK-NEXT: vmaxps %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x5f,0xc1]
9428 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9429 %res = call <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float> %a0, <16 x float> %a1, <16 x float>zeroinitializer, i16 -1, i32 4)
9430 ret <16 x float> %res
9431 }
9432 declare <16 x float> @llvm.x86.avx512.mask.max.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
9434 define <8 x double> @test_sqrt_pd_512(<8 x double> %a0) {
9435 ; CHECK-LABEL: test_sqrt_pd_512:
9436 ; CHECK: ## %bb.0:
9437 ; CHECK-NEXT: vsqrtpd %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x51,0xc0]
9438 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9439 %res = call <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double> %a0, <8 x double> undef, i8 -1, i32 4)
9440 ret <8 x double> %res
9441 }
9442 define <8 x double> @test_mask_sqrt_pd_512(<8 x double> %a0, <8 x double> %passthru, i8 %mask) {
9443 ; X86-LABEL: test_mask_sqrt_pd_512:
9444 ; X86: ## %bb.0:
9445 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9446 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9447 ; X86-NEXT: vsqrtpd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x51,0xc8]
9448 ; X86-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
9449 ; X86-NEXT: retl ## encoding: [0xc3]
9450 ;
9451 ; X64-LABEL: test_mask_sqrt_pd_512:
9452 ; X64: ## %bb.0:
9453 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9454 ; X64-NEXT: vsqrtpd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x49,0x51,0xc8]
9455 ; X64-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
9456 ; X64-NEXT: retq ## encoding: [0xc3]
9457 %res = call <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double> %a0, <8 x double> %passthru, i8 %mask, i32 4)
9458 ret <8 x double> %res
9459 }
9460 define <8 x double> @test_maskz_sqrt_pd_512(<8 x double> %a0, i8 %mask) {
9461 ; X86-LABEL: test_maskz_sqrt_pd_512:
9462 ; X86: ## %bb.0:
9463 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9464 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9465 ; X86-NEXT: vsqrtpd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x51,0xc0]
9466 ; X86-NEXT: retl ## encoding: [0xc3]
9467 ;
9468 ; X64-LABEL: test_maskz_sqrt_pd_512:
9469 ; X64: ## %bb.0:
9470 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9471 ; X64-NEXT: vsqrtpd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xc9,0x51,0xc0]
9472 ; X64-NEXT: retq ## encoding: [0xc3]
9473 %res = call <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 %mask, i32 4)
9474 ret <8 x double> %res
9475 }
9476 define <8 x double> @test_sqrt_round_pd_512(<8 x double> %a0) {
9477 ; CHECK-LABEL: test_sqrt_round_pd_512:
9478 ; CHECK: ## %bb.0:
9479 ; CHECK-NEXT: vsqrtpd {rz-sae}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x78,0x51,0xc0]
9480 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9481 %res = call <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double> %a0, <8 x double> undef, i8 -1, i32 11)
9482 ret <8 x double> %res
9483 }
9484 define <8 x double> @test_mask_sqrt_round_pd_512(<8 x double> %a0, <8 x double> %passthru, i8 %mask) {
9485 ; X86-LABEL: test_mask_sqrt_round_pd_512:
9486 ; X86: ## %bb.0:
9487 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9488 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9489 ; X86-NEXT: vsqrtpd {rz-sae}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x79,0x51,0xc8]
9490 ; X86-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
9491 ; X86-NEXT: retl ## encoding: [0xc3]
9492 ;
9493 ; X64-LABEL: test_mask_sqrt_round_pd_512:
9494 ; X64: ## %bb.0:
9495 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9496 ; X64-NEXT: vsqrtpd {rz-sae}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0xfd,0x79,0x51,0xc8]
9497 ; X64-NEXT: vmovapd %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x28,0xc1]
9498 ; X64-NEXT: retq ## encoding: [0xc3]
9499 %res = call <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double> %a0, <8 x double> %passthru, i8 %mask, i32 11)
9500 ret <8 x double> %res
9501 }
9502 define <8 x double> @test_maskz_sqrt_round_pd_512(<8 x double> %a0, i8 %mask) {
9503 ; X86-LABEL: test_maskz_sqrt_round_pd_512:
9504 ; X86: ## %bb.0:
9505 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9506 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9507 ; X86-NEXT: vsqrtpd {rz-sae}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xf9,0x51,0xc0]
9508 ; X86-NEXT: retl ## encoding: [0xc3]
9509 ;
9510 ; X64-LABEL: test_maskz_sqrt_round_pd_512:
9511 ; X64: ## %bb.0:
9512 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9513 ; X64-NEXT: vsqrtpd {rz-sae}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xfd,0xf9,0x51,0xc0]
9514 ; X64-NEXT: retq ## encoding: [0xc3]
9515 %res = call <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double> %a0, <8 x double> zeroinitializer, i8 %mask, i32 11)
9516 ret <8 x double> %res
9517 }
9518 declare <8 x double> @llvm.x86.avx512.mask.sqrt.pd.512(<8 x double>, <8 x double>, i8, i32) nounwind readnone
9520 define <16 x float> @test_sqrt_ps_512(<16 x float> %a0) {
9521 ; CHECK-LABEL: test_sqrt_ps_512:
9522 ; CHECK: ## %bb.0:
9523 ; CHECK-NEXT: vsqrtps %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x51,0xc0]
9524 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9525 %res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> undef, i16 -1, i32 4)
9526 ret <16 x float> %res
9527 }
9528 define <16 x float> @test_mask_sqrt_ps_512(<16 x float> %a0, <16 x float> %passthru, i16 %mask) {
9529 ; X86-LABEL: test_mask_sqrt_ps_512:
9530 ; X86: ## %bb.0:
9531 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9532 ; X86-NEXT: vsqrtps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x51,0xc8]
9533 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
9534 ; X86-NEXT: retl ## encoding: [0xc3]
9535 ;
9536 ; X64-LABEL: test_mask_sqrt_ps_512:
9537 ; X64: ## %bb.0:
9538 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9539 ; X64-NEXT: vsqrtps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x51,0xc8]
9540 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
9541 ; X64-NEXT: retq ## encoding: [0xc3]
9542 %res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> %passthru, i16 %mask, i32 4)
9543 ret <16 x float> %res
9544 }
9545 define <16 x float> @test_maskz_sqrt_ps_512(<16 x float> %a0, i16 %mask) {
9546 ; X86-LABEL: test_maskz_sqrt_ps_512:
9547 ; X86: ## %bb.0:
9548 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9549 ; X86-NEXT: vsqrtps %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x51,0xc0]
9550 ; X86-NEXT: retl ## encoding: [0xc3]
9551 ;
9552 ; X64-LABEL: test_maskz_sqrt_ps_512:
9553 ; X64: ## %bb.0:
9554 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9555 ; X64-NEXT: vsqrtps %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x51,0xc0]
9556 ; X64-NEXT: retq ## encoding: [0xc3]
9557 %res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 %mask, i32 4)
9558 ret <16 x float> %res
9559 }
9560 define <16 x float> @test_sqrt_round_ps_512(<16 x float> %a0) {
9561 ; CHECK-LABEL: test_sqrt_round_ps_512:
9562 ; CHECK: ## %bb.0:
9563 ; CHECK-NEXT: vsqrtps {rz-sae}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x78,0x51,0xc0]
9564 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9565 %res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 -1, i32 11)
9566 ret <16 x float> %res
9567 }
9568 define <16 x float> @test_mask_sqrt_round_ps_512(<16 x float> %a0, <16 x float> %passthru, i16 %mask) {
9569 ; X86-LABEL: test_mask_sqrt_round_ps_512:
9570 ; X86: ## %bb.0:
9571 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9572 ; X86-NEXT: vsqrtps {rz-sae}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x51,0xc8]
9573 ; X86-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
9574 ; X86-NEXT: retl ## encoding: [0xc3]
9575 ;
9576 ; X64-LABEL: test_mask_sqrt_round_ps_512:
9577 ; X64: ## %bb.0:
9578 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9579 ; X64-NEXT: vsqrtps {rz-sae}, %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x79,0x51,0xc8]
9580 ; X64-NEXT: vmovaps %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x48,0x28,0xc1]
9581 ; X64-NEXT: retq ## encoding: [0xc3]
9582 %res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> %passthru, i16 %mask, i32 11)
9583 ret <16 x float> %res
9584 }
9585 define <16 x float> @test_maskz_sqrt_round_ps_512(<16 x float> %a0, i16 %mask) {
9586 ; X86-LABEL: test_maskz_sqrt_round_ps_512:
9587 ; X86: ## %bb.0:
9588 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9589 ; X86-NEXT: vsqrtps {rz-sae}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x51,0xc0]
9590 ; X86-NEXT: retl ## encoding: [0xc3]
9591 ;
9592 ; X64-LABEL: test_maskz_sqrt_round_ps_512:
9593 ; X64: ## %bb.0:
9594 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9595 ; X64-NEXT: vsqrtps {rz-sae}, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xf9,0x51,0xc0]
9596 ; X64-NEXT: retq ## encoding: [0xc3]
9597 %res = call <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float> %a0, <16 x float> zeroinitializer, i16 %mask, i32 11)
9598 ret <16 x float> %res
9599 }
9600 declare <16 x float> @llvm.x86.avx512.mask.sqrt.ps.512(<16 x float>, <16 x float>, i16, i32) nounwind readnone
9602 declare <16 x i32> @llvm.x86.avx512.mask.prolv.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
9604 define <16 x i32>@test_int_x86_avx512_prolv_d_512_old(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
9605 ; CHECK-LABEL: test_int_x86_avx512_prolv_d_512_old:
9606 ; CHECK: ## %bb.0:
9607 ; CHECK-NEXT: vprolvd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x15,0xc1]
9608 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9609 %res = call <16 x i32> @llvm.x86.avx512.mask.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
9610 ret <16 x i32> %res
9611 }
9613 define <16 x i32>@test_int_x86_avx512_mask_prolv_d_512_old(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
9614 ; X86-LABEL: test_int_x86_avx512_mask_prolv_d_512_old:
9615 ; X86: ## %bb.0:
9616 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9617 ; X86-NEXT: vprolvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x15,0xd1]
9618 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
9619 ; X86-NEXT: retl ## encoding: [0xc3]
9620 ;
9621 ; X64-LABEL: test_int_x86_avx512_mask_prolv_d_512_old:
9622 ; X64: ## %bb.0:
9623 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9624 ; X64-NEXT: vprolvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x15,0xd1]
9625 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
9626 ; X64-NEXT: retq ## encoding: [0xc3]
9627 %res = call <16 x i32> @llvm.x86.avx512.mask.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
9628 ret <16 x i32> %res
9629 }
9631 define <16 x i32>@test_int_x86_avx512_maskz_prolv_d_512_old(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) {
9632 ; X86-LABEL: test_int_x86_avx512_maskz_prolv_d_512_old:
9633 ; X86: ## %bb.0:
9634 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9635 ; X86-NEXT: vprolvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x15,0xc1]
9636 ; X86-NEXT: retl ## encoding: [0xc3]
9637 ;
9638 ; X64-LABEL: test_int_x86_avx512_maskz_prolv_d_512_old:
9639 ; X64: ## %bb.0:
9640 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9641 ; X64-NEXT: vprolvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x15,0xc1]
9642 ; X64-NEXT: retq ## encoding: [0xc3]
9643 %res = call <16 x i32> @llvm.x86.avx512.mask.prolv.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> zeroinitializer, i16 %x3)
9644 ret <16 x i32> %res
9645 }
9647 declare <8 x i64> @llvm.x86.avx512.mask.prolv.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
9649 define <8 x i64>@test_int_x86_avx512_prolv_q_512_old(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
9650 ; CHECK-LABEL: test_int_x86_avx512_prolv_q_512_old:
9651 ; CHECK: ## %bb.0:
9652 ; CHECK-NEXT: vprolvq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x15,0xc1]
9653 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9654 %res = call <8 x i64> @llvm.x86.avx512.mask.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
9655 ret <8 x i64> %res
9656 }
9658 define <8 x i64>@test_int_x86_avx512_mask_prolv_q_512_old(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
9659 ; X86-LABEL: test_int_x86_avx512_mask_prolv_q_512_old:
9660 ; X86: ## %bb.0:
9661 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9662 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9663 ; X86-NEXT: vprolvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x15,0xd1]
9664 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
9665 ; X86-NEXT: retl ## encoding: [0xc3]
9666 ;
9667 ; X64-LABEL: test_int_x86_avx512_mask_prolv_q_512_old:
9668 ; X64: ## %bb.0:
9669 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9670 ; X64-NEXT: vprolvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x15,0xd1]
9671 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
9672 ; X64-NEXT: retq ## encoding: [0xc3]
9673 %res = call <8 x i64> @llvm.x86.avx512.mask.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
9674 ret <8 x i64> %res
9675 }
9677 define <8 x i64>@test_int_x86_avx512_maskz_prolv_q_512_old(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) {
9678 ; X86-LABEL: test_int_x86_avx512_maskz_prolv_q_512_old:
9679 ; X86: ## %bb.0:
9680 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9681 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9682 ; X86-NEXT: vprolvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x15,0xc1]
9683 ; X86-NEXT: retl ## encoding: [0xc3]
9684 ;
9685 ; X64-LABEL: test_int_x86_avx512_maskz_prolv_q_512_old:
9686 ; X64: ## %bb.0:
9687 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9688 ; X64-NEXT: vprolvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x15,0xc1]
9689 ; X64-NEXT: retq ## encoding: [0xc3]
9690 %res = call <8 x i64> @llvm.x86.avx512.mask.prolv.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> zeroinitializer, i8 %x3)
9691 ret <8 x i64> %res
9692 }
9694 declare <16 x i32> @llvm.x86.avx512.mask.prorv.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
9696 define <16 x i32>@test_int_x86_avx512_prorv_d_512_old(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2) {
9697 ; CHECK-LABEL: test_int_x86_avx512_prorv_d_512_old:
9698 ; CHECK: ## %bb.0:
9699 ; CHECK-NEXT: vprorvd %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0x7d,0x48,0x14,0xc1]
9700 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9701 %res = call <16 x i32> @llvm.x86.avx512.mask.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 -1)
9702 ret <16 x i32> %res
9703 }
9705 define <16 x i32>@test_int_x86_avx512_mask_prorv_d_512_old(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3) {
9706 ; X86-LABEL: test_int_x86_avx512_mask_prorv_d_512_old:
9707 ; X86: ## %bb.0:
9708 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9709 ; X86-NEXT: vprorvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x14,0xd1]
9710 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
9711 ; X86-NEXT: retl ## encoding: [0xc3]
9712 ;
9713 ; X64-LABEL: test_int_x86_avx512_mask_prorv_d_512_old:
9714 ; X64: ## %bb.0:
9715 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9716 ; X64-NEXT: vprorvd %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x14,0xd1]
9717 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
9718 ; X64-NEXT: retq ## encoding: [0xc3]
9719 %res = call <16 x i32> @llvm.x86.avx512.mask.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x3)
9720 ret <16 x i32> %res
9721 }
9723 define <16 x i32>@test_int_x86_avx512_maskz_prorv_d_512_old(<16 x i32> %x0, <16 x i32> %x1, i16 %x3) {
9724 ; X86-LABEL: test_int_x86_avx512_maskz_prorv_d_512_old:
9725 ; X86: ## %bb.0:
9726 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
9727 ; X86-NEXT: vprorvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x14,0xc1]
9728 ; X86-NEXT: retl ## encoding: [0xc3]
9729 ;
9730 ; X64-LABEL: test_int_x86_avx512_maskz_prorv_d_512_old:
9731 ; X64: ## %bb.0:
9732 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9733 ; X64-NEXT: vprorvd %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x14,0xc1]
9734 ; X64-NEXT: retq ## encoding: [0xc3]
9735 %res = call <16 x i32> @llvm.x86.avx512.mask.prorv.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> zeroinitializer, i16 %x3)
9736 ret <16 x i32> %res
9737 }
9739 declare <8 x i64> @llvm.x86.avx512.mask.prorv.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
9741 define <8 x i64>@test_int_x86_avx512_prorv_q_512_old(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2) {
9742 ; CHECK-LABEL: test_int_x86_avx512_prorv_q_512_old:
9743 ; CHECK: ## %bb.0:
9744 ; CHECK-NEXT: vprorvq %zmm1, %zmm0, %zmm0 ## encoding: [0x62,0xf2,0xfd,0x48,0x14,0xc1]
9745 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
9746 %res = call <8 x i64> @llvm.x86.avx512.mask.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 -1)
9747 ret <8 x i64> %res
9748 }
9750 define <8 x i64>@test_int_x86_avx512_mask_prorv_q_512_old(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3) {
9751 ; X86-LABEL: test_int_x86_avx512_mask_prorv_q_512_old:
9752 ; X86: ## %bb.0:
9753 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9754 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9755 ; X86-NEXT: vprorvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x14,0xd1]
9756 ; X86-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
9757 ; X86-NEXT: retl ## encoding: [0xc3]
9758 ;
9759 ; X64-LABEL: test_int_x86_avx512_mask_prorv_q_512_old:
9760 ; X64: ## %bb.0:
9761 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9762 ; X64-NEXT: vprorvq %zmm1, %zmm0, %zmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x14,0xd1]
9763 ; X64-NEXT: vmovdqa64 %zmm2, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc2]
9764 ; X64-NEXT: retq ## encoding: [0xc3]
9765 %res = call <8 x i64> @llvm.x86.avx512.mask.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x3)
9766 ret <8 x i64> %res
9767 }
9769 define <8 x i64>@test_int_x86_avx512_maskz_prorv_q_512_old(<8 x i64> %x0, <8 x i64> %x1, i8 %x3) {
9770 ; X86-LABEL: test_int_x86_avx512_maskz_prorv_q_512_old:
9771 ; X86: ## %bb.0:
9772 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9773 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9774 ; X86-NEXT: vprorvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x14,0xc1]
9775 ; X86-NEXT: retl ## encoding: [0xc3]
9776 ;
9777 ; X64-LABEL: test_int_x86_avx512_maskz_prorv_q_512_old:
9778 ; X64: ## %bb.0:
9779 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9780 ; X64-NEXT: vprorvq %zmm1, %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x14,0xc1]
9781 ; X64-NEXT: retq ## encoding: [0xc3]
9782 %res = call <8 x i64> @llvm.x86.avx512.mask.prorv.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> zeroinitializer, i8 %x3)
9783 ret <8 x i64> %res
9784 }
9786 declare <16 x i32> @llvm.x86.avx512.mask.prol.d.512(<16 x i32>, i32, <16 x i32>, i16)
9788 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_prol_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) {
9789 ; X86-LABEL: test_int_x86_avx512_mask_prol_d_512:
9790 ; X86: ## %bb.0:
9791 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
9792 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
9793 ; X86-NEXT: vprold $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xc8,0x03]
9794 ; X86-NEXT: vprold $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xc8,0x04]
9795 ; X86-NEXT: vprold $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xc8,0x05]
9796 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
9797 ; X86-NEXT: retl ## encoding: [0xc3]
9798 ;
9799 ; X64-LABEL: test_int_x86_avx512_mask_prol_d_512:
9800 ; X64: ## %bb.0:
9801 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
9802 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9803 ; X64-NEXT: vprold $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xc8,0x03]
9804 ; X64-NEXT: vprold $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xc8,0x04]
9805 ; X64-NEXT: vprold $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xc8,0x05]
9806 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
9807 ; X64-NEXT: retq ## encoding: [0xc3]
9808 %res0 = call <16 x i32> @llvm.x86.avx512.mask.prol.d.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 %x3)
9809 %res1 = call <16 x i32> @llvm.x86.avx512.mask.prol.d.512(<16 x i32> %x0, i32 4, <16 x i32> zeroinitializer, i16 %x3)
9810 %res2 = call <16 x i32> @llvm.x86.avx512.mask.prol.d.512(<16 x i32> %x0, i32 5, <16 x i32> %x2, i16 -1)
9811 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
9812 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 1
9813 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 2
9814 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
9815 }
9817 declare <8 x i64> @llvm.x86.avx512.mask.prol.q.512(<8 x i64>, i32, <8 x i64>, i8)
9819 define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_prol_q_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) {
9820 ; X86-LABEL: test_int_x86_avx512_mask_prol_q_512:
9821 ; X86: ## %bb.0:
9822 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
9823 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
9824 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9825 ; X86-NEXT: vprolq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xc8,0x03]
9826 ; X86-NEXT: vprolq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xc8,0x04]
9827 ; X86-NEXT: vprolq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xc8,0x05]
9828 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
9829 ; X86-NEXT: retl ## encoding: [0xc3]
9830 ;
9831 ; X64-LABEL: test_int_x86_avx512_mask_prol_q_512:
9832 ; X64: ## %bb.0:
9833 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
9834 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9835 ; X64-NEXT: vprolq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xc8,0x03]
9836 ; X64-NEXT: vprolq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xc8,0x04]
9837 ; X64-NEXT: vprolq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xc8,0x05]
9838 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
9839 ; X64-NEXT: retq ## encoding: [0xc3]
9840 %res0 = call <8 x i64> @llvm.x86.avx512.mask.prol.q.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 %x3)
9841 %res1 = call <8 x i64> @llvm.x86.avx512.mask.prol.q.512(<8 x i64> %x0, i32 4, <8 x i64> zeroinitializer, i8 %x3)
9842 %res2 = call <8 x i64> @llvm.x86.avx512.mask.prol.q.512(<8 x i64> %x0, i32 5, <8 x i64> %x2, i8 -1)
9843 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
9844 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
9845 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 2
9846 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5
9847 }
9849 declare <16 x i32> @llvm.x86.avx512.mask.pror.d.512(<16 x i32>, i32, <16 x i32>, i16)
9851 define { <16 x i32>, <16 x i32>, <16 x i32> } @test_int_x86_avx512_mask_pror_d_512(<16 x i32> %x0, i32 %x1, <16 x i32> %x2, i16 %x3) {
9852 ; X86-LABEL: test_int_x86_avx512_mask_pror_d_512:
9853 ; X86: ## %bb.0:
9854 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
9855 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x08]
9856 ; X86-NEXT: vprord $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xc0,0x03]
9857 ; X86-NEXT: vprord $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xc0,0x04]
9858 ; X86-NEXT: vprord $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xc0,0x05]
9859 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
9860 ; X86-NEXT: retl ## encoding: [0xc3]
9861 ;
9862 ; X64-LABEL: test_int_x86_avx512_mask_pror_d_512:
9863 ; X64: ## %bb.0:
9864 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
9865 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9866 ; X64-NEXT: vprord $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0x65,0x49,0x72,0xc0,0x03]
9867 ; X64-NEXT: vprord $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0x75,0xc9,0x72,0xc0,0x04]
9868 ; X64-NEXT: vprord $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0x6d,0x48,0x72,0xc0,0x05]
9869 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
9870 ; X64-NEXT: retq ## encoding: [0xc3]
9871 %res0 = call <16 x i32> @llvm.x86.avx512.mask.pror.d.512(<16 x i32> %x0, i32 3, <16 x i32> %x2, i16 %x3)
9872 %res1 = call <16 x i32> @llvm.x86.avx512.mask.pror.d.512(<16 x i32> %x0, i32 4, <16 x i32> zeroinitializer, i16 %x3)
9873 %res2 = call <16 x i32> @llvm.x86.avx512.mask.pror.d.512(<16 x i32> %x0, i32 5, <16 x i32> %x2, i16 -1)
9874 %res3 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } poison, <16 x i32> %res0, 0
9875 %res4 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res3, <16 x i32> %res1, 1
9876 %res5 = insertvalue { <16 x i32>, <16 x i32>, <16 x i32> } %res4, <16 x i32> %res2, 2
9877 ret { <16 x i32>, <16 x i32>, <16 x i32> } %res5
9878 }
9880 declare <8 x i64> @llvm.x86.avx512.mask.pror.q.512(<8 x i64>, i32, <8 x i64>, i8)
9882 define { <8 x i64>, <8 x i64>, <8 x i64> } @test_int_x86_avx512_mask_pror_q_512(<8 x i64> %x0, i32 %x1, <8 x i64> %x2, i8 %x3) {
9883 ; X86-LABEL: test_int_x86_avx512_mask_pror_q_512:
9884 ; X86: ## %bb.0:
9885 ; X86-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
9886 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x08]
9887 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9888 ; X86-NEXT: vprorq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xc0,0x03]
9889 ; X86-NEXT: vprorq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xc0,0x04]
9890 ; X86-NEXT: vprorq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xc0,0x05]
9891 ; X86-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
9892 ; X86-NEXT: retl ## encoding: [0xc3]
9893 ;
9894 ; X64-LABEL: test_int_x86_avx512_mask_pror_q_512:
9895 ; X64: ## %bb.0:
9896 ; X64-NEXT: vmovdqa64 %zmm1, %zmm3 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xd9]
9897 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
9898 ; X64-NEXT: vprorq $3, %zmm0, %zmm3 {%k1} ## encoding: [0x62,0xf1,0xe5,0x49,0x72,0xc0,0x03]
9899 ; X64-NEXT: vprorq $4, %zmm0, %zmm1 {%k1} {z} ## encoding: [0x62,0xf1,0xf5,0xc9,0x72,0xc0,0x04]
9900 ; X64-NEXT: vprorq $5, %zmm0, %zmm2 ## encoding: [0x62,0xf1,0xed,0x48,0x72,0xc0,0x05]
9901 ; X64-NEXT: vmovdqa64 %zmm3, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc3]
9902 ; X64-NEXT: retq ## encoding: [0xc3]
9903 %res0 = call <8 x i64> @llvm.x86.avx512.mask.pror.q.512(<8 x i64> %x0, i32 3, <8 x i64> %x2, i8 %x3)
9904 %res1 = call <8 x i64> @llvm.x86.avx512.mask.pror.q.512(<8 x i64> %x0, i32 4, <8 x i64> zeroinitializer, i8 %x3)
9905 %res2 = call <8 x i64> @llvm.x86.avx512.mask.pror.q.512(<8 x i64> %x0, i32 5, <8 x i64> %x2, i8 -1)
9906 %res3 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } poison, <8 x i64> %res0, 0
9907 %res4 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res3, <8 x i64> %res1, 1
9908 %res5 = insertvalue { <8 x i64>, <8 x i64>, <8 x i64> } %res4, <8 x i64> %res2, 2
9909 ret { <8 x i64>, <8 x i64>, <8 x i64> } %res5
9910 }
9912 declare <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32)
9914 define <2 x double>@test_int_x86_avx512_mask_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
9915 ; X86-LABEL: test_int_x86_avx512_mask_vfmadd_sd:
9916 ; X86: ## %bb.0:
9917 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9918 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9919 ; X86-NEXT: vmovapd %xmm0, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xd8]
9920 ; X86-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xa9,0xda]
9921 ; X86-NEXT: ## xmm3 {%k1} = (xmm1 * xmm3) + xmm2
9922 ; X86-NEXT: vmovapd %xmm0, %xmm4 ## encoding: [0xc5,0xf9,0x28,0xe0]
9923 ; X86-NEXT: vfmadd213sd {rz-sae}, %xmm2, %xmm1, %xmm4 ## encoding: [0x62,0xf2,0xf5,0x78,0xa9,0xe2]
9924 ; X86-NEXT: vaddpd %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe1,0x58,0xdc]
9925 ; X86-NEXT: vfmadd213sd {ru-sae}, %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x59,0xa9,0xc2]
9926 ; X86-NEXT: vaddpd %xmm3, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x58,0xc3]
9927 ; X86-NEXT: retl ## encoding: [0xc3]
9928 ;
9929 ; X64-LABEL: test_int_x86_avx512_mask_vfmadd_sd:
9930 ; X64: ## %bb.0:
9931 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9932 ; X64-NEXT: vmovapd %xmm0, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xd8]
9933 ; X64-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xf5,0x09,0xa9,0xda]
9934 ; X64-NEXT: ## xmm3 {%k1} = (xmm1 * xmm3) + xmm2
9935 ; X64-NEXT: vmovapd %xmm0, %xmm4 ## encoding: [0xc5,0xf9,0x28,0xe0]
9936 ; X64-NEXT: vfmadd213sd {rz-sae}, %xmm2, %xmm1, %xmm4 ## encoding: [0x62,0xf2,0xf5,0x78,0xa9,0xe2]
9937 ; X64-NEXT: vaddpd %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe1,0x58,0xdc]
9938 ; X64-NEXT: vfmadd213sd {ru-sae}, %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0xf5,0x59,0xa9,0xc2]
9939 ; X64-NEXT: vaddpd %xmm3, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x58,0xc3]
9940 ; X64-NEXT: retq ## encoding: [0xc3]
9941 %res = call <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 4)
9942 %res1 = call <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 -1, i32 11)
9943 %res2 = call <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 10)
9944 %res3 = fadd <2 x double> %res, %res1
9945 %res4 = fadd <2 x double> %res2, %res3
9946 ret <2 x double> %res4
9947 }
9949 declare <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
9951 define <4 x float>@test_int_x86_avx512_mask_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
9952 ; X86-LABEL: test_int_x86_avx512_mask_vfmadd_ss:
9953 ; X86: ## %bb.0:
9954 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9955 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9956 ; X86-NEXT: vmovaps %xmm0, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xd8]
9957 ; X86-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xa9,0xda]
9958 ; X86-NEXT: ## xmm3 {%k1} = (xmm1 * xmm3) + xmm2
9959 ; X86-NEXT: vmovaps %xmm0, %xmm4 ## encoding: [0xc5,0xf8,0x28,0xe0]
9960 ; X86-NEXT: vfmadd213ss {rz-sae}, %xmm2, %xmm1, %xmm4 ## encoding: [0x62,0xf2,0x75,0x78,0xa9,0xe2]
9961 ; X86-NEXT: vaddps %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe0,0x58,0xdc]
9962 ; X86-NEXT: vfmadd213ss {ru-sae}, %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x59,0xa9,0xc2]
9963 ; X86-NEXT: vaddps %xmm3, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x58,0xc3]
9964 ; X86-NEXT: retl ## encoding: [0xc3]
9965 ;
9966 ; X64-LABEL: test_int_x86_avx512_mask_vfmadd_ss:
9967 ; X64: ## %bb.0:
9968 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
9969 ; X64-NEXT: vmovaps %xmm0, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xd8]
9970 ; X64-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0xa9,0xda]
9971 ; X64-NEXT: ## xmm3 {%k1} = (xmm1 * xmm3) + xmm2
9972 ; X64-NEXT: vmovaps %xmm0, %xmm4 ## encoding: [0xc5,0xf8,0x28,0xe0]
9973 ; X64-NEXT: vfmadd213ss {rz-sae}, %xmm2, %xmm1, %xmm4 ## encoding: [0x62,0xf2,0x75,0x78,0xa9,0xe2]
9974 ; X64-NEXT: vaddps %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe0,0x58,0xdc]
9975 ; X64-NEXT: vfmadd213ss {ru-sae}, %xmm2, %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x59,0xa9,0xc2]
9976 ; X64-NEXT: vaddps %xmm3, %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x58,0xc3]
9977 ; X64-NEXT: retq ## encoding: [0xc3]
9978 %res = call <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 4)
9979 %res1 = call <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 -1, i32 11)
9980 %res2 = call <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 10)
9981 %res3 = fadd <4 x float> %res, %res1
9982 %res4 = fadd <4 x float> %res2, %res3
9983 ret <4 x float> %res4
9984 }
9986 declare <2 x double> @llvm.x86.avx512.maskz.vfmadd.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32)
9988 define <2 x double>@test_int_x86_avx512_maskz_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
9989 ; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_sd:
9990 ; X86: ## %bb.0:
9991 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
9992 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
9993 ; X86-NEXT: vmovapd %xmm0, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xd8]
9994 ; X86-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm3 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xa9,0xda]
9995 ; X86-NEXT: ## xmm3 {%k1} {z} = (xmm1 * xmm3) + xmm2
9996 ; X86-NEXT: vfmadd213sd {rz-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xf9,0xa9,0xc2]
9997 ; X86-NEXT: vaddpd %xmm0, %xmm3, %xmm0 ## encoding: [0xc5,0xe1,0x58,0xc0]
9998 ; X86-NEXT: retl ## encoding: [0xc3]
9999 ;
10000 ; X64-LABEL: test_int_x86_avx512_maskz_vfmadd_sd:
10001 ; X64: ## %bb.0:
10002 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10003 ; X64-NEXT: vmovapd %xmm0, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xd8]
10004 ; X64-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm3 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0x89,0xa9,0xda]
10005 ; X64-NEXT: ## xmm3 {%k1} {z} = (xmm1 * xmm3) + xmm2
10006 ; X64-NEXT: vfmadd213sd {rz-sae}, %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xf5,0xf9,0xa9,0xc2]
10007 ; X64-NEXT: vaddpd %xmm0, %xmm3, %xmm0 ## encoding: [0xc5,0xe1,0x58,0xc0]
10008 ; X64-NEXT: retq ## encoding: [0xc3]
10009 %res = call <2 x double> @llvm.x86.avx512.maskz.vfmadd.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 4)
10010 %res1 = call <2 x double> @llvm.x86.avx512.maskz.vfmadd.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 11)
10011 %res2 = fadd <2 x double> %res, %res1
10012 ret <2 x double> %res2
10013 }
10015 declare <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
10017 define <4 x float>@test_int_x86_avx512_maskz_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
10018 ; X86-LABEL: test_int_x86_avx512_maskz_vfmadd_ss:
10019 ; X86: ## %bb.0:
10020 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10021 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10022 ; X86-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xa9,0xc2]
10023 ; X86-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm2
10024 ; X86-NEXT: retl ## encoding: [0xc3]
10025 ;
10026 ; X64-LABEL: test_int_x86_avx512_maskz_vfmadd_ss:
10027 ; X64: ## %bb.0:
10028 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10029 ; X64-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x75,0x89,0xa9,0xc2]
10030 ; X64-NEXT: ## xmm0 {%k1} {z} = (xmm1 * xmm0) + xmm2
10031 ; X64-NEXT: retq ## encoding: [0xc3]
10032 %res = call <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 4)
10033 %res1 = call <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 11)
10034 %res2 = fadd <4 x float> %res, %res1
10035 ret <4 x float> %res
10036 }
10037 declare <2 x double> @llvm.x86.avx512.mask3.vfmadd.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32)
10039 define <2 x double>@test_int_x86_avx512_mask3_vfmadd_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
10040 ; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_sd:
10041 ; X86: ## %bb.0:
10042 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10043 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10044 ; X86-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
10045 ; X86-NEXT: vfmadd231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xb9,0xd9]
10046 ; X86-NEXT: ## xmm3 {%k1} = (xmm0 * xmm1) + xmm3
10047 ; X86-NEXT: vmovapd %xmm2, %xmm4 ## encoding: [0xc5,0xf9,0x28,0xe2]
10048 ; X86-NEXT: vfmadd231sd {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0xfd,0x78,0xb9,0xe1]
10049 ; X86-NEXT: vaddpd %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe1,0x58,0xdc]
10050 ; X86-NEXT: vfmadd231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0xb9,0xd1]
10051 ; X86-NEXT: vaddpd %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe9,0x58,0xc3]
10052 ; X86-NEXT: retl ## encoding: [0xc3]
10053 ;
10054 ; X64-LABEL: test_int_x86_avx512_mask3_vfmadd_sd:
10055 ; X64: ## %bb.0:
10056 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10057 ; X64-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
10058 ; X64-NEXT: vfmadd231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xb9,0xd9]
10059 ; X64-NEXT: ## xmm3 {%k1} = (xmm0 * xmm1) + xmm3
10060 ; X64-NEXT: vmovapd %xmm2, %xmm4 ## encoding: [0xc5,0xf9,0x28,0xe2]
10061 ; X64-NEXT: vfmadd231sd {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0xfd,0x78,0xb9,0xe1]
10062 ; X64-NEXT: vaddpd %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe1,0x58,0xdc]
10063 ; X64-NEXT: vfmadd231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0xb9,0xd1]
10064 ; X64-NEXT: vaddpd %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe9,0x58,0xc3]
10065 ; X64-NEXT: retq ## encoding: [0xc3]
10066 %res = call <2 x double> @llvm.x86.avx512.mask3.vfmadd.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 4)
10067 %res1 = call <2 x double> @llvm.x86.avx512.mask3.vfmadd.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 -1, i32 11)
10068 %res2 = call <2 x double> @llvm.x86.avx512.mask3.vfmadd.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 10)
10069 %res3 = fadd <2 x double> %res, %res1
10070 %res4 = fadd <2 x double> %res2, %res3
10071 ret <2 x double> %res4
10072 }
10074 declare <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
10076 define <4 x float>@test_int_x86_avx512_mask3_vfmadd_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
10077 ; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_ss:
10078 ; X86: ## %bb.0:
10079 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10080 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10081 ; X86-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
10082 ; X86-NEXT: vfmadd231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xb9,0xd9]
10083 ; X86-NEXT: ## xmm3 {%k1} = (xmm0 * xmm1) + xmm3
10084 ; X86-NEXT: vmovaps %xmm2, %xmm4 ## encoding: [0xc5,0xf8,0x28,0xe2]
10085 ; X86-NEXT: vfmadd231ss {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0x7d,0x78,0xb9,0xe1]
10086 ; X86-NEXT: vaddps %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe0,0x58,0xdc]
10087 ; X86-NEXT: vfmadd231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0xb9,0xd1]
10088 ; X86-NEXT: vaddps %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe8,0x58,0xc3]
10089 ; X86-NEXT: retl ## encoding: [0xc3]
10090 ;
10091 ; X64-LABEL: test_int_x86_avx512_mask3_vfmadd_ss:
10092 ; X64: ## %bb.0:
10093 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10094 ; X64-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
10095 ; X64-NEXT: vfmadd231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xb9,0xd9]
10096 ; X64-NEXT: ## xmm3 {%k1} = (xmm0 * xmm1) + xmm3
10097 ; X64-NEXT: vmovaps %xmm2, %xmm4 ## encoding: [0xc5,0xf8,0x28,0xe2]
10098 ; X64-NEXT: vfmadd231ss {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0x7d,0x78,0xb9,0xe1]
10099 ; X64-NEXT: vaddps %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe0,0x58,0xdc]
10100 ; X64-NEXT: vfmadd231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0xb9,0xd1]
10101 ; X64-NEXT: vaddps %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe8,0x58,0xc3]
10102 ; X64-NEXT: retq ## encoding: [0xc3]
10103 %res = call <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 4)
10104 %res1 = call <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 -1, i32 11)
10105 %res2 = call <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 10)
10106 %res3 = fadd <4 x float> %res, %res1
10107 %res4 = fadd <4 x float> %res2, %res3
10108 ret <4 x float> %res4
10109 }
10111 define void @fmadd_ss_mask_memfold(ptr %a, ptr %b, i8 %c) {
10112 ; X86-LABEL: fmadd_ss_mask_memfold:
10113 ; X86: ## %bb.0:
10114 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
10115 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
10116 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x04]
10117 ; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
10118 ; X86-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x02]
10119 ; X86-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
10120 ; X86-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x09]
10121 ; X86-NEXT: vfmadd213ss %xmm0, %xmm0, %xmm1 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0xa9,0xc8]
10122 ; X86-NEXT: ## xmm1 = (xmm0 * xmm1) + xmm0
10123 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10124 ; X86-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x7e,0x09,0x10,0xc1]
10125 ; X86-NEXT: vmovss %xmm0, (%edx) ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x11,0x02]
10126 ; X86-NEXT: retl ## encoding: [0xc3]
10127 ;
10128 ; X64-LABEL: fmadd_ss_mask_memfold:
10129 ; X64: ## %bb.0:
10130 ; X64-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
10131 ; X64-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x07]
10132 ; X64-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
10133 ; X64-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x0e]
10134 ; X64-NEXT: vfmadd213ss %xmm0, %xmm0, %xmm1 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0xa9,0xc8]
10135 ; X64-NEXT: ## xmm1 = (xmm0 * xmm1) + xmm0
10136 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
10137 ; X64-NEXT: vmovss %xmm1, %xmm0, %xmm0 {%k1} ## encoding: [0x62,0xf1,0x7e,0x09,0x10,0xc1]
10138 ; X64-NEXT: vmovss %xmm0, (%rdi) ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x11,0x07]
10139 ; X64-NEXT: retq ## encoding: [0xc3]
10140 %a.val = load float, ptr %a
10141 %av0 = insertelement <4 x float> undef, float %a.val, i32 0
10142 %av1 = insertelement <4 x float> %av0, float 0.000000e+00, i32 1
10143 %av2 = insertelement <4 x float> %av1, float 0.000000e+00, i32 2
10144 %av = insertelement <4 x float> %av2, float 0.000000e+00, i32 3
10146 %b.val = load float, ptr %b
10147 %bv0 = insertelement <4 x float> undef, float %b.val, i32 0
10148 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 1
10149 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 2
10150 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 3
10152 %vr = call <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float> %av, <4 x float> %bv, <4 x float> %av, i8 %c, i32 4)
10154 %sr = extractelement <4 x float> %vr, i32 0
10155 store float %sr, ptr %a
10156 ret void
10157 }
10159 define void @fmadd_ss_maskz_memfold(ptr %a, ptr %b, i8 %c) {
10160 ; X86-LABEL: fmadd_ss_maskz_memfold:
10161 ; X86: ## %bb.0:
10162 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
10163 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
10164 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x04]
10165 ; X86-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
10166 ; X86-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x02]
10167 ; X86-NEXT: vfmadd231ss (%ecx), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0xb9,0x01]
10168 ; X86-NEXT: ## xmm0 = (xmm0 * mem) + xmm0
10169 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10170 ; X86-NEXT: vmovss %xmm0, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x10,0xc0]
10171 ; X86-NEXT: vmovss %xmm0, (%edx) ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x11,0x02]
10172 ; X86-NEXT: retl ## encoding: [0xc3]
10173 ;
10174 ; X64-LABEL: fmadd_ss_maskz_memfold:
10175 ; X64: ## %bb.0:
10176 ; X64-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
10177 ; X64-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x10,0x07]
10178 ; X64-NEXT: vfmadd231ss (%rsi), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x79,0xb9,0x06]
10179 ; X64-NEXT: ## xmm0 = (xmm0 * mem) + xmm0
10180 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
10181 ; X64-NEXT: vmovss %xmm0, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7e,0x89,0x10,0xc0]
10182 ; X64-NEXT: vmovss %xmm0, (%rdi) ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x11,0x07]
10183 ; X64-NEXT: retq ## encoding: [0xc3]
10184 %a.val = load float, ptr %a
10185 %av0 = insertelement <4 x float> undef, float %a.val, i32 0
10186 %av1 = insertelement <4 x float> %av0, float 0.000000e+00, i32 1
10187 %av2 = insertelement <4 x float> %av1, float 0.000000e+00, i32 2
10188 %av = insertelement <4 x float> %av2, float 0.000000e+00, i32 3
10190 %b.val = load float, ptr %b
10191 %bv0 = insertelement <4 x float> undef, float %b.val, i32 0
10192 %bv1 = insertelement <4 x float> %bv0, float 0.000000e+00, i32 1
10193 %bv2 = insertelement <4 x float> %bv1, float 0.000000e+00, i32 2
10194 %bv = insertelement <4 x float> %bv2, float 0.000000e+00, i32 3
10196 %vr = call <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float> %av, <4 x float> %bv, <4 x float> %av, i8 %c, i32 4)
10198 %sr = extractelement <4 x float> %vr, i32 0
10199 store float %sr, ptr %a
10200 ret void
10201 }
10203 define void @fmadd_sd_mask_memfold(ptr %a, ptr %b, i8 %c) {
10204 ; X86-LABEL: fmadd_sd_mask_memfold:
10205 ; X86: ## %bb.0:
10206 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
10207 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
10208 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x04]
10209 ; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
10210 ; X86-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x10,0x02]
10211 ; X86-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
10212 ; X86-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x10,0x09]
10213 ; X86-NEXT: vfmadd213sd %xmm0, %xmm0, %xmm1 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf9,0xa9,0xc8]
10214 ; X86-NEXT: ## xmm1 = (xmm0 * xmm1) + xmm0
10215 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10216 ; X86-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xff,0x09,0x10,0xc1]
10217 ; X86-NEXT: vmovsd %xmm0, (%edx) ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x11,0x02]
10218 ; X86-NEXT: retl ## encoding: [0xc3]
10219 ;
10220 ; X64-LABEL: fmadd_sd_mask_memfold:
10221 ; X64: ## %bb.0:
10222 ; X64-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
10223 ; X64-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x10,0x07]
10224 ; X64-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
10225 ; X64-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x10,0x0e]
10226 ; X64-NEXT: vfmadd213sd %xmm0, %xmm0, %xmm1 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf9,0xa9,0xc8]
10227 ; X64-NEXT: ## xmm1 = (xmm0 * xmm1) + xmm0
10228 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
10229 ; X64-NEXT: vmovsd %xmm1, %xmm0, %xmm0 {%k1} ## encoding: [0x62,0xf1,0xff,0x09,0x10,0xc1]
10230 ; X64-NEXT: vmovsd %xmm0, (%rdi) ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x11,0x07]
10231 ; X64-NEXT: retq ## encoding: [0xc3]
10232 %a.val = load double, ptr %a
10233 %av0 = insertelement <2 x double> undef, double %a.val, i32 0
10234 %av = insertelement <2 x double> %av0, double 0.000000e+00, i32 1
10236 %b.val = load double, ptr %b
10237 %bv0 = insertelement <2 x double> undef, double %b.val, i32 0
10238 %bv = insertelement <2 x double> %bv0, double 0.000000e+00, i32 1
10240 %vr = call <2 x double> @llvm.x86.avx512.mask.vfmadd.sd(<2 x double> %av, <2 x double> %bv, <2 x double> %av, i8 %c, i32 4)
10242 %sr = extractelement <2 x double> %vr, i32 0
10243 store double %sr, ptr %a
10244 ret void
10245 }
10247 define void @fmadd_sd_maskz_memfold(ptr %a, ptr %b, i8 %c) {
10248 ; X86-LABEL: fmadd_sd_maskz_memfold:
10249 ; X86: ## %bb.0:
10250 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x0c]
10251 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ## encoding: [0x8b,0x4c,0x24,0x08]
10252 ; X86-NEXT: movl {{[0-9]+}}(%esp), %edx ## encoding: [0x8b,0x54,0x24,0x04]
10253 ; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
10254 ; X86-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x10,0x02]
10255 ; X86-NEXT: vfmadd231sd (%ecx), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf9,0xb9,0x01]
10256 ; X86-NEXT: ## xmm0 = (xmm0 * mem) + xmm0
10257 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10258 ; X86-NEXT: vmovsd %xmm0, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x10,0xc0]
10259 ; X86-NEXT: vmovsd %xmm0, (%edx) ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x11,0x02]
10260 ; X86-NEXT: retl ## encoding: [0xc3]
10261 ;
10262 ; X64-LABEL: fmadd_sd_maskz_memfold:
10263 ; X64: ## %bb.0:
10264 ; X64-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
10265 ; X64-NEXT: ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x10,0x07]
10266 ; X64-NEXT: vfmadd231sd (%rsi), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf9,0xb9,0x06]
10267 ; X64-NEXT: ## xmm0 = (xmm0 * mem) + xmm0
10268 ; X64-NEXT: kmovw %edx, %k1 ## encoding: [0xc5,0xf8,0x92,0xca]
10269 ; X64-NEXT: vmovsd %xmm0, %xmm0, %xmm0 {%k1} {z} ## encoding: [0x62,0xf1,0xff,0x89,0x10,0xc0]
10270 ; X64-NEXT: vmovsd %xmm0, (%rdi) ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x11,0x07]
10271 ; X64-NEXT: retq ## encoding: [0xc3]
10272 %a.val = load double, ptr %a
10273 %av0 = insertelement <2 x double> undef, double %a.val, i32 0
10274 %av = insertelement <2 x double> %av0, double 0.000000e+00, i32 1
10276 %b.val = load double, ptr %b
10277 %bv0 = insertelement <2 x double> undef, double %b.val, i32 0
10278 %bv = insertelement <2 x double> %bv0, double 0.000000e+00, i32 1
10280 %vr = call <2 x double> @llvm.x86.avx512.maskz.vfmadd.sd(<2 x double> %av, <2 x double> %bv, <2 x double> %av, i8 %c, i32 4)
10282 %sr = extractelement <2 x double> %vr, i32 0
10283 store double %sr, ptr %a
10284 ret void
10285 }
10287 declare <2 x double> @llvm.x86.avx512.mask3.vfmsub.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32)
10289 define <2 x double>@test_int_x86_avx512_mask3_vfmsub_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
10290 ; X86-LABEL: test_int_x86_avx512_mask3_vfmsub_sd:
10291 ; X86: ## %bb.0:
10292 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10293 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10294 ; X86-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
10295 ; X86-NEXT: vfmsub231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbb,0xd9]
10296 ; X86-NEXT: ## xmm3 {%k1} = (xmm0 * xmm1) - xmm3
10297 ; X86-NEXT: vmovapd %xmm2, %xmm4 ## encoding: [0xc5,0xf9,0x28,0xe2]
10298 ; X86-NEXT: vfmsub231sd {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0xfd,0x78,0xbb,0xe1]
10299 ; X86-NEXT: vaddpd %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe1,0x58,0xdc]
10300 ; X86-NEXT: vfmsub231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0xbb,0xd1]
10301 ; X86-NEXT: vaddpd %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe9,0x58,0xc3]
10302 ; X86-NEXT: retl ## encoding: [0xc3]
10303 ;
10304 ; X64-LABEL: test_int_x86_avx512_mask3_vfmsub_sd:
10305 ; X64: ## %bb.0:
10306 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10307 ; X64-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
10308 ; X64-NEXT: vfmsub231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbb,0xd9]
10309 ; X64-NEXT: ## xmm3 {%k1} = (xmm0 * xmm1) - xmm3
10310 ; X64-NEXT: vmovapd %xmm2, %xmm4 ## encoding: [0xc5,0xf9,0x28,0xe2]
10311 ; X64-NEXT: vfmsub231sd {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0xfd,0x78,0xbb,0xe1]
10312 ; X64-NEXT: vaddpd %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe1,0x58,0xdc]
10313 ; X64-NEXT: vfmsub231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0xbb,0xd1]
10314 ; X64-NEXT: vaddpd %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe9,0x58,0xc3]
10315 ; X64-NEXT: retq ## encoding: [0xc3]
10316 %res = call <2 x double> @llvm.x86.avx512.mask3.vfmsub.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 4)
10317 %res1 = call <2 x double> @llvm.x86.avx512.mask3.vfmsub.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 -1, i32 11)
10318 %res2 = call <2 x double> @llvm.x86.avx512.mask3.vfmsub.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 10)
10319 %res3 = fadd <2 x double> %res, %res1
10320 %res4 = fadd <2 x double> %res2, %res3
10321 ret <2 x double> %res4
10322 }
10324 declare <4 x float> @llvm.x86.avx512.mask3.vfmsub.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
10326 define <4 x float>@test_int_x86_avx512_mask3_vfmsub_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
10327 ; X86-LABEL: test_int_x86_avx512_mask3_vfmsub_ss:
10328 ; X86: ## %bb.0:
10329 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10330 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10331 ; X86-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
10332 ; X86-NEXT: vfmsub231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbb,0xd9]
10333 ; X86-NEXT: ## xmm3 {%k1} = (xmm0 * xmm1) - xmm3
10334 ; X86-NEXT: vmovaps %xmm2, %xmm4 ## encoding: [0xc5,0xf8,0x28,0xe2]
10335 ; X86-NEXT: vfmsub231ss {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0x7d,0x78,0xbb,0xe1]
10336 ; X86-NEXT: vaddps %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe0,0x58,0xdc]
10337 ; X86-NEXT: vfmsub231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0xbb,0xd1]
10338 ; X86-NEXT: vaddps %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe8,0x58,0xc3]
10339 ; X86-NEXT: retl ## encoding: [0xc3]
10340 ;
10341 ; X64-LABEL: test_int_x86_avx512_mask3_vfmsub_ss:
10342 ; X64: ## %bb.0:
10343 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10344 ; X64-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
10345 ; X64-NEXT: vfmsub231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbb,0xd9]
10346 ; X64-NEXT: ## xmm3 {%k1} = (xmm0 * xmm1) - xmm3
10347 ; X64-NEXT: vmovaps %xmm2, %xmm4 ## encoding: [0xc5,0xf8,0x28,0xe2]
10348 ; X64-NEXT: vfmsub231ss {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0x7d,0x78,0xbb,0xe1]
10349 ; X64-NEXT: vaddps %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe0,0x58,0xdc]
10350 ; X64-NEXT: vfmsub231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0xbb,0xd1]
10351 ; X64-NEXT: vaddps %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe8,0x58,0xc3]
10352 ; X64-NEXT: retq ## encoding: [0xc3]
10353 %res = call <4 x float> @llvm.x86.avx512.mask3.vfmsub.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 4)
10354 %res1 = call <4 x float> @llvm.x86.avx512.mask3.vfmsub.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 -1, i32 11)
10355 %res2 = call <4 x float> @llvm.x86.avx512.mask3.vfmsub.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 10)
10356 %res3 = fadd <4 x float> %res, %res1
10357 %res4 = fadd <4 x float> %res2, %res3
10358 ret <4 x float> %res4
10359 }
10361 declare <2 x double> @llvm.x86.avx512.mask3.vfnmsub.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32)
10363 define <2 x double>@test_int_x86_avx512_mask3_vfnmsub_sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3,i32 %x4 ){
10364 ; X86-LABEL: test_int_x86_avx512_mask3_vfnmsub_sd:
10365 ; X86: ## %bb.0:
10366 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10367 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10368 ; X86-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
10369 ; X86-NEXT: vfnmsub231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbf,0xd9]
10370 ; X86-NEXT: ## xmm3 {%k1} = -(xmm0 * xmm1) - xmm3
10371 ; X86-NEXT: vmovapd %xmm2, %xmm4 ## encoding: [0xc5,0xf9,0x28,0xe2]
10372 ; X86-NEXT: vfnmsub231sd {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0xfd,0x78,0xbf,0xe1]
10373 ; X86-NEXT: vaddpd %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe1,0x58,0xdc]
10374 ; X86-NEXT: vfnmsub231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0xbf,0xd1]
10375 ; X86-NEXT: vaddpd %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe9,0x58,0xc3]
10376 ; X86-NEXT: retl ## encoding: [0xc3]
10377 ;
10378 ; X64-LABEL: test_int_x86_avx512_mask3_vfnmsub_sd:
10379 ; X64: ## %bb.0:
10380 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10381 ; X64-NEXT: vmovapd %xmm2, %xmm3 ## encoding: [0xc5,0xf9,0x28,0xda]
10382 ; X64-NEXT: vfnmsub231sd %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0xfd,0x09,0xbf,0xd9]
10383 ; X64-NEXT: ## xmm3 {%k1} = -(xmm0 * xmm1) - xmm3
10384 ; X64-NEXT: vmovapd %xmm2, %xmm4 ## encoding: [0xc5,0xf9,0x28,0xe2]
10385 ; X64-NEXT: vfnmsub231sd {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0xfd,0x78,0xbf,0xe1]
10386 ; X64-NEXT: vaddpd %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe1,0x58,0xdc]
10387 ; X64-NEXT: vfnmsub231sd {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0xfd,0x59,0xbf,0xd1]
10388 ; X64-NEXT: vaddpd %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe9,0x58,0xc3]
10389 ; X64-NEXT: retq ## encoding: [0xc3]
10390 %res = call <2 x double> @llvm.x86.avx512.mask3.vfnmsub.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 4)
10391 %res1 = call <2 x double> @llvm.x86.avx512.mask3.vfnmsub.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 -1, i32 11)
10392 %res2 = call <2 x double> @llvm.x86.avx512.mask3.vfnmsub.sd(<2 x double> %x0, <2 x double> %x1, <2 x double> %x2, i8 %x3, i32 10)
10393 %res3 = fadd <2 x double> %res, %res1
10394 %res4 = fadd <2 x double> %res2, %res3
10395 ret <2 x double> %res4
10396 }
10398 declare <4 x float> @llvm.x86.avx512.mask3.vfnmsub.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
10400 define <4 x float>@test_int_x86_avx512_mask3_vfnmsub_ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3,i32 %x4 ){
10401 ; X86-LABEL: test_int_x86_avx512_mask3_vfnmsub_ss:
10402 ; X86: ## %bb.0:
10403 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10404 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10405 ; X86-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
10406 ; X86-NEXT: vfnmsub231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbf,0xd9]
10407 ; X86-NEXT: ## xmm3 {%k1} = -(xmm0 * xmm1) - xmm3
10408 ; X86-NEXT: vmovaps %xmm2, %xmm4 ## encoding: [0xc5,0xf8,0x28,0xe2]
10409 ; X86-NEXT: vfnmsub231ss {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0x7d,0x78,0xbf,0xe1]
10410 ; X86-NEXT: vaddps %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe0,0x58,0xdc]
10411 ; X86-NEXT: vfnmsub231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0xbf,0xd1]
10412 ; X86-NEXT: vaddps %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe8,0x58,0xc3]
10413 ; X86-NEXT: retl ## encoding: [0xc3]
10414 ;
10415 ; X64-LABEL: test_int_x86_avx512_mask3_vfnmsub_ss:
10416 ; X64: ## %bb.0:
10417 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10418 ; X64-NEXT: vmovaps %xmm2, %xmm3 ## encoding: [0xc5,0xf8,0x28,0xda]
10419 ; X64-NEXT: vfnmsub231ss %xmm1, %xmm0, %xmm3 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xbf,0xd9]
10420 ; X64-NEXT: ## xmm3 {%k1} = -(xmm0 * xmm1) - xmm3
10421 ; X64-NEXT: vmovaps %xmm2, %xmm4 ## encoding: [0xc5,0xf8,0x28,0xe2]
10422 ; X64-NEXT: vfnmsub231ss {rz-sae}, %xmm1, %xmm0, %xmm4 ## encoding: [0x62,0xf2,0x7d,0x78,0xbf,0xe1]
10423 ; X64-NEXT: vaddps %xmm4, %xmm3, %xmm3 ## encoding: [0xc5,0xe0,0x58,0xdc]
10424 ; X64-NEXT: vfnmsub231ss {ru-sae}, %xmm1, %xmm0, %xmm2 {%k1} ## encoding: [0x62,0xf2,0x7d,0x59,0xbf,0xd1]
10425 ; X64-NEXT: vaddps %xmm3, %xmm2, %xmm0 ## encoding: [0xc5,0xe8,0x58,0xc3]
10426 ; X64-NEXT: retq ## encoding: [0xc3]
10427 %res = call <4 x float> @llvm.x86.avx512.mask3.vfnmsub.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 4)
10428 %res1 = call <4 x float> @llvm.x86.avx512.mask3.vfnmsub.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 -1, i32 11)
10429 %res2 = call <4 x float> @llvm.x86.avx512.mask3.vfnmsub.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %x2, i8 %x3, i32 10)
10430 %res3 = fadd <4 x float> %res, %res1
10431 %res4 = fadd <4 x float> %res2, %res3
10432 ret <4 x float> %res4
10433 }
10435 define <4 x float>@test_int_x86_avx512_mask3_vfmadd_ss_rm(<4 x float> %x0, <4 x float> %x1, ptr%ptr_b ,i8 %x3,i32 %x4) {
10436 ; X86-LABEL: test_int_x86_avx512_mask3_vfmadd_ss_rm:
10437 ; X86: ## %bb.0:
10438 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
10439 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
10440 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
10441 ; X86-NEXT: vfmadd231ss (%eax), %xmm0, %xmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xb9,0x08]
10442 ; X86-NEXT: ## xmm1 {%k1} = (xmm0 * mem) + xmm1
10443 ; X86-NEXT: vmovaps %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x28,0xc1]
10444 ; X86-NEXT: retl ## encoding: [0xc3]
10445 ;
10446 ; X64-LABEL: test_int_x86_avx512_mask3_vfmadd_ss_rm:
10447 ; X64: ## %bb.0:
10448 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
10449 ; X64-NEXT: vfmadd231ss (%rdi), %xmm0, %xmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x09,0xb9,0x0f]
10450 ; X64-NEXT: ## xmm1 {%k1} = (xmm0 * mem) + xmm1
10451 ; X64-NEXT: vmovaps %xmm1, %xmm0 ## encoding: [0xc5,0xf8,0x28,0xc1]
10452 ; X64-NEXT: retq ## encoding: [0xc3]
10453 %q = load float, ptr %ptr_b
10454 %vecinit.i = insertelement <4 x float> undef, float %q, i32 0
10455 %res = call <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float> %x0, <4 x float> %vecinit.i, <4 x float> %x1, i8 %x3, i32 4)
10456 ret < 4 x float> %res
10457 }
10459 define <4 x float>@test_int_x86_avx512_mask_vfmadd_ss_rm(<4 x float> %x0, <4 x float> %x1,ptr%ptr_b ,i8 %x3,i32 %x4) {
10460 ; X86-LABEL: test_int_x86_avx512_mask_vfmadd_ss_rm:
10461 ; X86: ## %bb.0:
10462 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
10463 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx ## encoding: [0x0f,0xb6,0x4c,0x24,0x08]
10464 ; X86-NEXT: kmovw %ecx, %k1 ## encoding: [0xc5,0xf8,0x92,0xc9]
10465 ; X86-NEXT: vfmadd132ss (%eax), %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0x99,0x00]
10466 ; X86-NEXT: ## xmm0 {%k1} = (xmm0 * mem) + xmm1
10467 ; X86-NEXT: retl ## encoding: [0xc3]
10468 ;
10469 ; X64-LABEL: test_int_x86_avx512_mask_vfmadd_ss_rm:
10470 ; X64: ## %bb.0:
10471 ; X64-NEXT: kmovw %esi, %k1 ## encoding: [0xc5,0xf8,0x92,0xce]
10472 ; X64-NEXT: vfmadd132ss (%rdi), %xmm1, %xmm0 {%k1} ## encoding: [0x62,0xf2,0x75,0x09,0x99,0x07]
10473 ; X64-NEXT: ## xmm0 {%k1} = (xmm0 * mem) + xmm1
10474 ; X64-NEXT: retq ## encoding: [0xc3]
10475 %q = load float, ptr %ptr_b
10476 %vecinit.i = insertelement <4 x float> undef, float %q, i32 0
10477 %res = call <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float> %x0,<4 x float> %vecinit.i, <4 x float> %x1, i8 %x3, i32 4)
10478 ret < 4 x float> %res
10479 }
10482 define <4 x float>@test_int_x86_avx512_maskz_vfmadd_ss_rm(<4 x float> %x0, <4 x float> %x1,ptr%ptr_b ,i8 %x3,i32 %x4) {
10483 ; CHECK-LABEL: test_int_x86_avx512_maskz_vfmadd_ss_rm:
10484 ; CHECK: ## %bb.0:
10485 ; CHECK-NEXT: vxorps %xmm1, %xmm1, %xmm1 ## encoding: [0xc5,0xf0,0x57,0xc9]
10486 ; CHECK-NEXT: vblendps $1, %xmm1, %xmm0, %xmm0 ## encoding: [0xc4,0xe3,0x79,0x0c,0xc1,0x01]
10487 ; CHECK-NEXT: ## xmm0 = xmm1[0],xmm0[1,2,3]
10488 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10489 %q = load float, ptr %ptr_b
10490 %vecinit.i = insertelement <4 x float> undef, float %q, i32 0
10491 %res = call <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float> %x0, <4 x float> %x1, <4 x float> %vecinit.i, i8 0, i32 4)
10492 ret < 4 x float> %res
10493 }
10495 declare <8 x i32> @llvm.x86.avx512.mask.pmov.qd.512(<8 x i64>, <8 x i32>, i8)
10497 define <8 x i32>@test_int_x86_avx512_pmov_qd_512(<8 x i64> %x0, <8 x i32> %x1) {
10498 ; CHECK-LABEL: test_int_x86_avx512_pmov_qd_512:
10499 ; CHECK: ## %bb.0:
10500 ; CHECK-NEXT: vpmovqd %zmm0, %ymm0 ## encoding: [0x62,0xf2,0x7e,0x48,0x35,0xc0]
10501 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10502 %res = call <8 x i32> @llvm.x86.avx512.mask.pmov.qd.512(<8 x i64> %x0, <8 x i32> %x1, i8 -1)
10503 ret <8 x i32> %res
10504 }
10506 define <8 x i32>@test_int_x86_avx512_mask_pmov_qd_512(<8 x i64> %x0, <8 x i32> %x1, i8 %x2) {
10507 ; X86-LABEL: test_int_x86_avx512_mask_pmov_qd_512:
10508 ; X86: ## %bb.0:
10509 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10510 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10511 ; X86-NEXT: vpmovqd %zmm0, %ymm1 {%k1} ## encoding: [0x62,0xf2,0x7e,0x49,0x35,0xc1]
10512 ; X86-NEXT: vmovdqa %ymm1, %ymm0 ## encoding: [0xc5,0xfd,0x6f,0xc1]
10513 ; X86-NEXT: retl ## encoding: [0xc3]
10514 ;
10515 ; X64-LABEL: test_int_x86_avx512_mask_pmov_qd_512:
10516 ; X64: ## %bb.0:
10517 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10518 ; X64-NEXT: vpmovqd %zmm0, %ymm1 {%k1} ## encoding: [0x62,0xf2,0x7e,0x49,0x35,0xc1]
10519 ; X64-NEXT: vmovdqa %ymm1, %ymm0 ## encoding: [0xc5,0xfd,0x6f,0xc1]
10520 ; X64-NEXT: retq ## encoding: [0xc3]
10521 %res = call <8 x i32> @llvm.x86.avx512.mask.pmov.qd.512(<8 x i64> %x0, <8 x i32> %x1, i8 %x2)
10522 ret <8 x i32> %res
10523 }
10525 define <8 x i32>@test_int_x86_avx512_maskz_pmov_qd_512(<8 x i64> %x0, i8 %x2) {
10526 ; X86-LABEL: test_int_x86_avx512_maskz_pmov_qd_512:
10527 ; X86: ## %bb.0:
10528 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10529 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10530 ; X86-NEXT: vpmovqd %zmm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7e,0xc9,0x35,0xc0]
10531 ; X86-NEXT: retl ## encoding: [0xc3]
10532 ;
10533 ; X64-LABEL: test_int_x86_avx512_maskz_pmov_qd_512:
10534 ; X64: ## %bb.0:
10535 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10536 ; X64-NEXT: vpmovqd %zmm0, %ymm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7e,0xc9,0x35,0xc0]
10537 ; X64-NEXT: retq ## encoding: [0xc3]
10538 %res = call <8 x i32> @llvm.x86.avx512.mask.pmov.qd.512(<8 x i64> %x0, <8 x i32> zeroinitializer, i8 %x2)
10539 ret <8 x i32> %res
10540 }
10542 declare <16 x float> @llvm.x86.avx512.mask.cvtdq2ps.512(<16 x i32>, <16 x float>, i16, i32)
10544 define <16 x float> @test_int_x86_avx512_mask_cvt_dq2ps_512(<16 x i32> %x0, <16 x float> %x1, i16 %x2) {
10545 ; X86-LABEL: test_int_x86_avx512_mask_cvt_dq2ps_512:
10546 ; X86: ## %bb.0:
10547 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10548 ; X86-NEXT: vcvtdq2ps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5b,0xc8]
10549 ; X86-NEXT: vcvtdq2ps {rn-sae}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x5b,0xc0]
10550 ; X86-NEXT: vaddps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x74,0x48,0x58,0xc0]
10551 ; X86-NEXT: retl ## encoding: [0xc3]
10552 ;
10553 ; X64-LABEL: test_int_x86_avx512_mask_cvt_dq2ps_512:
10554 ; X64: ## %bb.0:
10555 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10556 ; X64-NEXT: vcvtdq2ps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7c,0x49,0x5b,0xc8]
10557 ; X64-NEXT: vcvtdq2ps {rn-sae}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7c,0x18,0x5b,0xc0]
10558 ; X64-NEXT: vaddps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x74,0x48,0x58,0xc0]
10559 ; X64-NEXT: retq ## encoding: [0xc3]
10560 %res = call <16 x float> @llvm.x86.avx512.mask.cvtdq2ps.512(<16 x i32> %x0, <16 x float> %x1, i16 %x2, i32 4)
10561 %res1 = call <16 x float> @llvm.x86.avx512.mask.cvtdq2ps.512(<16 x i32> %x0, <16 x float> %x1, i16 -1, i32 8)
10562 %res2 = fadd <16 x float> %res, %res1
10563 ret <16 x float> %res2
10564 }
10566 declare <16 x float> @llvm.x86.avx512.mask.cvtudq2ps.512(<16 x i32>, <16 x float>, i16, i32)
10568 define <16 x float> @test_int_x86_avx512_mask_cvt_udq2ps_512(<16 x i32> %x0, <16 x float> %x1, i16 %x2) {
10569 ; X86-LABEL: test_int_x86_avx512_mask_cvt_udq2ps_512:
10570 ; X86: ## %bb.0:
10571 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10572 ; X86-NEXT: vcvtudq2ps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7f,0x49,0x7a,0xc8]
10573 ; X86-NEXT: vcvtudq2ps {rn-sae}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7f,0x18,0x7a,0xc0]
10574 ; X86-NEXT: vaddps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x74,0x48,0x58,0xc0]
10575 ; X86-NEXT: retl ## encoding: [0xc3]
10576 ;
10577 ; X64-LABEL: test_int_x86_avx512_mask_cvt_udq2ps_512:
10578 ; X64: ## %bb.0:
10579 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10580 ; X64-NEXT: vcvtudq2ps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf1,0x7f,0x49,0x7a,0xc8]
10581 ; X64-NEXT: vcvtudq2ps {rn-sae}, %zmm0, %zmm0 ## encoding: [0x62,0xf1,0x7f,0x18,0x7a,0xc0]
10582 ; X64-NEXT: vaddps %zmm0, %zmm1, %zmm0 ## encoding: [0x62,0xf1,0x74,0x48,0x58,0xc0]
10583 ; X64-NEXT: retq ## encoding: [0xc3]
10584 %res = call <16 x float> @llvm.x86.avx512.mask.cvtudq2ps.512(<16 x i32> %x0, <16 x float> %x1, i16 %x2, i32 4)
10585 %res1 = call <16 x float> @llvm.x86.avx512.mask.cvtudq2ps.512(<16 x i32> %x0, <16 x float> %x1, i16 -1, i32 8)
10586 %res2 = fadd <16 x float> %res, %res1
10587 ret <16 x float> %res2
10588 }
10590 define <8 x double> @test_mask_compress_pd_512(<8 x double> %data, <8 x double> %passthru, i8 %mask) {
10591 ; X86-LABEL: test_mask_compress_pd_512:
10592 ; X86: ## %bb.0:
10593 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10594 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10595 ; X86-NEXT: vcompresspd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8a,0xc1]
10596 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10597 ; X86-NEXT: retl ## encoding: [0xc3]
10598 ;
10599 ; X64-LABEL: test_mask_compress_pd_512:
10600 ; X64: ## %bb.0:
10601 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10602 ; X64-NEXT: vcompresspd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8a,0xc1]
10603 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10604 ; X64-NEXT: retq ## encoding: [0xc3]
10605 %res = call <8 x double> @llvm.x86.avx512.mask.compress.pd.512(<8 x double> %data, <8 x double> %passthru, i8 %mask)
10606 ret <8 x double> %res
10607 }
10609 define <8 x double> @test_maskz_compress_pd_512(<8 x double> %data, i8 %mask) {
10610 ; X86-LABEL: test_maskz_compress_pd_512:
10611 ; X86: ## %bb.0:
10612 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10613 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10614 ; X86-NEXT: vcompresspd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x8a,0xc0]
10615 ; X86-NEXT: retl ## encoding: [0xc3]
10616 ;
10617 ; X64-LABEL: test_maskz_compress_pd_512:
10618 ; X64: ## %bb.0:
10619 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10620 ; X64-NEXT: vcompresspd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x8a,0xc0]
10621 ; X64-NEXT: retq ## encoding: [0xc3]
10622 %res = call <8 x double> @llvm.x86.avx512.mask.compress.pd.512(<8 x double> %data, <8 x double> zeroinitializer, i8 %mask)
10623 ret <8 x double> %res
10624 }
10626 define <8 x double> @test_compress_pd_512(<8 x double> %data) {
10627 ; CHECK-LABEL: test_compress_pd_512:
10628 ; CHECK: ## %bb.0:
10629 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10630 %res = call <8 x double> @llvm.x86.avx512.mask.compress.pd.512(<8 x double> %data, <8 x double> undef, i8 -1)
10631 ret <8 x double> %res
10632 }
10634 declare <8 x double> @llvm.x86.avx512.mask.compress.pd.512(<8 x double> %data, <8 x double> %src0, i8 %mask)
10636 define <16 x float> @test_mask_compress_ps_512(<16 x float> %data, <16 x float> %passthru, i16 %mask) {
10637 ; X86-LABEL: test_mask_compress_ps_512:
10638 ; X86: ## %bb.0:
10639 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10640 ; X86-NEXT: vcompressps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8a,0xc1]
10641 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10642 ; X86-NEXT: retl ## encoding: [0xc3]
10643 ;
10644 ; X64-LABEL: test_mask_compress_ps_512:
10645 ; X64: ## %bb.0:
10646 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10647 ; X64-NEXT: vcompressps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8a,0xc1]
10648 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10649 ; X64-NEXT: retq ## encoding: [0xc3]
10650 %res = call <16 x float> @llvm.x86.avx512.mask.compress.ps.512(<16 x float> %data, <16 x float> %passthru, i16 %mask)
10651 ret <16 x float> %res
10652 }
10654 define <16 x float> @test_maskz_compress_ps_512(<16 x float> %data, i16 %mask) {
10655 ; X86-LABEL: test_maskz_compress_ps_512:
10656 ; X86: ## %bb.0:
10657 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10658 ; X86-NEXT: vcompressps %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x8a,0xc0]
10659 ; X86-NEXT: retl ## encoding: [0xc3]
10660 ;
10661 ; X64-LABEL: test_maskz_compress_ps_512:
10662 ; X64: ## %bb.0:
10663 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10664 ; X64-NEXT: vcompressps %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x8a,0xc0]
10665 ; X64-NEXT: retq ## encoding: [0xc3]
10666 %res = call <16 x float> @llvm.x86.avx512.mask.compress.ps.512(<16 x float> %data, <16 x float> zeroinitializer, i16 %mask)
10667 ret <16 x float> %res
10668 }
10670 define <16 x float> @test_compress_ps_512(<16 x float> %data) {
10671 ; CHECK-LABEL: test_compress_ps_512:
10672 ; CHECK: ## %bb.0:
10673 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10674 %res = call <16 x float> @llvm.x86.avx512.mask.compress.ps.512(<16 x float> %data, <16 x float> undef, i16 -1)
10675 ret <16 x float> %res
10676 }
10678 declare <16 x float> @llvm.x86.avx512.mask.compress.ps.512(<16 x float> %data, <16 x float> %src0, i16 %mask)
10680 define <8 x i64> @test_mask_compress_q_512(<8 x i64> %data, <8 x i64> %passthru, i8 %mask) {
10681 ; X86-LABEL: test_mask_compress_q_512:
10682 ; X86: ## %bb.0:
10683 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10684 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10685 ; X86-NEXT: vpcompressq %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8b,0xc1]
10686 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10687 ; X86-NEXT: retl ## encoding: [0xc3]
10688 ;
10689 ; X64-LABEL: test_mask_compress_q_512:
10690 ; X64: ## %bb.0:
10691 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10692 ; X64-NEXT: vpcompressq %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x8b,0xc1]
10693 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10694 ; X64-NEXT: retq ## encoding: [0xc3]
10695 %res = call <8 x i64> @llvm.x86.avx512.mask.compress.q.512(<8 x i64> %data, <8 x i64> %passthru, i8 %mask)
10696 ret <8 x i64> %res
10697 }
10699 define <8 x i64> @test_maskz_compress_q_512(<8 x i64> %data, i8 %mask) {
10700 ; X86-LABEL: test_maskz_compress_q_512:
10701 ; X86: ## %bb.0:
10702 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10703 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10704 ; X86-NEXT: vpcompressq %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x8b,0xc0]
10705 ; X86-NEXT: retl ## encoding: [0xc3]
10706 ;
10707 ; X64-LABEL: test_maskz_compress_q_512:
10708 ; X64: ## %bb.0:
10709 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10710 ; X64-NEXT: vpcompressq %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x8b,0xc0]
10711 ; X64-NEXT: retq ## encoding: [0xc3]
10712 %res = call <8 x i64> @llvm.x86.avx512.mask.compress.q.512(<8 x i64> %data, <8 x i64> zeroinitializer, i8 %mask)
10713 ret <8 x i64> %res
10714 }
10716 define <8 x i64> @test_compress_q_512(<8 x i64> %data) {
10717 ; CHECK-LABEL: test_compress_q_512:
10718 ; CHECK: ## %bb.0:
10719 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10720 %res = call <8 x i64> @llvm.x86.avx512.mask.compress.q.512(<8 x i64> %data, <8 x i64> undef, i8 -1)
10721 ret <8 x i64> %res
10722 }
10724 declare <8 x i64> @llvm.x86.avx512.mask.compress.q.512(<8 x i64> %data, <8 x i64> %src0, i8 %mask)
10726 define <16 x i32> @test_mask_compress_d_512(<16 x i32> %data, <16 x i32> %passthru, i16 %mask) {
10727 ; X86-LABEL: test_mask_compress_d_512:
10728 ; X86: ## %bb.0:
10729 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10730 ; X86-NEXT: vpcompressd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8b,0xc1]
10731 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10732 ; X86-NEXT: retl ## encoding: [0xc3]
10733 ;
10734 ; X64-LABEL: test_mask_compress_d_512:
10735 ; X64: ## %bb.0:
10736 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10737 ; X64-NEXT: vpcompressd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x8b,0xc1]
10738 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10739 ; X64-NEXT: retq ## encoding: [0xc3]
10740 %res = call <16 x i32> @llvm.x86.avx512.mask.compress.d.512(<16 x i32> %data, <16 x i32> %passthru, i16 %mask)
10741 ret <16 x i32> %res
10742 }
10744 define <16 x i32> @test_maskz_compress_d_512(<16 x i32> %data, i16 %mask) {
10745 ; X86-LABEL: test_maskz_compress_d_512:
10746 ; X86: ## %bb.0:
10747 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10748 ; X86-NEXT: vpcompressd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x8b,0xc0]
10749 ; X86-NEXT: retl ## encoding: [0xc3]
10750 ;
10751 ; X64-LABEL: test_maskz_compress_d_512:
10752 ; X64: ## %bb.0:
10753 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10754 ; X64-NEXT: vpcompressd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x8b,0xc0]
10755 ; X64-NEXT: retq ## encoding: [0xc3]
10756 %res = call <16 x i32> @llvm.x86.avx512.mask.compress.d.512(<16 x i32> %data, <16 x i32> zeroinitializer, i16 %mask)
10757 ret <16 x i32> %res
10758 }
10760 define <16 x i32> @test_compress_d_512(<16 x i32> %data) {
10761 ; CHECK-LABEL: test_compress_d_512:
10762 ; CHECK: ## %bb.0:
10763 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10764 %res = call <16 x i32> @llvm.x86.avx512.mask.compress.d.512(<16 x i32> %data, <16 x i32> undef, i16 -1)
10765 ret <16 x i32> %res
10766 }
10768 declare <16 x i32> @llvm.x86.avx512.mask.compress.d.512(<16 x i32> %data, <16 x i32> %src0, i16 %mask)
10770 define <8 x double> @test_expand_pd_512(<8 x double> %data) {
10771 ; CHECK-LABEL: test_expand_pd_512:
10772 ; CHECK: ## %bb.0:
10773 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10774 %res = call <8 x double> @llvm.x86.avx512.mask.expand.pd.512(<8 x double> %data, <8 x double> undef, i8 -1)
10775 ret <8 x double> %res
10776 }
10778 define <8 x double> @test_mask_expand_pd_512(<8 x double> %data, <8 x double> %passthru, i8 %mask) {
10779 ; X86-LABEL: test_mask_expand_pd_512:
10780 ; X86: ## %bb.0:
10781 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10782 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10783 ; X86-NEXT: vexpandpd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x88,0xc8]
10784 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10785 ; X86-NEXT: retl ## encoding: [0xc3]
10786 ;
10787 ; X64-LABEL: test_mask_expand_pd_512:
10788 ; X64: ## %bb.0:
10789 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10790 ; X64-NEXT: vexpandpd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x88,0xc8]
10791 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10792 ; X64-NEXT: retq ## encoding: [0xc3]
10793 %res = call <8 x double> @llvm.x86.avx512.mask.expand.pd.512(<8 x double> %data, <8 x double> %passthru, i8 %mask)
10794 ret <8 x double> %res
10795 }
10797 define <8 x double> @test_maskz_expand_pd_512(<8 x double> %data, i8 %mask) {
10798 ; X86-LABEL: test_maskz_expand_pd_512:
10799 ; X86: ## %bb.0:
10800 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10801 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10802 ; X86-NEXT: vexpandpd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x88,0xc0]
10803 ; X86-NEXT: retl ## encoding: [0xc3]
10804 ;
10805 ; X64-LABEL: test_maskz_expand_pd_512:
10806 ; X64: ## %bb.0:
10807 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10808 ; X64-NEXT: vexpandpd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x88,0xc0]
10809 ; X64-NEXT: retq ## encoding: [0xc3]
10810 %res = call <8 x double> @llvm.x86.avx512.mask.expand.pd.512(<8 x double> %data, <8 x double> zeroinitializer, i8 %mask)
10811 ret <8 x double> %res
10812 }
10814 declare <8 x double> @llvm.x86.avx512.mask.expand.pd.512(<8 x double> %data, <8 x double> %src0, i8 %mask)
10816 define <16 x float> @test_expand_ps_512(<16 x float> %data) {
10817 ; CHECK-LABEL: test_expand_ps_512:
10818 ; CHECK: ## %bb.0:
10819 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10820 %res = call <16 x float> @llvm.x86.avx512.mask.expand.ps.512(<16 x float> %data, <16 x float> undef, i16 -1)
10821 ret <16 x float> %res
10822 }
10824 define <16 x float> @test_mask_expand_ps_512(<16 x float> %data, <16 x float> %passthru, i16 %mask) {
10825 ; X86-LABEL: test_mask_expand_ps_512:
10826 ; X86: ## %bb.0:
10827 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10828 ; X86-NEXT: vexpandps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x88,0xc8]
10829 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10830 ; X86-NEXT: retl ## encoding: [0xc3]
10831 ;
10832 ; X64-LABEL: test_mask_expand_ps_512:
10833 ; X64: ## %bb.0:
10834 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10835 ; X64-NEXT: vexpandps %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x88,0xc8]
10836 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10837 ; X64-NEXT: retq ## encoding: [0xc3]
10838 %res = call <16 x float> @llvm.x86.avx512.mask.expand.ps.512(<16 x float> %data, <16 x float> %passthru, i16 %mask)
10839 ret <16 x float> %res
10840 }
10842 define <16 x float> @test_maskz_expand_ps_512(<16 x float> %data, i16 %mask) {
10843 ; X86-LABEL: test_maskz_expand_ps_512:
10844 ; X86: ## %bb.0:
10845 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10846 ; X86-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x88,0xc0]
10847 ; X86-NEXT: retl ## encoding: [0xc3]
10848 ;
10849 ; X64-LABEL: test_maskz_expand_ps_512:
10850 ; X64: ## %bb.0:
10851 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10852 ; X64-NEXT: vexpandps %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x88,0xc0]
10853 ; X64-NEXT: retq ## encoding: [0xc3]
10854 %res = call <16 x float> @llvm.x86.avx512.mask.expand.ps.512(<16 x float> %data, <16 x float> zeroinitializer, i16 %mask)
10855 ret <16 x float> %res
10856 }
10858 declare <16 x float> @llvm.x86.avx512.mask.expand.ps.512(<16 x float> %data, <16 x float> %src0, i16 %mask)
10860 define <8 x i64> @test_expand_q_512(<8 x i64> %data) {
10861 ; CHECK-LABEL: test_expand_q_512:
10862 ; CHECK: ## %bb.0:
10863 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10864 %res = call <8 x i64> @llvm.x86.avx512.mask.expand.q.512(<8 x i64> %data, <8 x i64> undef, i8 -1)
10865 ret <8 x i64> %res
10866 }
10868 define <8 x i64> @test_mask_expand_q_512(<8 x i64> %data, <8 x i64> %passthru, i8 %mask) {
10869 ; X86-LABEL: test_mask_expand_q_512:
10870 ; X86: ## %bb.0:
10871 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10872 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10873 ; X86-NEXT: vpexpandq %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x89,0xc8]
10874 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10875 ; X86-NEXT: retl ## encoding: [0xc3]
10876 ;
10877 ; X64-LABEL: test_mask_expand_q_512:
10878 ; X64: ## %bb.0:
10879 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10880 ; X64-NEXT: vpexpandq %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0xfd,0x49,0x89,0xc8]
10881 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10882 ; X64-NEXT: retq ## encoding: [0xc3]
10883 %res = call <8 x i64> @llvm.x86.avx512.mask.expand.q.512(<8 x i64> %data, <8 x i64> %passthru, i8 %mask)
10884 ret <8 x i64> %res
10885 }
10887 define <8 x i64> @test_maskz_expand_q_512(<8 x i64> %data, i8 %mask) {
10888 ; X86-LABEL: test_maskz_expand_q_512:
10889 ; X86: ## %bb.0:
10890 ; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax ## encoding: [0x0f,0xb6,0x44,0x24,0x04]
10891 ; X86-NEXT: kmovw %eax, %k1 ## encoding: [0xc5,0xf8,0x92,0xc8]
10892 ; X86-NEXT: vpexpandq %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x89,0xc0]
10893 ; X86-NEXT: retl ## encoding: [0xc3]
10894 ;
10895 ; X64-LABEL: test_maskz_expand_q_512:
10896 ; X64: ## %bb.0:
10897 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10898 ; X64-NEXT: vpexpandq %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0xfd,0xc9,0x89,0xc0]
10899 ; X64-NEXT: retq ## encoding: [0xc3]
10900 %res = call <8 x i64> @llvm.x86.avx512.mask.expand.q.512(<8 x i64> %data, <8 x i64> zeroinitializer, i8 %mask)
10901 ret <8 x i64> %res
10902 }
10904 declare <8 x i64> @llvm.x86.avx512.mask.expand.q.512(<8 x i64> %data, <8 x i64> %src0, i8 %mask)
10906 define <16 x i32> @test_expand_d_512(<16 x i32> %data) {
10907 ; CHECK-LABEL: test_expand_d_512:
10908 ; CHECK: ## %bb.0:
10909 ; CHECK-NEXT: ret{{[l|q]}} ## encoding: [0xc3]
10910 %res = call <16 x i32> @llvm.x86.avx512.mask.expand.d.512(<16 x i32> %data, <16 x i32> undef, i16 -1)
10911 ret <16 x i32> %res
10912 }
10914 define <16 x i32> @test_mask_expand_d_512(<16 x i32> %data, <16 x i32> %passthru, i16 %mask) {
10915 ; X86-LABEL: test_mask_expand_d_512:
10916 ; X86: ## %bb.0:
10917 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10918 ; X86-NEXT: vpexpandd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x89,0xc8]
10919 ; X86-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10920 ; X86-NEXT: retl ## encoding: [0xc3]
10921 ;
10922 ; X64-LABEL: test_mask_expand_d_512:
10923 ; X64: ## %bb.0:
10924 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10925 ; X64-NEXT: vpexpandd %zmm0, %zmm1 {%k1} ## encoding: [0x62,0xf2,0x7d,0x49,0x89,0xc8]
10926 ; X64-NEXT: vmovdqa64 %zmm1, %zmm0 ## encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
10927 ; X64-NEXT: retq ## encoding: [0xc3]
10928 %res = call <16 x i32> @llvm.x86.avx512.mask.expand.d.512(<16 x i32> %data, <16 x i32> %passthru, i16 %mask)
10929 ret <16 x i32> %res
10930 }
10932 define <16 x i32> @test_maskz_expand_d_512(<16 x i32> %data, i16 %mask) {
10933 ; X86-LABEL: test_maskz_expand_d_512:
10934 ; X86: ## %bb.0:
10935 ; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 ## encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
10936 ; X86-NEXT: vpexpandd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x89,0xc0]
10937 ; X86-NEXT: retl ## encoding: [0xc3]
10938 ;
10939 ; X64-LABEL: test_maskz_expand_d_512:
10940 ; X64: ## %bb.0:
10941 ; X64-NEXT: kmovw %edi, %k1 ## encoding: [0xc5,0xf8,0x92,0xcf]
10942 ; X64-NEXT: vpexpandd %zmm0, %zmm0 {%k1} {z} ## encoding: [0x62,0xf2,0x7d,0xc9,0x89,0xc0]
10943 ; X64-NEXT: retq ## encoding: [0xc3]
10944 %res = call <16 x i32> @llvm.x86.avx512.mask.expand.d.512(<16 x i32> %data, <16 x i32> zeroinitializer, i16 %mask)
10945 ret <16 x i32> %res
10946 }
10948 declare <16 x i32> @llvm.x86.avx512.mask.expand.d.512(<16 x i32> %data, <16 x i32> %src0, i16 %mask)
10950 define <16 x float> @test_cmp_512(<16 x float> %a, <16 x float> %b, <16 x float> %c, <16 x float> %d, ptr %p) {
10951 ; X86-LABEL: test_cmp_512:
10952 ; X86: ## %bb.0: ## %entry
10953 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04]
10954 ; X86-NEXT: vcmpltps {sae}, %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7c,0x18,0xc2,0xc1,0x01]
10955 ; X86-NEXT: vcmpltps %zmm3, %zmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x48,0xc2,0xcb,0x01]
10956 ; X86-NEXT: kxnorw %k1, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc9]
10957 ; X86-NEXT: vmovaps (%eax), %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x28,0x00]
10958 ; X86-NEXT: retl ## encoding: [0xc3]
10959 ;
10960 ; X64-LABEL: test_cmp_512:
10961 ; X64: ## %bb.0: ## %entry
10962 ; X64-NEXT: vcmpltps {sae}, %zmm1, %zmm0, %k0 ## encoding: [0x62,0xf1,0x7c,0x18,0xc2,0xc1,0x01]
10963 ; X64-NEXT: vcmpltps %zmm3, %zmm2, %k1 ## encoding: [0x62,0xf1,0x6c,0x48,0xc2,0xcb,0x01]
10964 ; X64-NEXT: kxnorw %k1, %k0, %k1 ## encoding: [0xc5,0xfc,0x46,0xc9]
10965 ; X64-NEXT: vmovaps (%rdi), %zmm0 {%k1} {z} ## encoding: [0x62,0xf1,0x7c,0xc9,0x28,0x07]
10966 ; X64-NEXT: retq ## encoding: [0xc3]
10967 entry:
10968 %0 = tail call <16 x i1> @llvm.x86.avx512.cmp.ps.512(<16 x float> %a, <16 x float> %b, i32 1, i32 8)
10969 %1 = tail call <16 x i1> @llvm.x86.avx512.cmp.ps.512(<16 x float> %c, <16 x float> %d, i32 1, i32 4)
10970 %2 = load <16 x float>, ptr %p
10971 %3 = xor <16 x i1> %0, %1
10972 %4 = select <16 x i1> %3, <16 x float> zeroinitializer, <16 x float> %2
10973 ret <16 x float> %4
10974 }
10976 declare <16 x i1> @llvm.x86.avx512.cmp.ps.512(<16 x float>, <16 x float>, i32, i32)