[Frontend] Remove unused includes (NFC) (#116927)
[llvm-project.git] / llvm / test / MC / AArch64 / SME / ld1d-diagnostics.s
blobad3d85aa3a0453fdc6746c5e5dc4bbb620eefb67
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme 2>&1 < %s| FileCheck %s
3 // ------------------------------------------------------------------------- //
4 // Invalid tile (expected: za[0-7]h.d or za[0-7]v.d)
6 ld1d {za8h.d[w12, 0]}, p0/z, [x0]
7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: unexpected token in argument list
8 // CHECK-NEXT: ld1d {za8h.d[w12, 0]}, p0/z, [x0]
9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
11 ld1d {za[w12, 0]}, p0/z, [x0]
12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-7]h.d or za[0-7]v.d
13 // CHECK-NEXT: ld1d {za[w12, 0]}, p0/z, [x0]
14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
16 ld1d {za3h.s[w12, 0]}, p0/z, [x0]
17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected za[0-7]h.d or za[0-7]v.d
18 // CHECK-NEXT: ld1d {za3h.s[w12, 0]}, p0/z, [x0]
19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
21 // ------------------------------------------------------------------------- //
22 // Invalid vector select register (expected: w12-w15)
24 ld1d {za0h.d[w11, 0]}, p0/z, [x0]
25 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w12, w15]
26 // CHECK-NEXT: ld1d {za0h.d[w11, 0]}, p0/z, [x0]
27 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
29 ld1d {za0h.d[w16, 0]}, p0/z, [x0]
30 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w12, w15]
31 // CHECK-NEXT: ld1d {za0h.d[w16, 0]}, p0/z, [x0]
32 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
34 // ------------------------------------------------------------------------- //
35 // Invalid vector select offset (expected: 0-1)
37 ld1d {za0h.d[w12]}, p0/z, [x0]
38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 1].
39 // CHECK-NEXT: ld1d {za0h.d[w12]}, p0/z, [x0]
40 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
42 ld1d {za0h.d[w12, 2]}, p0/z, [x0]
43 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 1].
44 // CHECK-NEXT: ld1d {za0h.d[w12, 2]}, p0/z, [x0]
45 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
47 // ------------------------------------------------------------------------- //
48 // Invalid predicate (expected: p0-p7)
50 ld1d {za0h.d[w12, 0]}, p8/z, [x0]
51 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
52 // CHECK-NEXT: ld1d {za0h.d[w12, 0]}, p8/z, [x0]
53 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
55 // ------------------------------------------------------------------------- //
56 // Invalid predicate qualifier (expected: /z)
58 ld1d {za0h.d[w12, 0]}, p0/m, [x0]
59 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
60 // CHECK-NEXT: ld1d {za0h.d[w12, 0]}, p0/m, [x0]
61 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
63 // ------------------------------------------------------------------------- //
64 // Invalid memory operands
66 ld1d {za0h.d[w12, 0]}, p0/z, [w0]
67 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
68 // CHECK-NEXT: ld1d {za0h.d[w12, 0]}, p0/z, [w0]
69 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
71 ld1d {za0h.d[w12, 0]}, p0/z, [x0, w0]
72 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #3'
73 // CHECK-NEXT: ld1d {za0h.d[w12, 0]}, p0/z, [x0, w0]
74 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
76 ld1d {za0h.d[w12, 0]}, p0/z, [x0, x0, lsl #4]
77 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 or xzr, with required shift 'lsl #3'
78 // CHECK-NEXT: ld1d {za0h.d[w12, 0]}, p0/z, [x0, x0, lsl #4]
79 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: