[Frontend] Remove unused includes (NFC) (#116927)
[llvm-project.git] / llvm / test / MC / AArch64 / SME / st1q.s
blob90e648f749dc7081c81ce1d0183825e6e2558a9e
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \
6 // RUN: | llvm-objdump -d --mattr=+sme - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme < %s \
8 // RUN: | llvm-objdump -d --mattr=-sme - | FileCheck %s --check-prefix=CHECK-UNKNOWN
9 // Disassemble encoding and check the re-encoding (-show-encoding) matches.
10 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
11 // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
12 // RUN: | llvm-mc -triple=aarch64 -mattr=+sme -disassemble -show-encoding \
13 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
15 // --------------------------------------------------------------------------//
16 // Horizontal
18 st1q {za0h.q[w12, 0]}, p0, [x0, x0, lsl #4]
19 // CHECK-INST: st1q {za0h.q[w12, 0]}, p0, [x0, x0, lsl #4]
20 // CHECK-ENCODING: [0x00,0x00,0xe0,0xe1]
21 // CHECK-ERROR: instruction requires: sme
22 // CHECK-UNKNOWN: e1e00000 <unknown>
24 st1q {za5h.q[w14, 0]}, p5, [x10, x21, lsl #4]
25 // CHECK-INST: st1q {za5h.q[w14, 0]}, p5, [x10, x21, lsl #4]
26 // CHECK-ENCODING: [0x45,0x55,0xf5,0xe1]
27 // CHECK-ERROR: instruction requires: sme
28 // CHECK-UNKNOWN: e1f55545 <unknown>
30 st1q {za7h.q[w15, 0]}, p3, [x13, x8, lsl #4]
31 // CHECK-INST: st1q {za7h.q[w15, 0]}, p3, [x13, x8, lsl #4]
32 // CHECK-ENCODING: [0xa7,0x6d,0xe8,0xe1]
33 // CHECK-ERROR: instruction requires: sme
34 // CHECK-UNKNOWN: e1e86da7 <unknown>
36 st1q {za15h.q[w15, 0]}, p7, [sp]
37 // CHECK-INST: st1q {za15h.q[w15, 0]}, p7, [sp]
38 // CHECK-ENCODING: [0xef,0x7f,0xff,0xe1]
39 // CHECK-ERROR: instruction requires: sme
40 // CHECK-UNKNOWN: e1ff7fef <unknown>
42 st1q {za5h.q[w12, 0]}, p3, [x17, x16, lsl #4]
43 // CHECK-INST: st1q {za5h.q[w12, 0]}, p3, [x17, x16, lsl #4]
44 // CHECK-ENCODING: [0x25,0x0e,0xf0,0xe1]
45 // CHECK-ERROR: instruction requires: sme
46 // CHECK-UNKNOWN: e1f00e25 <unknown>
48 st1q {za1h.q[w12, 0]}, p1, [x1, x30, lsl #4]
49 // CHECK-INST: st1q {za1h.q[w12, 0]}, p1, [x1, x30, lsl #4]
50 // CHECK-ENCODING: [0x21,0x04,0xfe,0xe1]
51 // CHECK-ERROR: instruction requires: sme
52 // CHECK-UNKNOWN: e1fe0421 <unknown>
54 st1q {za8h.q[w14, 0]}, p5, [x19, x20, lsl #4]
55 // CHECK-INST: st1q {za8h.q[w14, 0]}, p5, [x19, x20, lsl #4]
56 // CHECK-ENCODING: [0x68,0x56,0xf4,0xe1]
57 // CHECK-ERROR: instruction requires: sme
58 // CHECK-UNKNOWN: e1f45668 <unknown>
60 st1q {za0h.q[w12, 0]}, p6, [x12, x2, lsl #4]
61 // CHECK-INST: st1q {za0h.q[w12, 0]}, p6, [x12, x2, lsl #4]
62 // CHECK-ENCODING: [0x80,0x19,0xe2,0xe1]
63 // CHECK-ERROR: instruction requires: sme
64 // CHECK-UNKNOWN: e1e21980 <unknown>
66 st1q {za1h.q[w14, 0]}, p2, [x1, x26, lsl #4]
67 // CHECK-INST: st1q {za1h.q[w14, 0]}, p2, [x1, x26, lsl #4]
68 // CHECK-ENCODING: [0x21,0x48,0xfa,0xe1]
69 // CHECK-ERROR: instruction requires: sme
70 // CHECK-UNKNOWN: e1fa4821 <unknown>
72 st1q {za13h.q[w12, 0]}, p2, [x22, x30, lsl #4]
73 // CHECK-INST: st1q {za13h.q[w12, 0]}, p2, [x22, x30, lsl #4]
74 // CHECK-ENCODING: [0xcd,0x0a,0xfe,0xe1]
75 // CHECK-ERROR: instruction requires: sme
76 // CHECK-UNKNOWN: e1fe0acd <unknown>
78 st1q {za2h.q[w15, 0]}, p5, [x9, x1, lsl #4]
79 // CHECK-INST: st1q {za2h.q[w15, 0]}, p5, [x9, x1, lsl #4]
80 // CHECK-ENCODING: [0x22,0x75,0xe1,0xe1]
81 // CHECK-ERROR: instruction requires: sme
82 // CHECK-UNKNOWN: e1e17522 <unknown>
84 st1q {za7h.q[w13, 0]}, p2, [x12, x11, lsl #4]
85 // CHECK-INST: st1q {za7h.q[w13, 0]}, p2, [x12, x11, lsl #4]
86 // CHECK-ENCODING: [0x87,0x29,0xeb,0xe1]
87 // CHECK-ERROR: instruction requires: sme
88 // CHECK-UNKNOWN: e1eb2987 <unknown>
90 st1q za0h.q[w12, 0], p0, [x0, x0, lsl #4]
91 // CHECK-INST: st1q {za0h.q[w12, 0]}, p0, [x0, x0, lsl #4]
92 // CHECK-ENCODING: [0x00,0x00,0xe0,0xe1]
93 // CHECK-ERROR: instruction requires: sme
94 // CHECK-UNKNOWN: e1e00000 <unknown>
96 st1q za5h.q[w14, 0], p5, [x10, x21, lsl #4]
97 // CHECK-INST: st1q {za5h.q[w14, 0]}, p5, [x10, x21, lsl #4]
98 // CHECK-ENCODING: [0x45,0x55,0xf5,0xe1]
99 // CHECK-ERROR: instruction requires: sme
100 // CHECK-UNKNOWN: e1f55545 <unknown>
102 st1q za7h.q[w15, 0], p3, [x13, x8, lsl #4]
103 // CHECK-INST: st1q {za7h.q[w15, 0]}, p3, [x13, x8, lsl #4]
104 // CHECK-ENCODING: [0xa7,0x6d,0xe8,0xe1]
105 // CHECK-ERROR: instruction requires: sme
106 // CHECK-UNKNOWN: e1e86da7 <unknown>
108 st1q za15h.q[w15, 0], p7, [sp]
109 // CHECK-INST: st1q {za15h.q[w15, 0]}, p7, [sp]
110 // CHECK-ENCODING: [0xef,0x7f,0xff,0xe1]
111 // CHECK-ERROR: instruction requires: sme
112 // CHECK-UNKNOWN: e1ff7fef <unknown>
114 st1q za5h.q[w12, 0], p3, [x17, x16, lsl #4]
115 // CHECK-INST: st1q {za5h.q[w12, 0]}, p3, [x17, x16, lsl #4]
116 // CHECK-ENCODING: [0x25,0x0e,0xf0,0xe1]
117 // CHECK-ERROR: instruction requires: sme
118 // CHECK-UNKNOWN: e1f00e25 <unknown>
120 st1q za1h.q[w12, 0], p1, [x1, x30, lsl #4]
121 // CHECK-INST: st1q {za1h.q[w12, 0]}, p1, [x1, x30, lsl #4]
122 // CHECK-ENCODING: [0x21,0x04,0xfe,0xe1]
123 // CHECK-ERROR: instruction requires: sme
124 // CHECK-UNKNOWN: e1fe0421 <unknown>
126 st1q za8h.q[w14, 0], p5, [x19, x20, lsl #4]
127 // CHECK-INST: st1q {za8h.q[w14, 0]}, p5, [x19, x20, lsl #4]
128 // CHECK-ENCODING: [0x68,0x56,0xf4,0xe1]
129 // CHECK-ERROR: instruction requires: sme
130 // CHECK-UNKNOWN: e1f45668 <unknown>
132 st1q za0h.q[w12, 0], p6, [x12, x2, lsl #4]
133 // CHECK-INST: st1q {za0h.q[w12, 0]}, p6, [x12, x2, lsl #4]
134 // CHECK-ENCODING: [0x80,0x19,0xe2,0xe1]
135 // CHECK-ERROR: instruction requires: sme
136 // CHECK-UNKNOWN: e1e21980 <unknown>
138 st1q za1h.q[w14, 0], p2, [x1, x26, lsl #4]
139 // CHECK-INST: st1q {za1h.q[w14, 0]}, p2, [x1, x26, lsl #4]
140 // CHECK-ENCODING: [0x21,0x48,0xfa,0xe1]
141 // CHECK-ERROR: instruction requires: sme
142 // CHECK-UNKNOWN: e1fa4821 <unknown>
144 st1q za13h.q[w12, 0], p2, [x22, x30, lsl #4]
145 // CHECK-INST: st1q {za13h.q[w12, 0]}, p2, [x22, x30, lsl #4]
146 // CHECK-ENCODING: [0xcd,0x0a,0xfe,0xe1]
147 // CHECK-ERROR: instruction requires: sme
148 // CHECK-UNKNOWN: e1fe0acd <unknown>
150 st1q za2h.q[w15, 0], p5, [x9, x1, lsl #4]
151 // CHECK-INST: st1q {za2h.q[w15, 0]}, p5, [x9, x1, lsl #4]
152 // CHECK-ENCODING: [0x22,0x75,0xe1,0xe1]
153 // CHECK-ERROR: instruction requires: sme
154 // CHECK-UNKNOWN: e1e17522 <unknown>
156 st1q za7h.q[w13, 0], p2, [x12, x11, lsl #4]
157 // CHECK-INST: st1q {za7h.q[w13, 0]}, p2, [x12, x11, lsl #4]
158 // CHECK-ENCODING: [0x87,0x29,0xeb,0xe1]
159 // CHECK-ERROR: instruction requires: sme
160 // CHECK-UNKNOWN: e1eb2987 <unknown>
162 // --------------------------------------------------------------------------//
163 // Vertical
165 st1q {za0v.q[w12, 0]}, p0, [x0, x0, lsl #4]
166 // CHECK-INST: st1q {za0v.q[w12, 0]}, p0, [x0, x0, lsl #4]
167 // CHECK-ENCODING: [0x00,0x80,0xe0,0xe1]
168 // CHECK-ERROR: instruction requires: sme
169 // CHECK-UNKNOWN: e1e08000 <unknown>
171 st1q {za5v.q[w14, 0]}, p5, [x10, x21, lsl #4]
172 // CHECK-INST: st1q {za5v.q[w14, 0]}, p5, [x10, x21, lsl #4]
173 // CHECK-ENCODING: [0x45,0xd5,0xf5,0xe1]
174 // CHECK-ERROR: instruction requires: sme
175 // CHECK-UNKNOWN: e1f5d545 <unknown>
177 st1q {za7v.q[w15, 0]}, p3, [x13, x8, lsl #4]
178 // CHECK-INST: st1q {za7v.q[w15, 0]}, p3, [x13, x8, lsl #4]
179 // CHECK-ENCODING: [0xa7,0xed,0xe8,0xe1]
180 // CHECK-ERROR: instruction requires: sme
181 // CHECK-UNKNOWN: e1e8eda7 <unknown>
183 st1q {za15v.q[w15, 0]}, p7, [sp]
184 // CHECK-INST: st1q {za15v.q[w15, 0]}, p7, [sp]
185 // CHECK-ENCODING: [0xef,0xff,0xff,0xe1]
186 // CHECK-ERROR: instruction requires: sme
187 // CHECK-UNKNOWN: e1ffffef <unknown>
189 st1q {za5v.q[w12, 0]}, p3, [x17, x16, lsl #4]
190 // CHECK-INST: st1q {za5v.q[w12, 0]}, p3, [x17, x16, lsl #4]
191 // CHECK-ENCODING: [0x25,0x8e,0xf0,0xe1]
192 // CHECK-ERROR: instruction requires: sme
193 // CHECK-UNKNOWN: e1f08e25 <unknown>
195 st1q {za1v.q[w12, 0]}, p1, [x1, x30, lsl #4]
196 // CHECK-INST: st1q {za1v.q[w12, 0]}, p1, [x1, x30, lsl #4]
197 // CHECK-ENCODING: [0x21,0x84,0xfe,0xe1]
198 // CHECK-ERROR: instruction requires: sme
199 // CHECK-UNKNOWN: e1fe8421 <unknown>
201 st1q {za8v.q[w14, 0]}, p5, [x19, x20, lsl #4]
202 // CHECK-INST: st1q {za8v.q[w14, 0]}, p5, [x19, x20, lsl #4]
203 // CHECK-ENCODING: [0x68,0xd6,0xf4,0xe1]
204 // CHECK-ERROR: instruction requires: sme
205 // CHECK-UNKNOWN: e1f4d668 <unknown>
207 st1q {za0v.q[w12, 0]}, p6, [x12, x2, lsl #4]
208 // CHECK-INST: st1q {za0v.q[w12, 0]}, p6, [x12, x2, lsl #4]
209 // CHECK-ENCODING: [0x80,0x99,0xe2,0xe1]
210 // CHECK-ERROR: instruction requires: sme
211 // CHECK-UNKNOWN: e1e29980 <unknown>
213 st1q {za1v.q[w14, 0]}, p2, [x1, x26, lsl #4]
214 // CHECK-INST: st1q {za1v.q[w14, 0]}, p2, [x1, x26, lsl #4]
215 // CHECK-ENCODING: [0x21,0xc8,0xfa,0xe1]
216 // CHECK-ERROR: instruction requires: sme
217 // CHECK-UNKNOWN: e1fac821 <unknown>
219 st1q {za13v.q[w12, 0]}, p2, [x22, x30, lsl #4]
220 // CHECK-INST: st1q {za13v.q[w12, 0]}, p2, [x22, x30, lsl #4]
221 // CHECK-ENCODING: [0xcd,0x8a,0xfe,0xe1]
222 // CHECK-ERROR: instruction requires: sme
223 // CHECK-UNKNOWN: e1fe8acd <unknown>
225 st1q {za2v.q[w15, 0]}, p5, [x9, x1, lsl #4]
226 // CHECK-INST: st1q {za2v.q[w15, 0]}, p5, [x9, x1, lsl #4]
227 // CHECK-ENCODING: [0x22,0xf5,0xe1,0xe1]
228 // CHECK-ERROR: instruction requires: sme
229 // CHECK-UNKNOWN: e1e1f522 <unknown>
231 st1q {za7v.q[w13, 0]}, p2, [x12, x11, lsl #4]
232 // CHECK-INST: st1q {za7v.q[w13, 0]}, p2, [x12, x11, lsl #4]
233 // CHECK-ENCODING: [0x87,0xa9,0xeb,0xe1]
234 // CHECK-ERROR: instruction requires: sme
235 // CHECK-UNKNOWN: e1eba987 <unknown>
237 st1q za0v.q[w12, 0], p0, [x0, x0, lsl #4]
238 // CHECK-INST: st1q {za0v.q[w12, 0]}, p0, [x0, x0, lsl #4]
239 // CHECK-ENCODING: [0x00,0x80,0xe0,0xe1]
240 // CHECK-ERROR: instruction requires: sme
241 // CHECK-UNKNOWN: e1e08000 <unknown>
243 st1q za5v.q[w14, 0], p5, [x10, x21, lsl #4]
244 // CHECK-INST: st1q {za5v.q[w14, 0]}, p5, [x10, x21, lsl #4]
245 // CHECK-ENCODING: [0x45,0xd5,0xf5,0xe1]
246 // CHECK-ERROR: instruction requires: sme
247 // CHECK-UNKNOWN: e1f5d545 <unknown>
249 st1q za7v.q[w15, 0], p3, [x13, x8, lsl #4]
250 // CHECK-INST: st1q {za7v.q[w15, 0]}, p3, [x13, x8, lsl #4]
251 // CHECK-ENCODING: [0xa7,0xed,0xe8,0xe1]
252 // CHECK-ERROR: instruction requires: sme
253 // CHECK-UNKNOWN: e1e8eda7 <unknown>
255 st1q za15v.q[w15, 0], p7, [sp]
256 // CHECK-INST: st1q {za15v.q[w15, 0]}, p7, [sp]
257 // CHECK-ENCODING: [0xef,0xff,0xff,0xe1]
258 // CHECK-ERROR: instruction requires: sme
259 // CHECK-UNKNOWN: e1ffffef <unknown>
261 st1q za5v.q[w12, 0], p3, [x17, x16, lsl #4]
262 // CHECK-INST: st1q {za5v.q[w12, 0]}, p3, [x17, x16, lsl #4]
263 // CHECK-ENCODING: [0x25,0x8e,0xf0,0xe1]
264 // CHECK-ERROR: instruction requires: sme
265 // CHECK-UNKNOWN: e1f08e25 <unknown>
267 st1q za1v.q[w12, 0], p1, [x1, x30, lsl #4]
268 // CHECK-INST: st1q {za1v.q[w12, 0]}, p1, [x1, x30, lsl #4]
269 // CHECK-ENCODING: [0x21,0x84,0xfe,0xe1]
270 // CHECK-ERROR: instruction requires: sme
271 // CHECK-UNKNOWN: e1fe8421 <unknown>
273 st1q za8v.q[w14, 0], p5, [x19, x20, lsl #4]
274 // CHECK-INST: st1q {za8v.q[w14, 0]}, p5, [x19, x20, lsl #4]
275 // CHECK-ENCODING: [0x68,0xd6,0xf4,0xe1]
276 // CHECK-ERROR: instruction requires: sme
277 // CHECK-UNKNOWN: e1f4d668 <unknown>
279 st1q za0v.q[w12, 0], p6, [x12, x2, lsl #4]
280 // CHECK-INST: st1q {za0v.q[w12, 0]}, p6, [x12, x2, lsl #4]
281 // CHECK-ENCODING: [0x80,0x99,0xe2,0xe1]
282 // CHECK-ERROR: instruction requires: sme
283 // CHECK-UNKNOWN: e1e29980 <unknown>
285 st1q za1v.q[w14, 0], p2, [x1, x26, lsl #4]
286 // CHECK-INST: st1q {za1v.q[w14, 0]}, p2, [x1, x26, lsl #4]
287 // CHECK-ENCODING: [0x21,0xc8,0xfa,0xe1]
288 // CHECK-ERROR: instruction requires: sme
289 // CHECK-UNKNOWN: e1fac821 <unknown>
291 st1q za13v.q[w12, 0], p2, [x22, x30, lsl #4]
292 // CHECK-INST: st1q {za13v.q[w12, 0]}, p2, [x22, x30, lsl #4]
293 // CHECK-ENCODING: [0xcd,0x8a,0xfe,0xe1]
294 // CHECK-ERROR: instruction requires: sme
295 // CHECK-UNKNOWN: e1fe8acd <unknown>
297 st1q za2v.q[w15, 0], p5, [x9, x1, lsl #4]
298 // CHECK-INST: st1q {za2v.q[w15, 0]}, p5, [x9, x1, lsl #4]
299 // CHECK-ENCODING: [0x22,0xf5,0xe1,0xe1]
300 // CHECK-ERROR: instruction requires: sme
301 // CHECK-UNKNOWN: e1e1f522 <unknown>
303 st1q za7v.q[w13, 0], p2, [x12, x11, lsl #4]
304 // CHECK-INST: st1q {za7v.q[w13, 0]}, p2, [x12, x11, lsl #4]
305 // CHECK-ENCODING: [0x87,0xa9,0xeb,0xe1]
306 // CHECK-ERROR: instruction requires: sme
307 // CHECK-UNKNOWN: e1eba987 <unknown>