llvm/test/MC/AArch64/SME2/suvdot-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // Out of range index offset
   5
   6 suvdot za.s[w8, 8, vgx4], {z0.b-z3.b}, z0.b[0]
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
   8 // CHECK-NEXT: suvdot za.s[w8, 8, vgx4], {z0.b-z3.b}, z0.b[0]
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 suvdot za.s[w8, -1, vgx4], {z0.b-z3.b}, z0.b[0]
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [0, 7].
  13 // CHECK-NEXT: suvdot za.s[w8, -1, vgx4], {z0.b-z3.b}, z0.b[0]
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16 // --------------------------------------------------------------------------//
  17 // Invalid vector select register
  18
  19 suvdot za.s[w7, 0, vgx4], {z4.b-z7.b}, z0.b[3]
  20 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
  21 // CHECK-NEXT: suvdot za.s[w7, 0, vgx4], {z4.b-z7.b}, z0.b[3]
  22 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  23
  24 suvdot za.s[w12, 0, vgx4], {z8.b-z11.b}, z5.b[5]
  25 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must be a register in range [w8, w11]
  26 // CHECK-NEXT: suvdot za.s[w12, 0, vgx4], {z8.b-z11.b}, z5.b[5]
  27 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  28
  29 // --------------------------------------------------------------------------//
  30 // Invalid vector list
  31
  32 suvdot za.s[w8, 0, vgx4], {z0.b-z4.b}, z0.b[3]
  33 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
  34 // CHECK-NEXT: suvdot za.s[w8, 0, vgx4], {z0.b-z4.b}, z0.b[3]
  35 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  36
  37 suvdot za.s[w8, 0, vgx4], {z1.b-z4.b}, z15.b[0]
  38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element type
  39 // CHECK-NEXT: suvdot za.s[w8, 0, vgx4], {z1.b-z4.b}, z15.b[0]
  40 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  41
  42 // --------------------------------------------------------------------------//
  43 // Invalid Matrix Operand
  44
  45 suvdot za.h[w8, 0, vgx4], {z0.b-z3.b}, z4.b[7]
  46 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand, expected suffix .s
  47 // CHECK-NEXT: suvdot za.h[w8, 0, vgx4], {z0.b-z3.b}, z4.b[7]
  48 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  49
  50 // --------------------------------------------------------------------------//
  51 // Invalid vector grouping
  52
  53 suvdot za.s[w8, 0, vgx2], {z0.b-z3.b}, z14.b[3]
  54 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  55 // CHECK-NEXT: suvdot za.s[w8, 0, vgx2], {z0.b-z3.b}, z14.b[3]
  56 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  57
  58 // --------------------------------------------------------------------------//
  59 // Invalid lane index
  60
  61 suvdot za.s[w8, 0, vgx4], {z0.b-z3.b}, z14.b[4]
  62 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]
  63 // CHECK-NEXT: suvdot za.s[w8, 0, vgx4], {z0.b-z3.b}, z14.b[4]
  64 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  65
  66 suvdot za.s[w8, 0, vgx4], {z0.b-z3.b}, z14.b[-1]
  67 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3]
  68 // CHECK-NEXT: suvdot za.s[w8, 0, vgx4], {z0.b-z3.b}, z14.b[-1]
  69 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: