[Frontend] Remove unused includes (NFC) (#116927)
[llvm-project.git] / llvm / test / MC / AArch64 / SME2p2 / fmop4a-fp8-fp16-widening-diagnostics.s
blob20cbb53cde985d1a1614e6401bcdd115fadf14e3
1 // RUN: not llvm-mc -triple=aarch64 -mattr=+sme2p2,+sme-f8f16 < %s 2>&1 | FileCheck %s
3 // Single vectors
5 fmop4a za0.d, z0.b, z16.b
6 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
8 fmop4a za2.h, z0.b, z16.b
9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
11 fmop4a za0.h, z0.s, z16.b
12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.b..z14.b
14 fmop4a za0.h, z15.b, z16.b
15 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.b..z14.b
17 fmop4a za0.h, z16.b, z16.b
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.b..z14.b
20 fmop4a za0.h, z0.b, z16.s
21 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
23 fmop4a za0.h, z12.b, z17.b
24 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
26 fmop4a za0.h, z12.b, z14.b
27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
29 fmop4a za0.h, z12.b, z31.b
30 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
32 // Single and multiple vectors
34 fmop4a za0.d, z0.b, {z16.b-z17.b}
35 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
37 fmop4a za2.h, z0.b, {z16.b-z17.b}
38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
40 fmop4a za0.h, z0.s, {z16.b-z17.b}
41 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.b..z14.b
43 fmop4a za0.h, z1.b, {z16.b-z17.b}
44 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.b..z14.b
46 fmop4a za0.h, z16.b, {z16.b-z17.b}
47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.b..z14.b
49 fmop4a za0.h, z0.b, {z16.s-z17.s}
50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
52 fmop4a za0.h, z0.b, {z17.b-z18.b}
53 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
55 fmop4a za0.h, z0.b, {z16.b-z18.b}
56 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
58 fmop4a za0.h, z0.b, {z12.b-z13.b}
59 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
61 // Multiple and single vectors
63 fmop4a za0.d, {z0.b-z1.b}, z16.b
64 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
66 fmop4a za2.h, {z0.b-z1.b}, z16.b
67 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
69 fmop4a za0.h, {z0.s-z1.b}, z16.b
70 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix
72 fmop4a za0.h, {z1.b-z2.b}, z16.b
73 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
75 fmop4a za2.h, {z0.b-z2.b}, z16.b
76 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
78 fmop4a za0.h, {z16.b-z17.b}, z16.b
79 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
81 fmop4a za0.h, {z0.b-z1.b}, z16.d
82 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
84 fmop4a za0.h, {z0.b-z1.b}, z17.b
85 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
87 fmop4a za0.h, {z0.b-z1.b}, z12.b
88 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
90 // Multiple vectors
92 fmop4a za0.d, {z0.b-z1.b}, {z16.b-z17.b}
93 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid matrix operand
95 fmop4a za2.h, {z0.b-z1.b}, {z16.b-z17.b}
96 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
98 fmop4a za0.h, {z0.s-z1.s}, {z16.b-z17.b}
99 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
101 fmop4a za0.h, {z1.b-z2.b}, {z16.b-z17.b}
102 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
104 fmop4a za0.h, {z0.b-z2.b}, {z16.b-z17.b}
105 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
107 fmop4a za0.h, {z18.b-z19.b}, {z16.b-z17.b}
108 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
110 fmop4a za0.h, {z0.b-z1.b}, {z16.s-z17.s}
111 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
113 fmop4a za0.h, {z0.b-z1.b}, {z19.b-z20.b}
114 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
116 fmop4a za0.h, {z0.b-z1.b}, {z18.b-z20.b}
117 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
119 fmop4a za0.h, {z0.b-z1.b}, {z10.b-z11.b}
120 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types