llvm/test/MC/AArch64/SME2p2/smop4a-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p2,+sme-i16i64 2>&1 < %s| FileCheck %s
   2
   3 // ------------------------------------------------------------------------- //
   4 // Invalid tile
   5 //
   6 // expected: .s => za0-za3, .d => za0-za7
   7
   8 smop4a za4.s, z0.b, z16.b
   9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  10 // CHECK-NEXT: smop4a za4.s, z0.b, z16.b
  11 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  12
  13 smop4a za4.s, z0.h, z16.h
  14 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  15 // CHECK-NEXT: smop4a za4.s, z0.h, z16.h
  16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  17
  18 smop4a za8.d, z0.h, z16.h
  19 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  20 // CHECK-NEXT: smop4a za8.d, z0.h, z16.h
  21 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  22
  23 // ------------------------------------------------------------------------- //
  24 // Invalid first operand (expected z0..z15)
  25
  26 smop4a za0.d, z16.h, z16.h
  27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.h..z14.h
  28 // CHECK-NEXT: smop4a za0.d, z16.h, z16.h
  29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  30
  31 smop4a za0.s, {z16.h-z17.h}, z16.h
  32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z0-z14, where the first vector is a multiple of 2 and with matching element types
  33 // CHECK-NEXT: smop4a za0.s, {z16.h-z17.h}, z16.h
  34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  35
  36 smop4a za0.s, z16.b, z16.b
  37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.b..z14.b
  38 // CHECK-NEXT: smop4a za0.s, z16.b, z16.b
  39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  40
  41 // ------------------------------------------------------------------------- //
  42 // Invalid second operand (expected z16..z31)
  43
  44 smop4a za0.d, z14.h, z14.h
  45 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
  46 // CHECK-NEXT: smop4a za0.d, z14.h, z14.h
  47 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  48
  49 smop4a za0.s, z14.h, {z14.h-z15.h}
  50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors in the range z16-z30, where the first vector is a multiple of 2 and with matching element types
  51 // CHECK-NEXT: smop4a za0.s, z14.h, {z14.h-z15.h}
  52 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  53
  54 smop4a za0.s, z14.b, z14.b
  55 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
  56 // CHECK-NEXT: smop4a za0.s, z14.b, z14.b
  57 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  58
  59 // ------------------------------------------------------------------------- //
  60 // Invalid ZPR type suffix
  61 //
  62 // expected: .s => .b, .s => .h, .d => .h
  63
  64 smop4a za3.s, z0.h, z16.b
  65 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
  66 // CHECK-NEXT: smop4a za3.s, z0.h, z16.b
  67 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  68
  69 smop4a za3.s, z0.b, z16.s
  70 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.b..z30.b
  71 // CHECK-NEXT: smop4a za3.s, z0.b, z16.s
  72 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  73
  74 smop4a za3.d, z0.h, z16.b
  75 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z16.h..z30.h
  76 // CHECK-NEXT: smop4a za3.d, z0.h, z16.b
  77 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  78
  79 smop4a za3.d, z0.s, z16.h
  80 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected even register in z0.h..z14.h
  81 // CHECK-NEXT: smop4a za3.d, z0.s, z16.h
  82 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: