llvm/test/MC/AArch64/SVE/matrix-multiply-int8-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve,+i8mm  2>&1 < %s | FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // SMMLA, UMMLA, USMMLA (SVE)
   5
   6 // Invalid element size
   7
   8 ummla z0.h, z1.b, z2.b
   9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  10 ummla z0.s, z1.h, z2.b
  11 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  12 ummla z0.s, z1.b, z2.d
  13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  14
  15 // Negative tests for instructions that are incompatible with predicated movprfx
  16
  17 movprfx z0.d, p0/z, z7.d
  18 ummla z0.s, z1.b, z2.b
  19 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
  20 movprfx z0.d, p0/z, z7.d
  21 smmla z0.s, z1.b, z2.b
  22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
  23 movprfx z0.d, p0/z, z7.d
  24 usmmla z0.s, z1.b, z2.b
  25 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
  26
  27
  28 // --------------------------------------------------------------------------//
  29 // USDOT (SVE, vectors)
  30
  31 // Invalid element size
  32
  33 usdot z0.d, z1.b, z2.b
  34 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  35 usdot z0.s, z1.s, z2.b
  36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  37 usdot z0.s, z1.b, z2.h
  38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.b..z7.b
  39
  40 // Negative tests for instructions that are incompatible with predicated movprfx
  41
  42 movprfx z0.d, p0/z, z7.d
  43 usdot z0.s, z1.b, z2.b
  44 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
  45
  46
  47 // --------------------------------------------------------------------------//
  48 // USDOT, SUDOT (SVE, indexed)
  49
  50 // Invalid element size
  51
  52 usdot z0.h, z1.b, z2.b[0]
  53 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  54 sudot z0.s, z1.h, z2.b[0]
  55 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  56 usdot z0.s, z1.b, z2.s[0]
  57 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.b..z7.b
  58
  59 // Invalid restricted register for indexed vector.
  60 usdot z0.s, z1.b, z9.b[0]
  61 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  62 sudot z0.s, z1.b, z9.b[0]
  63 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid restricted vector register, expected z0.b..z7.b
  64
  65 // Invalid element index
  66 usdot z0.s, z1.b, z2.b[4]
  67 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
  68 sudot z0.s, z1.b, z2.b[4]
  69 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].
  70
  71 // Negative tests for instructions that are incompatible with predicated movprfx
  72
  73 movprfx z0.d, p0/z, z7.d
  74 usdot z0.s, z1.b, z2.b[0]
  75 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx
  76 movprfx z0.d, p0/z, z7.d
  77 sudot z0.s, z1.b, z2.b[3]
  78 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx